JP4809033B2 - Diffusion wafer manufacturing method - Google Patents

Description

  The present invention relates to a method for manufacturing a diffusion wafer.

  To manufacture power devices for discrete applications such as high-power transistors, diodes, and rectifiers, a diffusion wafer consisting of two layers, a low-resistivity diffusion layer in which a high-concentration dopant is diffused and a high-resistivity non-diffusion layer Is used.

  The thickness of the non-diffusion layer of the diffusion wafer affects the device characteristics. For this reason, it is necessary to form the non-diffusion layer with high accuracy without variation in the thickness of the non-diffusion layer between the wafers and in-plane.

  An example of a conventional method for manufacturing a diffusion wafer is shown in FIG.

  Hereinafter, as shown in FIG. 2, the surface 21 a of the non-diffusion layer 21 of the diffusion wafer 20 is referred to as the “surface” of the diffusion wafer 20, and the surface of the diffusion layer 22 of the diffusion wafer 20 is referred to as “ It shall be called the “back side”.

(1) Slicing step A silicon wafer is obtained by slicing a silicon ingot.

(2) Chamfering process Chamfering (beveling) processing to form a chamfered portion 23 by applying a rotating grindstone to the edge of the side end surface of a sliced silicon wafer to round the edge to prevent wafer cracking and dust generation. Is given.

(3) Lapping process In order to remove damage such as surface scratches and irregularities caused by slicing and to flatten the wafer, the silicon wafer is set in a lapping apparatus and the surface of the silicon wafer is lapped.

(4) Alkali etching process In order to remove the processing strain layer on the flattened wafer surface, the silicon wafer is immersed in an alkaline etching solution and etched.

(5) Diffusion process The silicon wafer loaded in the boat in the furnace is exposed to an atmosphere containing high temperature and dopant for a predetermined time to form diffusion layers on both surfaces of the wafer.

(6) Two-dividing step As shown in FIG. 2 (a), the silicon wafer is cut along a thickness center of the silicon wafer, for example, with a wire saw, and the silicon wafer is divided into two pieces. The diffusion wafer 20 is acquired.

(7) Grinding process In order to flatten the surface of the non-diffusion layer 21 of the diffusion wafer 1, the diffusion wafer 20 is set in a single-side grinding machine, and a grinding wheel is applied to the surface 21 a of the non-diffusion layer 21 of the diffusion wafer 20. Press to grind.

(8) Chamfering step As shown in FIG. 2 (b), in order to prevent the diffusion wafer 20 from cracking and dust generation, the edge of the side surface of the sliced diffusion wafer 20 is applied with a rotating grindstone to round the edge. Chamfering (beveling) is applied.

(9) Pasting step The surface 22a of the diffusion layer 22 of the plurality of diffusion wafers 20 is pasted onto the plate with wax or the like.

(10) Batch polishing process The thickness of the non-diffusion layer 21 of the diffusion wafer 20 is set to a desired thickness, and the plate is inverted to remove mechanical damage (both brittle and ductile damage) given in the grinding process. Then, the surface of the non-diffusion layer 3 is set so as to be pressed against the polishing cloth of the surface plate of the polishing apparatus, and the plurality of diffusion wafers 20 are simultaneously subjected to batch polishing by rotating the plate and the surface plate.

  An example of another conventional method for manufacturing a diffusion wafer is shown in FIG. This manufacturing method is disclosed in Patent Document 1 below.

  The steps from (1) to (8) are the same as the manufacturing method of FIG. 1 described above. Instead of the steps (9) and (10) in FIG. 1, the following steps (11) and (12) are performed.

(11) Back surface protective film forming step In order to protect the back surface 22a of the diffusion wafer 20 (the surface 22a of the diffusion layer 22) from being dissolved by etching, an oxide film is formed on the back surface 22a.

(12) Batch single-sided wet etching process The thickness of the non-diffusion layer 21 of the diffusion wafer 20 is set to a desired thickness, and in order to remove the mechanical damage given in the grinding process, the etching solution should be contained. The plurality of diffusion wafers 20 are immersed, and the surface 21a of the diffusion wafer 20 on which the protective film is not formed (the surface 21a of the non-diffusion layer 21) is etched.
Japanese Patent Laid-Open No. 10-55988

  Discrete elements (for example, PowerMoSFET, Fast Recovery Diode) manufactured using the diffusion wafer 20 are necessary for industrial manufacture to keep the unit cost of the wafer low and the manufacturing cost low because the market price is low. .

  Since the polishing rate by polishing is generally low, it is necessary to increase the productivity and reduce the manufacturing cost by increasing the number of wafers to be polished per batch.

  Therefore, as in the manufacturing method of FIG. 1, it has been common general practice to perform a batch polishing step (10) and polish a plurality of diffusion wafers 20 simultaneously.

  On the other hand, in the batch polishing process, a plurality of diffusion wafers 20 attached to one plate must be in a state of being evenly arranged.

  Here, since the diffusion wafer 20 is extremely thin, a large warp is generated by the dopant distribution generated in the depth direction of the diffusion wafer 20. For this reason, the diffusion wafer 20 cannot be mounted on the plate with high accuracy in the pasting step which is a preparation step of the batch polishing step. In addition, since wax is interposed between the plate and the diffusion wafer 20, the polishing allowance of the diffusion wafer 20 varies depending on the thickness of the wax. For this reason, even if each diffusion wafer 20 can be polished simultaneously in the batch polishing step, the non-diffusive layer 21 of the diffusion wafer 20 cannot be uniformly polished, and the thickness of the non-diffuse layer 21 varies greatly. For this reason, there arises a problem that the yield is lowered when manufacturing the device.

  Particularly, in recent years, with the increase in the diameter of the diffusion wafer 20, the accuracy of the thickness of the non-diffusion layer 21 of the diffusion wafer 20 is required more than before, and the current manufacturing method cannot meet this requirement. It is coming.

  Further, in the chamfering step (8), the chamfered portion formed on the diffusion wafer 20 is not polished and has a rough surface so that mechanical damage received in the previous step can be completely removed. Not.

  Here, the diffusion wafer 20 is extremely thin. In addition, as described above, the surface damage (such as processing distortion) of the chamfered portion 23 has not been completely removed. For this reason, when heat treatment is performed on the diffusion wafer 20 in the device manufacturing process, slips run from the chamfered portion 23 and dislocation occurs easily.

  Of course, the surface of the chamfered portion 23 of the diffusion wafer 20 may be mirror-polished. However, since the diffusion wafer 20 is extremely thin and has low rigidity, cracks may easily occur when the wafer is fixed to the polishing apparatus. Therefore, it is technically difficult to mirror-polish only the chamfer 23.

  On the other hand, in the manufacturing method shown in FIG. 3, in order to perform the batch single-sided wet etching step (12), the back surface protective film forming step (11) must be performed as a preparation step, and the manufacturing cost is accordingly increased. Is expensive.

  In the batch single-sided wet etching step (12), an immersion type etching apparatus is used. However, since each part in the cage has a jig or the like, the etching solution forms a turbulent flow, forms a vortex on the diffusion wafer 20, and inhibits a chemical reaction on the surface of the diffusion wafer 20. In addition, the flow of the etching solution is unstable, and the etching conditions greatly vary in each part. For this reason, there is a problem in that the thickness of the diffusion wafer 20 in the plane of the non-diffusion layer 21 varies and a desired flatness cannot be obtained, and the thickness varies between the diffusion wafers 20.

  The present invention has been made in view of such a situation, while suppressing the manufacturing cost of the diffusion wafer, eliminating the variation in the thickness of the diffusion wafer, eliminating the variation in the thickness in the plane, and causing no cracks. An object of the present invention is to reduce the roughness of the chamfered portion.

The first invention is
A chamfering process for chamfering a diffusion wafer composed of a non-diffusion layer and a diffusion layer;
A grinding process for grinding the surface of the non-diffusion layer of the diffusion wafer;
A diffusion wafer manufacturing method comprising: a single wafer single-side etching step of uniformly supplying an etching solution to each part of the surface of the non-diffusion layer of the diffusion wafer and etching one surface of the diffusion wafer with a single wafer. .

The second invention is the first invention,
The single wafer single side etching step is a step of spin etching the diffusion wafer.

The third invention is the second invention,
In single wafer single side etching process,
Gas is discharged toward the back side of the diffusion wafer,
The gas is controlled so that the etching solution dropped toward the surface of the diffusion wafer penetrates into the chamfered portion on the back surface.

A fourth invention is the first invention,
After the single wafer single-sided etching process, a mirror surface finishing polishing process is performed in which the surface of the non-diffusion layer of the diffusion wafer is mirror-finished.

A fifth invention is the first invention,
After the grinding process, measure the thickness of the non-diffusion layer of the diffusion wafer,
In the single-wafer single-sided etching process, a machining allowance having a size corresponding to the measured thickness of the non-diffusion layer is etched.

The sixth invention
A chamfering process for chamfering a diffusion wafer composed of a non-diffusion layer and a diffusion layer;
A diffusion wafer manufacturing method comprising: a single wafer single-side etching step of uniformly supplying an etching solution to each part of the surface of the non-diffusion layer of the diffusion wafer and etching one surface of the diffusion wafer with a single wafer. .

The seventh invention
A chamfering process for chamfering a diffusion wafer composed of a non-diffusion layer and a diffusion layer;
A grinding process for grinding the surface of the non-diffusion layer of the diffusion wafer;
A method for producing a diffusion wafer, comprising a single-wafer single-side polishing step of polishing a surface of a non-diffusion layer of a diffusion wafer with a single wafer.

  According to the first invention, as shown in FIG. 4, the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20 is ground by the grinding step (7). Next, in the chamfering step (8), the diffusion wafer 22 composed of the non-diffusion layer 21 and the diffusion layer 22 is chamfered to form a chamfer 23. Next, in the single wafer single-sided etching step (13), the etchant 32 is uniformly supplied to each part of the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20, and the single side 21a of the diffusion wafer 20 is etched by the single wafer. .

  According to the second invention, in the single wafer single side etching step (13), the diffusion wafer 20 is spin etched using, for example, the spin etching apparatus 30 shown in FIG.

  According to the third invention, in the single wafer single side etching step (13), for example, using the spin etching apparatus 30 shown in FIG. 5, the gas (air) 31 is discharged toward the back surface 22a side of the diffusion wafer 20, The gas (air) 31 is controlled so that the etching solution 32 dropped toward the front surface 21a of the diffusion wafer 20 penetrates into the chamfered portion 23 of the back surface 22a.

  According to the fourth aspect of the invention, a mirror finish polishing step is added after the single-wafer single-side etching step (13), and the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20 is mirror-finished.

  According to the fifth invention, after the grinding step (7), the thickness of the non-diffusion layer 21 of the diffusion wafer 20 is measured, and in the single wafer single-sided etching step (13), according to the measured thickness of the non-diffusion layer 21 A large allowance is etched.

  According to the present invention, effects can be obtained as follows.

  The present invention is compared with the conventional manufacturing method shown in FIG.

  According to the present invention, since the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20 is spin-etched by the single-wafer single-side etching step (13), the conventional batch-type polishing process (step (10 in FIG. 1)) is performed. )) Or higher, the productivity can be improved and the manufacturing cost can be kept low.

  That is, since the etching rate by spin etching is extremely high, even if the diffusion wafers 20 are etched one by one in a single sheet, the same number of diffusion wafers 20 per unit time can be removed by the same machining allowance.

  Moreover, according to this invention, the sticking process (10) as a preparation process of the batch grinding | polishing process which was required with the manufacturing method of the conventional FIG. 1 is unnecessary.

  For this reason, productivity can be improved and manufacturing cost can be kept low.

  Further, according to the present invention, since the wax required in the conventional manufacturing method of FIG. 1 is not used, there is no possibility that the allowance for the diffusion wafer 20 varies due to the influence of the wax. In the spin etching, the etching solution 32 can be made to flow uniformly by centrifugal force, and the etching solution 32 can be uniformly supplied to each part of the diffusion wafer 20, so that the non-diffusion layer 21 of the diffusion wafer 20 can be evenly shaved off. The thickness variation is reduced and the flatness is improved. For this reason, the yield at the time of manufacturing a device improves.

  Further, according to the present invention, since the diffusion wafer 20 is etched by spin etching, not only the surface 21a of the diffusion wafer 20 but also the chamfered portions 23 on the front surface side and the back surface side are etched and the roughness is increased. It becomes low and flatness becomes high, and the mechanical damage received in the existing process can be removed. For this reason, in a device manufacturing process, it is prevented that a slip runs and a dislocation | rearrangement arises from the chamfer 23 as a starting point. In addition, it is not necessary to mirror-polish only the chamfered portion 23 in a subsequent process, and a crack in the chamfered portion 23 can be avoided.

  The present invention is compared with the conventional manufacturing method shown in FIG.

  According to the present invention, the back surface protective film forming step (11) as the preparation step of the batch single-sided wet etching step (12), which is necessary in the conventional manufacturing method shown in FIG. Therefore, the manufacturing cost can be kept low.

  Further, according to the present invention, the etching solution 32 is made to flow uniformly by centrifugal force by spin etching and is uniformly supplied to each part of the diffusion wafer 20. That is, unlike the conventional manufacturing method of FIG. 3, the flow of the etching solution becomes unstable and the etching conditions do not vary greatly in each part. For this reason, the non-diffusion layer 21 of the diffusion wafer 20 can be evenly shaved, thickness variation is reduced, and flatness is improved. For this reason, the yield at the time of manufacturing a device improves.

  In particular, according to the fourth aspect of the invention, a mirror finish polishing step is added after the single wafer single side etching step (13), and the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20 is mirror finish polished. The surface 20a can be finished in a more specular state to meet future high quality requirements such as lower haze levels. Even when the mirror finish polishing step is performed, the allowance for the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20 is minimal, and the polishing time is short, so the effect on productivity is small.

  According to the sixth invention, as shown in FIG. 9, the grinding step (7) of the first invention shown in FIG. 4 is omitted, and the single-wafer single-sided etching step (14) is performed following the chamfering step (8). Is done. In this single wafer single-sided etching step (14), the etching liquid 32 is uniformly supplied to each part of the surface 21a of the diffusion wafer 20 in the same manner as the single-sided single-sided etching step (13) of the first invention. In this process, the etching time and the like are varied so that the same process as the grinding process in the grinding process (7) is performed by etching.

  That is, in the single wafer single side etching step (14), the diffusion wafer 20 is spin-etched so as to obtain the same flatness as that immediately after the grinding step (7) of the first embodiment, and subsequently the first embodiment. The diffusion wafer 20 is spin-etched so that a mirror polished state similar to that immediately after the single-wafer single-sided etching step (13) of the example is obtained.

  According to the seventh invention, as shown in FIG. 12, the steps (1) to (8) are the same as those of the first invention, but the single wafer single-side etching step (13) following the chamfering step (8). ), A single-wafer single-side polishing step (15) is performed.

  In the single wafer single-side polishing step (15), one surface of the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20 is polished with a single wafer using a single-side polishing apparatus. The single-wafer single-side polishing step (15) takes a long processing time to scrape the same number of diffusion wafers 20 by the same amount as compared to the single-wafer single-side etching step (13). For this reason, the productivity is also lowered according to the first invention, but other than that, the same effects as the first invention can be obtained.

  Embodiments of the present invention will be described below with reference to the drawings.

(First embodiment)
FIG. 4 is a flowchart showing a method for manufacturing the diffusion wafer according to the first embodiment.

  In the first embodiment, the following processing is performed.

(1) Slicing step A silicon wafer is obtained by slicing a silicon ingot.

(2) Chamfering process In order to prevent wafer cracking and dust generation, a chamfering process (beveling) is performed by applying a rotating grindstone to the edge of the side end surface of the sliced silicon wafer to round the edge.

(3) Lapping process In order to remove damage such as surface scratches and irregularities caused by slicing and to flatten the wafer, the silicon wafer is set in a lapping apparatus and the surface of the silicon wafer is lapped.

(4) Alkali etching process In order to remove the processing strain layer on the flattened wafer surface, the silicon wafer is immersed in an alkaline etching solution and etched.

(5) Diffusion process The silicon wafers loaded in the boat are exposed to an atmosphere containing high temperature and dopant for a predetermined time to form diffusion layers on both surfaces of the wafer.

(6) Two-dividing step As shown in FIG. 2 (a), the silicon wafer is cut along a thickness center of the silicon wafer, for example, with a wire saw, and the silicon wafer is divided into two pieces. The diffusion wafer 20 is acquired.

(7) Grinding process In order to flatten the surface of the non-diffusion layer 21 of the diffusion wafer 1, the diffusion wafer 20 is set in a single-side grinding machine, and a grinding wheel is applied to the surface 21 a of the non-diffusion layer 21 of the diffusion wafer 20. Press to grind.

(8) Chamfering step As shown in FIG. 2 (b), in order to prevent the diffusion wafer 20 from cracking and dust generation, the edge of the side surface of the sliced diffusion wafer 20 is applied with a rotating grindstone to round the edge. A chamfering (beveling) process is applied.

(13) Single-wafer single-sided etching step In the single-wafer single-sided etching step, the etching solution is uniformly supplied to each part of the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20, and one single-sided surface 21a of the diffusion wafer 20 is a single sheet. Etched one by one.

  In the single wafer single-side etching process of this embodiment, the diffusion wafer 20 is spin-etched.

  FIG. 5 shows a spin etching apparatus used in this embodiment.

  As shown in FIG. 5, in the spin etching apparatus 30, a gas (air) 31 is discharged toward the back surface 22 a side of the diffusion wafer 20, and an etching solution 32 is applied to the front surface 21 a of the diffusion wafer 20. The gas (air) is controlled so as to penetrate into the chamfered portion 23.

  That is, the etchant 32 is dropped through the dispenser 33 toward the substantial center of the surface 21 a of the diffusion wafer 20.

  The diffusion wafer 20 is rotated around the rotation shaft 36. For this reason, as indicated by a broken line, the etching liquid 32 is diffused from the center of the diffusion wafer 20 toward the peripheral edge by centrifugal force, and is uniformly supplied to each part of the surface 21 a of the diffusion wafer 20. The etching solution 32 passes through the edge end surface 20 a and wraps around the back surface 22 a side of the diffusion wafer 20. Thus, the surface 21a of the diffusion wafer 20 is spin-etched.

  The Bernoulli chuck 34 is disposed so that the air 31 is discharged toward the chamfered portion 23 on the back surface 22a side of the diffusion wafer 20 via the air supply path 35.

  The back surface 22a of the diffusion wafer 20 is adjusted by adjusting the flow rate of the air 31 discharged from the Bernoulli chuck 34, the discharge pressure of the air 31, the rotational speed of the diffusion wafer 20, the discharge amount of the etching liquid 32, the viscosity of the etching liquid 32, and the like. The wraparound of the etching solution 32 to the side is adjusted, and the etching width δ of the chamfered portion 23 of the back surface 22a of the diffusion wafer 20 can be controlled. The etching width δ is controlled so as to coincide with the chamfered portion 23 of the back surface 22 a of the diffusion wafer 20.

  As described above, in the single wafer single side etching step, not only the front surface 20a of the diffusion wafer 20 but also the chamfered portion 23 is etched on both the front side and the back side.

  Hereinafter, the effect of the manufacturing method of this embodiment will be described in comparison with the conventional manufacturing method shown in FIGS.

  According to the present embodiment, since the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20 is spin-etched by the single-wafer single-side etching process, the conventional batch type polishing process (process (10) in FIG. 1). As a result, productivity can be improved to a level equal to or higher than that and manufacturing costs can be kept low.

  That is, since the etching rate by spin etching is extremely high, even if the diffusion wafers 20 are etched one by one in a single sheet, the same number of diffusion wafers 20 per unit time can be removed by the same machining allowance.

  Moreover, according to the present Example, the sticking process (10) as a preparation process of a batch grinding | polishing process required with the manufacturing method of the conventional FIG. 1 is unnecessary.

  For this reason, productivity can be improved and manufacturing cost can be kept low.

  Further, according to the present embodiment, since the wax that is necessary in the conventional manufacturing method of FIG. 1 is not used, there is no possibility that the machining allowance of the diffusion wafer 20 varies due to the influence of the wax. In the spin etching, the etching solution 32 can be made to flow uniformly by centrifugal force, and the etching solution 32 can be uniformly supplied to each part of the diffusion wafer 20, so that the non-diffusion layer 21 of the diffusion wafer 20 can be evenly shaved off. The thickness variation is reduced and the flatness is improved. For this reason, the yield at the time of manufacturing a device improves.

  Further, according to this embodiment, since the diffusion wafer 20 is etched by spin etching, not only the surface 21a of the diffusion wafer 20 but also the chamfered portions 23 on the front surface side and the back surface side are etched and roughened. And the flatness becomes high, and mechanical damage received in the existing process can be removed. For this reason, in a device manufacturing process, it is prevented that a slip runs and a dislocation | rearrangement arises from the chamfer 23 as a starting point. In addition, it is not necessary to mirror-polish only the chamfered portion 23 in a subsequent process, and a crack in the chamfered portion 23 can be avoided.

  Contrast with the conventional manufacturing method shown in FIG.

  According to the present embodiment, the back surface protective film forming step (11) as the preparation step of the batch single-sided wet etching step (12), which was necessary in the conventional manufacturing method shown in FIG. The manufacturing cost can be kept low because of the absence of this.

  Further, according to the present embodiment, the etching solution 32 is made to flow uniformly by centrifugal force by spin etching and is uniformly supplied to each part of the diffusion wafer 20. That is, unlike the conventional manufacturing method of FIG. 3, the flow of the etching solution becomes unstable and the etching conditions do not vary greatly in each part. For this reason, the non-diffusion layer 21 of the diffusion wafer 20 can be evenly shaved, thickness variation is reduced, and flatness is improved. For this reason, the yield at the time of manufacturing a device improves.

  FIG. 6 is a photograph for explaining the effect of the present embodiment, and is a photograph of the chamfered portion 23 of the diffusion wafer 20 taken.

  FIG. 6A shows the state of the chamfer 23 immediately after the grinding step (7), and it can be seen that the surface has large irregularities and large roughness. The Ra value indicating the surface roughness was 0,07 μm.

  FIGS. 6B, 6C, 6D, and 6E respectively show the chamfered portion when the surface of the chamfered portion 23 is etched by 5 μm in the (13) single-wafer single-sided etching step (FIG. 6B). When the surface of the chamfered part 23 is etched by 10 μm (FIG. 6C), when the surface of the chamfered part 23 is etched by 15 μm (FIG. 6D), and when the surface of the chamfered part 23 is etched by 20 μm (FIG. 6E) ).

  It can be seen that as the etching amount increases, the unevenness on the surface of the chamfered portion 23 decreases, and the roughness decreases. The Ra values in FIGS. 6B, 6C, 6D, and 6E were 0.05 μm, 0.023 μm, 0.022 μm, and 0.023 μm, respectively.

  Thus, according to the present embodiment, the chamfered portion 23 of the diffusion wafer 20 can be finished to a mirror surface by spin etching.

  FIG. 7 is a graph for explaining the effect of the present example. The vertical axis represents the roughness Ra (Å) of the surface 21a of the diffusion wafer 20, and the horizontal axis represents “immediately after the grinding step” and “5 μm etching. Case, ”“ when 10 μm etched ”,“ when 15 μm etched ”, and“ when 20 μm etched ”are shown.

  L1 indicates the Ra value. It can be seen that as the etching amount increases, the unevenness of the surface 21a of the diffusion wafer 20 decreases and the roughness decreases. It can also be seen that the etching amount is saturated at a predetermined value (10 μm) or more.

  FIG. 8A shows the roughness Ra (μm) of the chamfer 23 of the diffusion wafer 20 manufactured by the conventional manufacturing method shown in FIG. 1 and the chamfering of the diffusion wafer 20 manufactured by the manufacturing method of this embodiment. 6 is a graph comparing roughness Ra (μm) of a portion 23. Comparison was made with respect to a plurality of sampled diffusion wafers 20. In FIG. 7A, the roughness Ra is indicated by variation (standard deviation σ) and average value m.

  As shown in FIG. 8A, it can be seen that according to the present embodiment, the roughness Ra of the chamfered portion 23 is smaller in both the variation (standard deviation σ) and the average value m than in the prior art.

  FIG. 8B shows the thickness (μm) of the non-diffusion layer 21 of the diffusion wafer 20 manufactured by the conventional manufacturing method shown in FIG. 1 and the diffusion wafer 20 manufactured by the manufacturing method of this embodiment. It is the graph which contrasted the thickness (micrometer) of the non-diffusion layer 21 of. Comparison was made with respect to a plurality of sampled diffusion wafers 20. In FIG. 8B, the thickness of the non-diffusion layer 21 is indicated by a variation (standard deviation σ) with respect to the target thickness and an average value m.

  As shown in FIG. 8B, according to the present embodiment, it can be seen that the thickness variation σ of the non-diffusion layer 21 is reduced and the flatness is improved.

  Various modifications can be made to the above-described embodiments. Another embodiment will be described below.

(Second embodiment)
In the second embodiment, the thickness of the non-diffusion layer 21 of the diffusion wafer 20 is measured after the grinding step (7). For example, the thickness of the non-diffusing layer 21 is measured by Fourier transform infrared spectroscopy (FT-IR). In the next single-wafer single-sided etching step (13), a machining allowance having a size corresponding to the measured thickness of the non-diffusion layer 21 is etched.

(Third embodiment)
In the third embodiment, a mirror finish polishing process is performed after the single-wafer single-sided etching process (13).

  That is, the surface 20a of the diffusion wafer 20 including the chamfered portion 23 is finished to a mirror surface state that meets the current quality requirements only by the single-wafer single-side etching step (13). However, if the mirror finish polishing process is performed, the surface 20a of the diffusion wafer 20 can be finished in a more mirror state and meet future high quality requirements such as lowering the haze level.

  In the mirror finish polishing process, the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20 is polished and mirror-finished by the minimum allowance. Even when the mirror finish polishing step is performed, the allowance for the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20 is minimal, and the polishing time is short, so the effect on productivity is small.

(Fourth embodiment)
The manufacturing method of the fourth embodiment is shown in the flowchart of FIG.

  In this embodiment, the grinding step (7) of the first embodiment shown in FIG. 4 is omitted, and the single-wafer single-side etching step (14) is performed following the chamfering step (8). This single-wafer single-side etching step (14) is a step of spin-etching the diffusion wafer 20 in the same manner as the single-wafer single-side etching step (13) of the first embodiment, but is equivalent to the grinding process by the grinding step (7). Etching time and the like are varied so that the processing is performed by etching.

  That is, in the single wafer single side etching step (14), the diffusion wafer 20 is spin-etched so as to obtain the same flatness as that immediately after the grinding step (7) of the first embodiment, and subsequently the first embodiment. The diffusion wafer 20 is spin-etched so that a mirror polished state similar to that immediately after the single-wafer single-sided etching step (13) of the example is obtained.

(5th Example)
In the single wafer single-sided etching steps (13) and (14) of the above-described embodiment, it is assumed that the diffusion wafer 20 is spin-etched by the spin etching apparatus 30 shown in FIG. ) And (14) are not limited to spin etching. Any etching technique can be used as long as the etching solution can be uniformly supplied to each part of the surface 21a of the diffusion wafer 20.

  10 and 11 show another configuration example of the etching apparatus used in the single-wafer single-side etching process.

  In the spin etching apparatus 30 shown in FIG. 5, the etching solution 32 is uniformly supplied to each part of the surface 21a of the diffusion wafer 20 by rotating the diffusion wafer 20, but as shown in FIG. The etching solution 32 may be supplied uniformly to each part of the surface 21a of the diffusion wafer 20 by moving the means side for supplying.

  10A, the diffusion wafer 20 is chucked on the chuck table 41, and the etching solution nozzle 42 provided above the chuck table 41 is moved by swinging, scanning, rotating, and the like. As shown in FIGS. 10C and 10D, the etching solution 32 draws a locus on the surface 21a of the diffusion wafer 20 and is uniformly supplied to each part of the surface 21a. After the etching process, the diffusion wafer 20 is transported and chucked on the cleaning chuck table 43, and the surface of the diffusion wafer 20 is rinsed by the rinsing liquid discharged from the rinsing liquid nozzle 44 provided above the chuck table 43. The etching solution 32 remaining on 21a is removed.

  In the spin etching apparatus 30 shown in FIG. 5, the etching solution 32 is uniformly supplied to each part of the surface 21a of the diffusion wafer 20 by rotating the diffusion wafer 20. However, as shown in FIG. The etching solution 32 may be uniformly supplied to each part of the surface 21 a of the diffusion wafer 20 by moving the means for supplying the substrate and moving the diffusion wafer 20 linearly.

  FIG. 11A is a side view of the etching apparatus 50, and FIG. 11B is a top view of the etching apparatus 50.

In the etching apparatus 50 shown in FIG. 11, the diffusion wafer 20 is conveyed linearly by the rotating roller 51. An etching solution nozzle 52 is provided above the rotating roller 51 and is swung in the left-right direction B perpendicular to the transfer direction A of the diffusion wafer 20. As a result, the etching solution 32 is uniformly supplied to each part of the surface 21a of the diffusion wafer 20 while drawing a locus similar to that shown in FIG.

  When the diffusion wafer 20 is transported to the cleaning position, the etching solution 32 remaining on the surface 21a of the diffusion wafer 20 is removed by the rinsing solution discharged from the rinsing solution nozzle 53 provided above the rotating roller 51. .

(Sixth embodiment)
The manufacturing method of the sixth embodiment is shown in the flowchart of FIG.

  Steps (1) to (8) are the same as those in the first embodiment, but instead of the single-sided etching step (13) following the chamfering step (8), the single-sided polishing step (15) Is implemented.

  In the single wafer single-side polishing step (15), one surface of the surface 21a of the non-diffusion layer 21 of the diffusion wafer 20 is polished with a single wafer using a single-side polishing apparatus. The single-wafer single-side polishing step (15) takes a long processing time to scrape the same number of diffusion wafers 20 by the same amount as compared to the single-wafer single-side etching step (13). For this reason, the productivity is also lowered according to the first embodiment, but the same effects as the first embodiment are obtained otherwise.

  In each of the above-described embodiments, the diffusion wafer 20 is obtained by the two-division process (6). However, the diffusion layer and the non-diffusion layer on one side of the silicon wafer provided with the diffusion layers on both sides are obtained. One half of the wafer may be removed by grinding to obtain the diffusion wafer 20.

FIG. 1 is a flowchart illustrating an example of a conventional method for manufacturing a diffusion wafer. FIG. 2 is a diagram for explaining a procedure for obtaining two diffusion wafers from one silicon wafer. FIG. 3 is an exemplary flowchart of another method of the conventional method for manufacturing a diffusion wafer. FIG. 4 is a flowchart showing the procedure of the manufacturing method of the first embodiment. FIG. 5 is a diagram showing the configuration of the spin etching apparatus used in the first embodiment. FIGS. 6A to 6E are photographs for explaining the effects of the present embodiment, and are photographs of the chamfered portion 23 of the diffusion wafer. FIG. 7 is a graph for explaining the effect of the present embodiment, and is a graph showing the microroughness (Å) of the surface of the diffusion wafer. FIG. 8A shows the roughness Ra (μm) of the chamfered portion of the diffusion wafer manufactured by the conventional manufacturing method shown in FIG. 1 and the roughness of the chamfered portion of the diffusion wafer manufactured by the manufacturing method of this embodiment. FIG. 8B is a graph comparing the thickness Ra (μm), and FIG. 8B shows the thickness of the non-diffusion layer (μm) of the diffusion wafer manufactured by the conventional manufacturing method shown in FIG. It is the graph which contrasted the thickness (micrometer) of the non-diffusion layer 21 of the diffusion wafer manufactured by the method. FIG. 9 is a flowchart showing the procedure of the manufacturing method corresponding to the fourth embodiment. FIGS. 10A, 10B, and 10C are diagrams illustrating another etching apparatus used in the single-wafer single-sided etching process. FIGS. 11A and 11B are diagrams for explaining another etching apparatus used in the single-wafer single-side etching process. FIG. 12 is a flowchart showing the procedure of the manufacturing method corresponding to the sixth embodiment.

Explanation of symbols

  20 Diffusion wafer 21 Non-diffusion layer 22 Diffusion layer 21a Front surface 22a Back surface

Claims (5)

A chamfering process for chamfering a diffusion wafer composed of a non-diffusion layer and a diffusion layer;
A grinding step of grinding the surface of the non-diffusion layer of the diffusion wafer;
A single-wafer single-sided etching step of uniformly supplying an etching solution to each part of the surface of the non-diffusion layer of the diffusion wafer and single-sided etching of the diffusion wafer with a single wafer, and after the grinding step, the diffusion wafer Measuring the thickness of the non-diffusing layer of
In the single-wafer single-side etching step, a machining allowance having a size corresponding to the measured thickness of the non-diffusion layer is etched. The method for manufacturing a diffusion wafer according to claim 1, wherein the single-wafer single-side etching step is a step of spin-etching the diffusion wafer. In the single wafer single side etching step,
Gas is discharged toward the back side of the diffusion wafer,
3. The method for manufacturing a diffusion wafer according to claim 2, wherein the gas is controlled so that the etching solution dropped toward the front surface of the diffusion wafer penetrates into the chamfered portion of the back surface. 2. The method of manufacturing a diffusion wafer according to claim 1, wherein after the single-wafer single-side etching step , a mirror-finishing polishing step of mirror-polishing the surface of the non-diffusion layer of the diffusion wafer is performed. A chamfering process for chamfering a diffusion wafer composed of a non-diffusion layer and a diffusion layer;
A non-diffusing layer of the diffusion wafer, comprising: a single-wafer single-side etching step of uniformly supplying an etching solution to each part of the surface of the non-diffusing layer of the diffusion wafer and etching one surface of the diffusion wafer with a single wafer. Measure the thickness of
In the single wafer single-sided etching step, a removal allowance having a size corresponding to the measured thickness of the non-diffusion layer is etched.

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