JP4750741B2 - Connection structure of electrode terminals in planar optical circuits - Google Patents

Description

  The present invention relates to an electrode terminal connection structure in a planar optical circuit.

[First example of prior art]
In recent years, many planar optical circuits comprising an optical waveguide formed on a planar substrate and electrical wiring formed on the upper surface thereof have been developed. In particular, quartz optical waveguides have low propagation loss, high stability, and excellent long-term reliability. Silica-based planar optical circuits are used in many optical modules as practical optical components. Examples of the planar optical circuit having such an electrical wiring include an optical switch using a thermo-optic effect and a variable optical attenuator.

  FIG. 15A is a schematic view of an example of a conventional waveguide type optical switch formed on a flat substrate. The waveguide type optical switch includes input waveguides 901 and 902, two optical couplers 911 and 921, optical delay waveguides 931 and 932 connecting the two optical couplers 911 and 921, and output waveguides 903 and 904. The refractive index adjusting means 941 is provided in at least one optical delay waveguide.

  As the refractive index adjusting means 941, for example, a relatively high resistance thin film heater such as chromium or tantalum nitride is used, and the refractive index can be adjusted by utilizing the thermo-optic effect. When the refractive index is changed, the effective optical path length difference between the two optical delay waveguides 931 and 932 is changed, so that the light interference state is changed and the optical path can be switched.

  Although not shown, electrical wiring using a low-resistance gold thin film or the like for supplying electric power to the thin film heater loaded in the optical delay waveguides 931 and 932 is formed on the planar optical circuit. Furthermore, the thin film heater and the electrical wiring are covered with an insulating film such as quartz, and the long-term reliability of the thin film heater is ensured by being protected by this insulating film (see Patent Document 1 below).

  Although this waveguide type optical switch may be used independently, a multiple waveguide type optical switch in which a plurality of waveguide type optical switches are arranged at a constant interval is also used. For example, an optical switch or a variable optical attenuator Arrays, optical add / drop multiplexing circuits, N × N matrix optical switches, 1 × N tap optical switches, 1 × N tree optical switches, and the like have been developed (see Non-Patent Documents 1 and 2 below).

  FIG. 15B is a schematic diagram of an example of a conventional planar optical circuit module using a waveguide type optical switch. In the planar optical circuit 951, a large number of optical circuits having electrical wiring such as a waveguide optical switch are formed. An input waveguide (not shown) and an output waveguide (not shown) of the optical circuit provided with these electric wirings are connected to an optical fiber array 957 located on the substrate end face of the planar optical circuit 951.

  On the flat substrate, although not shown, an electrical wiring is formed to connect the thin film heater loaded on the optical waveguide and the electrode terminals 959 arranged on the end surface of the flat optical circuit 951. By supplying power to the electrode terminal 959, the thin film heater loaded on the optical waveguide of each optical circuit can be driven.

  In the package 956, in addition to the planar optical circuit 951, an electrical wiring substrate 952 including an electrical connector 958, an electrode 953, an electrical connector 958, and a wiring 954 connecting the electrode 953 is accommodated. The electrode terminal 959 on the planar optical circuit 951 and the electrode 953 of the electric wiring board 952 are electrically connected by a bonding wire 955.

  A power source can be connected to the electrical connector 958 from the inside or the outside of the planar optical circuit module. With such a configuration, it is possible to easily supply power to the electrode terminal 959 of the planar optical circuit 951 by relaying the electric wiring board 952 (see Patent Document 2 below).

[Second example of prior art]
In recent years, in the field of liquid crystal display devices, a liquid crystal circuit board on which circuit elements and electrode terminals are formed is connected to a wiring board based on a resin film on which electrodes for connecting to the electrode terminals of the liquid crystal circuit board are formed. As a method for this, a method using an anisotropic conductive film is employed. FIG. 16A shows the connection method. An electrode terminal 972 is formed on the upper surface of the liquid crystal circuit substrate 971, and an electrode 963 is formed on the upper surface of the substrate 961 of the wiring substrate 962, both of which are connected via an anisotropic conductive film 966 including conductive particles 967 and an adhesive 968. (See Patent Document 3 below).

  The anisotropic conductive film 966 contains conductive particles 967 in a thermosetting adhesive resin, and the adhesive resin flows by heating and pressurizing during bonding, and exhibits conductivity only in the vertical direction. Has properties. FIG. 16B shows a schematic diagram of an example of the wiring board 962, and FIG. 16C shows a schematic diagram of a cross-sectional structure of a portion indicated by a broken line in FIG. A wiring 964 and an electrode 963 connected to the wiring 964 are formed on the top surface of the substrate 961, and the wiring 964 and a part of the electrode 963 are covered with a cover 965 (see Patent Document 3 below).

  A method of connecting the electrode terminals 972 using the anisotropic conductive film 966 is widely used in the field of liquid crystal display devices, and various techniques have been developed. For example, in the electrode 963 of the wiring board 962 having a plurality of electrodes 963 formed at a predetermined interval and the electrode terminal 972 of the liquid crystal circuit board 971, the pitch of the electrodes 963 having a large thermal displacement is changed to an electrode having a small thermal displacement. By forming a portion where the pitch of the electrode 963 and the electrode terminal 972 used as a reference for alignment is the same as that of the terminal 972, the pitch of the electrode terminal 972 is reduced. A connection method for accurately aligning the large electrode 963 has been developed (see Patent Document 4 below).

  Further, for example, the pitch between the terminals of either the electrode terminal 972 of the liquid crystal circuit board 971 or the electrode 963 of the wiring board 962 formed in a strip shape is constant, and the pitch between the other terminals is the center of the terminal. A connection method has been developed that reduces the connection failure due to the elongation caused by the thermal expansion of the wiring board 962 by setting it smaller in the portion and larger in the direction toward the end.

In addition, for example, a connection method has been developed in which a displacement-preventing insulating film is formed in a predetermined range centered on one edge of either the electrode terminal 972 of the liquid crystal circuit board 971 or the electrode 963 of the wiring board 962 ( (See Patent Document 5 below).
For example, a connection method using a protruding electrode for sandwiching conductive particles between the electrode terminal 972 and the electrode 963 has been developed (see Patent Document 6 below).

JP 2004-233737 A JP 2005-4014 A Japanese Patent Laid-Open No. 11-95245 Japanese Patent Laid-Open No. 9-61840 JP 2000-133396 A JP-A-10-98069 T.A. Goh, “Recent Progress on Silica-based Thermologic Switches for ADMs / XCs,” IEEE Lasers and Electro-Optics Society (LEOS) 1999 12th Anne. 2, pp. 485-486, Nov. 8-11, 1999. Y. Hashizumi, Y. et al. Inoue, T .; Kominato, T .; Shibata, and M.M. Okuno, “Low-PDL16-channel variable Optical Attenuator Array using Silica-based PLC,“ Optical Fiber Communication Conference (OFC) 2004, Vol. 1, WC4, Feb. 23-27, 2004.

  However, the planar optical circuit module of the first example of the prior art shown in FIG. 15B needs to accommodate an electrical wiring board 952 in addition to the planar optical circuit 951 in the package 956. There was a problem that the size of the. On the other hand, the connection method using the anisotropic conductive film 966 described in the second example of the prior art shown in FIG. 16 is a technique widely used in the field of liquid crystal display devices. If the same connection method can be applied to the planar optical circuit 951 shown in FIG. 15B, the electrical wiring board 952 can be omitted and the electrical wiring board 952 can be directly connected to the electrode terminal 959 of the planar optical circuit. Therefore, it is expected that the planar optical circuit module can be greatly reduced in size.

However, the connection technique of the electrode terminal 972 using the anisotropic conductive film 966 has not been established in the field of the planar optical circuit 951, and has the following problems.
First, in the connection structure in which the electrode terminal 972 and the electrode 963 of the wiring board 962 are connected using the anisotropic conductive film 966 shown in FIG. 16, the electrode terminal 972 and the electrode 963 of the wiring board 962 are connected to the liquid crystal circuit board 971. It is common to make it protrude with respect to (refer the said patent document 3).

  However, in the planar optical circuit 951 shown in FIG. 15B, since the upper surface of the clad is covered with an insulating film for protecting the thin film heater except for the electrode terminal 959, the electrode terminal 959 is depressed. Since the anisotropic conductive film 966 shown in FIG. 16 is designed to connect the protruding electrode terminal 963 to the protruding electrode terminal 972, the recessed electrode terminal 959 and the protruding electrode 953 shown in FIG. In the structure connecting the two, contact resistance is likely to occur.

  Second, in the case where the electrode 953 of the electric wiring board 952 is connected to the electrode terminal 959 of the planar optical circuit 951 formed at a certain pitch as shown in FIG. Since the electric wiring board 952 that is easily contracted and expanded due to a temperature change, there is a problem that the position of the electrode 953 is shifted. If the protruding electrode 963 shown in FIG. 16 is connected to the protruding electrode terminal 972, the electrode terminal 959 shown in FIG. 15B and the electrode 953 of the electric wiring board 952 may be electrically shifted even if they are slightly displaced. In the case of a structure in which the electrode terminal 959 is recessed, a connection error occurs when a positional shift occurs.

  Third, in the planar optical circuit 951 shown in FIG. 15B, the planar substrate may be warped depending on the combination of materials used for the planar substrate and the optical waveguide layer, and the electrical wiring substrate 952 contracts due to temperature changes. Even if there is no expansion, there is a problem that the position of the electrode terminal 959 and the position of the electrode 953 of the electric wiring board 952 are shifted.

  From the above, the present invention is a planar optical circuit in which the electrode terminal is recessed in the insulating film, and can connect the electrodes of the wiring board with a low resistance through the anisotropic conductive film, and can suppress wiring defects. An object of the present invention is to provide a connection structure for electrode terminals in a planar optical circuit.

The electrode terminal connection structure in the planar optical circuit according to the first invention (corresponding to claim 1) for solving the above-described problem is
A planar optical circuit comprising a clad formed on a flat substrate and a core formed in the clad and having a refractive index higher than that of the clad, comprising: an electric wiring on the upper surface of the clad; and the electric wiring In the planar optical circuit in which the electrode terminal connected to the electrode terminal is formed, the entire or part of the electrode terminal is an opening, and the region excluding the opening of the electrode terminal is covered with an insulating film.
A wiring board comprising wiring formed on a substrate in an opening of an electrode terminal of the planar optical circuit and an electrode connected to the wiring, the height from the upper surface of the substrate to the upper surface of the electrode The electrode of the wiring board which is t is electrically connected through a conductive film having conductive particles having a particle diameter φ,
The opening width of the electrode terminal is wider than the width of the electrode of the wiring board, and the depth d from the upper surface of the insulating film to the upper surface of the opening portion of the electrode terminal satisfies 0 < d ≦ t−φ. An electrode terminal is formed.

The electrode terminal connection structure in the planar optical circuit according to the second invention (corresponding to claim 2) for solving the above problems is the electrode terminal connection structure in the planar optical circuit according to the first invention. ,
The electrode terminal is formed so that w ≧ L + 2φ, where w is the opening width of the electrode terminal of the planar optical circuit and L is the width of the electrode of the wiring board.

An electrode terminal connection structure in a planar optical circuit according to a third invention (corresponding to claim 3) for solving the above problems is an electrode in the planar optical circuit according to the first invention or the second invention. In the terminal connection structure,
The hardness of the electrode terminal of the planar optical circuit and the hardness of the electrode of the wiring board are higher than the hardness of the conductive particles, and the distance between the upper surface of the opening of the electrode terminal and the upper surface of the electrode of the wiring board Is smaller than the particle diameter of the conductive particles.

An electrode terminal connection structure in a planar optical circuit according to a fourth invention (corresponding to claim 4) for solving the above problems is an electrode in the planar optical circuit according to the first invention or the second invention. In the terminal connection structure,
The hardness of the electrode terminal of the planar optical circuit or the hardness of the electrode of the wiring board is lower than the hardness of the conductive particles, and the upper surface of the opening of the electrode terminal and the upper surface of the electrode of the wiring board The interval is smaller than the particle diameter of the conductive particles.

The electrode terminal connection structure in the planar optical circuit according to the fifth invention (corresponding to claim 5) for solving the above problems is the planar light according to any one of the first to fourth inventions. In the electrode terminal connection structure in the circuit,
A plurality of electrode terminals of the planar optical circuit are formed at a predetermined interval.

An electrode terminal connection structure in a planar optical circuit according to a sixth invention (corresponding to claim 6) for solving the above-described problem is an electrode terminal connection structure in a planar optical circuit according to the fifth invention. ,
A plurality of electrodes of the wiring board and electrode terminals of the planar optical circuit are arranged at a predetermined interval from first to Nth (N is an integer of 3 or more),
When the opening width of the nth electrode terminal of the planar optical circuit connected to the nth (1 ≦ n ≦ N) electrode of the wiring board is w (n), the mth of the planar optical circuit. The distance between the center position of the electrode terminal (1 ≦ m ≦ N−1) and the center position of the (m + 1) th electrode terminal is the wiring before the electrode of the wiring board is connected to the electrode terminal of the planar optical circuit. The distance between the center position of the mth electrode and the center position of the (m + 1) th electrode of the substrate is equal to the opening width w (m) of the mth electrode terminal and the opening of the (m + 1) th electrode terminal of the planar optical circuit. One of the widths w (m + 1) is wider than the other.

An electrode terminal connection structure in a planar optical circuit according to a seventh invention (corresponding to claim 7) for solving the above-described problem is an electrode terminal connection structure in a planar optical circuit according to the fifth invention. ,
When the width of the electrode of the wiring board is L and the width of the gap between the electrodes is S, the electrode of the wiring board is a constant distance L + S from the first electrode to the Nth electrode (N is an integer of 3 or more). Are arranged across
When the opening width of the nth electrode terminal of the planar optical circuit connected to the nth (1 ≦ n ≦ N) electrode of the wiring board is w (n), the first to Nth electrode terminals Among them, the opening width of the m-th electrode terminal closest to the center is the smallest among w (n), and satisfies w (m) ≧ L + 2φ, and the electrode moves from the m-th to the first electrode terminal. The opening width of the terminal is gradually increased, and the opening width of the electrode terminal is gradually increased from the mth to the Nth electrode terminal.

The electrode terminal connection structure in the planar optical circuit according to the eighth invention (corresponding to claim 8) for solving the above problem is the electrode terminal connection structure in the planar optical circuit according to the fifth invention. ,
A plurality of electrode terminals of the planar optical circuit are arranged at a predetermined interval from the first to the Nth (N is an integer of 3 or more),
When the width of the electrode of the wiring board is L and the width of the gap between the electrodes is S, a plurality of electrodes of the wiring board are arranged with a constant interval L + S from the first electrode to the Nth electrode,
When the curvature of warpage of the planar substrate is R, the nth ((n) th) of the planar optical circuit is based on the center position of the mth electrode terminal among the first to Nth electrode terminals of the planar optical circuit. The center position of the electrode terminal of 1 ≦ n ≦ N) is arranged as x (n) = R · arcsin ((L + S) · (nm) / R).

An electrode terminal connection structure in a planar optical circuit according to a ninth invention (corresponding to claim 9) for solving the above problems is a planar light according to any of the first to eighth inventions. In the electrode terminal connection structure in the circuit,
The optical waveguide composed of the core and the clad is a silica-based optical waveguide.

  According to the first invention, even in the planar optical circuit in which the electrode terminals are recessed, the electrodes of the wiring board can be connected with low resistance via the anisotropic conductive film. Since the wiring board is directly connected to the planar optical circuit, electric power can be supplied to the electrode terminals of the planar optical circuit without using an electrical wiring board and bonding wires, and the planar optical circuit module can be greatly reduced in size.

According to the second invention, in addition to the effects of the first invention, the conductive particles are prevented from being sandwiched between the protruding electrode end of the wiring board and the recessed electrode terminal end of the planar optical circuit, thereby preventing poor contact. Suppression can be further ensured.
According to the third invention and the fourth invention, in addition to the effects of the first invention or the second invention, conduction between the electrode terminal of the planar optical circuit and the electrode of the wiring board can be further improved.

According to the fifth invention, in addition to the effects of any one of the first to fourth inventions, a compact and highly functional planar type in which optical circuits such as a waveguide type optical switch and a variable optical attenuator are integrated. An optical circuit can be realized.
According to the sixth invention, in addition to the effects of the fifth invention, the electrode terminals of the planar optical circuit are arranged at a constant pitch, and even if the electrode is displaced due to expansion / contraction of the wiring board, the electrode The terminal and the electrode of the wiring board can be electrically connected.

According to the seventh invention, in addition to the effects of the fifth invention, the wiring board avoids the conductive particles from being sandwiched between the protruding electrode end of the wiring board and the recessed electrode terminal end of the planar optical circuit. It is possible to compensate for the displacement of the electrode due to the expansion and contraction of the electrode.
According to the eighth invention, in addition to the effect of the fifth invention, the position of the electrode terminal and the position of the electrode of the wiring board can be matched even if the flat substrate is warped.

According to the ninth aspect, in addition to the effects of any one of the first to eighth aspects, an optical component having low propagation loss, high stability, and excellent long-term reliability can be realized.
From the above, according to the present invention, a technology capable of connecting a wiring board to an electrode terminal of a planar optical circuit with low resistance and high reliability is established, and the size of a conventional planar optical circuit module is greatly reduced. Can do.

  Hereinafter, various embodiments of electrode terminal connection structures in a planar optical circuit according to the present invention will be described with reference to FIGS. Here, FIG. 1 is a connection structure of electrode terminals of the planar optical circuit in the first embodiment of the present invention, where (a) is a plan view, (b) is a cross-sectional view taken along the section AA ′, c) is a schematic diagram of a cross-sectional structure of a wiring board, FIG. 2 is a schematic diagram of a connection structure of electrode terminals of a planar optical circuit in the first embodiment of the present invention, and FIG. 3 is a planar model in the second embodiment of the present invention. FIG. 4 is a schematic diagram of an electrode terminal connection structure of an optical circuit, and FIG. 4 is a connection structure of an electrode terminal of a planar optical circuit in a third embodiment of the present invention. FIG. 5 is a schematic diagram of a connection structure of electrode terminals of a planar optical circuit according to the fourth embodiment of the present invention, and FIG. 6 is an electrode of the planar optical circuit according to the fifth embodiment of the present invention. FIG. 7 is a schematic diagram of a terminal connection structure, and FIG. FIG. 8 is a schematic view of the electrode terminal connection structure of FIG. 8, FIG. 8 is a connection structure of the electrode terminal of the planar optical circuit in the seventh embodiment of the present invention, FIG. FIG. 9 is a cross-sectional view of the connection structure after heating and pressure bonding the electrode of the wiring board and the electrode terminal on the upper surface of the planar optical circuit across the film, and FIG. 9 shows the electrode terminal of the planar optical circuit in the eighth embodiment of the present invention. 10 is a schematic diagram of a connection structure, FIG. 10 is a schematic diagram of a connection structure of electrode terminals of a planar optical circuit in a ninth embodiment of the present invention, and FIG. 11 is an electrode terminal of a planar optical circuit in a tenth embodiment of the present invention. FIG. 12 is a schematic diagram of a connection structure, and FIG. 12 is an example of an optical circuit to which the electrode terminal connection structure in the planar optical circuit described in each embodiment of the present invention is applied, where (a) is a plan view and (b) is a plan view. Sectional view at section plane BB ', (c) is sectional view at section plane CC' FIG. 13 is a diagram showing an example of a multiple optical circuit to which the electrode terminal connection structure in the planar optical circuit described in each embodiment of the present invention is applied, and FIG. 14 is a process for manufacturing the planar optical circuit of the present invention. FIG.

[First Embodiment]
FIG. 1 shows a connection structure of electrode terminals of a planar optical circuit in the first embodiment of the present invention. A clad 401 having a core (not shown) embedded therein, an electric wiring 171, and an electrode terminal 191 connected to the electric wiring 171 are formed on the planar substrate 161, and a part of the electrode terminal 191 is formed. The region is an opening 181, and the remaining region of the electrode terminal 191 excluding the opening 181, the surrounding clad 401 and the electric wiring 171 are covered with an insulating film 168. Here, the electrode terminal 191 and the opening 181 are formed in a square shape, but the shape is arbitrary.

  The electrode 321 of the wiring board 311 is electrically connected to the opening 181 of the electrode terminal 191 through the conductive film 201 having conductive particles 211 having a particle diameter φ. The wiring substrate 311 includes a wiring 331 formed on the substrate 301 and covered with a cover 341, and an electrode 321 connected to the wiring 331. The height from the upper surface of the substrate 301 to the upper surface of the electrode 321 is t.

  In the present embodiment, the electrode terminal 191 is formed such that the width of the opening 181 of the electrode terminal 191 is wider than the width of the electrode 321 of the wiring board 311. Thereby, even in the electrode structure in which the electrode terminal 191 is covered with the insulating film 168, the electrode 321 of the wiring substrate 311 and the electrode terminal 191 can be electrically connected through the conductive film 210.

Further, the electrode terminal 191 was formed so that the depth d from the upper surface of the insulating film 168 to the upper surface of the opening 181 of the electrode terminal 191 was d ≦ t−φ. Here, φ is the particle diameter. Note that since the upper surface of the opening 181 of the electrode terminal 191 is lower than the upper surface of the insulating film 168, the depth d > 0. This conditional expression was derived as follows.

  In the connection structure after the electrode 321 of the wiring substrate 311 and the electrode terminal 191 on the upper surface of the planar optical circuit are heated and pressure-bonded with the conductive film 210 shown in FIG. 1B, the upper surface of the insulating film 168 and the wiring substrate 311 are connected. If the distance from the upper surface of the substrate 301 is g, t + φ = g + d is established. By arranging this equation, d = t + φ−g is obtained. Here, if a gap of 2φ or more is formed between the upper surface of the insulating film 168 and the upper surface of the substrate 301 of the wiring substrate 311, the conductive particles 211 are not sandwiched and sufficient conduction can be obtained.

  At this time, since g ≧ 2φ, a conditional expression of d ≦ t−φ is obtained. Of course, if g ≧ φ but not g ≧ 2φ, a gap of φ is formed at least between the upper surface of the insulating film 168 and the upper surface of the substrate 301 of the wiring substrate 311, so that conduction can be obtained. However, depending on the material used, connection conditions, etc., the particles may be compressed after heating and pressure bonding, and the particle diameter may be smaller than φ. Therefore, at least g ≧ 2φ, that is, d ≦ t−φ so that the electrode terminal 191 is satisfied. If this is formed, poor contact can be avoided.

  As described above, the electrode terminal 191 is formed so that the width of the opening 181 of the electrode terminal 191 is wider than the width of the electrode 321 of the wiring substrate 311, and the upper surface of the insulating film 168 and the substrate of the wiring substrate 311 are formed. By providing a sufficient gap on the upper surface of 301, the conductive particles 211 are prevented from being sandwiched between the upper surface of the insulating film 168 and the upper surface of the substrate 301 of the wiring substrate 311 to obtain a stable electrical connection.

  FIG. 2A shows a state before the electrode 321 and the electrode terminal 191 of the wiring substrate 311 are connected through the conductive film 201. A flexible wiring board was used as the wiring substrate 311, and the substrate 301 and the cover 341 (see FIG. 1) were formed of a thin film with a thickness of 25 μm, and the electrode 321 was formed with a thin film with a thickness of t = 9 μm.

  As the conductive film 201, an anisotropic conductive film was used in which metal particles having an average particle diameter φ = 3 μm were contained as the conductive particles 211 in the adhesive 241 that is a thermosetting adhesive resin. The planar optical circuit is formed of a silica-based optical waveguide formed on a silicon substrate. The thickness of the electric wiring 171 (see FIG. 1) is 3 μm, the thickness of the electrode terminal 191 is 3 μm, and the opening 181 of the electrode terminal 191 is formed. A quartz insulating film 168 was loaded so that the depth d to the upper surface was d = 3 μm. By sandwiching an anisotropic conductive film, which is a conductive film 201 made of conductive particles 211 and an adhesive 241 that is a thermosetting adhesive resin, between the planar optical circuit and the wiring board 311, the wiring board 311 is heated and pressed. Was connected to a planar optical circuit.

  The state after connection is shown in FIG. The opening 181 of the electrode terminal 191 of the planar optical circuit and the electrode 321 of the wiring board 311 are physically and electrically connected via the conductive particles 211 of the anisotropic conductive film which is the conductive film 201, and the adhesive The state fixed by 241 is shown. More specifically, the electrode 321 of the wiring board 311 is inserted into the opening 181 of the electrode terminal 191 of the planar optical circuit, and the conductive film 201 which is an anisotropic conductive film is compressed and connected.

  If the width of the opening 181 of the electrode terminal 191 is smaller than the width of the electrode 321 of the wiring board 311 or the depth d to the upper surface of the opening 181 of the electrode terminal 191 is d> t−φ. If so, the electrode 321 and the electrode terminal 191 of the wiring board 311 are difficult to be electrically connected, leading to the generation of contact resistance.

On the other hand, in the present embodiment, the opening width of the electrode terminal 191 is wider than the width of the electrode 321 of the wiring board 311, and the depth d from the upper surface of the insulating film 168 to the upper surface of the opening 181 of the electrode terminal 191 is By forming the electrode terminal 191 so that 0 < d ≦ t−φ, the electrode 321 of the wiring board 311 could be physically and electrically connected to the electrode terminal 191 of the planar optical circuit with high reliability.

  As described above, according to the present embodiment, the conductive film 201 that is an anisotropic conductive film is formed without causing poor connection even in a planar optical circuit that is covered with the insulating film 168 and in which the electrode terminal 191 is recessed. Thus, the electrode 321 of the wiring board 311 could be connected with low resistance and high reliability.

[Second Embodiment]
FIG. 3 shows a connection structure of electrode terminals of a planar optical circuit in the second embodiment of the present invention. A clad 401 in which a core (not shown) is embedded is formed on a flat substrate 161, and an electrode terminal 191 connected to an electric wiring 171 (see FIG. 1) is formed on the upper surface of the clad 401, and part of the electrode terminal 191 This region is the opening 181, and the remaining region of the electrode terminal 191 excluding the opening 181, the surrounding clad 401 and the electric wiring 171 (see FIG. 1) are covered with an insulating film 168.

  The electrode 321 of the wiring board 311 is electrically connected to the opening 181 of the electrode terminal 191 through the conductive film 201 having conductive particles 211 having a particle diameter φ. The height from the upper surface of the substrate 301 of the wiring substrate 311 to the upper surface of the electrode 321 is t. Here, the conductive particles 211 of the present embodiment are constituted by a core 221 and a film 231 covering the core 221, and the core 221 is formed of a relatively soft material and the film 231 is formed of a material having good conductivity.

In the present embodiment, the electrode terminal 191 is formed so that the width of the opening 181 of the electrode terminal 191 is wider than the width of the electrode 321 of the wiring board 311, and the opening of the electrode terminal 191 is formed from the upper surface of the insulating film 168. The electrode terminal 191 was formed so that the depth d to the upper surface of 181 was d ≦ t−φ. Note that since the upper surface of the opening 181 of the electrode terminal 191 is lower than the upper surface of the insulating film 168, the depth d > 0.

  Furthermore, in the present embodiment, the hardness of the electrode terminal 191 and the hardness of the electrode 321 of the wiring board 311 are made higher than the hardness of the conductive particles 211, and the electrode terminal 191 and the electrode 321 of the wiring board 311 are heated and pressed. Thus, a connection structure for compressing the conductive particles 211 was obtained. At this time, the distance between the upper surface of the opening 181 of the electrode terminal 191 and the upper surface of the electrode 321 of the wiring substrate 311 is smaller than the particle diameter of the conductive particle 211, and the conductive particle 211 is formed by the electrode terminal 191 and the electrode 321 of the wiring substrate 311. By making the structure crushed, conduction was further improved.

  The previous conditional expression d ≦ t−φ was derived as follows. If the distance between the upper surface of the insulating film 168 and the upper surface of the substrate 301 of the wiring substrate 311 is g, t + φ = g + d is established. However, after heating and pressure bonding, the conductive material sandwiched between the electrode terminal 191 and the electrode 321 of the wiring substrate 311 is satisfied. Since the particle diameter of the particle 211 is smaller than φ, t + φ> g + d. Here, φ is the diameter of the conductive particles 211 that are not crushed by the electrode terminal 191 and the electrode 321 of the wiring board 311.

  On the other hand, since the conductive particles 211 are compressed from φ μm to a maximum of 0 μm, g + d ≧ t is established. g + d = t is a state in which the conductive particles 211 are completely crushed. Here, if at least a gap of φ is formed between the upper surface of the insulating film 168 and the upper surface of the substrate 301 of the wiring substrate 311, the conductive particles 211 are not sandwiched and conduction can be obtained. At this time, since g ≧ φ, a conditional expression of d ≦ t−φ is obtained.

  As described above, the electrode terminal 191 is formed so that the width of the opening 181 of the electrode terminal 191 is wider than the width of the electrode 321 of the wiring substrate 311, and the upper surface of the insulating film 168 and the substrate of the wiring substrate 311 are formed. By providing a sufficient gap on the upper surface of 301, the conductive particles 211 are prevented from being sandwiched between the upper surface of the insulating film 168 and the upper surface of the substrate 301 of the wiring substrate 311 to obtain a stable electrical connection. Furthermore, the gap between the upper surface of the opening 181 of the electrode terminal 191 and the upper surface of the electrode 321 of the wiring board 311 is made smaller than the particle diameter of the conductive particles 211, and the conductive particles 211 are crushed, Improved continuity.

  In this embodiment, a flexible wiring board is used as the wiring substrate 311, the substrate 301 and the cover 341 (see FIG. 1) are formed of a polyimide thin film with a thickness of 25 μm, and the electrode 321 is formed of a copper foil with a thickness t = 9 μm. As the conductive film 201, an anisotropic conductive film including conductive particles 211 having a particle diameter φ = 5 μm was used, and the conductive particles 211 were plastic particles whose surfaces were plated with gold. The planar optical circuit is formed of a silica-based optical waveguide formed on a silicon substrate. The thickness of the electric wiring 171 (see FIG. 1) is 3 μm, the thickness of the electrode terminal 191 is 3 μm, and the opening 181 of the electrode terminal 191 is formed. A quartz insulating film 168 was loaded so that the depth d to the upper surface was d = 3 μm.

  In the first embodiment, the region excluding both ends in the longitudinal direction of the electrode terminal 191 is the opening 181, whereas in this embodiment, not only both ends in the longitudinal direction of the electrode terminal 191 but also both ends in the short direction. In addition, the insulating film 168 was slightly covered so that the width of the opening 181 was slightly narrower than the width of the electrode terminal 191. By covering the entire periphery of the electrode terminal 191 with the insulating film 168, peeling of the electrode terminal 191 can be prevented.

  By sandwiching a conductive film 201, which is an anisotropic conductive film composed of conductive particles 211 and an adhesive 241 that is a thermosetting adhesive resin, between the flat optical circuit and the wiring substrate 311, heating and press-bonding are performed, thereby The opening 181 of the electrode terminal 191 of the optical circuit and the electrode 321 of the wiring substrate 311 are physically and electrically connected via the conductive particles 211 of the conductive film 201 which is an anisotropic conductive film, and the adhesive 241 fixed.

  As described above, in the present embodiment, the conductive particles 211 are formed of the soft material particle nuclei 221 and the electroconductive plating film 231 that covers the particle nuclei 221, and the upper surface of the electrode terminal 191 of the planar optical circuit and the wiring substrate 311. By making the interval between the upper surfaces of the electrodes 321 smaller than the particle diameter of the conductive particles 211 and crushing the conductive particles 211, good conduction characteristics were obtained. In the present embodiment, the conductive particles 211 are formed of two different materials, but of course, the conductive particles 211 may be formed of three or more different materials, and the shape is also arbitrary.

  As described above, according to the present embodiment, the conductive film 201 that is an anisotropic conductive film is formed without causing poor connection even in a planar optical circuit that is covered with the insulating film 168 and in which the electrode terminal 191 is recessed. Thus, the electrode 321 of the wiring board 311 could be connected with low resistance and high reliability.

[Third Embodiment]
FIG. 4 shows a connection structure of electrode terminals of a planar optical circuit in the third embodiment of the present invention. A clad 401 in which a core (not shown) is embedded is formed on a flat substrate 161, and an electrode terminal 191 connected to an electric wiring 171 (see FIG. 1) is formed on the upper surface of the clad 401, and part of the electrode terminal 191 This region is the opening 181, and the remaining region of the electrode terminal 191 excluding the opening 181, the surrounding clad 401 and the electric wiring 171 (see FIG. 1) are covered with an insulating film 168.

  The electrode 321 of the wiring board 311 is electrically connected to the opening 181 of the electrode terminal 191 through the conductive film 201 having conductive particles 211 having a particle diameter φ. The height from the upper surface of the substrate 301 of the wiring substrate 311 to the upper surface of the electrode 321 is t. Here, the conductive particles 211 of this embodiment are constituted by a nucleus 221 and a film 231 covering the nucleus 221, the nucleus 221 being formed of a material having good conductivity, and the film 231 being formed of an insulating thin film. The particle diameter of the conductive particles 211 is φ, and is the diameter of the conductive particles 211 that are not crushed by the electrode terminal 191 and the electrode 321 of the wiring board 311.

In the present embodiment, the electrode terminal 191 is formed so that the width of the opening 181 of the electrode terminal 191 is wider than the width of the electrode 321 of the wiring board 311, and the opening of the electrode terminal 191 is formed from the upper surface of the insulating film 168. The electrode terminal 191 was formed so that the depth d to the upper surface of 181 was d ≦ t−φ. Note that since the upper surface of the opening 181 of the electrode terminal 191 is lower than the upper surface of the insulating film 168, the depth d > 0.

  In this embodiment, the insulating film 168 is formed so as to slightly cover the corners at both ends in the short direction of the electrode terminal 191, but the insulating film 168 in the vicinity of the portion covering the electrode terminal 191 has a thickness of the electrode terminal 191. It just protrudes. In this case, the depth d represents the distance from the upper surface of the insulating film 168 that protrudes by the thickness of the electrode terminal 191 to the upper surface of the electrode terminal 191. If the upper surface of the insulating film 168 is not smooth, the bottom position of the conductive particles 211 when the conductive particles 211 are placed on the upper surface of the insulating film 168 may be set as the substantial upper surface of the insulating film 168.

  Furthermore, in the present embodiment, the hardness of the electrode terminal 191 and the hardness of the electrode 321 of the wiring board 311 are made higher than the hardness of the conductive particles 211, and the electrode terminal 191 and the electrode 321 of the wiring board 311 are heated and pressed. Thus, a connection structure for compressing the conductive particles 211 was obtained. Since the conductive particles 211 of the present embodiment have a structure in which conductive particles are covered with an insulating film, the distance between the upper surface of the opening 181 of the electrode terminal 191 and the upper surface of the electrode 321 of the wiring substrate 311 is Only the conductive particles 211 that are crushed by the electrode terminal 191 and the electrode 321 of the wiring board 311 are made to be smaller than the particle diameter of 211. On the other hand, since the insulating property of the conductive particles 211 that are not crushed by the electrode terminal 191 and the electrode 321 of the wiring board 311 is maintained, good conduction can be obtained at a portion where electrical connection is desired while having good insulating characteristics. It was.

As described above, the electrode terminal 191 is formed so that the width of the opening 181 of the electrode terminal 191 is wider than the width of the electrode 321 of the wiring board 311, and 0 < d ≦ t−φ. By forming the electrode terminal 191, the conductive particles 211 are prevented from being sandwiched between the upper surface of the insulating film 168 and the upper surface of the substrate 301 of the wiring substrate 311, and the conductive particles 211 are sufficiently compressed by the electrode 321 of the electrode terminal 191 and the wiring substrate 311. did it. Furthermore, the gap between the upper surface of the opening 181 of the electrode terminal 191 and the upper surface of the electrode 321 of the wiring board 311 is made smaller than the particle diameter of the conductive particles 211, and the conductive particles 211 are crushed, The insulation coating was broken and conduction was obtained.

  In this embodiment, a flexible wiring board is used as the wiring substrate 311, the substrate 301 and the cover 341 (see FIG. 1) are formed of a polyimide thin film with a thickness of 12.5 μm, and the electrode 321 is formed with a copper foil with a thickness of t = 9 μm. did. As the conductive film 201, an anisotropic conductive film containing conductive particles having a particle diameter φ = 6 μm was used, and the conductive particles 211 were nickel particles whose surfaces were covered with an insulating coating.

  The planar optical circuit is formed of a silica-based optical waveguide formed on a silicon substrate. The thickness of the electric wiring 171 (see FIG. 1) is 2 μm, the thickness of the electrode terminal 191 is 2 μm, and the opening 181 of the electrode terminal 191 is formed. A quartz insulating film 168 was loaded so that the depth d to the upper surface was d = 3 μm. By sandwiching a conductive film 201, which is an anisotropic conductive film composed of conductive particles 211 and an adhesive 241 that is a thermosetting adhesive resin, between the flat optical circuit and the wiring substrate 311, heating and press-bonding are performed, thereby The electrode terminal 191 of the optical circuit and the electrode 321 of the wiring board 311 were made conductive.

  As described above, in this embodiment, the conductive particles 211 are formed of the conductive core 221 and the insulating coating film 231 that covers the core 221, and the upper surface of the electrode terminal 191 of the planar optical circuit and the upper surface of the electrode 321 of the wiring substrate 311. By making the interval smaller than the particle diameter of the conductive particles 211 and crushing the conductive particles 211, good conduction characteristics were obtained between terminals where conduction was desired while maintaining insulation.

  As described above, according to the present embodiment, the conductive film 201 that is an anisotropic conductive film is formed without causing poor connection even in a planar optical circuit that is covered with the insulating film 168 and in which the electrode terminal 191 is recessed. Thus, the electrode 321 of the wiring board 301 can be connected with low resistance and high reliability.

[Fourth Embodiment]
FIG. 5 shows a connection structure of electrode terminals of a planar optical circuit in the fourth embodiment of the present invention. A clad 401 in which a core (not shown) is embedded is formed on a flat substrate 161, and an electrode terminal 191 connected to an electric wiring 171 (see FIG. 1) is formed on the upper surface of the clad 401, and part of the electrode terminal 191 This region is the opening 181, and the remaining region of the electrode terminal 191 excluding the opening 181, the surrounding clad 401 and the electric wiring 171 (see FIG. 1) are covered with an insulating film 168. The electrode 321 of the wiring board 311 is electrically connected to the opening 181 of the electrode terminal 191 through the conductive film 201 containing the conductive particles 211 having a particle diameter φ. The height from the upper surface of the substrate 301 of the wiring substrate 311 to the upper surface of the electrode 321 is t.

In the present embodiment, the electrode terminal 191 is formed so that the width of the opening 181 of the electrode terminal 191 is wider than the width of the electrode 321 of the wiring board 311, and the opening of the electrode terminal 191 is formed from the upper surface of the insulating film 168. The electrode terminal 191 was formed so that the depth d to the upper surface of 181 was d ≦ t−φ. Note that since the upper surface of the opening 181 of the electrode terminal 191 is lower than the upper surface of the insulating film 168, the depth d > 0.

  Furthermore, in this embodiment, the hardness of the electrode terminal 191 and the hardness of the electrode 321 of the wiring board 311 are made lower than the hardness of the conductive particles 211, and the electrode terminal 191 and the electrode 321 of the wiring board 311 are heated and pressed. Thus, a connection structure for compressing the conductive particles 211 was obtained. At this time, the distance between the upper surface of the opening 321 of the electrode terminal 191 and the upper surface of the electrode 321 of the wiring substrate 311 is smaller than the particle diameter of the conductive particle 211, and the conductive particle 211 is the electrode terminal 191 and the electrode 321 of the wiring substrate 311. By adopting a structure that is embedded, conduction is further improved.

  The previous conditional expression d ≦ t−φ was derived as follows. If the distance between the upper surface of the insulating film 168 and the upper surface of the substrate 301 of the wiring substrate 311 is g, t + φ = g + d is established, but after heating and pressure bonding, the distance between the electrode terminal 191 and the electrode 321 of the wiring substrate 311 is Since the particle diameter of the conductive particles 211 is smaller than φ, t + φ> g + d.

  On the other hand, since the distance between the electrode terminal 191 and the electrode 321 of the wiring board 311 is 0 μm at the maximum, g + d ≧ t is established. g + d = t is a state in which the conductive particles 211 are completely buried in the electrode terminal 191 and the electrode 321 of the wiring board 311. Here, if at least a gap of φ is formed between the upper surface of the insulating film 168 and the upper surface of the substrate 301 of the wiring substrate 311, the conductive particles 211 are not sandwiched and conduction can be obtained. At this time, since g ≧ φ, a conditional expression of d ≦ t−φ is obtained.

  As described above, the electrode terminal 191 is formed so that the width of the opening 181 of the electrode terminal 191 is wider than the width of the electrode 321 of the wiring substrate 311, and the upper surface of the insulating film 168 and the substrate of the wiring substrate 311 are formed. By providing a sufficient gap on the upper surface of 301, the conductive particles 211 are prevented from being sandwiched between the upper surface of the insulating film 168 and the upper surface of the substrate 301 of the wiring substrate 311 to obtain a stable electrical connection. Furthermore, the gap between the upper surface of the opening 181 of the electrode terminal 191 and the upper surface of the electrode 321 of the wiring board 311 is made smaller than the particle diameter of the conductive particles 211, and the conductive particles 211 are crushed, Improved continuity.

  In this embodiment, a flexible wiring board is used as the wiring substrate 311, the substrate 301 and the cover 341 (see FIG. 1) are formed of a polyimide thin film with a thickness of 25 μm, and the electrode 321 is formed of a copper foil with a thickness of t = 18 μm. As the conductive film 201, an anisotropic conductive film including conductive particles 211 having a particle diameter φ = 10 μm was used, and the conductive particles 211 were gold-plated nickel particles.

  The planar optical circuit is formed by a silica-based optical waveguide formed on a silicon substrate. The thickness of the electric wiring 171 (see FIG. 1) is 5 μm, the thickness of the electrode terminal 191 is 5 μm, and the opening 181 of the electrode terminal 191 is formed. A quartz insulating film 168 was loaded so that the depth d up to the upper surface was d = 5 μm. By sandwiching a conductive film 201, which is an anisotropic conductive film composed of conductive particles 211 and an adhesive 241 that is a thermosetting adhesive resin, between the flat optical circuit and the wiring substrate 311, heating and press-bonding are performed, thereby The electrode terminal 191 of the optical circuit and the electrode 321 of the wiring board 311 were made conductive.

  As described above, in the present embodiment, the distance between the upper surface of the electrode terminal 191 of the planar optical circuit and the upper surface of the electrode 321 of the wiring substrate 311 is made smaller than the particle diameter of the conductive particles 211, and the conductive particles 211 are formed on the electrode terminals 191 and the wiring substrate 311. By squeezing into 321, good conduction characteristics were obtained.

  As described above, according to the present embodiment, the conductive film 201 that is an anisotropic conductive film is formed without causing poor connection even in a planar optical circuit that is covered with the insulating film 168 and in which the electrode terminal 191 is recessed. Thus, the electrode 321 of the wiring board 311 could be connected with low resistance and high reliability.

[Fifth Embodiment]
FIG. 6 shows a connection structure of electrode terminals of a planar optical circuit in the fifth embodiment of the present invention. A clad 401 in which a core (not shown) is embedded is formed on a flat substrate 161, and an electrode terminal 191 connected to an electric wiring 171 (see FIG. 1) is formed on the upper surface of the clad 401, and part of the electrode terminal 191 This region is the opening 181, and the remaining region of the electrode terminal 191 excluding the opening 181, the surrounding clad 401 and the electric wiring 171 (see FIG. 1) are covered with an insulating film 168. The electrode 321 of the wiring board 311 is electrically connected to the opening 181 of the electrode terminal 191 through the conductive film 201 containing the conductive particles 211 having a particle diameter φ. The height from the upper surface of the substrate 301 of the wiring substrate 311 to the upper surface of the electrode 321 is t.

In this embodiment, the electrode terminal 191 is formed so that the depth d from the upper surface of the insulating film 168 to the upper surface of the opening 181 of the electrode terminal 191 satisfies d ≦ t−φ. Note that since the upper surface of the opening of the electrode terminal is lower than the upper surface of the insulating film 168, the depth d > 0. Further, the electrode terminal 191 was formed so that w ≧ L + 2φ where L is the width of the electrode 321 of the wiring substrate 311 and w is the opening width of the opening 181 of the electrode terminal 191.

  When the opening width w of the electrode terminal 191 is L + 2φ, when the positions are aligned so that the center of the electrode 321 of the wiring board 311 and the center of the opening 181 of the electrode terminal 191 are aligned, wiring is performed at both ends of the electrode 321 of the wiring board 311. A gap of φ is formed between the projecting end of the electrode 321 of the substrate 311 and the end of the electrode terminal 191 where the opening 181 is recessed.

  Of course, as described in the first embodiment, the opening width of the electrode terminal 191 may be set wider than the width of the electrode 321 of the wiring board 311 (that is, w> L), but w ≧ L + 2φ, By avoiding unnecessary conductive particles 211 that do not contribute to conduction in this gap, the conductive particles 211 are sandwiched between the protruding end of the electrode 321 of the wiring board 311 and the end of the electrode terminal 191 where the planar optical circuit is recessed. And the contact failure can be further reliably suppressed.

  In this embodiment, a flexible wiring board is used as the wiring substrate 311, the substrate 301 and the cover 341 (see FIG. 1) are formed of a polyimide thin film with a thickness of 25 μm, and the electrode 321 is formed of a copper foil with a thickness of t = 35 μm. As the conductive film 201, an anisotropic conductive film including conductive particles 211 having a particle diameter φ = 3 μm was used, and the conductive particles 211 were nickel particles.

  The planar optical circuit is formed of a silica-based optical waveguide formed on a silicon substrate. The thickness of the electric wiring 171 (see FIG. 1) is 1 μm, the thickness of the electrode terminal 191 is 1 μm, and the opening 181 of the electrode terminal 191 is formed. A quartz insulating film 168 was loaded so that the depth d to the upper surface was d = 2 μm. The width L of the electrode 321 of the wiring board 311 was set to 50 μm, and the opening width w of the electrode terminal 191 was set to 60 μm.

  As described above, in the present embodiment, by forming the electrode terminal 191 so that the opening width w of the electrode terminal 191 satisfies w ≧ L + 2φ, the protruding end of the electrode 321 of the wiring substrate 311 and the recessed electrode of the planar optical circuit The conductive particles 211 were avoided from being sandwiched between the end portions of the terminals 191 and contact failure was suppressed.

  As described above, according to the present embodiment, the conductive film 201 that is an anisotropic conductive film is formed without causing poor connection even in a planar optical circuit that is covered with the insulating film 168 and in which the electrode terminal 191 is recessed. Thus, the electrode 321 of the wiring board 311 could be connected with low resistance and high reliability.

[Sixth Embodiment]
FIG. 7 shows a connection structure of electrode terminals of a planar optical circuit in the sixth embodiment of the present invention. A clad 401 in which a core (not shown) is embedded on a flat substrate 161, and a plurality of electrode terminals 191 and 192 connected to an electric wiring 171 (see FIG. 1) are formed on the upper surface of the clad 401. A part of the regions 191 and 192 is defined as openings 181 and 182, and the remaining regions of the electrode terminals 191 and 192 excluding the openings 181 and 182 are insulated from the surrounding clad 401 and the electric wiring 171 (see FIG. 1). Covered with a film 168.

  The electrodes 321 and 322 of the wiring board 311 are electrically connected to the openings 181 and 182 of the electrode terminals 191 and 192 through the conductive film 201 having the conductive particles 211 having the particle diameter φ. The height from the upper surface of the substrate 301 of the wiring substrate 311 to the upper surfaces of the electrodes 321 and 322 is t. Here, the conductive particles 211 of the present embodiment are constituted by a core 221 and a film 231 covering the core 221, and the core 221 is formed of a relatively soft material and the film 231 is formed of a material having good conductivity.

  In this embodiment, a flexible wiring board is used as the wiring substrate 311, the substrate 301 and the cover 341 (see FIG. 1) are formed of a polyimide thin film with a thickness of 25 μm, and the electrodes 321 and 322 are formed of a copper foil with a thickness of t = 12 μm. did. The distance D between the electrodes 321 and 322 was set to 500 μm, and the width L of the electrodes 321 and 322 was set to 90 μm. As the conductive film 201, an anisotropic conductive film including conductive particles 211 having a particle diameter φ = 6 μm was used, and the conductive particles 211 were plastic particles whose surfaces were gold-plated with nickel.

  The planar optical circuit is formed by a silica-based optical waveguide formed on a silicon substrate, the electrical wiring 311 has a thickness of 1 μm, the electrode terminals 191 and 192 have a thickness of 2 μm, and the openings 181 and 182 of the electrode terminals 191 and 192. A quartz-based insulating film 168 was loaded so that the depth d to the upper surface of the substrate was d = 4 μm. The distance D between the electrode terminals 191 and 192 was set to 500 μm, and the opening width w was set to 100 μm.

  By sandwiching an anisotropic conductive film, which is a conductive film 201 composed of conductive particles 211 and an adhesive 241 that is a thermosetting adhesive resin, between a planar optical circuit and a wiring board 311, the planar type is obtained by heating and pressure bonding. The openings 181 and 182 of the electrode terminals 191 and 192 of the optical circuit and the electrodes 321 and 322 of the wiring substrate 311 are physically and electrically connected via the conductive particles 211 of the anisotropic conductive film, and the adhesive 241. Fixed by.

As described above, in the present embodiment, the opening width of the electrode terminals 191 and 192 is wider than the width of the electrodes 321 and 322 of the wiring board 311 and from the upper surface of the insulating film 168 to the upper surface of the opening 181 of the electrode terminals 191 and 192. Is formed so that the depth d satisfies 0 < d ≦ t−φ, so that the electrodes of the wiring substrate 311 are connected to the plurality of electrode terminals 191 and 192 arranged at a predetermined interval D through the conductive particles 211. 321 and 322 could be connected with high reliability.

  As described above, according to the present embodiment, even in a planar optical circuit covered with the insulating film 168 and having the electrode terminals 191 and 192 depressed, the conductive conductive material that is an anisotropic conductive film does not cause connection failure. Through the film 201, the electrodes 321 and 322 of the wiring substrate 311 could be connected with low resistance and high reliability.

[Seventh Embodiment]
FIG. 8 shows the electrode terminal connection structure of the planar optical circuit in the seventh embodiment of the present invention. A clad 401 having a core (not shown) embedded on a flat substrate 161, and first to third (N = 3) electrode terminals connected to an electrical wiring 171 (see FIG. 1) on the upper surface of the clad 401 191 to 193 are formed, and part of the first to third electrode terminals 191 to 193 is defined as openings 181 to 183, and the first to third electrode terminals 191 to 193 excluding the openings 181 to 183 are formed. The remaining region, the surrounding clad 401 and electric wiring 171 (see FIG. 1) are covered with an insulating film 168.

  Then, the first to third electrodes 321 to 323 of the wiring substrate 311 are formed in the openings 181 to 183 of the first to third electrode terminals 191 to 193, and the conductive film 201 having the conductive particles 211 having the particle diameter φ is provided. Is electrically connected. The height from the upper surface of the substrate 301 of the wiring substrate 311 to the upper surfaces of the first to third electrodes 321 to 323 is t.

  N electrodes 321 to 323 of the wiring substrate 311 are arranged at a predetermined interval from the first electrode 321 to the N-th (N = 3 here) electrode 323. In the present embodiment, the first electrode 321 to the Nth electrode 323 are arranged at a constant interval L + S. Here, L is the width of the electrodes 321 to 323, S is the width of the gap between the electrodes 321 to 323, and L = S is often set. However, as in the sixth embodiment, L and S are respectively set. Different values may be used. In this embodiment, the case where the distance between the electrode 321 and the electrode 322 is equal to the distance between the electrode 322 and the electrode 323 is shown, but may be different.

  In contrast to a planar optical circuit, a polyimide-based wiring board 311 is relatively easily expanded and contracted due to a temperature change. Therefore, the positions of the electrodes 321 to 323 are changed, and the position of the electrodes 191 to 193 is shifted. Cheap. Therefore, it is conceivable that the positions of the electrode terminals 191 to 193 of the planar optical circuit are shifted in advance in accordance with the shift amount of the pitch (distance between the centers of the two electrodes) of the electrodes 321 to 323 of the wiring board 311.

  However, the amount of change in the pitch of the electrodes 321 to 323 of the wiring board 311 depends on the external temperature, and the same deviation amount is not always reproduced every time. Therefore, in the present embodiment, the pitch of the electrode terminals 191 to 193 of the planar optical circuit is such that the electrodes 321 to 323 of the wiring substrate 311 are connected to the electrode terminals 191 to 193 of the planar optical circuit before the wiring substrate 311 is connected. Although the pitch is set equal to the initial pitch of the electrodes 321 to 323, the opening width of the electrode terminals 191 to 193 is set to the electrode terminals 191 to 193 in order to compensate for the positional shift of the electrodes 321 to 323 due to thermal expansion / contraction of the wiring board 311. It is changed every time.

  More specifically, the opening width of the n-th electrode terminals 191 to 193 of the planar optical circuit connected to the n-th (1 ≦ n ≦ N) electrodes 321 to 323 of the wiring board 311 is defined as w (n). When the distance between the center position of the first electrode terminal 191 and the center position of the second electrode terminal 192 of the planar optical circuit is the center position of the first electrode 321 and the center of the second electrode 322 of the wiring board 311 The electrode terminals 191 and 192 are formed to have the same L + S as the position interval and the width w (1) of the first electrode terminal 191 is wider than the width w (2) of the second electrode terminal 192. .

  Then, even if the electrodes 321 to 323 of the wiring board 311 are crimped and connected to the electrode terminals 191 to 193, even if the electrodes 321 and 323 of the wiring board 311 are shifted outward by δx, the thermal expansion is compensated. Since the width w (1) of the first electrode terminal 191 is widened, no connection failure occurs. When heat shrinkage occurs, it shifts inward by δx. However, since the width of w (1) is given equally to both sides with respect to the center position of the electrode terminal 191, when thermal expansion occurs and when heat shrinkage occurs, Both can be supported.

  In this embodiment, a flexible wiring board is used as the wiring substrate 311, the substrate 301 and the cover 341 (see FIG. 1) are formed of a polyimide thin film with a thickness of 25 μm, and the electrodes 321 to 323 are formed of a copper foil with a thickness of t = 18 μm. did. L and S were set to 125 μm, and L + S = 250 μm. An anisotropic conductive film including conductive particles 211 having a particle diameter φ = 3 μm was used as the conductive film 201, and nickel particles were used as the conductive particles 211.

  The planar optical circuit is formed by a silica-based optical waveguide formed on a silicon substrate. The thickness of the electric wiring 171 (see FIG. 1) is 2 μm, the thickness of the electrode terminals 191 to 193 is 2 μm, and the electrode terminals 191 to 193 are formed. A quartz insulating film 168 was loaded so that the depth d to the upper surface of the openings 181 to 183 was 3 μm. The opening widths w (n) of the first to third electrode terminals 191 to 193 were set to w (1) = 140 μm, w (2) = 130 μm, and w (3) = 140 μm, respectively.

  Before the electrodes 321 to 323 of the wiring board 311 were crimped to the electrode terminals 191 to 193, the electrodes 321 to 323 of the wiring board 311 had a constant pitch L + S, but the wiring board 311 expanded in the process of heating and crimping. Then, the center positions of the first electrode 321 and the third electrode 323 are shifted outward by δx = 5 μm with respect to the second electrode 322, and fixed by the adhesive 241. However, by using the electrode structure of this embodiment, the electrodes 321 to 323 of the wiring board 311 were located in the openings 181 to 183 of the electrode terminals 191 to 193 even after thermal expansion, and thus no connection failure occurred.

  As described above, according to the present embodiment, even if the electrode terminals 191 to 193 are arranged at a predetermined interval, without changing the interval at which the electrode terminals 191 to 193 of the planar optical circuit are arranged. The positional shift of the electrodes 321 to 323 due to the expansion / contraction of the wiring board 311 can be compensated, and good optical characteristics were obtained while suppressing poor contact.

[Eighth Embodiment]
FIG. 9 shows electrode terminals of a planar optical circuit in the eighth embodiment of the present invention. The electrode terminals 191 to 198 are connected to a wiring board (not shown) in which a plurality of electrodes (not shown) are arranged at a constant interval L + S from the first to the Nth (N is an integer of 3 or more). Designed. Here, L is the width of the electrode of the wiring board, S is the width of the gap between the electrodes, and N = 8.

  A clad 401 in which a core (not shown) is embedded on a flat substrate (not shown), and an upper surface of the clad 401 are spaced apart by the same L + S pitch as the electrodes of the initial wiring board before the crimp connection. First to eighth electric wirings 171 to 178 are formed, and first to eighth electrode terminals 191 to 198 connected to the first to eighth electric wirings 171 to 178 are formed.

  As shown in FIG. 9, the center positions of the electrode terminals 191 to 198 coincide with the center positions of the electric wirings 171 to 178, respectively. The entire region of the first to eighth electrode terminals 191 to 198 is the openings 181 to 188, and the region excluding the openings 181 to 188, that is, the upper surface of the clad 401 and the electric wirings 171 to 178 is covered with the insulating film 168. ing.

  When the opening width of the n-th (1 ≦ n ≦ N) electrode terminals 191 to 198 is w (n), the first to eighth (N = 8) electrode terminals 191 to 198 are closest to the center. The m-th electrode terminals 184 and 185 were formed so that the opening width w (m) was the smallest among w (n) and w (m) ≧ L + 2φ was satisfied.

  In the present embodiment, the number of electrode terminals 191 to 198 is an even number, and the left and right are mirror-image symmetric. Therefore, the fourth or fifth electrode terminals 184 and 185 are closest to the center ( m = 4 or 5). The opening widths of the electrode terminals 191 to 194 gradually increase from the fourth (m = 4) electrode terminal 194 toward the first electrode terminal 191, and the fifth (m = 5) electrode terminal 195 to the eighth electrode terminal 191 gradually increase. The electrode terminals 191 to 198 were formed so that the opening widths of the electrode terminals 195 to 198 were gradually increased toward the electrode terminal 198 (N = 8).

  In this embodiment, a flexible wiring board based on polyimide is used as the wiring board, L and S are set to 75 μm, and L + S = 150 μm. As the conductive film (not shown), an anisotropic conductive film containing nickel conductive particles having a particle diameter φ = 2 μm was used. The electrical wirings 171 to 178 have a width of 50 μm, the first to eighth electrode terminals 191 to 198 have a length in the longitudinal direction of 1 mm, and the opening width w (n) is w (m) = w (4) = w. (5) = 80 μm, w (3) = w (6) = 85 μm, w (2) = w (7) = 90 μm, w (1) = w (8) = 95 μm.

  Then, the center position of the mth (= 4, 5) electrode closest to the center of the wiring board is matched with the center position of the mth (= 4, 5) electrode terminals 194, 195 of the planar optical circuit. Crimped. After the crimping, the center positions of the mth (= 4, 5) electrodes of the wiring board coincided with the center positions of the mth (= 4, 5) electrode terminals 194, 195 of the planar optical circuit.

  On the other hand, due to the thermal expansion of the wiring board during crimping, the center position of the electrode is shifted outward from the center position of the electrode terminals 191 to 198 as it goes from the fourth to the first and from the fifth to the eighth electrode. The electrodes were respectively connected at the positions, but all the electrodes were within the region of the openings 181 to 188 of the electrode terminals 191 to 198.

  Thus, when connecting the electrodes of the wiring board to the plurality of electrode terminals 191 to 198 formed at regular intervals, the opening width increases from the center toward the end without changing the pitch of the electrode terminals 191 to 198. Since the electrode terminals 191 to 198 are formed so as to gradually widen, even if the electrode position of the wiring board is shifted left and right during connection, the electrodes of the wiring board are located within the range of the opening width of the electrode terminals 191 to 198. Good electrical connection is obtained.

  Even when the present invention is applied to a multiple optical circuit in which optical circuit elements are arranged at a constant pitch, the pitch of the electrode terminals 191 to 198 can be made constant, and there is no need to change the interval at which the optical circuit elements are arranged. Therefore, the density of the optical waveguides and the electric wirings 171 to 178 becomes uniform, and good optical characteristics can be obtained.

  Furthermore, if the opening width of the m-th electrode terminals 194 and 195 having the narrowest opening width among the first to N-th electrode terminals 191 to 198 is at least L + 2φ or more, the fourth embodiment can be used. As described above, it is possible to avoid the conductive particles 211 (see FIG. 1) between the protruding electrode end of the wiring board and the end portions of the recessed electrode terminals 191 to 198 of the planar optical circuit, thereby suppressing contact failure. It was.

  Thus, according to this embodiment, even if it is a plurality of electrode terminals 191 to 198 arranged at a predetermined interval, without changing the interval at which the electrode terminals 191 to 198 of the planar optical circuit are arranged, The displacement of the electrode due to the expansion and contraction of the wiring board could be compensated, and good optical characteristics were obtained while suppressing poor contact.

[Ninth Embodiment]
FIG. 10 shows electrode terminals of a planar optical circuit according to the ninth embodiment of the present invention. In the eighth embodiment, the widths of the first to eighth electrode terminals 191 to 198 arranged with a constant interval L + S are changed for each of the electrode terminals 191 to 198. However, in the present embodiment, the electrodes The widths of the terminals 191 to 198 were kept constant, and only the opening width was changed.

  Specifically, L and S were set to 75 μm, and L + S = 150 μm. As the conductive film (not shown), an anisotropic conductive film containing nickel conductive particles having a particle diameter φ = 3 μm was used. The width of the electric wirings 171 to 178 is set to 100 μm, the width of the first to eighth electrode terminals 191 to 198 is also set to 100 μm, and the opening width w (n) is w (m) = w (4) = w ( 5) = 82 μm, w (3) = w (6) = 86 μm, w (2) = w (7) = 92 μm, w (1) = w (8) = 100 μm.

  In the present embodiment, w (n) is set in consideration of the fact that the amount of positional deviation increases as the distance of the electrode (not shown) increases. For example, the opening width of the third electrode terminal 193 is wider than the fourth electrode terminal 194 by w (3) −w (4) = 4 μm, whereas the second electrode terminal 193 has a second opening width larger than that of the third electrode terminal 193. The opening width of the electrode terminal 192 is w (2) −w (3) = 6 μm, and the opening width of the first electrode terminal 191 is wider than the second electrode terminal 192 by w (1) −w (2) = 8 μm. ing. As described above, the opening widths of the electrode terminals 191 to 198 may be set according to the expected amount of positional deviation of the electrodes.

  Of course, as described in the eighth embodiment, the entire region of the electrode terminals 191 to 198 may be the openings 181 to 188. However, as in this embodiment, the minimum necessary region of the electrode terminals 191 to 198 is used. By using only the openings 181 to 188 as the openings, the portion covered with the insulating film 168 can obtain particularly high reliability, or the gap between the protruding insulating film 168 and the electrode of the recessed wiring substrate is engaged. Many advantages can be obtained, for example, the force can be strengthened, or the probability of occurrence of a short circuit between adjacent electrode terminals 191 to 198 can be reduced.

  Thus, according to this embodiment, even if it is a plurality of electrode terminals 191 to 198 arranged at a predetermined interval, without changing the interval at which the electrode terminals 191 to 198 of the planar optical circuit are arranged, The displacement of the electrode due to the expansion and contraction of the wiring board could be compensated, and good optical characteristics were obtained while suppressing poor contact.

[Tenth embodiment]
FIG. 11 shows electrode terminals of the planar optical circuit in the tenth embodiment of the present invention. A plurality of electrode terminals 191 to 195 are arranged at a predetermined interval from first to fifth (N = 5). Further, when the width of the electrodes 321 to 325 of the wiring board 311 is L and the width of the gap between the electrodes 321 to 325 is S, the electrodes 321 to 325 of the wiring board 311 are changed from the first electrode 321 to the fifth (N = 5), a plurality of electrodes 325 are arranged at a constant interval L + S.

  If either one of the flat substrate 401 and the wiring substrate 311 is warped, a displacement occurs between the electrode terminals 191 to 195 and the electrodes 321 to 325. For example, FIG. 11 shows that the wiring substrate 311 is flat, but the flat substrate 401 is warped with a curvature R.

  Therefore, in the present embodiment, the pitch of the electrode terminals 191 to 195 is set according to the warp of the flat substrate 401. Of the first to fifth (N = 5) electrode terminals 191 to 195, the third electrode terminal 193 closest to the center is the mth electrode terminal, and the center position of the mth electrode terminal is the reference position. Then, the center position of the nth (1 ≦ n ≦ N) electrode terminal is preferably (L + S) · (nm) with respect to the reference position.

  However, due to the warp of the flat substrate 401, the center positions of the respective electrode terminals 191 to 195 are shifted in the direction closer to the reference position than the initial setting. In order to compensate for this deviation, the center position of the nth electrode terminal is set to the reference position from the relationship of R · sin θ = (L + S) · (nm) and x (n) = R · θ. What is necessary is just to arrange | position in the position of x (n) = R * arcsin ((L + S) * (nm) / R).

  In the present embodiment, a planar optical circuit is fabricated with a silicon substrate, the planar optical circuit has a warp of 50 mm, the wiring substrate 311 has no warp, L and S are set to 0.5 mm, and L + S = 1 mm. did. Using the center position of the third (m = 3) electrode terminal 193 as a reference, the center positions of the first to fifth (N = 5) electrode terminals 191 to 195 are respectively x (1) = − (2 mm + 0. 534 μm), x (2) = − (1 mm plus 0.067 μm), x (3) = 0 mm, x (4) = 1 mm plus 0.067 μm, and x (5) = 2 mm plus 0.534 μm.

  The first term of x (n) is the center position when there is no warp of the flat substrate 401, that is, (L + S) · (nm), and the second term is a correction corresponding to the warp of the flat substrate 401. Amount. Thus, the further the distance from the reference position, the larger the correction amount. In the present embodiment, the center positions of the electrode terminals 191 to 195 are corrected. In addition, the electrode terminals 191 to 191 corresponding to the thermal expansion and thermal contraction of the wiring board 311 as described in the seventh embodiment are added. 195 openings 181 to 185 were used.

  As described above, in the present embodiment, the case where the warp in which the center of the flat substrate 401 protrudes has been described, but on the contrary, the same correction may be performed when the warp in which the center of the flat substrate 401 is depressed occurs.

  As described above, according to the present embodiment, even when the flat substrate 401 is warped, it can be connected to the electrodes 321 to 325 of the wiring substrate 311 by correcting the center positions of the electrode terminals 191 to 195.

[Other Embodiments]
In the above-described electrode terminal connection structure of a planar optical circuit, a case where it is applied to an actual optical circuit will be described.
FIG. 12A is a configuration diagram of a waveguide type optical switch attenuator formed on a flat substrate. This circuit includes Mach-Zehnder interference including input waveguides 101 and 102, two 3 dB optical couplers 111 and 121, optical delay waveguides 131 and 132 connecting the two optical couplers, and output waveguides 103 and 104. A refractive index adjusting means 141 is provided in a part of one optical delay waveguide 132.

  By using a thin film heater as the refractive index adjusting means 141 and utilizing the thermo-optic effect, the optical path length difference between the two optical delay waveguides 131 and 132 is changed between 0 and a half wavelength, so that the output light The strength was adjusted. In order to supply power to the thin film heater, electrode terminals 191 and 192 are formed on the substrate end face different from the input end face and output end face to which the optical fiber is connected, and one end of the thin film heater and the electrode terminal 191 are connected by the electric wiring 171. The other end of the thin film heater and the electrode terminal 192 were connected by an electric wiring 172.

  Partial regions of the electrode terminals 191 and 192 are openings 181 and 182, and the upper surface of the planar optical circuit excluding the openings 181 and 182 is covered with an insulating film 168. Furthermore, heat insulating grooves 151 and 152 were formed in the vicinity of the thin film heater in order to reduce power consumption and reduce polarization dependency. FIG. 12B shows a cross-sectional view taken along the line BB ′ of FIG. 12A, and FIG. 12C shows a cross-sectional view taken along the line CC ′ of FIG.

  In FIG. 12, only one waveguide type optical switch / attenuator is formed on the planar substrate 161. However, a plurality of waveguide type optical switch / attenuators are arranged as shown in FIGS. A plurality of electrode terminals 191 and 192 may be formed in the vicinity of the end face of the substrate at a predetermined interval to supply power. Alternatively, as shown below, the electrode terminals 191 and 192 may be formed on the flat substrate 161, and the electrode terminals 191 and 192 may be arranged in two or more rows instead of one row.

  In the planar circuit of FIG. 13, waveguide type optical switch / attenuators 431 to 433 are arranged in multiple rows at a constant interval of 500 μm. Then, in order to supply power to the refractive index adjusting means formed in the optical delay waveguides of the waveguide type optical switch / attenuators 431 to 433, the electrodes are parallel to the optical axis direction on the flat substrate 161 (see FIG. 12). Terminals 191 to 196 are arranged in two rows.

  The electrode terminals 191 to 196 have a width of 150 μm, the electrode terminals 191 to 196 have an opening width of 100 μm, and the electrode terminals 191 to 196 have a pitch of 500 μm. In the case of such a multiple optical circuit, if the electrode terminals 191 to 196 are formed not on the substrate end face but on the flat substrate 161 (see FIG. 12), the planar optical circuit can be reduced in size.

The planar optical circuit described above was fabricated as shown in FIG. That is, the lower clad glass soot 162 mainly composed of SiO ₂ and the core glass soot 163 obtained by adding GeO ₂ to SiO ₂ were deposited on the flat substrate 161 by the flame deposition method (FIG. 14A). Thereafter, the glass was made transparent at a high temperature of 1000 ° C. or higher. At this time, glass was deposited so that the lower clad glass layer 164 and the core glass 165 had the designed thickness (FIG. 14B).

Subsequently, an etching mask 166 was formed on the core glass 165 using a photolithography technique (FIG. 14C), and the core glass 165 was patterned by reactive ion etching (FIG. 14D). . After removing the etching mask 166, the upper cladding glass 167 was formed again by the flame deposition method. A dopant such as B ₂ O ₃ or P ₂ O ₅ is added to the upper clad glass 167 to lower the glass transition temperature so that the upper clad glass 167 enters the narrow gap between the core glass 165 and the core glass 165. ((E) of FIG. 14).

  Subsequently, an electric wiring (not shown) of Au, an electrode terminal 191 and a thin film heater of tantalum nitride are formed on the upper surface of the upper clad 167 ((f) of FIG. 14), and the region excluding the opening of the electrode terminal 191 Was covered with a quartz insulating film 168 (FIG. 14G). The electrical wiring and the electrode terminal 191 are made of Au, and the thin film heater is made of tantalum nitride, but other materials may be used. Further, the electrical wiring and the electrode terminal 191 may be manufactured using two or more kinds of materials, such as forming Au on tantalum nitride. After producing the electrical wiring layer, a heat insulating groove (not shown) was formed in the vicinity of the thin film heater.

In each of the embodiments of the present invention described above, an example using a silica-based glass waveguide mainly on a silicon substrate has been shown, but the waveguide material may be polyimide, silicon, semiconductor, LiNbO ₃ or the like. . For example, the present invention can be applied even if the manufacturing method is a spin coating method, a sol-gel method, a sputtering method, a CVD method, an ion diffusion method, an ion beam direct drawing method, or the like.

Further, the substrate is not limited to silicon, and other materials such as quartz may be used.
Further, although the thermo-optic effect using a thin film heater is used as the refractive index adjusting means, other means such as an electro-optic effect and a magneto-optic effect may be used.

  The present invention can be applied, for example, to a connection structure of electrode terminals in a planar optical circuit that enables downsizing and high-density integration of a planar optical circuit including electrical wiring.

It is the connection structure of the electrode terminal of the planar optical circuit in 1st Embodiment of this invention, Comprising: (a) is a top view, (b) is sectional drawing in cut surface AA ', (c) is a wiring board. Schematic of a cross-sectional structure. The schematic diagram of the connection structure of the electrode terminal of the plane type optical circuit in a 1st embodiment of the present invention. Schematic of the connection structure of the electrode terminal of the planar optical circuit in 2nd Embodiment of this invention. The figure which showed a mode that the insulating film of the electrode terminal vicinity was rising with respect to the surrounding insulating film with the connection structure of the electrode terminal of the planar optical circuit in 3rd Embodiment of this invention. Schematic of the connection structure of the electrode terminal of the planar optical circuit in 4th Embodiment of this invention. Schematic of the connection structure of the electrode terminal of the planar optical circuit in 5th Embodiment of this invention. Schematic of the connection structure of the electrode terminal of the planar optical circuit in 6th Embodiment of this invention. 8A and 7B are electrode terminal connection structures of a planar optical circuit according to a seventh embodiment of the present invention, where FIG. 9A is a cross-sectional view of the wiring board, and FIG. Sectional drawing of the connection structure after heating and crimping | bonding the electrode terminal of the upper surface of. Schematic of the connection structure of the electrode terminal of the planar optical circuit in 8th Embodiment of this invention. Schematic of the connection structure of the electrode terminal of the planar optical circuit in 9th Embodiment of this invention. The schematic of the connection structure of the electrode terminal of the planar optical circuit in 10th Embodiment of this invention. It is an example of the optical circuit which applied the connection structure of the electrode terminal in the planar optical circuit demonstrated in each embodiment of this invention, (a) is a top view, (b) is sectional drawing in cut surface BB '. (C) is sectional drawing in cut surface CC '. The figure which showed an example of the multiple optical circuit to which the connection structure of the electrode terminal in the planar optical circuit demonstrated in each embodiment of this invention was applied. The schematic diagram explaining the manufacturing process of the planar optical circuit of this invention. In the prior art, (a) is a schematic diagram of a conventional waveguide-type optical switch formed on a planar substrate, and (b) is a schematic diagram of a planar-type optical circuit module using the conventional waveguide-type optical switch. . In the prior art, (a) is a schematic diagram illustrating a method of connecting an electrode terminal of a liquid crystal circuit board and an electrode of a wiring board, (b) is a schematic diagram of an example of a wiring board, and (c) is a broken line in (b). Schematic of the cross-sectional structure of the part shown by.

Explanation of symbols

101, 102 Input waveguide 103, 104 Output waveguide 111 Optical coupler 121 Optical coupler 131, 132 Optical delay waveguide 141 Heater 151, 152 Groove 161 Planar substrate 162 Lower clad glass soot 163 Core glass soot 164 Lower clad glass 165 Core glass 166 Etching mask 167 Upper clad glass 168 Insulating film 171 to 178 Electrical wiring 181 to 188 Electrode terminal opening 191 to 198 Electrode terminal 201 Conductive film 211 Conductive particle 221 Conductive particle nucleus 231 Conductive particle film 241 Adhesive 301 Substrate 311 Wiring board 321-325 Electrode 331 Wiring 341 Cover 401 Cladding 431-433 Optical switch / variable optical attenuator 901, 902 Input waveguide 903, 904 Output waveguide 911 Optical coupler 9 DESCRIPTION OF SYMBOLS 1 Optical coupler 931,932 Optical delay waveguide 941 Refractive index adjustment means 951 Planar type optical circuit 952 Electrical wiring board 953 Electrode 954 Wiring 955 Bonding wire 956 Package 957 Optical fiber array 958 Electrical connector 959 Electrode terminal 961 Substrate 962 Wiring board 963 Electrode 964 Wiring 965 Cover 966 Anisotropic conductive film 967 Conductive particle 968 Adhesive 971 Liquid crystal circuit board 972 Electrode terminal

Claims (9)

A planar optical circuit comprising a clad formed on a flat substrate and a core formed in the clad and having a refractive index higher than that of the clad, comprising: an electric wiring on the upper surface of the clad; and the electric wiring In the planar optical circuit in which the electrode terminal connected to the electrode terminal is formed, the entire or part of the electrode terminal is an opening, and the region excluding the opening of the electrode terminal is covered with an insulating film.
A wiring board comprising wiring formed on a substrate in an opening of an electrode terminal of the planar optical circuit and an electrode connected to the wiring, the height from the upper surface of the substrate to the upper surface of the electrode The electrode of the wiring board which is t is electrically connected through a conductive film having conductive particles having a particle diameter φ,
The opening width of the electrode terminal is wider than the width of the electrode of the wiring board, and the depth d from the upper surface of the insulating film to the upper surface of the opening portion of the electrode terminal satisfies 0 < d ≦ t−φ. An electrode terminal connection structure in a planar optical circuit, wherein an electrode terminal is formed. In the connection structure of the electrode terminal in the planar optical circuit according to claim 1,
In the planar optical circuit, the electrode terminal is formed so that w ≧ L + 2φ, where w is the opening width of the electrode terminal of the planar optical circuit and L is the width of the electrode of the wiring board. Electrode terminal connection structure. In the electrode terminal connection structure in the planar optical circuit according to claim 1 or 2,
The hardness of the electrode terminal of the planar optical circuit and the hardness of the electrode of the wiring board are higher than the hardness of the conductive particles, and the distance between the upper surface of the opening of the electrode terminal and the upper surface of the electrode of the wiring board Is smaller than the particle diameter of the conductive particles, the electrode terminal connection structure in the planar optical circuit. In the electrode terminal connection structure in the planar optical circuit according to claim 1 or 2,
The hardness of the electrode terminal of the planar optical circuit or the hardness of the electrode of the wiring board is lower than the hardness of the conductive particles, and the upper surface of the opening of the electrode terminal and the upper surface of the electrode of the wiring board An electrode terminal connection structure in a planar optical circuit, wherein the interval is smaller than the particle diameter of the conductive particles. In the connection structure of the electrode terminal in the planar optical circuit in any one of Claims 1 thru | or 4,
An electrode terminal connection structure in a planar optical circuit, wherein a plurality of electrode terminals of the planar optical circuit are formed at a predetermined interval. In the connection structure of the electrode terminal in the planar optical circuit according to claim 5,
A plurality of electrodes of the wiring board and electrode terminals of the planar optical circuit are arranged at a predetermined interval from first to Nth (N is an integer of 3 or more),
When the opening width of the nth electrode terminal of the planar optical circuit connected to the nth (1 ≦ n ≦ N) electrode of the wiring board is w (n), the mth of the planar optical circuit. The distance between the center position of the electrode terminal (1 ≦ m ≦ N−1) and the center position of the (m + 1) th electrode terminal is the wiring before the electrode of the wiring board is connected to the electrode terminal of the planar optical circuit. The distance between the center position of the mth electrode and the center position of the (m + 1) th electrode of the substrate is equal to the opening width w (m) of the mth electrode terminal and the opening of the (m + 1) th electrode terminal of the planar optical circuit. A connection structure of electrode terminals in a planar optical circuit, wherein either one of the widths w (m + 1) is wider than the other. In the connection structure of the electrode terminal in the planar optical circuit according to claim 5,
When the width of the electrode of the wiring board is L and the width of the gap between the electrodes is S, the electrode of the wiring board is a constant distance L + S from the first electrode to the Nth electrode (N is an integer of 3 or more). Are arranged across
When the opening width of the nth electrode terminal of the planar optical circuit connected to the nth (1 ≦ n ≦ N) electrode of the wiring board is w (n), the first to Nth electrode terminals Among them, the opening width of the m-th electrode terminal closest to the center is the smallest among w (n), and satisfies w (m) ≧ L + 2φ, and the electrode moves from the m-th to the first electrode terminal. An electrode terminal connection structure in a planar optical circuit, characterized in that the opening width of the terminal is gradually increased and the opening width of the electrode terminal is gradually increased from the mth to the Nth electrode terminal. In the connection structure of the electrode terminal in the planar optical circuit according to claim 5,
A plurality of electrode terminals of the planar optical circuit are arranged at a predetermined interval from the first to the Nth (N is an integer of 3 or more),
When the width of the electrode of the wiring board is L and the width of the gap between the electrodes is S, a plurality of electrodes of the wiring board are arranged with a constant interval L + S from the first electrode to the Nth electrode,
When the curvature of warpage of the planar substrate is R, the nth ((n) th) of the planar optical circuit is based on the center position of the mth electrode terminal among the first to Nth electrode terminals of the planar optical circuit. In the planar optical circuit, the center position of the electrode terminal of 1 ≦ n ≦ N) is arranged as x (n) = R · arcsin ((L + S) · (nm) / R) Electrode terminal connection structure. In the electrode terminal connection structure in the planar optical circuit according to any one of claims 1 to 8,
The optical waveguide composed of the core and the clad is a silica-based optical waveguide, and the electrode terminal connection structure in the planar optical circuit.

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