JP4748441B2 - Electrophoretic display device, manufacturing method thereof, and electronic apparatus - Google Patents

Description

  The present invention relates to an improvement of an electrophoretic display device that changes a visual recognition state by controlling electric field application to an electrically charged particle.

  The electrophoretic display device includes an element substrate such as a semiconductor on which a plurality of pixel electrodes and the like arranged in a matrix are formed, and a counter substrate on which a planar common electrode and the like are formed. The element substrate and the counter substrate are bonded to each other so that the electrode forming surfaces face each other with a certain gap. An electrophoretic layer is provided in this gap. The electrophoretic layer is obtained by dispersing electrophoretic particles in a dispersion medium.

In this configuration, when a potential difference is applied between the pixel electrode and the common electrode, the electrophoretic particles charged according to the direction of the electric field are attracted to one of the electrodes. When the electrophoretic particles are composed of colored particles and a transparent material is used as the common electrode and the counter substrate, the color of the electrophoretic particles attracted to the counter substrate side can be seen. Therefore, an image can be displayed by controlling the voltage applied to each pixel electrode.
JP 2002-162651 A JP 2002-169190 A

  However, in the electrophoretic display device, when the power supply is stopped during the image holding (maintenance) period, the charge held in the common electrode and the pixel electrode is reduced due to a leakage current in a thin film transistor (hereinafter referred to as “TFT”) or an electrophoretic material. The potential difference between the electrodes decreases, and electrophoretic particles are dispersed. As a result, the contrast of the display image gradually decreases. Further, when a state without a potential difference continues for a long time, the image disappears due to diffusion of the electrophoretic particles.

  Therefore, an object of the present invention is to provide an electrophoretic display device in which the influence on the image display due to the decrease in the retained charge is reduced.

In order to achieve the above object, an electrophoretic display device of the present invention is an electrophoretic display device that displays an image using an electrophoretic element, an electrophoretic element provided for each pixel, a thin film transistor that drives the electrophoretic element, A holding capacitor for holding a voltage applied to the electrophoretic element,
The electrophoretic element includes a pixel electrode independent for each pixel, a common electrode electrically common to a plurality of pixels, and an electrophoretic material sandwiched between the pixel electrode and the common electrode,
The thin film transistor includes a drain electrically connected to the signal line, a source electrically connected to the pixel electrode, and a gate electrode electrically connected to the scan line,
The storage capacitor includes a storage capacitor first electrode, a storage capacitor second electrode, and a storage capacitor dielectric film provided between the storage capacitor first electrode and the storage capacitor second electrode, The storage capacitor second electrode is formed of the same metal layer as the gate electrode.

  With this configuration, a large storage capacity can be formed.

  Preferably, the storage capacitor first electrode is formed by a part of a semiconductor film constituting the source of the thin film transistor, and the storage capacitor includes a part of the semiconductor film and the storage capacitor second electrode. The storage capacitor dielectric film is formed of the same insulating film layer as the gate insulating film.

  Preferably, the area of a region where a part of the semiconductor film overlaps with the storage capacitor second electrode occupies 50% or more of the display area of the electrophoretic element.

  Preferably, the storage capacitor first electrode is formed by a part of the pixel electrode, and the storage capacitor includes a part of the pixel electrode and the storage capacitor second electrode on a plane (plan view). It is formed by overlapping.

  Preferably, the area of the region where the pixel electrode overlaps the storage capacitor second electrode occupies 50% or more of the display area of the electrophoretic element.

  Preferably, an insulating film is formed between the gate electrode and the pixel electrode, and the storage capacitor first electrode is formed by the pixel electrode formed in a region where the insulating film is relatively thinned. The storage capacitor dielectric film is formed of the thinned insulating film.

  Preferably, the dielectric constant of the insulating film in the thinned region is set higher than the dielectric constant of the insulating film in the non-thinned region.

  Preferably, the thickness of the insulating film that has been thinned is smaller than 300 μm, and the thickness of the insulating film in a region that has not been thinned is 300 μm or more.

The electrophoretic display device of the present invention drives an electrophoretic element provided for each pixel in the electrophoretic display device that displays an image by controlling a voltage applied to the electrophoretic material. A thin film transistor and a storage capacitor for holding a voltage applied to the electrophoretic element, the electrophoretic element comprising: a pixel electrode independent for each pixel; and a common electrode electrically common to the plurality of pixels. The electrophoretic material sandwiched between the pixel electrode and the common electrode, and the thin film transistor includes a drain electrically connected to the signal line and a source electrically connected to the pixel electrode And a gate electrode electrically connected to the scanning line, and the storage capacitor includes a storage capacitor first electrode, a storage capacitor second electrode, the storage capacitor first electrode, and the storage capacitor second electrode. Retention capacity provided between It includes a body layer, and the storage capacitor second electrode is formed of the same metal layer and the gate electrode, the storage capacitor first electrode,
1) a part of a semiconductor film constituting the source of the thin film transistor;
2) Of the insulating film formed between the gate electrode and the pixel electrode, a part of the pixel electrode in a relatively thinned region is formed.
The holding capacity is
1) a lower storage capacitor formed by a part of the semiconductor film and the storage capacitor second electrode;
2) formed by parallel connection of an upper storage capacitor formed by a part of the pixel electrode and the storage capacitor second electrode;
In the lower storage capacitor, the same insulating film layer as the gate insulating film is the storage capacitor dielectric film,
In the upper storage capacitor, the insulating film in the relatively thinned region of the insulating film formed between the gate electrode and the pixel electrode is the storage capacitor dielectric film.

  Preferably, a part of the semiconductor film, the second part of the storage capacitor, and a part of the pixel electrode in the storage capacitor are formed to overlap each other on a plane (plan view).

  With this configuration, the storage capacity can be increased.

  Preferably, the storage capacitor second electrode is electrically connected to a capacitor line, and the capacitor line is electrically connected to a low impedance source.

  In addition, the method for manufacturing an electrophoretic display device according to the present invention includes a step of forming a semiconductor film of a thin film transistor and a storage capacitor by patterning the semiconductor film in the method for manufacturing an electrophoretic display device that displays an image using an electrophoretic element. Forming a lower portion of the first electrode, forming a gate insulating film on the semiconductor film, forming a metal layer on the gate insulating film, and then patterning the gate electrode and the storage capacitor second A step of forming an electrode; a step of forming a first insulating film on the gate electrode and the storage capacitor second electrode; and a contact hole to the semiconductor film in the first insulating film; Forming a recess reaching the second storage capacitor electrode; forming a second insulating film on the first insulating film including the inside of the recess; and forming the recess on the second insulating film. Including Electrically pixel electrode is formed to be connected to the semiconductor film, a step of forming a storage capacitor first electrode upper, characterized by comprising a.

  Preferably, in the method for manufacturing an electrophoretic display device, a dielectric constant of the second insulating film is set higher than a dielectric constant of the first insulating film.

  Preferably, the second insulating film is formed thinner than the first insulating film.

  The electronic apparatus of the present invention includes the above-described electrophoretic display device as a display.

  Here, the “electronic device” includes all devices including a display unit that uses display by an electrophoretic material, and includes a display device, a television device, an electronic paper, a clock, a calculator, a mobile phone, a portable information terminal, and the like. Including. Also, things that deviate from the concept of “equipment”, for example, flexible paper / film-like objects, belonging to real estate such as wall surfaces to which these objects are attached, moving objects such as vehicles, flying objects, ships, etc. Including those belonging to.

  According to the electrophoretic display device of the present invention, since the storage capacitor can be formed in a large capacity, the charge retention characteristic is improved. In addition, since the storage capacitor can be made relatively small and the pixel electrode can be made small, a high-definition screen can be formed. This is convenient for area gradation.

  Next, preferred embodiments of the present invention will be described with reference to the drawings.

  The following embodiments are merely examples, and the present invention can be variously modified within the scope of the gist of the present invention.

  Note that in this specification, a source electrode and a drain electrode of a semiconductor device are not distinguished, but for convenience, one electrode is named a source electrode and the other electrode is named a drain electrode. In terms of physical strictness, the source electrode and the drain electrode of a transistor are defined as a source electrode having a lower potential in an N-type transistor, and defined as a source electrode in a P-type transistor. However, which electrode has a higher potential varies depending on the operating state. Therefore, strictly speaking, the source electrode and the drain electrode can always be interchanged in one transistor. In the present specification, for the sake of clarity, such strictness is eliminated, and for convenience, one electrode is referred to as a source electrode and the other electrode is referred to as a drain electrode.

  The electrophoretic display device of this embodiment includes an electrophoretic display panel and a peripheral circuit. In the present embodiment, two large storage capacitors are formed under the pixel electrode to make it less susceptible to leakage current.

  FIG. 1 is a block diagram showing an overall electrical configuration of the electrophoretic display device. On the surface of the element substrate 100, an electrophoretic display panel A and its peripheral region are provided. In this figure, a driving circuit in the peripheral region is integrated assuming an element with high mobility (such as low-temperature polysilicon), but the present invention can of course be applied to an element with low mobility (such as amorphous silicon). The driving circuit in that case is composed of an element with high mobility (such as single crystal silicon), and the electrophoretic display panel A, the data line driving circuit 140, and the scanning line driving circuit 130 are separate components. The electrophoretic display panel A of this example includes a plurality of pixels, and each pixel includes a TFT 103 as a switching element to be described later and a pixel electrode 104 connected to the TFT 103. On the other hand, a scanning line driving circuit 130 and a data line driving circuit 140 are formed in the peripheral region of the element substrate 100.

  A controller 300 is provided in the peripheral circuit of the electrophoretic display device. The controller 300 includes an image signal processing circuit and a timing generator. Here, the image signal processing circuit generates image data and a counter electrode control signal, and inputs them to the data line driving circuit 140 and the counter electrode modulation circuit 150, respectively. The counter electrode modulation circuit 150 supplies a bias signal Vcom and a power supply voltage Vs to the common electrode of the pixel and the counter electrode of the storage capacitor, respectively. For example, image reset is set by a positive or negative high level bias signal Vcom (reset signal). The reset signal is output for a predetermined period before the data driving circuit 140 outputs image data. The reset is used to attract the electrophoretic particles migrating in the dispersion medium to the pixel electrode or the common electrode to initialize the spatial state.

  The timing generator generates various timing signals for controlling the scanning line driving circuit 130 and the data line driving circuit 140 when reset settings and image data are output from the image signal processing circuit.

  On the electrophoretic display panel A of the element substrate 100, a plurality of scanning lines 101 are formed in parallel along the X direction shown in the drawing. In addition, a plurality of data lines 102 are formed in parallel along the Y direction orthogonal thereto. Each pixel is arranged in a matrix corresponding to the intersection of the scanning line 101 and the data line 102.

  FIG. 2 shows the structure of the pixel. The pixel (i, j) in the i-th row and the j-th column includes the TFT 103, the pixel electrode 104, and the storage capacitor Cs. A gate terminal of the TFT 103 is connected to the scanning line 101, and a source terminal thereof is connected to the data line 102. Further, the drain terminal of the TFT 103 is connected to the pixel electrode 104 and the storage capacitor Cs. The holding capacitor Cs holds the voltage applied to the pixel electrode 104 by the TFT 103.

  Since the pixel is configured by sandwiching an electrophoretic layer between the pixel electrode 104 and the common electrode Com, a pixel capacitor Cepd is formed according to the electrode area, the distance between the electrodes, and the dielectric constant of the electrophoretic layer. is doing. As described above, the common electrode Com is connected to the counter electrode modulation circuit 150 via the wiring 201. The other side of the storage capacitor Cs is connected to the storage capacitor line 106. The storage capacitor line 106 is connected to the power source Vs by the counter electrode modulation circuit 150.

  In such an electrophoretic display panel A, first, when all the scanning line signals become active at the reset timing, the TFT 103 connected to the jth scanning line 101 is also turned on. In the reset operation, all data signals are set to a white or black level, a reset signal is applied to the common electrode Com from the counter electrode modulation circuit 150, and all electrophoretic elements are set to white or black display (binary display). in the case of). Thereafter, the scanning lines 101 are sequentially selected and image writing is performed. When the TFT 103 connected to the j-th scanning line 101 is turned on, the data signal Xi (image signal) supplied from the data line driving circuit 140 is written to the pixel electrode 104 in synchronization with the scanning line selection. At this time, the storage capacitor Cs is also charged at the voltage level of the data signal Xi, and even after the TFT 103 is cut off, the charge of the pixels (pixel electrode and common electrode) is maintained to maintain the image by the electrophoretic particles. Each pixel performs display in accordance with the voltage level of the data signal, thereby displaying an image.

  FIG. 3 is an explanatory diagram for explaining the storage capacitor in the present embodiment. As described above, the leakage current in the storage capacitor Cs reduces the storage charge between the common electrode Com and the pixel electrode 104 and causes the electrophoretic particles to diffuse. Therefore, in the embodiment, the storage capacitor Cs is made large to reduce the influence of the leakage current.

  In this embodiment, a large storage capacitor Cs is formed in the pixel region. For this reason, two holding capacitors CSL and CSU are arranged under the pixel electrode, and these are connected in parallel to the transmission capacitor Cepd of the electrophoretic element.

  FIG. 4 is a cross-sectional view of the electrophoretic display device for explaining two storage capacitors CSL and CSU (retention capacitors Cs) formed on the element substrate.

  As shown in the figure, the electrophoretic display device is roughly composed of an element substrate 100 and a common electrode substrate 200. The electrophoretic layer is omitted for simplicity of explanation.

  The element substrate set 100 includes an insulating substrate 11, a semiconductor layer 12, a gate insulating layer 13, a gate electrode layer 14a, a gate electrode wiring layer 14, a gate layer, a first interlayer insulating layer 15, a second interlayer insulating layer 16, and a pixel electrode layer. 17, contacts 21 and 22, and a wiring layer (data line) 23.

  For example, the insulating substrate 11 is an insulating substrate such as crow or resin. The semiconductor layer 12 is n + or p + polysilicon into which impurities are implanted at a high concentration, and serves also as a source / drain region of the TFT and a lower electrode of the storage capacitor CSL. The gate insulating layer 13 is composed of a silicon oxide film (SiO 2), and serves also as a gate insulating film of the TFT and a dielectric layer of the storage capacitor CSL. The gate electrode layer wiring 14 is formed of a metal film such as aluminum and serves also as an upper electrode of the storage capacitor CSL and a lower electrode of the storage capacitor CSU. Further, the gate electrode layer 14 a of the TFT is formed with the same film as the gate electrode wiring layer 14.

  The first interlayer insulating layer 15 is a silicon oxide film having a thickness of 300 nm or more, and insulates the wirings from each other. The second interlayer insulating layer 16 is a thin silicon nitride film (SiN) having a thickness of 100 nm to 300 nm, and also serves as a dielectric layer of the storage capacitor CSU. The pixel electrode layer 17 is an electrode that forms an electric field with the common electrode Com, and is formed of a metal film such as ITO. The pixel electrode layer 17 also serves as an upper electrode of the storage capacitor CSU. The contact 21 is a metal material deposited in a contact hole opened in the first interlayer insulating layer 15 and connects the drain region of the TFT and the wiring layer 23. Similarly, the contact 22 connects the TFT source region and the pixel electrode layer 17.

  In the element substrate set 100, a transparent electrode layer 220 such as ITO is formed on the surface of a transparent substrate 210 such as glass or resin to form a common electrode Com. The transparent electrode layer 220 is connected to the counter electrode modulation circuit 150.

  In the above configuration, the right end side of the gate electrode wiring layer 14 does not overlap the gate insulating layer 13, so that the semiconductor layer 12 is prevented from being destroyed. Further, since both ends of the gate electrode wiring layer 14 overlap with the edge portion of the bottom of the recess of the second interlayer insulating film 16, a short circuit between the wirings is prevented.

  The storage capacitor Cs having the above-described configuration is the sum of the lower storage capacitor CSL and the upper storage capacitor CSU. Here, the dielectric constant of vacuum is εo, the non-dielectric constant of the gate insulating layer is εG, the thickness tG of the gate insulating layer, and the effective area between the two electrodes of the storage capacitor CSL (overlapping region of the upper electrode and the lower electrode) SL Assuming that the effective area SU between the two electrodes of the storage capacitor CSU, the non-dielectric constant of the second interlayer insulating film is εI, and the film thickness of the second interlayer insulating film is tI, the following is obtained.

Cs = CSL + CSU = (εo · εG · SL / tG) + (εo · εI · SL / tI)

For example, in the embodiment described later,
εo = 8.85 × 10 ⁻¹² [F / m], εG = 3.9, SL = 3080 μm ² , tG = 75 nm, and more CSL = (εo · εG · SL / tG)
= 8.85 × 10 ⁻¹² [F / m] × 3.9 × 3080 μm ² /0.075 μm
= 1.417 [pF]
εI = 7.5, SU = 2500, tI = 200 nm
CSU = εo · εI · SL / tI = 8.85 × 10 ⁻¹² [F / m] × 7.5 × 2500 μm ² /0.2 μm = 0.830 [pF]
Cs = CSL + CSU = 1.417 + 0.830 = 2.247 [pF]
As described above, since the holding capacity is extremely large, an electrophoretic display element having good holding characteristics can be obtained.

(Method for manufacturing electrophoretic display device)
A method for manufacturing an electrophoretic display device according to an embodiment of the present invention will be described with reference to the process diagrams of FIGS. 5 and 6 and the plan views of the film formation patterns of FIGS.

  First, as shown in FIG. 5A, silicon is deposited to a thickness of 50 nm by CVD on an insulating substrate 11 such as glass or resin, and heat treatment is performed by excimer laser irradiation to form a polysilicon layer (semiconductor layer). 12 is formed.

  Next, as shown in FIG. 7B, the polysilicon layer 12 is patterned to form an element region and a lower electrode portion of the storage capacitor CSL (see FIG. 7).

As shown in FIG. 5C, a silicon oxide film is deposited on the polysilicon layer 12 by a plasma CVD method using TEOS as a material to a thickness of about 75 nm. The polysilicon layer 1 may be thermally oxidized. Ions are implanted into the polysilicon layer 12 while masking the channel region of the TFT. For example, p + ions are implanted at a concentration of 5 × 10 ²⁰ cm ⁻³ .

  Thereafter, heat treatment is performed to activate the impurities, and the source and drain regions of the TFT and the lower electrode of the storage capacitor CSL are formed (see FIG. 8).

  As shown in FIG. 4D, a metal material, for example, tantalum is deposited to a thickness of about 700 nm by sputtering to form a metal film. Next, this metal film is patterned to form a gate electrode layer 14a of the TFT, an upper electrode layer 14 of the storage capacitor CSL, and a wiring layer of the wiring 106 (see FIG. 9).

  As shown in FIG. 6A, silicon oxide is deposited on the substrate 11, the gate insulating layer 13, the gate electrode layer 14a and the gate electrode wiring layer 14 using TEOS as a material by a plasma CVD method to form a film having a thickness of about 800 nm. A thick silicon oxide film is formed to form the first interlayer insulating layer 15.

As shown in FIG. 6B, anisotropic etching is performed on the source and drain regions on the TFT and the first interlayer insulating layer on the gate electrode wiring layer 14 to open contact holes 21a and 22a on the TFT. . Further, a contact region 25 is opened on the gate electrode wiring layer 14 (first contact opening). By using the gate electrode wiring layer 14 as an etching stopper, the contact holes 21a and 22a and the contact region 25 can be opened in the same process. The area of the opening area (the bottom of the recess) on the gate electrode wiring layer 14 is, for example, about 2500 μm ² (see FIG. 10).

  As shown in FIG. 6C, a metal such as aluminum is formed over the entire surface of the substrate by sputtering or the like, and the contact holes 21a and 22a are embedded. The metal film is patterned to form the wiring layer 23 and the connection pad electrode 24 (see FIG. 11).

  Further, a silicon nitride film is formed to a thickness of about 200 nm on the entire surface of the substrate by plasma CVD, and a second interlayer insulating film 16 is formed.

  As shown in FIG. 6D, a contact hole 25 is opened in the second interlayer insulating film 16 to expose the source electrode 24 of the TFT (see FIG. 12).

  Next, an ITO film is formed on the entire surface of the substrate by sputtering or the like, and patterning is performed to form the pixel electrode layer 17 (see FIG. 13). The pixel electrode layer 17 constitutes an upper electrode of the storage capacitor CSU.

  As shown in FIG. 15, the semiconductor layer 12 shown in satin, the gate electrode wiring layer 14 shown by diagonal lines extending from the upper right to the lower left direction, and the pixel electrodes shown by diagonal lines extending from the upper left to the lower right direction The layers 17 overlap in the film thickness direction, and two parallel capacitors are formed under the pixel electrode layer.

  As described above, since the storage capacitance is large, even if a leakage current is generated between the pixel electrode and the common electrode, the charge between the two electrodes is hardly reduced and the diffusion of the electrophoretic particles is prevented.

  FIG. 15A and FIG. 15B are examples of electronic apparatuses (electro-optical devices) to which such an electrophoretic display device is applied. FIG. 15A shows an example in which an electrophoretic display device 600 is applied to the display surface of a large television device 900. FIG. 15B is an example in which the electrophoresis apparatus 600 is applied to the display surface of the roll-type television apparatus 910.

  Note that the range of electronic devices to which the present invention can be applied is not limited to this, and includes a wide range of devices that utilize changes in visual color tone accompanying the movement of charged particles. For example, in addition to the above apparatus examples, those belonging to real estate such as wall surfaces to which an electrophoretic film is bonded, and those belonging to moving bodies such as vehicles, flying objects, and ships are included.

It is a block diagram explaining the whole structure of the electrophoretic display device of this invention. FIG. 6 is a circuit diagram illustrating a pixel circuit in the electrophoretic display device of the present invention. FIG. 6 is a circuit diagram illustrating a storage capacitor of a pixel circuit of the electrophoretic display device of the present invention. It is sectional drawing explaining the structure of the storage capacity | capacitance of an electrophoretic display device. It is sectional drawing explaining the manufacturing process of the electrophoretic display device of an Example. It is sectional drawing explaining the manufacturing process of the electrophoretic display device of an Example. It is a top view explaining the lower electrode forming process of the lower holding capacitor CSL of the electrophoretic display device of the example. It is a top view explaining the lower electrode forming process of the lower holding capacitor CSL of the electrophoretic display device of the example. FIG. 3 is a plan view illustrating a gate electrode and a storage capacitor (a common electrode of the storage capacitor) of the electrophoretic display device according to the embodiment. It is a top view explaining the 1st contact hole and recessed part simultaneous formation process of the electrophoretic display device of an embodiment. It is a top view explaining the wiring layer formation process of the electrophoretic display device of an embodiment. It is a top view of the 2nd interlayer insulation film formation (2nd contact hole formation) process of an electrophoretic display device. Plan view of process of forming upper part of storage capacitor first electrode (pixel electrode formation) of electrophoretic display device It is a top view explaining three electrode positions which constitute two retention capacity. FIG. 15 illustrates an example of an electronic device, and FIG. 15A illustrates an example in which an electrophoretic display device is used in a large television device. FIG. 5B is a diagram showing an example in which the electrophoretic display device is used in a roll type television device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Insulating substrate, 12 Semiconductor layer, 13 Gate insulating layer, 14a Gate electrode layer, 14 Gate electrode layer wiring layer, 15 1st interlayer insulating layer, 16 2nd interlayer insulating layer, 17 Pixel electrode layer

Claims (7)

In an electrophoretic display device that displays an image by controlling the voltage applied to the electrophoretic material,
An electrophoretic element provided for each pixel;
A thin film transistor for driving the electrophoretic element;
A holding capacitor for holding a voltage applied to the electrophoretic element,
The electrophoretic element includes a pixel electrode independent for each pixel, a common electrode electrically common to a plurality of pixels, and the electrophoretic material sandwiched between the pixel electrode and the common electrode. ,
The thin film transistor includes a drain electrically connected to the signal line, a source electrically connected to the pixel electrode, and a gate electrode electrically connected to the scan line,
The storage capacitor includes a storage capacitor first electrode, a storage capacitor second electrode, and a storage capacitor dielectric film provided between the storage capacitor first electrode and the storage capacitor second electrode,
The storage capacitor second electrode is formed of the same metal layer as the gate electrode,
The storage capacitor first electrode
1) a part of a semiconductor film constituting the source of the thin film transistor;
2) Of the insulating film formed between the gate electrode and the pixel electrode, a part of the pixel electrode in a relatively thinned region is formed.
The holding capacity is
1) a lower storage capacitor formed by a part of the semiconductor film and the storage capacitor second electrode;
2) formed by parallel connection of an upper storage capacitor formed by a part of the pixel electrode and the storage capacitor second electrode;
In the lower storage capacitor, the same insulating film layer as the gate insulating film is the storage capacitor dielectric film,
In the upper storage capacitor, an insulating film in a relatively thinned region of the insulating film formed between the gate electrode and the pixel electrode is the storage capacitor dielectric film. Electrophoretic display device. The electrophoretic display device according to claim 1 .
An electrophoretic display device, wherein a part of the semiconductor film, the second part of the storage capacitor, and a part of the pixel electrode in the storage capacitor overlap each other on a plane. The electrophoretic display device according to claim 1 or 2 ,
The storage capacitor second electrode is electrically connected to a capacitor line, and the capacitor line is electrically connected to a low impedance source. An electrophoretic display device manufacturing method for displaying an image by an electrophoretic element,
Forming a semiconductor film of the thin film transistor; and
Patterning the semiconductor film to form a lower portion of the storage capacitor first electrode;
Forming a gate insulating film on the semiconductor film;
Forming a metal layer on the gate insulating film and then patterning to form a gate electrode of the thin film transistor and a storage capacitor second electrode;
Forming a first insulating film on the gate electrode and the storage capacitor second electrode; and
Forming a contact hole to the semiconductor film and a recess reaching the storage capacitor second electrode in the first insulating film;
Forming a second insulating film on the first insulating film including the inside of the recess;
Forming a pixel electrode electrically connected to the semiconductor film including the inside of the recess on the second insulating film, and forming an upper portion of the storage capacitor first electrode;
A method for manufacturing an electrophoretic display device, comprising: In the manufacturing method of the electrophoretic display device according to claim 4 ,
The method of manufacturing an electrophoretic display device, wherein a dielectric constant of the second insulating film is set higher than a dielectric constant of the first insulating film. In the manufacturing method of the electrophoretic display device according to claim 4 ,
The method for manufacturing an electrophoretic display device, wherein the second insulating film is formed to have a thickness smaller than that of the first insulating film. An electronic apparatus comprising the electrophoretic display device according to any one of claims 1 to 3 .

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