JP4712426B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a BGA (Ball Grid Array) type semiconductor device. More specifically, the present invention relates to a mounting technology for a BGA type semiconductor device.

Conventionally, in a BGA type semiconductor device, a semiconductor chip is mounted on a substrate by wire bonding or flip chip, the semiconductor chip mounted on the substrate is molded with a sealing resin, and electrically connected to the semiconductor chip on the back surface of the substrate. A plurality of solder balls project in an array.
Japanese Patent Application Laid-Open No. 08-077854

  In the conventional BGA type semiconductor device, special equipment such as an X-ray inspection device is required to confirm the mounting state on the mounting substrate. The confirmation of the mounting state by the X-ray inspection causes the manufacturing process to be complicated and causes a long manufacturing time. Also, the installation and maintenance of the inspection apparatus has increased the semiconductor manufacturing cost.

  In addition, there is a concern that the positioning accuracy of the semiconductor device may decrease due to a decrease in the amount of solder accompanying the narrowing of the pitch of the BGA balls.

  The present invention has been made in view of these problems, and an object thereof is to provide a technique capable of simply and easily confirming a mounting state of a BGA type semiconductor device. Another object of the present invention is to provide a mounting technique that can expect a self-alignment effect even when the amount of solder is reduced as the pitch of BGA balls is reduced.

  An embodiment of the semiconductor device of the present invention includes a substrate, a semiconductor chip mounted on the substrate, and a plurality of externals that are electrically connected to the semiconductor chip and project on the back surface of the substrate opposite to the surface of the semiconductor chip. An electrode, and a solder joint formed so as to be a recess with respect to the end surface of the substrate and the back surface of the substrate are provided.

  According to this aspect, in the inspection of the mounting state of the BGA type semiconductor device on the mounting substrate, the quality of the bonding of the BGA type semiconductor device can be easily determined by visually inspecting the state of the solder fillet bonded to the solder bonding portion. And it can be easily judged. For this reason, no special equipment is required for the inspection of the mounting state, so that the manufacturing cost of the BGA type semiconductor device can be suppressed and the manufacturing time can be shortened.

  In the above aspect, it is preferable that the shape of the surface of the substrate is a quadrangle, and the solder joints are provided in at least two places of the substrate. In this case, it is more preferable that the two solder joints are provided at the diagonal corners of the substrate.

  According to this aspect, the BGA type semiconductor device can be positioned more accurately by the self-alignment effect.

  In the above aspect, it is preferable that the shape of the surface of the substrate is a quadrangle, and one or more solder joints are provided on each of at least three sides of the substrate.

  According to this aspect, when the BGA type semiconductor device is mounted on the mounting substrate, the presence or absence of the inclination of the BGA type semiconductor device due to the variation of the BGA balls can be determined based on the fillet state of each solder joint.

  In the above aspect, the solder joint may not be electrically connected to the semiconductor chip.

  According to this aspect, the self-alignment effect of the BGA type semiconductor device can be sufficiently obtained even when the amount of solder is reduced as the pitch of the BGA balls is reduced.

  A combination of the above-described elements as appropriate can also be included in the scope of the invention for which protection by patent is sought by this patent application.

  According to the apparatus of the present invention, it is possible to easily and easily check the mounting state of the BGA type semiconductor device.

(Embodiment 1)
FIG. 1 is a diagram illustrating an arrangement of external electrodes and solder joints provided on the back surface of the semiconductor device according to the first embodiment. FIG. 2 is a cross-sectional view of the semiconductor device taken along the line AA ′ in FIG.

  The semiconductor device 10 of this embodiment is a BGA type semiconductor device, and is electrically connected to the wiring substrate 20, the semiconductor chip 30 wire-bonded to the wiring substrate 20, and the semiconductor chip 30. A plurality of external electrodes projecting on the back surface of the wiring substrate 20 opposite to the front surface, and a solder joint portion 60 formed so as to be recessed with respect to the side surface of the wiring substrate 20 and the back surface of the wiring substrate 20. ing.

  The wiring board 20 has a rectangular or square surface and is formed of an insulating material such as epoxy resin or polyimide.

  A semiconductor chip 30 is fixed on the wiring substrate 20 with an adhesive material such as silver paste.

  The lands 22 provided on the wiring board 20 and the bonding pads 31 provided on the surface of the semiconductor chip 30 are electrically connected by bonding wires 32 such as gold wires. The semiconductor chip 30 mounted on the wiring board 20 is molded with a sealing resin 36.

  The wiring board 20 is provided with a plurality of through holes 24 for electrodes. A plated layer such as copper is formed on the inner surface of the electrode through hole 24, and a conductive material such as copper is embedded inside the plated layer to form a wiring for an external electrode. The wiring formed in the electrode through hole 24 is electrically connected to the land 22.

  On the back surface of the wiring board 20, lower layer wirings 26 corresponding to the electrode through holes 24 are provided. A plurality of external electrodes 40 called solder balls are arranged on each lower layer wiring 26 so as to protrude in an array.

  As shown in the perspective view of FIG. 3, the solder joint portion 60 is provided at an end portion of the wiring substrate 20 and has a shape recessed with respect to the back surface and the end surface of the wiring substrate 20.

  More specifically, an end face through hole 50 is provided at the end of the wiring board 20. Concave portions are formed on the end surface and the back surface of the wiring board 20 by the end surface through holes 50. The end surface through hole 50 has a width of, for example, 200 μm, and the end surface through hole 50 has a height of, for example, 60 μm. Note that the cross-sectional view of the semiconductor device 10 shown in FIG. 2 emphasizes the thickness direction, so that the aspect ratio is different from the actual size. A plating coating layer 52 is formed on the side surface of the end surface through hole 50. Further, a cover material 54 formed of copper or the like is provided on the upper portion of the end face through hole 50. The plating coating layer 52 and the lid material 54 constitute a solder joint 60.

  The solder joint portion 60 may be a so-called dummy land that is not electrically connected to the semiconductor chip 30 or may be electrically connected to the semiconductor chip 30.

  FIG. 4 is a diagram illustrating a process of mounting the semiconductor device 10 according to the first embodiment on the mounting substrate 100. A land 110 corresponding to each external electrode 40 of the semiconductor device 10 is provided on the surface of the mounting substrate 100. Further, lands 120 corresponding to the respective solder joint portions 60 of the semiconductor device 10 are provided on the surface of the mounting substrate 100, and the solder 130 is placed on the lands 120.

  By aligning the solder joint 60 and the solder 130 respectively, the alignment of the semiconductor device 10 can be performed reliably and easily. In order to perform alignment of the semiconductor device 10 more reliably and easily, it is preferable that two or more solder joint portions 60 are provided in the semiconductor device 10.

  Since the position of the semiconductor device 10 is corrected by the self-alignment effect by melting the solder and fixing the semiconductor device 10 to the mounting substrate 100 in a state where the solder joint portion 60 and the solder 130 are aligned respectively. The semiconductor device 10 can be mounted on the mounting substrate 100 with high accuracy.

  FIG. 5 is an enlarged view of the solder joint portion 60 in a state where the semiconductor device 10 according to the first embodiment is mounted on the mounting substrate 100.

  When the solder joint 60 and the land 120 are appropriately joined by the solder 130, a fillet 132 is formed at the bottom of the solder 130. Since the solder joint portion 60 is provided on the end face of the wiring board 20, the fillet 132 protrudes outside the wiring board 20. For this reason, the fillet 132 is visually recognized from above the semiconductor device 10. In confirming the mounting state of the semiconductor device 10, it is easily and easily determined whether the mounting state is good or not by visually observing whether a fillet 132 having a predetermined size or shape is formed at each solder joint 60. can do. This eliminates the need for special equipment such as an X-ray inspection apparatus that has been required in the manufacture of conventional BGA type semiconductor devices, thereby reducing manufacturing time and manufacturing costs.

  In addition, by using the solder joint portion 60 as a dummy land, when the solder amount is reduced due to the narrow pitch of the external electrodes 40, it is possible to suppress a reduction in joint strength and to sufficiently exhibit the self-alignment effect.

  Note that it is preferable that one or more solder joints 60 be provided on each of at least three sides of the wiring board 20. According to the above configuration, if the size of the external electrode 40 varies, the semiconductor device 10 tilts, and the fillet 132 is not normally formed in any of the solder joints 60. Therefore, the quality of the bonding state of the external electrode 40 can be determined by inspecting the state of the fillet 132.

(Method for forming solder joints)
FIG. 6 is a diagram illustrating a method of forming a solder joint in the semiconductor device of the first embodiment. FIG. 6 shows a state in which a plurality of semiconductor chips 30 are mounted in the form of a wiring board 20 array. In FIG. 6, the bonding wires 32 and the like necessary for connecting the semiconductor chip 30 are omitted for explaining the method of forming the solder joints. The cutting lines X1 to X3 and the cutting lines Y1 to Y3 indicate lines to be cut out from the respective semiconductor devices 10.

  First, a lid 54 made of a conductive material such as copper is placed on a region where the end face through-hole 50 is to be formed so as to straddle a cutting line serving as a boundary line between adjacent semiconductor chips 30. In the present embodiment, two end face through holes 50 of adjacent semiconductor devices 10 are formed at a time. Each lid member 54 has a size sufficient to block the openings of the two end surface through holes 50 formed in the process described later. In the present embodiment, two lid members 54 are placed on each side of each semiconductor device 10. The shape of the lid member 54 of the present embodiment is a quadrangle in accordance with the shape of the end surface through hole 50. A combined shape can be obtained.

  Next, as shown in FIG. 7A, a predetermined region of the wiring substrate 20 is gradually and selectively removed from the back surface side of the wiring substrate 20 by laser irradiation or etching to expose the back surface of the lid member 54. Thus, the end face through hole 50 is finally formed. Subsequently, as shown in FIG. 7B, for example, a first plating layer 55 mainly composed of copper covering the inner periphery of the end surface through hole 50 and the back surface of the lid member 54 is formed by electroless plating. To do. Further, as shown in FIG. 7C, a second plated layer 56 made of a NiAu plated layer is formed on the first plated layer 55 by electroless Ni—Au plating. The first plating layer 55 and the second plating layer 56 formed as described above constitute the plating coating layer 52. By exposing the second plating layer 56 made of the NiAu plating layer, the compatibility with the solder can be improved and the bonding strength of the solder can be increased.

  Next, each semiconductor chip 30 is molded with the sealing resin 36. At this time, the lid 54 prevents the sealing resin 36 from entering the end surface through hole 50.

  Next, the wiring board 20 is cut along the cutting lines X1 to X3 and the cutting lines Y1 to Y3 by dicing. Thus, the end face through hole 50 can be efficiently formed by forming the end face through hole 50 across the cutting line and cutting the wiring board 20 along the cutting line.

  Through the above steps, the semiconductor device 10 having the solder joint portion 60 is obtained.

(Embodiment 2)
FIG. 8 is a diagram illustrating an arrangement of external electrodes and solder joints provided on the back surface of the semiconductor device according to the second embodiment. In the description of the semiconductor device 210 of the second embodiment, the same components as those of the first embodiment are denoted by the same reference numerals, and description thereof is omitted as appropriate. FIG. 9 is a perspective view of a solder joint provided in the semiconductor device according to the second embodiment.

  As shown in FIGS. 8 and 9, the semiconductor device 210 according to the second embodiment is provided with solder joints 260 a, solder joints 260 b, solder joints 260 c, and solder joints 260 d at the four corners of the wiring board 20.

  As already described, it is preferable that two or more solder joints are provided for alignment of the semiconductor device 210. Furthermore, it is more preferable that the pair of solder joints are provided at diagonal corners of the wiring board 20.

  In the semiconductor device 210 of the second embodiment, the solder joint portion 260a and the solder joint portion 260c are provided as a pair at the diagonal corner of the wiring board 20, and the solder joint portion 260b and the solder joint portion 260c are paired. The wiring board 20 is provided at the diagonal corners.

  According to this configuration, when the semiconductor device 210 is mounted by reflow, it can be positioned more accurately.

(Method for forming solder joints)
FIG. 10 is a diagram illustrating a method of forming a solder joint in the semiconductor device of the second embodiment. The method for forming the solder joint of the second embodiment is basically the same as that of the first embodiment. However, in the present embodiment, four end face through holes 250 are formed at a time corresponding to the four semiconductor devices 10 whose corners are adjacent at the location where the cutting lines intersect. Thus, the end surface through hole 250 can be formed more efficiently by forming the end surface through hole 250 in a region where the cutting lines intersect and separating the wiring board 20 along the cutting line.

  The present invention is not limited to the above-described embodiments, and various modifications such as design changes can be added based on the knowledge of those skilled in the art. The form can also be included in the scope of the present invention.

  For example, in each of the above-described embodiments, the semiconductor chip is mounted on the substrate by wire bonding. However, the semiconductor chip can be mounted on the substrate by flip chip mounting.

  Further, in each of the above-described embodiments, the solder to be bonded to the solder bonding portion is formed in advance on the mounting substrate side, but the solder 130 may be formed in advance in the solder bonding portion 60 as shown in FIG. . In that case, it is preferable to form a recess for positioning the solder 130 in the land 120 provided on the mounting substrate 100.

  In addition, in the modification shown in FIG. 12, the solder paste 112 and the solder paste 122 having the same height are printed on the land 110 provided on the mounting substrate 100 and the land 120 having a larger area than the land 110, respectively. Yes. By aligning the solder paste 122 and the solder joint portion 60, alignment can be performed reliably and easily. By making the area of the land 120 larger than the area of the land 110, the amount of the solder paste 122 printed on the land 120 can be increased. This facilitates solder wetting on the land 120, makes solder joining at the solder joint 60 more reliable, and increases the reliability of fillet formation by solder joining.

  In each of the embodiments described above, the cross-sectional shape of the solder joint portion is a quadrangle, but the cross-sectional shape of the solder joint portion is not limited to a quadrangle, and other shapes such as a circle, an ellipse, a semicircle, and a semielliptic system It may be. For example, the shape of the two end face through holes 50 adjacent to each other through the cutting line shown in FIG. FIG. 13 is a perspective view of the semiconductor device 10 when cut along the cutting line. In this modification, the end surface through hole 50 is semicircular.

  Further, the shape of the four end face through-holes 250 formed at the locations where the cutting lines shown in FIG. 10 intersect may be circular as a whole. FIG. 14 is a perspective view of the semiconductor device 10 when cut along the cutting line. In the present modification, the end surface through hole 250 is a quarter circle.

FIG. 3 is a diagram illustrating an arrangement of external electrodes and solder joints provided on the back surface of the semiconductor device according to the first embodiment. 1 is a cross-sectional view of a semiconductor device according to a first embodiment. 2 is a perspective view of a solder joint provided in the semiconductor device according to the first embodiment. FIG. It is a figure which shows the process of mounting the semiconductor device of Embodiment 1 on a mounting substrate. FIG. 3 is an enlarged view of a solder joint in a state where the semiconductor device of Embodiment 1 is mounted on a mounting substrate. 3 is a plan view illustrating a method for forming a solder joint in the semiconductor device of Embodiment 1. FIG. FIG. 7 is a cross-sectional view taken along line X3 in FIG. 6 illustrating a method for forming a solder joint in the semiconductor device of the first embodiment. FIG. 6 is a diagram illustrating an arrangement of external electrodes and solder joints provided on the back surface of a semiconductor device according to a second embodiment. FIG. 6 is a perspective view of a solder joint provided in a semiconductor device according to a second embodiment. 10 is a diagram illustrating a method for forming a solder joint in the semiconductor device of Embodiment 2. FIG. It is a figure which shows the modification in the case of mounting a semiconductor device on a mounting substrate. It is a figure which shows the other modification in the case of mounting a semiconductor device on a mounting substrate. It is a perspective view of the semiconductor device concerning a modification. It is a perspective view of the semiconductor device concerning another modification.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 Semiconductor device, 20 Wiring board, 22 Land, 24 Electrode through hole, 30 Semiconductor chip, 31 Bonding pad, 32 Bonding wire, 36 Sealing resin, 40 External electrode, 50 End surface through hole, 52 Plating coating layer, 54 Lid Material, 60 solder joints.

Claims (25)

A substrate,
A semiconductor chip mounted on the substrate;
A plurality of external electrodes electrically connected to the semiconductor chip and projecting on the back surface of the substrate opposite to the surface of the substrate on which the semiconductor chip is mounted;
Said outer peripheral edge of the substrate, before Symbol end face and the solder joint formed so as to be concave with respect to the back surface of the substrate of the substrate in a position different from the external electrode,
With
The solder joint includes a plating coating layer provided on a side surface of a recess formed on an end face of the substrate and a lid provided on an upper portion of the recess . The shape of the surface of the substrate is square,
The semiconductor device according to claim 1, wherein the solder joint portion is provided at at least two places on the substrate.   The semiconductor device according to claim 2, wherein the pair of solder joints are provided at diagonal corners of the substrate.   The semiconductor device according to claim 2, wherein at least one solder joint is provided on each of at least three sides of the substrate.   5. The semiconductor device according to claim 1, wherein the solder joint is not electrically connected to the semiconductor chip. 6.   The semiconductor device according to claim 1, wherein the semiconductor device is a BGA type semiconductor device.   The semiconductor device according to claim 1, wherein the substrate is rectangular or square.   The semiconductor device according to claim 1, wherein the substrate is made of an insulating material containing at least one of epoxy resin and polyimide.   9. The semiconductor device according to claim 1, wherein the semiconductor chip is fixed on the substrate with an adhesive material.   The semiconductor device according to claim 9, wherein the adhesive material includes a silver paste.   The semiconductor device according to claim 1, wherein the substrate has a plurality of through holes for electrodes.   The plating layer is formed on the inner surface of the through hole for the electrode, and a wiring electrically connected to the external electrode is formed by a conductive material embedded inside the plating layer. The semiconductor device according to any one of 1 to 11.   13. The semiconductor device according to claim 11, wherein underline wiring corresponding to each through hole for each electrode is provided on the back side of the substrate.   14. The semiconductor device according to claim 11, wherein a plurality of external electrodes are arranged on each underline wiring so as to protrude in an array.   15. The semiconductor device according to claim 1, wherein the semiconductor chip is mounted on the substrate by flip chip mounting. Width of the recess formed on the end face of the substrate, a semiconductor device according to any one of claims 1 to 15, characterized in that it is a 200 [mu] m. The height of the recess formed in the end face of the substrate, a semiconductor device according to any one of claims 1 to 16, characterized in that it is 60 [mu] m. The semiconductor device according to any one of claims 1 to 17, characterized in that the cover member is made of Cu. 19. The semiconductor device according to claim 1, wherein two solder joints are placed on each side of the semiconductor. 19 . The semiconductor device according to any one of claims 1 to 19, wherein the plated-coating layer is characterized by comprising the Cu. Wherein on the plated-coating layer, a semiconductor device according to any one of claims 1 to 20, characterized in that the second plating layer is formed. It said second plating layer is a semiconductor device according to 1, wherein any one of claims 1 to 21, characterized in that it consists NiAu plating layer. The semiconductor device according to any one of claims 1 to 22, characterized in that the solder joints at the four corners of the substrate is provided. Cross-sectional shape of the solder joint, square, circular, oval, semi-circular, semi-elliptical, any one of claims 1 to 23, characterized in that it is one of the shape of first circular quarter A semiconductor device according to 1. The semiconductor device according to any one of claims 1 to 2 4, characterized in that the solder is formed on the solder joint.

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