JP4698387B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a technology effective when applied to a technology for manufacturing a grid array type semiconductor device such as an LGA (Land Grid Array) type and a BGA (Ball Grid Array) type.

As a product structure for reducing the size of a semiconductor device, a semiconductor device whose package matches or approximates the size of a semiconductor chip, a so-called chip size package (hereinafter referred to as CSP) is known.
In addition, in a CSP product, a BGA (Ball Grid Array) product using a wiring board (circuit board) is manufactured using an inexpensive metal lead frame instead of an expensive circuit board. A method has been proposed (for example, Patent Document 1).

Japanese Patent Laid-Open No. 10-50922

  As the functionality of semiconductor devices increases, the number of external electrode terminals (pins) tends to increase. A BGA type semiconductor device using a lead frame is cut at the outer peripheral edge of the sealing body at the final stage of its manufacture, and the lead extending over the inside and outside of the sealing body of the lead frame. Therefore, the number of external electrode terminals of the BGA type semiconductor device is determined by the number of leads extending from the periphery of the sealing body.

Therefore, in order to increase the number of pins, it is necessary to increase the number of leads, which increases the product size.
Therefore, the present inventor studied to increase the number of pins without increasing the number of leads extending from the peripheral edge of the sealing body, and made the present invention.

An object of the present invention is to provide a semiconductor device capable of increasing the number of external electrode terminals and a manufacturing method thereof.
Another object of the present invention is to provide a thin semiconductor device and a method for manufacturing the same.
Another object of the present invention is to provide a small semiconductor device and a method for manufacturing the same.
Another object of the present invention is to provide an inexpensive semiconductor device and a manufacturing method thereof.
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  The outline of a typical invention among the inventions disclosed in the present application will be briefly described as follows.

(1) The semiconductor device
A sealing body made of an insulating resin having upper and lower surfaces and side surfaces connecting the upper surface and the lower surface;
A first surface having a plurality of electrodes, and a second surface opposite to the first surface, wherein the first surface is located on a lower surface side of the sealing body. A semiconductor chip located in
A tape that is bonded to the first surface of the semiconductor chip and has an adhesive layer on both surfaces corresponding to the electrode and a predetermined portion serving as an opening;
The semiconductor chip is bonded via the first surface on the opposite side with Do that surface of the surface to be bonded, the part of the other portion of the second surface on the opposite side of the first surface of the tape A plurality of conductive leads that protrude more than the lower surface of the sealing body,
A conductive plating film formed on the protruding surface of the lead and exposed on the lower surface of the sealing body;
A conductive connection body located in the sealing body, penetrating through the opening, connected to the electrode at one end, and connected to the lead at the other end;
Some of the leads have one end exposed on the side surface of the sealing body, the other end is positioned on the tape surface, and some of the plurality of leads have one end exposed on the side surface of the sealing body. The other end is located in the opening portion of the predetermined portion, and the other lead is located in the opening portion of the predetermined portion and the other end is located on the tape surface.

  A protruding electrode is formed on the exposed surface of the plating film. The remaining leads have a structure in which the one end projects into the opening of the predetermined portion. The opening of the predetermined portion provided in the tape is provided in the center of the tape. The connection body includes a wire extending in a curved line, and the wire is connected to a lead portion other than the protruding portion of the lead. The wire is connected to the electrode first and then connected to the lead. A connecting plating film is formed on the surface of the lead to which the wire is connected. The lead is bent stepwise, and a part of the second surface of the lead is closer to the lower surface of the sealing body than the second surface of the other lead part. The wire is connected to a surface that is not near the lower surface of the sealing body.

Such a semiconductor device is manufactured by a manufacturing method having the following steps.
Semiconductor devices
(A) preparing a semiconductor chip having a first surface having a plurality of electrodes and a second surface opposite to the first surface;
(B) a rectangular frame, a plurality of leads extending from the inside of the frame into the frame, a connecting portion provided at a predetermined portion of the frame and supported by some of the leads, and the connecting portion A product forming portion comprising a plurality of leads extending from the frame to the frame side, the semiconductor chip being stacked on the product forming portion, and a part of the second surface of the lead is the second A step of preparing a lead frame that protrudes to the surface side of the substrate and is provided with a plating film on the protruding surface;
(C) An insulating tape having an adhesive layer on both sides having a unit tape portion corresponding to the product forming portion, wherein the unit tape portion corresponds to a portion corresponding to the electrode of the semiconductor chip and the connecting portion. A step of preparing a tape having an opening in a portion to be
(D) bonding the tape to a first surface that is opposite to the second surface of the lead frame in a state in which a peripheral edge of the connection portion is exposed in the opening corresponding to the connection portion;
(E) removing the connecting part in the opening and separating the leads connected by the connecting part;
(F) a step of bonding the semiconductor chip to the tape through a first surface so that the electrode of the semiconductor chip is located in the opening;
(G) connecting each electrode located in the opening and a predetermined portion of the lead bonded to the tape with a conductive connector;
(H) a step of covering the lead frame, the semiconductor chip, and the connection body with a resin layer made of an insulating resin in a state where the plating film of the lead frame is exposed;
(I) Cutting the resin layer and the lead frame vertically and horizontally and removing the frame to form a plurality of semiconductor devices in which the cut ends of the leads are exposed on the side surfaces of the sealing body formed by the resin layer. It is manufactured through a process.

  Further, after the step (h), a protruding electrode is formed on the plating film exposed from the resin layer. In the step (b), the connecting portion is provided at the center of the frame. In the step (b), a plating film for connection is formed on the surface of the lead connecting the connection body, and in the step (g), a wire is used as the connection body, and one end of the wire is connected to the end of the wire. Connect to the electrode, then connect the middle part of the wire to the lead, and cut the wire from the connected part of the lead. In the step (b), the lead is partially bent in one step, and the second surface of the lead on which the plating film is formed is protruded from the second surface of the other lead portion.

  (2) In the configuration of (1) above, the plating film protrudes from the lower surface of the sealing body without being located in the sealing body. In such a semiconductor device, a plating film is not provided on the protruding surface of the second surface of the lead in the step (b), and the protruding surface of the lead is exposed in the step (h). The lead frame, the semiconductor chip, and the connection body are covered with a resin layer made of an insulating resin, and a plating film is formed on the protruding surface of the lead exposed on the surface of the resin layer before performing the step (i). Manufactured by forming.

  (3) In the configuration of (1), in the semiconductor device, the lead has a flat structure (flat plate shape) without partially projecting the second surface, and the second of the lead The plating film is partially formed on the surface.

  In the method of manufacturing a semiconductor device having the configuration (1), such a semiconductor device includes a rectangular frame and a plurality of extending from the inside of the frame into the frame in the step (b). A product forming portion comprising: a lead; a connecting portion provided in a predetermined portion of the frame and supported by a part of the leads; and a plurality of leads extending from the connecting portion toward the frame; Manufactured by preparing a flat lead frame having a structure in which the semiconductor chip is stacked on the product forming portion and a plating film is provided on a portion where the external electrode terminal on the second surface of the lead is formed Is done.

  Further, in the case of using a wire as a connection body in the connection between the lead and the electrode by the connection body in the step (g), as in the method of manufacturing the semiconductor device having the configuration of the above (1), In the step (b), a connecting plating film is formed on the surface of the lead to which the connection body is connected. In the step (g), one end of the wire is connected to the electrode, and then An intermediate portion of the wire is connected to the lead, and the wire is cut from the connecting portion of the lead. Further, in the step (b), the plating film is formed thick so that the wire is not exposed on the surface of the sealing body.

  (4) In the configurations of (1) to (3) above, the semiconductor device does not connect the lead and the electrode with a wire, but instead has the lead and the electrode respectively positioned in the opening of the tape. It is the structure connected through the said connection body in piles. For example, the connection body has a structure formed of a pressure contact material. In addition, the lead portion located in the opening is bent in one step and is closer to the semiconductor chip than the lead portion located on the tape.

  Such a semiconductor device is located in the opening of the tape in place of the wire connection in the step (g) in the method of manufacturing a semiconductor device having the above-described configuration (1) to (3). The electrode and the lead are manufactured by overlapping and connecting via the connection body. A pressure contact material is used as the connection body. When the gap between the lead in the opening and the electrode of the semiconductor chip is large, in the step (b), the lead portion positioned in the opening is one step on the first surface side. It is manufactured by bending so as to protrude into a shape.

  (5) In the configurations of (1) and (2) above, in the semiconductor device, the lead is not structured to be bent stepwise, and a part of the second surface of the lead is etched to a predetermined thickness. The second surface of the lead that is not etched is close to the lower surface of the sealing body.

  In such a method of manufacturing a semiconductor device having the above configurations (1) and (2), in the step (b), the second surface of the lead is partially etched away, The second surface of the lead on which the plating film is formed is manufactured by protruding from the second surface of the other lead portion.

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.
According to the means of (1), (a) in the method of manufacturing a semiconductor device, a plurality of leads extending from the inner side of the frame of the product forming portion to the center side of the frame, and a connecting portion provided at the center of the frame A lead frame having a plurality of leads extending from the frame to the frame side is prepared. Thereafter, a tape having an opening is bonded to the lead frame at a portion corresponding to the electrode of the semiconductor chip and a portion corresponding to the connecting portion. Further, the connecting portion exposed at the opening is cut off. By this excision, the lead integrated by the connecting portion is separated, but the lead is supported by the tape. And as a result of manufacturing a semiconductor device using such a lead frame with a tape, not only external electrode terminals (pins) are formed on leads extending from the periphery to the inside of the sealing body, External electrode terminals (pins) can also be formed on the leads extending from the openings and supported by the tape, and the number of pins can be increased. Therefore, the number of pins can be increased without increasing the number of leads extending from the periphery of the sealing body. In other words, in relation to the size of the sealing body, even when the number of leads arranged on the periphery of the sealing body is the maximum number, the end of the tape faces the center of the sealing body. Since the external electrode terminal (pin) can be formed on the lead extending so that the other end is located in the middle portion, the number of pins can be increased. That is, the number of pins can be increased without increasing the size of the sealing body.

  (B) The semiconductor device has a structure in which the wire is first connected to the electrode of the semiconductor chip (first bonding) and then connected to the lead (second bonding). Further, the wire is connected (second bonding) to the lower surface (second surface) of the lead bent in a stepped manner. In the second bonding, the height from the connecting portion can be made sufficiently lower than that of the first bonding portion, so that the second bonding is formed to a depth from the lower surface (second surface) of the lead to the exposed surface side of the plating film. The resin enters the resin constituting the sealing body, and the wire is surely covered with the resin having a predetermined thickness. As a result, the sealing performance of the wire sealing body does not deteriorate. For example, when nail head wire bonding is performed using a wire having a diameter of 20 μm on a lead having a thickness of 0.1 mm, if the step for bending the lead in a step shape is 0.1 mm, the second bonding portion The wire whose height from the top of the wire to the top of the loop of the wire is about 20 μm is covered with a sufficiently thick resin.

  (C) In the semiconductor device, the first surface of the semiconductor chip having the electrode and the first surface of the lead are bonded with a tape having an opening corresponding to the electrode, and the second surface of the electrode and the lead is opened. It has a structure of connecting with a wire penetrating the part. Therefore, the thickness of the resin constituting the sealing body that covers the second surface of the semiconductor chip can be reduced. Further, since the wire connected to the second surface of the lead is also accommodated in the step of the lead as described in (b) above, the sealing body can be made thin, and the semiconductor device can be made thin.

  (D) In the method of manufacturing a semiconductor device, when the resin layer and the lead frame are cut, the cutting position is set to a position close to the periphery of the semiconductor chip located in the resin layer, thereby reducing the size of the sealing body of the semiconductor chip. The size of the semiconductor device can be made close to the CSP, that is, downsizing of the semiconductor device can be achieved.

  (E) In the method of manufacturing a semiconductor device, after forming the resin layer, the protruding electrode is formed on the plating film exposed from the resin layer to form the external electrode terminal, so that the BGA type semiconductor device is manufactured. In this manufacturing method, an LGA type semiconductor device can be manufactured by forming a structure that only exposes the plating film from the resin layer without forming the protruding electrode. The LGA type semiconductor device is thinner than the BGA type semiconductor device.

  (F) In the method for manufacturing a semiconductor device, the connecting portion provided in the lead frame is provided in the center of the frame. As a result, the leads can be uniformly extended from the center toward the peripheral frame, the number of leads extending from the connecting portion can be increased, and the number of pins of the semiconductor device can be increased. .

  According to the means (2), in addition to the effect of the means (1) above, the plating film protrudes to the outside (lower surface) of the sealing body, so that the height (thickness) of the external electrode terminal is high. Thus, there is an effect that the mounting characteristics of the semiconductor device are improved. In addition, in the LGA type semiconductor device formed when the protruding electrode is not formed on the plating film, since the plating film serving as the external electrode terminal protrudes from the lower surface of the sealing body, the mounting characteristics of the LGA type semiconductor device are improves.

  According to the means (3), in addition to the effect of the means (1), the lead has a flat structure (flat plate shape), so that the semiconductor device can be thinned. is there. In the means (3), even if the thickness of the plating film is thicker than that in the means (1) (for example, 10 μm), the thickness of the lead is stepped (for example, 100 μm). ), The thickness of the sealing body can be reduced, and the semiconductor device can be made thinner.

  According to the means of (4), (a) since the lead and the electrode are overlapped and connected via the connecting body in the opening (semiconductor chip face-down bonding structure), the sealing body Therefore, the sealing performance between the lead and the electrode is increased. Also, when connecting leads and electrodes with wires, care must be taken to reduce the loop height of the wires, but wire bonding must be performed, but such attention is not necessary with face-down bonding, and semiconductor devices Productivity is improved. When a pressure contact material is used as the connection body, the plating film for connecting the lead and the electrode are electrically connected by pressure contact processing, so that the productivity is further increased.

  (B) In the case of a structure in which the lead portion located at the opening is bent in a stepped manner so as to be closer to the semiconductor chip (electrode) than the lead portion located on the tape, the connection between the lead and the electrode by the connecting body It will be even more certain. This structure is more effective when the tape is thick.

  According to the above means (5), the lead of the step structure is formed by etching the predetermined portions of the upper and lower surfaces of the lead to the predetermined thickness, so that the lead of the step structure is formed by bending with a press. Can be formed precisely.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment of the invention, and the repetitive description thereof is omitted.

  1 to 21 are diagrams relating to a semiconductor device and a manufacturing method thereof according to Embodiment 1 of the present invention, and FIGS. 1 to 5 are diagrams relating to the structure of the semiconductor device. 1 is a perspective view showing the appearance of the semiconductor device, FIG. 2 is a cross-sectional view taken along line AA of FIG. 1, FIG. 3 is an enlarged cross-sectional view showing a part of FIG. 2, and FIG. is there. FIG. 5 is a schematic diagram showing the positional relationship among a semiconductor chip, electrodes of the semiconductor chip, leads, and wires in the semiconductor device.

  As shown in FIGS. 1 and 4, the semiconductor device 1 according to the first embodiment includes a flat rectangular sealing body 2 in appearance and a plurality of grid arrays provided on the lower surface of the sealing body 2. It consists of external electrode terminals 3. The sealing body 2 has a structure having an upper surface and a lower surface and side surfaces connecting the upper surface and the lower surface. The external electrode terminal 3 is a protruding electrode, for example, a bump electrode formed of a solder ball having a diameter of 0.3 mm. The external electrode terminals 3 are not particularly limited, but are arranged in three rows in a frame shape as shown in FIG. The pitch of the external electrode terminals 3 is, for example, 500 μm.

  As shown in FIGS. 2 and 3, a rectangular semiconductor chip 4 is sealed inside the sealing body 2. The semiconductor chip 4 has a first surface 4 a having a plurality of electrodes 5 and a second surface 4 b that is opposite to the first surface 4 a, and the first surface 4 a is on the lower surface side of the sealing body 2. It is located in the sealing body 2 in a positioned state. The second surface 4b is a flat surface made of a semiconductor (for example, silicon). The semiconductor chip 4 has a thickness of about 150 μm, for example. The electrode 5 is, for example, a square having a side of 80 μm. The distance between the periphery of the semiconductor chip 4 and the periphery of the sealing body 2 is, for example, about 50 μm, which is a minimum thickness necessary to maintain the moisture resistance of the semiconductor device 1. Thereby, the outer shape of the semiconductor device 1 can be approximated to the size of the semiconductor chip 4, and the semiconductor device 1 can be downsized.

  The plurality of electrodes 5 provided on the first surface 4a of the semiconductor chip 4 are not particularly limited. As shown in FIG. 5, one row along each side is located near the periphery of the semiconductor chip 4 as shown in FIG. Is arranged. As shown in FIG. 2, the semiconductor chip 4 is sealed in a state where the first surface 4a is a lower surface and the second surface 4b is an upper surface in a state where the semiconductor device 1 is mounted on a mounting substrate or the like. 2 is sealed.

  As shown in FIG. 2, a tape 6 is bonded to the first surface 4 a of the semiconductor chip 4. The tape 6 is made of an insulating resin tape (core material) and has a structure having insulating adhesive layers (not shown) on both sides. The tape 6 has an opening 7 at a portion corresponding to the electrode 5 of the semiconductor chip 4 and an opening 8 at a predetermined portion. As shown in FIG. 5, the openings 7 corresponding to the electrodes 5 are formed so that the entire row of the electrodes 5 arranged in a row on each side of the semiconductor chip 4 is in the openings 7 when the tape 6 is bonded to the semiconductor chip 4. It is provided along each side of the square tape 6 so as to be positioned. As an example of the opening 8 provided in the predetermined portion, as shown in FIG. 5, a square opening 8 is provided in the center of the square tape 6. The opening 8 has a similar relationship with the square outer periphery of the tape 6. For example, the thickness of the tape 6 is about 100 μm as a whole. The breakdown is that the core material is 50 μm, and the thickness of the adhesive layer provided on both sides of the core material is about 25 μm. The core material is formed of a polyimide resin, and the adhesive layer is formed of a thermosetting resin.

  In the sealing body 2, a plurality of conductive leads 9 are bonded to the surface opposite to the surface to which the semiconductor chip 4 of the tape 6 is bonded. The lead 9 is bonded by an adhesive layer (not shown) of the tape 6. The lead 9 is formed by cutting each part of a lead frame obtained by patterning a metal plate described later. The lead frame has a first surface and a second surface that is the opposite surface of the first surface. Accordingly, even when the lead 9 is formed, the first surface of the lead frame is used as the first surface of the lead, and the second surface of the lead frame is used as the second surface of the lead. The lead frame is formed of a metal plate having a thickness of 0.1 to 0.125 mm, which is generally used in manufacturing a semiconductor device, such as an iron-nickel alloy plate or a copper alloy plate. In the embodiment, the lead frame is formed of 42 alloy having a thickness of 0.1 mm.

  As shown in FIGS. 3 and 2, the lead 9 has a structure in which a part of the second surface 9 b protrudes from the other part and is closer to the lower surface of the sealing body 2. That is, the lead 9 bends and projects in a stepped manner, and a part of the second surface 9b of the projecting lead portion is closer to the lower surface of the sealing body 2 than the second surface 9b of the other lead portion. ing. A conductive plating film 10 exposed on the lower surface of the sealing body 2 is formed on the protruding surface (protruding end surface) of the protruding portion of the lead 9. In the first embodiment, the protruding electrode 11 is formed over the plating film 10 to form the external electrode terminal 3, and the BGA type semiconductor device 1 is formed. The plating film 10 has, for example, a two-layer structure. The lower layer is a copper layer having a thickness of 15 μm, and the upper layer is a nickel layer having a thickness of 5 μm. As shown in FIGS. 2 and 3, the first surface 9 a of the lead portion where the protruding portion is not formed is bonded to the tape 6.

  FIG. 5 is a schematic view showing the sealing body 2 partially removed so that the positional relationship between the openings 7 and 8 of the tape 6 and the leads 9 and the electrodes 5 of the semiconductor chip 4 can be understood. Accordingly, FIG. 5 is a diagram showing the second surface 9b of the lead 9. FIG. The outermost line in the drawing shown in FIG. 5 is a quadrangle (square), and this quadrangle is the outer line of the sealing body 2 and also the outer line of the tape 6. As will be described later, this is because, in the manufacture of a semiconductor device, the resin layer for sealing the tape 6 is cut vertically and horizontally to form the sealing body 2. Since the lead 9 is bonded to the tape 6, the lead 9 is also cut by this cutting.

  A quadrangle indicated by a two-dot chain line slightly inside the outline of the quadrangular sealing body 2 and the tape 6 is an outline of the semiconductor chip 4. Inside the four sides (outline) of the semiconductor chip 4, elongated openings 7 formed in the tape 6 are respectively positioned. The electrodes 5 are arranged in a line along the center of each of the four openings 7.

  A plurality of thin leads 9 extend from the four sides that are the outline of the tape 6 toward the center. The lead 9 is bent on a plane as necessary. Further, the inner end of the lead 9 or the middle part thereof is a swelled pattern 9d. In the embodiment, the swollen pattern 9d is circular. This swollen pattern 9d portion is a portion protruding stepwise, and the plating film 10 is formed on the second surface 9b of the swollen pattern 9d as described above, and the protruding electrode 11 is formed to form the external electrode. Terminal 3 is formed (see FIG. 3).

  On the other hand, this is one of the features of the present invention. As shown in FIGS. 5 and 2, an opening 8 is provided at the center of the square tape 6. A lead 9 extends along the surface of the tape 6 from slightly inside the opening 8. Leads 9 extending from these openings 8 are also bent on a plane as necessary. A portion of the lead 9 extending from the opening 8 portion extends to a position in the middle of the tape 6 without extending its tip to the outline of the tape 6. A swelled pattern (circular) 9 d for forming the plating film 10 is also provided on the lead 9 that stops in the middle of the tape 6. These swollen patterns 9d are arranged in three rows in a rectangular frame shape. In addition, a part of the lead 9 extending from the opening 8 portion extends to the outline of the tape 6. Although not particularly limited, the lead 9 extending from the opening 8 portion to the outline of the tape 6 extends from three locations in the vicinity of the upper left and upper corners of the square and the upper corner of the right in FIG. Yes.

  Although not shown in FIG. 5, the lead 9 extending from the opening 8 portion is located inside the opening 8 and extends from the connection portion that has already been cut and removed. The three leads 9 extending from the opening 8 to the outline of the tape 6 constitute support leads 9f that support the connecting portion before the connecting portion is removed. After the tape 6 is bonded to the lead frame, the connecting portion is removed.

  By forming external electrode terminals on the leads extending from the connecting portion in this way, it is possible to form more external electrode terminals than the number of leads extending from each side of the sealing body. Even when the maximum number of leads are arranged on each side of the sealing body, the number of external electrode terminals (pins) can be further increased by adopting a structure in which the leads are extended from the connecting portion. Although three support leads 9f are provided in FIG. 5, four support leads 9f may be arranged along a rectangular diagonal to further stably support the connecting portion.

  In other words, some of the leads 9 shown in FIG. 5 have one end exposed on the side surface of the sealing body 2 and the other end located on the surface of the tape 6, and some of the leads 9 have one end. The other end of the lead 9 exposed at the side surface of the sealing body 2 is positioned at the opening 8, and the other lead 9 is positioned at the opening 8 and the other end is positioned on the surface of the tape 6. Yes.

  Further, as shown in FIG. 5, each electrode 5 exposed in the opening 7 is connected to a lead portion other than the protruding portion of a predetermined lead 9 by a conductive wire 12 extending in a curved line. Yes. The wire 12 passes through the opening 8, has one end connected to the electrode 5, and the other end connected to the lead 9.

  In the embodiment, in order to reduce the height of the wire 12 connected to the lead 9, the wire 12 is first connected to the electrode 5 (first bonding) and then connected to the lead 9 (second bonding). . In general, in the thermocompression bonding method using ultrasonic vibration using a gold wire, the wire loop height of the first bonding portion is increased. In the second bonding, since the drawn wire is crushed by the tip of the bonding tool, the height of the wire in the second bonding portion can be reduced. During wire bonding, wire bonding is performed with the second surface 9b of the lead 9 being the upper surface. As a result, at the time of wire bonding, the lead surface to which the lead 9 is connected is positioned one step lower than the projecting surface (projecting end surface) of the lead 9. Therefore, the wire 12 connected to the tape 6 having a lower height (step) extends along the surface of the lead 9 with a very small inclination angle, and the tip thereof is connected to the lead 9. As a result, the distance between the surface of the wire 12 at the second bonding portion and the surface of the lead 9 protruding one step higher is 0.1 mm for the step of the lead 9, 20 μm for the diameter of the wire 12, and the loop height of the wire. When the height (height from the first bonding position) is 220 μm, it is about 80 μm. The thickness obtained by adding the thickness of the plating film 10 to 400 μm is the thickness of the resin constituting the sealing body 2. Therefore, the wire 12 is covered with a sufficiently thick resin, and the moisture resistance of the semiconductor device 1 by the sealing body 2 is sufficient. The connection body that electrically connects the electrode 5 and the lead 9 is not limited to the wire 12.

  FIG. 6 shows a diagram in which such a semiconductor device 1 is mounted on a mounting substrate. In mounting the semiconductor device 1, conductive lands 16 are provided corresponding to the external electrode terminals 3 of the semiconductor device 1 on the upper surface of the mounting substrate 15 constituting a predetermined electronic device. Then, after placing the semiconductor device 1 on the mounting substrate 15 so that the external electrode terminals 3 overlap the lands 16, the external electrode terminals 3 made of solder bump electrodes are primarily subjected to heat treatment (reflow). Then, the plating film 10 is electrically connected to the land 16 by the external electrode terminal 3.

  Next, a method for manufacturing the semiconductor device 1 will be described with reference to FIGS. As shown in the flowchart of FIG. 7, the semiconductor device 1 includes preparation of a lead frame and a tape (S01), tape application (adhesion) (S02), partial removal of the lead frame (S03), chip bonding (S04), wire It is manufactured through steps of bonding (S05), molding (S06), bump electrode (projection electrode) formation (S07), and cutting (dividing into pieces: S08).

  In step S01, a lead frame, a tape, and a semiconductor chip are prepared. As already described, the semiconductor chip 4 has a plurality of electrodes 5 on the first surface 4a as shown in FIG. A plurality of electrodes 5 are arranged in a row on the first surface 4 a along each side of the rectangular semiconductor chip 4. The second surface 4b of the semiconductor chip 4 is a flat semiconductor surface as shown in FIG.

  As shown in FIG. 8, the lead frame 20 has a structure having a plurality of square (square) product forming portions 21 in which a 42 alloy plate having a thickness of 0.1 mm is formed in a predetermined pattern. The lead frame 20 of FIG. 8 has a structure in which the product forming portions 21 are arranged in a matrix in 2 columns and 3 rows.

  The product forming unit 21 includes a rectangular frame 22 and a plurality of leads formed inside the frame 22. FIG. 9 is a diagram illustrating the product forming unit 21 in which the frame 22 is omitted. Also in the following description, in the explanation part of the single product forming part 21, explanation is often made with a figure in which the frame 22 is omitted from the figure. In the state of the lead frame 20, adjacent product forming portions 21 share a frame 22 as shown in FIG. 8. Further, the outer peripheral portion of the lead frame 20 is thicker than the adjacent product forming portion 21. This is to improve the strength of the lead frame 20. Although not shown, guide holes such as circular holes and long holes used for transferring the lead frame 20 and positioning the lead frame 20 are provided in the frame of the outer peripheral portion of the lead frame 20.

  As shown in FIG. 8, the product forming unit 21 includes a rectangular frame 22, a plurality of leads 9 extending in a cantilever shape from the inside of the frame 22 into the frame, and a predetermined portion (center portion) in the frame. ), A lead 9 (support lead 9f) extending from the frame 22 that supports the connection portion 23, and a plurality of leads 9 having a cantilever structure extending from the connection portion 23 to the frame side. It is made up of. A semiconductor chip 4 slightly smaller than the product forming portion 21 is stacked and fixed on the product forming portion 21. The center of the square (square) semiconductor chip 4 is aligned with the center of the square (square) product forming portion 21. The connecting portion 23 is provided at the center of the product forming portion 21. FIG. 9 is an enlarged view of the product forming part 21, and the support lead 9 f extends from the vicinity of the upper left and upper corners of the quadrangle and the corner of the lower right part of the quadrangle to support the connecting part 23. ing. An intermediate portion of the lead 9 extending from the frame 22 and the connecting portion 23 is provided with a pattern 9d that swells at a predetermined location. In the embodiment, the swollen pattern 9d is circular. The swollen pattern 9d may be a pattern other than a circle. For example, the swollen pattern 9 d may be a quadrangle so as to correspond to the electrode 5 of the semiconductor chip 4. As shown in FIG. 10, the swollen pattern 9d portion is a portion that protrudes in a stepped manner on the second surface 9b side of the lead 9. The step for projecting one step in a step shape is, for example, 0.1 mm. A plating film 10 is formed on the surface (tip surface) of the protruding portion. The plating film 10 has, for example, a two-layer structure. The lower layer is a copper layer having a thickness of 15 μm, and the upper layer is a nickel layer having a thickness of 5 μm. The reason why the lead 9 is provided with a step is that the surface of the plating film 10 is exposed on the lower surface of the sealing body 2 to form an external electrode terminal.

  In addition, a conductive wire is connected to the lead 9. On the lead surface to which the wire is connected, a plating film for improving the connection with the wire is formed. This plating film is omitted in the figure. When a gold wire is used as the wire, the plating film has a thickness of about 5 μm.

  The width of the lead 9 is desirably 60 to 65 μm. In the embodiment, the width of the lead 9 is 60 μm. The lead pitch of the narrow portion of the lead 9 extending from the frame 22 is 130 μm.

  The tape 6 prepared in step S01 is made of an insulating resin tape (core material) and has a structure having an insulating adhesive layer (not shown) on both surfaces. As shown in FIG. 11, the tape 6 has a unit tape portion 26 corresponding to the product forming portion 21 of the lead frame 20. The tape 6 is cut together with the resin layer and the lead frame in the manufacturing process of the semiconductor device, and the unit tape portion 26 has the tape shape described with reference to FIGS. Therefore, the unit tape portion 26 has the opening 7 in a portion corresponding to the electrode 5 of the semiconductor chip 4 and the opening 8 in a predetermined portion of the square (square) unit tape portion 26, that is, in the central portion. is doing. The opening 8 has a similar relationship with respect to the outer periphery of the rectangular unit tape portion 26. For example, the thickness of the tape 6 is about 100 μm as a whole. The breakdown is that the core material is 50 μm, and the thickness of the adhesive layer provided on both sides of the core material is about 25 μm. The core material is formed of a polyimide resin, and the adhesive layer is formed of a thermosetting resin.

  When the semiconductor chip 4 is positioned and bonded (bonded) to the unit tape portion 26, the unit is arranged so that the electrodes 5 arranged in a line along each side of the semiconductor chip 4 are arranged along the center of each opening 7. A pattern of the tape portion 26 is formed. Further, when the tape 6 is positioned and bonded (bonded) to the lead frame 20, the connecting portion 23 of the lead frame 20 is located in the opening 8 and extends from the periphery of the connecting portion 23 as shown in FIG. The pattern of the unit tape portion 26 is formed so that the base portion of the lead 9 to be exposed is exposed in the opening portion 8 and the leads 9 are exposed in each opening portion 7 side by side.

  After preparing the semiconductor chip 4, the lead frame 20 and the tape 6 in the step S01, as shown in FIG. 12, the tape 6 is positioned on the lead frame 20, and the lead frame 20 and the tape are used using the adhesive layer of the tape 6. 6 is bonded (S02). FIG. 13 is an enlarged view showing the unit tape portion 26 and the product forming portion 21 that are bonded together. As shown in FIGS. 12 and 13, the bonding portion 23 of the lead frame 20 is positioned in the opening portion 8, and the root portion of the lead 9 extending from the peripheral edge of the connecting portion 23 is in the opening portion 8. Exposed. In addition, the leads 9 are exposed side by side in the openings 7.

  Next, as shown in FIG. 14, the lead frame is partially removed, and the connecting portion 23 located in the opening 8 of each unit tape portion 26 is removed (S03). By removing the connecting portion 23, each lead 9 extending from the connecting portion 23 is separated. Removal is performed by press cutting or etching. The connecting portion 23 is removed by cutting or etching the base portion of the lead 9 extending from the connecting portion 23. As a result, as shown in FIGS. 14 and 15, one end (inner end) of the lead 9 projects and extends around the opening 8. FIG. 15 is an enlarged view showing the unit tape portion 26 and the product forming portion 21. The inner end of the lead 9 can be aligned with the edge of the opening 8 by press cutting and etching. In the case of etching, the inner end of the lead 9 can be positioned on the tape outside the opening 8 by the pattern of the etching mask formed on the surface of the tape 6.

  Next, the semiconductor chip 4 is positioned with respect to the product forming portion 21 (unit tape portion 26) on the tape surface opposite to the surface to which the lead frame 20 of the tape 6 is bonded, and the electrode 5 of the semiconductor chip 4 is provided. The first surface 4a is bonded to the tape 6 (chip bonding: S04). With this chip bonding, as shown in FIG. 16, the electrodes 5 are positioned in a line along the center of each opening 7 of the unit tape portion 26. Further, the electrode 5 is positioned between the lead 9 and the lead 9 or at a position away from the lead 9 without contacting the lead 9 crossing the opening 7.

  Next, the electrode 5 exposed in the opening 7 and the lead 9 are connected by a conductive connector. For example, a wire made of a gold wire having a diameter of 20 μm is used as the connection body (wire bonding: S05). 17 and 18 show a state in which the electrode 5 and the lead 9 are connected by the wire 12. FIG. 17 is a plan view, and FIG. 18 is a cross-sectional view. 18A is a schematic cross-sectional view for explaining the connection between the lead 9 and the electrode 5. FIG. 18B is an enlarged view of a part of FIG. An example in which a connection plating film 30 is provided on the surface portion and the wire 12 is connected on the connection plating film 30 is shown.

  In the embodiment, wire bonding is performed by a thermocompression bonding method with ultrasonic vibration. At the time of wire bonding, the lead frame 20 is wire bonded with the second surface 9b of the lead 9 being the upper surface. At this time, as described above, in order to reduce the height of the portion of the wire 12 connected to the lead 9, one end of the wire 12 is first connected (first bonding) to the electrode 5 exposed to the opening 7, and thereafter The middle part of the wire is connected to the lead 9 (second bonding). After the connection, the wire is cut from the second bonding portion. As a result, one end of the wire 12 is connected to the electrode 5, passes through the opening 7, is connected to the lead 9 in a loop. With this connection method, the distance between the surface (upper surface) of the wire 12 at the second bonding portion and the surface (upper surface) of the lead 9 protruding higher by one step is 0.1 mm, and the step of the lead 12 is 0.1 mm. When the diameter is 20 μm and the wire loop height (height from the first bonding position) is 220 μm, it can be about 80 μm. As a result, the distance (80 μm) between the upper surface of the wire 12 and the upper surface of the lead 9 that protrudes one step higher, and the thickness that adds the thickness (10 μm) of the plating film 10 to the dimension of this distance The thickness of the resin that forms the resin layer that is sometimes formed becomes the thickness of the resin that covers the wire 12 that forms the sealing body 2.

  Next, the upper and lower surfaces of the lead frame 20 after wire bonding is covered with an insulating resin by molding to form a resin layer 32 having a certain thickness (S06). FIG. 19 is a partial cross-sectional view showing a state where transfer molding is performed by clamping the lead frame 20 and the like after wire bonding between the lower mold 34 and the upper mold 35 of the molding die in the transfer molding apparatus. is there. By injecting an insulating resin melted from a gate (not shown) into the cavity 38 formed by the lower mold 34 and the upper mold 35, the resin layer 32 is formed in the cavity 38 portion. During this molding, the lower die 34 and the upper die 35 are clamped with the lead frame 20 on the lower side and the semiconductor chip 4 on the upper side. The surface of the plating film 10 formed on the leading end surface of the protruding portion of the lead 9 of the lead frame 20 comes into contact with the lower die 34.

  However, in the embodiment, molding is performed by interposing the sheets 36 and 37 made of an elastic body between the molding target (the lead frame 20 and the like) and the lower mold 34 and the upper mold 35. When the plating film 10 is in direct contact with the lower mold 34, if a gap is generated between the lower mold 34 and the plating film 10, the resin forming the resin layer enters and adheres to the surface of the plating film 10. End up. Since the surface of the plating film 10 is protected by interposing the elastically acting sheet 36 between the lower mold 34 and the plating film 10, the resin does not adhere to the surface of the plating film 10 that contacts the sheet 36. .

  Next, as shown in FIG. 20, the solder balls are supplied to the plating film 10 in an overlapping manner, and then reflow processing is performed to form the protruding electrodes (bump electrodes) 11 with the solder balls, thereby forming the external electrode terminals 3. The solder ball has a diameter of 0.3 mm. After the reflow process, the external electrode terminal 3 having a height of 0.25 mm is formed (bump electrode formation: S07).

  Next, as shown in FIG. 21, the resin layer 32 is cut vertically and horizontally by a dicing blade 40 having a two-blade structure. In this cutting, the lead frame 20 and the tape 6 covered with the resin layer 32 are also cut at the same time. By using the two-blade dicing blade 40, the cutting width a is widened. Further, by using the two-blade dicing blade 40, the lead 22 protruding from the frame 22 can be cut across the frame 22 without directly cutting the frame 22, and the product forming portion 21 (unit tape portion 26). Can be achieved (cutting (separation): S08). By this cutting, the resin layer 32 becomes the sealing body 2. Further, the cutting ends of the leads 9 and the tape 6 are exposed on the side surfaces of the sealing body 2 by this cutting.

  Thereby, a plurality of BGA type semiconductor devices 1 shown in FIG. 1 can be manufactured. Note that, after forming the resin layer 32, the resin layer 32 is cut without forming the protruding electrodes 11, thereby manufacturing the LGA (Land Grid Array) type semiconductor device 1 as shown in FIG. Can do. In the semiconductor device 1 of FIG. 22, the plating film 10 is exposed on the lower surface of the sealing body 2, and the plate-like plating film 10 constitutes the external electrode terminal 3.

The first embodiment has the following effects.
(1) In the manufacturing method of the semiconductor device 1, the plurality of leads 9 extending from the inner side of the frame 22 of the product forming unit 21 to the center side of the frame 22 and the connecting portion 23 provided at the center of the frame 22 to the frame side A lead frame 20 having a plurality of leads 9 extending in the direction is prepared. Thereafter, a tape 6 having openings 7 and 8 is bonded to the lead frame 20 at a portion corresponding to the electrode 5 of the semiconductor chip 4 and a portion corresponding to the connecting portion 23. Further, the connecting portion 23 exposed to the opening 8 is cut off. By this cutting, the lead 9 integrated with the connecting portion 23 is separated, but is supported by the tape 6. As a result of manufacturing the semiconductor device 1 using such a lead frame with a tape, external electrode terminals (pins) 3 are formed on the leads 9 extending from the periphery of the sealing body 2 to the inside. Not only can the external electrode terminals (pins) 3 be formed on the leads 9 extending from the openings 8 and supported by the tape 6, and the number of pins can be increased. Therefore, the number of pins can be increased without increasing the number of leads extending from the periphery of the sealing body. In other words, in relation to the size of the sealing body 2, one end is placed at the center of the sealing body 2 even when the maximum number of leads 9 are arranged on the periphery of the sealing body 2. Since the external electrode terminals (pins) 3 can also be formed on the leads 9 that extend so that the other end is located in the middle of the facing tape, the number of pins can be increased. That is, the number of pins can be increased without increasing the size of the sealing body 2.

  (2) The semiconductor device 1 has a structure in which the wire 12 is first connected to the electrode 5 of the semiconductor chip 4 (first bonding) and then connected to the lead 9 (second bonding). Further, the wire 12 is connected (second bonding) to the lower surface (second surface) of the lead 9 bent in one step. In the second bonding, the height from the connecting portion can be made sufficiently lower than that of the first bonding portion. Therefore, the second bonding is formed to a depth from the lower surface (second surface) of the lead 9 to the exposed surface side of the plating film 10. Thus, the wire 12 is surely covered with a resin having a predetermined thickness. As a result, the sealing performance of the wire 12 by the sealing body 2 does not deteriorate. For example, when nail head wire bonding is performed using a wire having a diameter of 20 μm on a lead having a thickness of 0.1 mm, if the step for bending the lead in a step shape is 0.1 mm, the second bonding portion The wire whose height from the wire to the top of the wire loop is about 20 μm is covered with a sufficiently thick resin.

  (3) In the semiconductor device 1, the first surface 4 a of the semiconductor chip 4 having the electrode 5 and the first surface 9 a of the lead 9 are bonded with the tape 6 having the opening 7 corresponding to the electrode 5, and the electrode 5 and the second surface 9b of the lead 9 are connected to each other through the opening 12 passing through the opening 7. Therefore, the thickness of the resin that constitutes the sealing body 2 that covers the second surface 4b of the semiconductor chip 4 can be reduced. Further, since the wire 12 connected to the second surface 9b of the lead 9 is also accommodated in the step of the lead 9 as described in the above (2), the sealing body 2 can be made thin and the semiconductor device 1 can be made thin. Can be achieved.

  (4) In the manufacturing method of the semiconductor device 1, when the resin layer 32 and the lead frame 20 are cut, the cutting position is set to a position close to the periphery of the semiconductor chip 4 located in the resin layer. The size can be brought close to the size of the semiconductor chip 4, and the CSP of the semiconductor device 1, that is, the miniaturization can be achieved.

  (5) In the manufacturing method of the semiconductor device 1, after forming the resin layer 32, the protruding electrode 11 is formed on the plating film 10 exposed from the resin layer 32 to form the external electrode terminal 3. The device 1 is manufactured. In this manufacturing method, the LGA type semiconductor device 1 can be manufactured by forming the structure in which only the plating film 10 is exposed from the resin layer 32 without forming the protruding electrode. The LGA type semiconductor device is thinner than the BGA type semiconductor device.

  (6) In the method for manufacturing the semiconductor device 1, the connecting portion 23 provided in the lead frame 20 is provided in the center of the frame 22. As a result, the leads 9 can be uniformly extended from the center toward the peripheral frame, the number of leads 9 extending from the connecting portion 23 can be increased, and the number of pins of the semiconductor device 1 can be increased. Can be planned.

  23 to 29 are diagrams relating to a semiconductor device which is a second embodiment of the present invention and a method for manufacturing the same. FIG. 23 is a sectional view of a semiconductor device according to the second embodiment, and FIG. 24 is an enlarged sectional view showing a part of FIG. FIG. 25 is a flowchart showing a method for manufacturing a semiconductor device according to the second embodiment. FIGS. 26 to 29 are diagrams relating to a method for manufacturing a semiconductor device according to the second embodiment.

  The semiconductor device 1 of the first embodiment has a structure in which the lower surface of the sealing body 2 and the lower surface of the plating film 10 are located on substantially the same plane, but the semiconductor device of the second embodiment is shown in FIGS. As shown, the protruding surface (protruding end surface) of the lead 9 protruding stepwise and the lower surface of the sealing body 2 are located on substantially the same plane, and the plating film 10 has a structure protruding from the lower surface of the sealing body 2. It has become. That is, the protruding end surface of the lead 9 is exposed on the lower surface of the sealing body 2.

  Other portions of the semiconductor device 1 of the second embodiment are the same as those of the semiconductor device 1 of the first embodiment. Therefore, as shown in FIGS. 23 and 24, in the case of the BGA type semiconductor device 1, the protruding length of the external electrode terminal 3 protruding from the lower surface of the sealing body 2 is equal to the thickness of the plating film 10. Therefore, the mounting performance with respect to the mounting board is improved.

  The semiconductor device 1 of Example 2 is manufactured through the steps shown in the flowchart of FIG. That is, the semiconductor device 1 according to the second embodiment has a lead frame / tape preparation (S11), tape affixing (adhesion) (S12), lead frame partial removal (S13), chip bonding (S14), and wire bonding (S15). ), Molding (S16), plating (S17), bump electrode (projection electrode) formation (S18), and cutting (dividing into pieces: S19).

  In the manufacture of the semiconductor device 1 according to the second embodiment, in the step S11 of preparing the lead frame, the lead frame in which the plating film is not provided on the projecting surface projecting stepwise on the second surface 9b side of the lead 9 of the lead frame 20. Prepare 20. A plating process is performed between the molding (S06) and the bump electrode (projection electrode) formation (S07) in the first embodiment, and a plating film is provided on the protruding surface of the lead 9.

  In the manufacture of the semiconductor device 1 of the second embodiment, after preparing the lead frame 20 having no plating film on the projecting surface of the lead 9, the tape is attached (S12) as in the case of the first embodiment, and the lead frame partially Removal (S13), chip bonding (S14), wire bonding (S15), and molding (S16) are sequentially performed.

  At the time of this molding, although not shown, the protruding surface (protruding end surface) protruding to the second surface 9b side of the lead 9 is covered by a sheet 36 disposed on the lower mold 34 of the transfer molding device. As a result, as shown in FIG. 26, the protruding end surface 9 g of the lead 9 is substantially flush with the lower surface of the resin layer 32 and is exposed on the surface of the resin layer 32.

  Next, a plating process (S17) is performed, and the plating film 10 is formed on the protruding end face 9g of the lead 9 exposed on the surface of the resin layer 32 as shown in FIG. The plating film 10 is not particularly limited, but the lower layer is a copper layer having a thickness of 15 μm and the upper layer is a nickel layer having a thickness of 5 μm as in the case of the first embodiment. The plating film 10 protrudes from the lower surface of the resin layer 32.

  Next, as in Example 1, as shown in FIG. 28, the protruding electrode 11 is formed on the plating film 10 protruding on the surface of the resin layer 32 to form the external electrode terminal 3 (bump electrode formation: S18).

  Next, as in the first embodiment, as shown in FIG. 29, the resin layer 32 is cut vertically and horizontally by a dicing blade 41 (cut: S19) to manufacture a plurality of semiconductor devices 1. In the second embodiment, in order to obtain a wide cutting width a, the dicing blade 41 having a width that is slightly narrower than the cutting width a is used.

  Thereby, a plurality of BGA type semiconductor devices 1 shown in FIG. 23 can be manufactured. Note that, after the plating film 10 is formed, the resin layer 32 is cut without forming the protruding electrodes 11, whereby the LGA type semiconductor device 1 can be manufactured as shown in FIG. 30. In the semiconductor device 1 of FIG. 30, a flat plate-like plating film 10 projects from the lower surface of the sealing body 2, and this plating film 10 constitutes the external electrode terminal 3. Since the external electrode terminal 3 protrudes from the lower surface of the sealing body 2 by the thickness of the protruding electrode 11, the mounting performance on the mounting substrate is improved.

  31 to 37 are diagrams relating to a semiconductor device and a method for manufacturing the same according to a third embodiment of the present invention. 31 and 32 are views showing the structure of the semiconductor device, and FIGS. 33 to 37 are cross-sectional views showing a method for manufacturing the semiconductor device.

  The semiconductor device 1 of Example 3 has a cross-sectional structure shown in FIG. 32 is an enlarged cross-sectional view showing a part of FIG. As shown in FIG. 32, the semiconductor device 1 of the third embodiment differs from the semiconductor device 1 of the first embodiment in which the leads 9 are bent stepwise, and the leads 9 have a flat plate-like structure. Then, the second surface 9b of the lead 9 is partially etched away to a predetermined depth, and the lead portion where the second surface 9b of the lead portion not to be etched (the portion where the plating film 10 is to be formed) is etched is etched. It protrudes from the second surface 9b. Thereby, the protruding portion is formed as in the case of the first embodiment. Therefore, the plating film 10 is formed on the protruding end surface 9g of the protruding portion so as to overlap with the semiconductor device 1 of the first embodiment, and the protruding electrode 11 is formed on the plating film 10 to form the external electrode terminal 3. It has a structure to do. Other parts of the semiconductor device 1 of the third embodiment are the same as those of the semiconductor device 1 of the first embodiment.

  The semiconductor device 1 of the third embodiment is manufactured by the same process as the manufacturing process of the semiconductor device 1 of the first embodiment shown in the flowchart of FIG. In the manufacture of the semiconductor device 1 of the third embodiment, the difference from the first embodiment is only the lead frame 20 used. The lead pattern of the product forming portion 21 of the lead frame 20 is the same as that of the first embodiment. However, the cross-sectional structure of the lead 9 is different from that in the first embodiment.

  The semiconductor device 1 of Example 3 is manufactured using a lead frame 20 as shown in FIG. A lead frame 20 shown in FIG. 33 shows the product forming portion 21 of the lead frame 20 in which the first surface is bonded to the tape 6. The lead frame 20 in FIG. 33 is in a state where the connecting portion has already been removed. The lead pattern of the product forming portion 21 is the same as that of the first embodiment. Therefore, each cross section of the lead 9 shown in FIG. 33 is the same cross section as FIG. However, FIG. 33 is a schematic diagram that is simply displayed so that the connection between the lead 9 and the wire 12 connected to the lead 9 is clear. Therefore, the cross-sectional view showing the method for manufacturing the semiconductor device 1 of FIGS. 34 to 37 is also a diagram corresponding to FIG.

  In the product forming portion 21 of the lead frame 20 shown in FIG. 33, the lead 9 is thinned by partially etching the second surface 9b to a predetermined depth. The lead 9 has a thickness of 0.1 mm as in the first embodiment, the etching is half-etched, and the etched portion has a thickness of 0.05 mm. Therefore, the step between the second surface 9b that is not etched and the second surface 9b that appears after etching is 0.05 mm. Thereby, it is possible to selectively form a protruding portion on the second surface 9b of the lead 9 in the lead frame 20 used in the third embodiment. This protruding portion is the same as in the first embodiment. A plated film 10 having a thickness of 20 μm is formed on the protruding end surface 9g of the protruding portion, as in the case of the first embodiment.

  In the manufacture of the semiconductor device 1 according to the third embodiment, the work proceeds as in the case of the first embodiment, such as preparation of a lead frame and a tape (S01), tape application (S02), and partial removal of the lead frame (S03). FIG. 33 shows the product forming part 21 of the lead frame 20 in which S01 to S03 have been completed.

  Next, chip bonding (S04) and wire bonding (S05) are performed as in the first embodiment. FIG. 34 shows the product forming part 21 of the lead frame 20 after S04 and S05. In the wire 12 connecting the electrode 5 of the semiconductor chip 4 and the lead 9, the loop height of the wire 12 is lowered to 120 μm or less. The height from the surface of the electrode 5 of the semiconductor chip 4 to the surface of the plating film 10 is such that when the surface of the electrode 5 is the same as the surface of the semiconductor chip 4, the thickness of the tape 6 is 100 μm and the thickness of the lead 9 is Since the thickness of the plating film 10 is 0.1 mm and 10 μm, it is 210 μm. Since the resin constituting the sealing body 2 is formed up to the surface of the plating film 10, the loop height of the wire 12 is made as low as possible so that the wire 12 is covered with a resin having a predetermined thickness (for example, 50 μm). To do.

  Next, molding (S06) is performed as in the first embodiment. 35, the surface of the plating film 10 formed on the protruding portion of the lead 9 is substantially flush with the surface of the resin layer 32 and is exposed on the surface of the resin layer 32.

  Next, as in Example 1, as shown in FIG. 36, the protruding electrode 11 is formed on the plating film 10 exposed on the surface of the resin layer 32 to form the external electrode terminal 3 (bump electrode formation: S07).

  Next, similarly to the first embodiment, the resin layer 32 is cut vertically and horizontally by a dicing blade 40 (not shown) (cut: S08) to manufacture a plurality of BGA type semiconductor devices 1. FIG. 37 shows the manufactured semiconductor device 1. The cross section of the lead 9 in FIG. 37 is schematic, and the semiconductor device 1 corresponding to Example 1 has the cross sectional structure shown in FIG.

  In the semiconductor device manufacturing method, after the resin layer 32 is formed, the resin layer 32 is cut without forming the protruding electrodes 11, thereby forming the LGA type semiconductor device 1 as shown in FIG. 38. Can be manufactured. FIG. 38 is a diagram showing an LGA type semiconductor device 1 corresponding to the BGA type semiconductor device 1 of FIG.

  The semiconductor device 1 and the manufacturing method thereof according to the third embodiment have the same effects as the first embodiment. Further, in Example 3, the lead 9 having a step structure is formed by etching predetermined portions of the upper and lower surfaces of the lead 9 to a predetermined thickness, so that the lead 9 having the step structure is formed by bending with a press. And can be precisely formed.

FIG. 39 is a schematic diagram showing the correlation between the leads of the end portion of the sealing body of the semiconductor device that is Embodiment 4 of the present invention, the electrodes of the semiconductor chip, and the wires.
FIG. 39 is a diagram illustrating a part of the semiconductor device 1 according to the fourth embodiment. This figure shows one side portion of the rectangular semiconductor device 1, and the resin constituting the sealing body 2 is partially removed to replace the lead 9 and the electrode 5 of the semiconductor chip 4 and the electrode 5 and the lead 9. It is a schematic diagram which shows the relationship of the wire 12 to connect.

  As shown in FIG. 5, the semiconductor device 1 according to the first embodiment has a structure in which a wire 12 is connected to a lead 9 portion (an edge side of the sealing body 2) outside the row of electrodes 5 arranged in a row. On the other hand, the semiconductor device 1 according to the fourth embodiment has a structure in which the wire 12 is connected to the lead 9 portion closer to the center of the semiconductor chip 4 than the electrode 5. Thereby, compared with the semiconductor device 1 of the first embodiment, in the semiconductor device 1 of the fourth embodiment, the lead 9 portion outside the row of the electrodes 5 arranged in a row is a region (bonding portion) for connecting the wires 12. Is eliminated, and the lead portion extending outside the electrode array can be shortened (for example, length j). Therefore, according to the fourth embodiment, the miniaturization of the semiconductor device 1 can be achieved. 39, the outline of the sealing body 2 of the semiconductor device that connects the wire 12 to the lead portion outside the electrode 5 is indicated by a two-dot chain line. The wire 12 connected to the lead portion outside the electrode 5 is indicated by a single dotted line in the lower left of the figure. In FIG. 39, the opening 7 is omitted.

  40 to 47 are diagrams relating to a semiconductor device that is a fourth embodiment of the present invention and a method for manufacturing the same. 40 to 42 are views showing the structure of the semiconductor device. FIG. 40 is a schematic view showing the connection state between the electrodes of the semiconductor chip and the leads, and FIG. 41 is a state of the finished product along the line CC in FIG. FIG. 42 is an enlarged cross-sectional view of a part of FIG. 43 to 47 are views showing a method for manufacturing a semiconductor device.

  In the semiconductor device 1 according to the fifth embodiment, the conductive connection body connecting the lead 9 and the electrode 5 is not a wire, but instead is located in the opening 7 of the tape 6 as shown in FIGS. 41 and 42. The tape 6 and the electrode 5 are overlapped and connected via a conductive connection body 45. That is, as shown in FIG. 42, the structure is such that the electrode 5 of the semiconductor chip 4 is face-down bonded (flip chip connection) to the conductive connection plating film 46 provided on the surface of the lead 9. Therefore, the semiconductor device 1 according to the fifth embodiment is modified so as to correspond to the face-down bonding in the semiconductor device 1 according to the first embodiment, but other parts are the same as those in the first embodiment. In FIG. 40, the square is blacked out so that the position of the connection body 45 can be seen. Actually, since the connecting body 45 is located under the lead 9, it cannot be seen in FIG. Also, in the cross-sectional views of FIGS. 41, 46, and 47, the connection body 45 is shown with a square filled in black.

  In the semiconductor device 1 according to the fifth embodiment, as shown in FIG. 41, the cross-sectional structure of the lead 9 employs the structure of the third embodiment (lead structure by etching). In addition, as shown in FIGS. 40 and 45, the semiconductor device 1 of Example 5 includes the lead pattern and the semiconductor chip 4 so that the leads 9 crossing the opening 7 overlap the electrodes 5 located in the opening 7. The electrode arrangement pattern has been changed. Further, as shown in FIGS. 40, 41, 44 to 47, in order to connect the cantilever-shaped lead 9 extending from the opening 8 to the electrode 5, the tape 6 is provided around the opening 8. New openings 7 are provided, and changes have been made to enable connection between the electrodes 5 and the leads 9 in the new openings 7.

  As shown in FIG. 44, the lead pattern in the semiconductor device 1 of the fifth embodiment is basically a pattern approximate to the pattern in the first embodiment. In the case of the lead pattern of Example 1, in order to connect the wire 12, the lead 9 extending from the opening 8 further extends from the circular bulged pattern 9d provided in the middle portion, and the wire 12 is connected to the extended portion. It is a pattern to do. However, in the case of the fifth embodiment, since the wire connecting portion is not necessary, the lead 9 extending in a cantilever shape from the opening 8 has a pattern in which the tip is not provided from the swollen pattern 9d. ing. The support lead 9f extending from the opening 8 and reaching the edge of the sealing body 2 has a structure in which the lead portions extend on both sides of the swollen pattern 9d. Furthermore, in Example 5, in order to connect the lead 9 extending from the opening 8 and a part of the support leads 9f and the electrode 5, the band-like opening 7 is provided outside the four sides of the opening 8. ing.

  On the first surface 4 a of the rectangular semiconductor chip 4, one row of electrodes 5 is arranged along each side in the vicinity of each side in the same manner as in the first embodiment. The electrode 5 is newly arranged so as to be located in the portion 7. When the semiconductor chip 4 and the lead frame 20 (lead 9) are bonded via the tape 6, the electrodes 5 face the leads 9 that cross the openings 7 in the openings 7. It has become. The electrode 5 of the semiconductor chip 4 is shown only in FIG. As can be seen from FIG. 42, the electrode 5 is covered with the connection body 45. Therefore, the electrode 5 exists in the square part (connecting body 45) painted black shown in each figure.

  FIG. 42 is a partial enlarged cross-sectional view showing a portion connecting the electrode 5 and the lead 9 of the semiconductor chip 4 of the semiconductor device 1 of the fifth embodiment. A lead 9 crossing the opening 7 of the tape 6 faces the electrode 5 of the semiconductor chip 4. A connection plating film 46 is formed on the first surface 9 a of the lead 9 facing the electrode 5. In the opening 7, the electrode 5 and the connection plating film 46 are electrically connected by a pressure contact material 45. The connection plating film 46 is made of, for example, Sn / Ag / Cu. The electrode 5 of the semiconductor chip 4 is a square having a side of 80 μm, and the thickness of the connecting plating film 46 formed on the surface of the lead 9 having a width of 65 μm is 30 μm.

  In Example 5, a pressure contact material is used as a connection body. Examples of the pressure contact material include paste-type ACP (Anisotropic Conductive Paste) and NCP (Non Conductive Resin Paste), and film-type ACF (Anisotropic Conductive Film) and NCF (Non Conductive Resin Film). In Example 5, any type of pressure contact material can be used. In Example 5, NCF having a thickness of about 100 μm is used. Note that a gold bump electrode may be formed on the electrode 5 without using a pressure contact material as the connection body 45, and the gold bump electrode may be flip-chip connected to the connection plating film 46.

  Next, a method for manufacturing the semiconductor device 1 will be described with reference to FIGS. As shown in the flowchart of FIG. 43, the semiconductor device 1 is prepared as lead frame / tape (S21), tape affixed (adhesion) (S22), lead frame partial removal (S23), face down bonding (S24), It is manufactured through each process of molding (S25), bump electrode formation (S26), and cutting (dividing into pieces: S27). In terms of process, chip bonding and wire bonding performed in the semiconductor device manufacturing method of the first embodiment are performed by one face-down bonding in the semiconductor device manufacturing method of the fifth embodiment.

  FIG. 44 is a diagram showing the product forming portion 21 (unit tape portion 26) after completion of lead frame / tape preparation (S21), tape application (adhesion) (S22), and lead frame partial removal (S23). . In the lead pattern, one end is arranged at the opening 8 provided in the center of the tape 6 and crosses the opening 7 provided around the opening 8, and one end at the edge of the product forming part 21 (unit tape part 26). A lead 9 is provided across the opening 7 extending along the periphery of the product forming portion 21.

  The semiconductor chip 4 is bonded to such a lead frame 20 via the tape 6 (face down bonding: S24). By this adhesion, the electrode 5 provided on the first surface 4a of the semiconductor chip 4 is located in the opening 7 of the tape 6 and is connected to the connecting plating film 46 of the lead 9 across the opening 7 and made of a pressure contact material. The electrode 5 and the connecting plating film 46 are electrically connected with each other via 45. This adhesion is face-down bonding of the semiconductor chip 4. The connecting body 45 is located directly below the lead portion that crosses the opening 7.

  Prior to face-down bonding, a strip-shaped connection body 45 is disposed on the first surface 9a of the lead 9 exposed in the opening 7, and the electrode 5 of the semiconductor chip 4 overlaps the connection body 45. The electrode 5 and the plating film 46 for connection of the lead 9 are electrically connected by the connecting body 45 after being pressurized at a predetermined temperature for a predetermined time.

Next, as shown in FIG. 46, as in the first embodiment, the semiconductor chip 4 and the lead frame 20 are covered with the resin layer 32 (molding: S25). At this time, the surface of the plating film 10 is exposed on the surface of the resin layer 32.
Next, as shown in FIG. 47, similarly to the first embodiment, the protruding electrode (bump electrode) 11 is formed at the external electrode terminal forming portion of the lead frame 20 to form the external electrode terminal 3 (bump electrode formation: S26).
Next, the resin layer 32 is cut longitudinally and laterally together with the lead frame 20 and the tape 6 to produce a plurality of BGA semiconductor devices 1 as shown in FIG. 41 (cutting (separation): S27).

  FIG. 48 is an enlarged sectional view showing a part of a semiconductor device which is a modification of the fifth embodiment. FIG. 48 is a view corresponding to FIG. 42, and shows a portion where the electrode 5 and the lead 9 of the semiconductor chip 4 are connected. In this modification, the lead 9 portion located in the opening 7 is bent so as to protrude in a stepped manner toward the first surface 4a side where the electrode 5 of the semiconductor chip 4 is provided. A connection plating film 46 is provided on the surface (projection surface) of the projection 50. The connection plating film 46 and the electrode 5 of the semiconductor chip 4 are electrically connected by a connection body 45 made of a pressure contact material.

  This modification is effective when the distance between the lead 9 and the electrode 5 of the semiconductor chip 4 is large, for example, when the tape 6 is thick, and the distance between the connection plating film 46 and the electrode 5 can be shortened (proximity). Therefore, the lead 9 and the electrode 5 can be reliably connected by the connecting body 45 made of the pressure contact material. In this modification, the reliability of the connection by the pressure contact material is increased.

  FIG. 49 is a diagram showing a part of the semiconductor device 1 manufactured as a result of performing the cutting step without forming the bump electrode after the molding step in the manufacture of the semiconductor device of Example 5, and the LGA type semiconductor device 1 It becomes. The surface of the flat plating film 10 formed on the protruding end surface 9 g of the lead 9 is exposed on the lower surface of the sealing body 2 and becomes the external electrode terminal 3.

  According to the fifth embodiment, the lead 9 and the electrode 5 have a structure (a semiconductor chip face-down bonding structure) in which the lead 9 and the electrode 5 are overlapped and connected via the connection body 45 in the opening 7. 2, the sealing performance between the lead 9 and the electrode 5 is improved. Further, when the lead 9 and the electrode 5 are connected by the wire 12, care must be taken to lower the loop height of the wire 12, but wire bonding must be performed, but such attention is unnecessary in face-down bonding. Thus, the productivity of the semiconductor device 1 is improved. When a pressure contact material is used as the connection body 45, the plating film 46 for connection of the lead 9 and the electrode 5 are electrically connected by the pressure contact process, so that the productivity is further increased.

50 is a cross-sectional view of a semiconductor device that is Embodiment 6 of the present invention, and FIG. 51 is a partially enlarged cross-sectional view of FIG.
Example 6 is a semiconductor device 1 having a structure in which the lead 9 is flattened without bending the lead 9 stepwise or half-etching the surface of the lead in the semiconductor device 1 of Example 1. Since the lead 9 having a constant thickness is used, the thickness of the plating film 10 provided on the second surface 9b of the lead 9 is increased to 30 μm as a whole, and the second surface of the lead portion where the plating film 10 is not provided. In this structure, the wire 12 is connected to 9b. The plating film 10 is as thick as 30 μm, the loop height of the wire 12 is as low as 210 μm, and the wire 12 is connected to the lead 9 by the second bonding, so that the wire 12 is positioned in the sealing body 2 and sealed. Since the resin constituting the body 2 covers the wire 12 with a thickness of about 20 μm, the moisture resistance of the semiconductor device 1 is good.

  According to the sixth embodiment, the work of bending the leads stepwise and the work of etching the lead surface are not required, and the manufacturing cost of the lead frame can be reduced. Therefore, the manufacturing cost of the semiconductor device 1 can be reduced.

52 is a cross-sectional view of a semiconductor device that is Embodiment 7 of the present invention, and FIG. 53 is an enlarged cross-sectional view of a part of FIG.
As shown in FIGS. 52 and 53, the semiconductor device 1 according to the seventh embodiment is similar to the semiconductor device 1 according to the sixth embodiment in which the wires are not used and the electrodes of the lead 9 and the semiconductor chip 4 are used. The connection 5 is electrically connected by the connecting body 45 in the opening 7. As shown in FIG. 53, a connection plating film 46 corresponding to the electrode 5 is provided on the surface (first surface 9 a) of the lead 9 that faces the semiconductor chip 4 across the opening 7 of the tape 6. ing. The connection plating film 46 and the electrode 5 are electrically connected by a connection body 45 made of a pressure contact material.

  Since the semiconductor device 1 according to the seventh embodiment has a structure in which the semiconductor chip 4 is connected to the lead 9 by face-down bonding, a wire is not used as in the sixth embodiment. Therefore, the thickness of the plating film 10 provided on the second surface 9b side of the lead 9 can be made thinner than that of the semiconductor device 1 of the sixth embodiment. Since the thickness of the plating film 10 is the thickness of the resin covering the second surface 9b of the lead 9, for example, the thickness of the plating film 10 is about 30 μm. The semiconductor device 1 according to the seventh embodiment is an LGA type semiconductor device in which the surface of the plating film 10 is exposed to the lower surface of the sealing body 2 to form the external electrode terminal 3.

  The semiconductor device 1 according to the seventh embodiment uses a flat lead, and the plating film 10 is also thinned, so that the semiconductor device 1 can be thinned.

  The invention made by the present inventor has been specifically described based on the embodiments. However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Nor.

1 is a perspective view showing an appearance of a semiconductor device that is Embodiment 1 of the present invention. It is sectional drawing which follows the AA line of FIG. It is an expanded sectional view which shows a part of FIG. 2 is a bottom view of the semiconductor device of Example 1. FIG. In the semiconductor device of Example 1, it is a schematic diagram which shows the positional relationship of a semiconductor chip, the electrode of a semiconductor chip, a lead | read | reed, and a wire. FIG. 3 is a cross-sectional view showing a mounted state of the semiconductor device of Example 1. 3 is a flowchart illustrating a method for manufacturing the semiconductor device according to the first embodiment. 3 is a plan view of a lead frame used for manufacturing the semiconductor device of Example 1. FIG. FIG. 3 is an enlarged plan view showing a part of the lead frame. It is sectional drawing which follows the BB line of FIG. 2 is a plan view of a tape used for manufacturing the semiconductor device of Example 1. FIG. It is a top view of the lead frame which stuck the tape. It is an enlarged plan view which shows the product formation part formed with the said tape and lead frame. It is the top view which removed the connection part by the lead frame of the center of the said product formation part. It is an enlarged plan view which shows the product formation part which removed the said connection part. FIG. 3 is a schematic diagram of a product forming portion showing a state in which a semiconductor chip is attached to a lead frame in the manufacture of the semiconductor device of Example 1. In the manufacture of the semiconductor device of Example 1, it is a schematic diagram showing a product forming portion in a state where the electrodes of the semiconductor chip and the leads are connected by wires. In the manufacture of the semiconductor device of Example 1, it is a cross-sectional view of a product forming portion after chip bonding and wire bonding are completed. FIG. 6 is a cross-sectional view showing a state where a product forming portion is sealed with a resin layer by transfer molding in manufacturing the semiconductor device of Example 1. FIG. 5 is a cross-sectional view of a product forming portion showing a state in which bump electrodes are formed at locations where external electrode terminals are formed on a lead frame in manufacturing the semiconductor device of Example 1; In manufacture of the semiconductor device of Example 1, it is sectional drawing of the product formation part which shows the state which cut | disconnects a resin layer and forms a semiconductor device. In the manufacture of the semiconductor device of Example 1, it is a cross-sectional view showing an LGA type semiconductor device manufactured when a bump electrode is not formed. It is sectional drawing of the product formation part which shows the state which cut | disconnects a resin layer and forms a semiconductor device. It is sectional drawing of the semiconductor device which is Example 2 of this invention. It is an expanded sectional view which shows a part of FIG. 6 is a flowchart illustrating a method for manufacturing a semiconductor device according to a second embodiment. FIG. 10 is a partial cross-sectional view illustrating a state in which the semiconductor chip and the lead frame are covered with a resin layer in the manufacture of the semiconductor device of Example 2. In the manufacture of the semiconductor device of Example 2, it is a cross-sectional view showing a state in which a plating film is formed on a lead frame portion exposed on the surface of a resin layer. In the manufacture of the semiconductor device of Example 2, it is a cross-sectional view showing a state in which a bump electrode is formed at an external electrode terminal formation portion of a lead frame. In the manufacture of the semiconductor device of Example 2, it is a cross-sectional view showing a state in which a resin layer is cut to form a semiconductor device. In the manufacture of the semiconductor device of Example 2, it is a cross-sectional view showing an LGA type semiconductor device manufactured when a bump electrode is not formed. It is sectional drawing of the semiconductor device which is Example 3 of this invention. It is an expanded sectional view which shows a part of FIG. In the manufacture of the semiconductor device of Example 3, it is a cross-sectional view showing a product formation portion of a lead frame attached with a tape. FIG. 10 is a cross-sectional view illustrating a product forming portion in a state where a semiconductor chip is attached to a lead frame and wire bonding is performed in the manufacture of the semiconductor device of Example 3. FIG. 10 is a cross-sectional view of a product forming portion showing a state where a semiconductor chip and a lead frame are covered with a resin layer in the manufacture of a semiconductor device of Example 3. In the manufacture of the semiconductor device of Example 3, it is a cross-sectional view of a product forming portion showing a state in which a bump electrode is formed at an external electrode terminal formation portion of a lead frame. 6 is a sectional view of a semiconductor device manufactured in the manufacture of a semiconductor device of Example 3. FIG. In the manufacture of the semiconductor device of Example 3, it is a cross-sectional view showing an LGA type semiconductor device manufactured when a bump electrode is not formed. It is a schematic diagram which shows the correlation of the lead of the edge part of the sealing body of the semiconductor device which is Example 4 of this invention, the electrode of a semiconductor chip, and a wire. In the semiconductor device which is Example 5 of this invention, it is a schematic diagram which shows the connection state of the electrode and lead | read | reed of a semiconductor chip. FIG. 41 is a cross-sectional view of the semiconductor device in a finished product state taken along line CC in FIG. 40. It is a partial expanded sectional view of FIG. 10 is a flowchart showing a method for manufacturing a semiconductor device of Example 5. FIG. 10 is a schematic diagram showing a product forming portion formed by sticking a tape to a lead frame in manufacturing the semiconductor device of Example 5. FIG. 10 is a schematic diagram showing a state in which a semiconductor chip is flip-chip connected to a lead frame in manufacturing a semiconductor device of Example 5. In the manufacture of the semiconductor device of Example 5, it is a cross-sectional view showing a state where the semiconductor chip and the lead frame are covered with a resin layer. In the manufacture of the semiconductor device of Example 5, it is a cross-sectional view showing a state in which a bump electrode is formed at an external electrode terminal formation portion of a lead frame. FIG. 10 is an enlarged cross-sectional view showing a part of a semiconductor device that is a modification of Example 5; In the manufacture of the semiconductor device of Example 5, it is a cross-sectional view showing an LGA type semiconductor device manufactured when no bump electrode is formed. It is sectional drawing of the semiconductor device which is Example 6 of this invention. It is a partial expanded sectional view of FIG. It is sectional drawing of the semiconductor device which is Example 7 of this invention. FIG. 53 is an enlarged sectional view of a part of FIG. 52.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Semiconductor device, 2 ... Sealing body, 3 ... External electrode terminal, 4 ... Semiconductor chip, 4a ... 1st surface, 4b ... 2nd surface, 5 ... Electrode, 6 ... Tape, 7, 8 ... Opening part 9 ... Lead, 9a ... First surface, 9b ... Second surface, 9f ... Support lead, 9g ... Projecting end surface, 10 ... Plating film, 11 ... Projection electrode, 12 ... Wire, 15 ... Mounting substrate, 16 ... Land, 20 ... Lead frame, 21 ... Product forming part, 22 ... Frame, 23 ... Connecting part, 26 ... Unit tape part, 30 ... Plating film for connection, 32 ... Resin layer, 34 ... Lower mold, 35 ... Upper mold, 36, 37 ... sheet, 38 ... cavity, 40,41 ... dicing blade, 45 ... connector, 46 ... plating film for connection, 50 ... projection

Claims (45)

A sealing body made of an insulating resin having upper and lower surfaces and side surfaces connecting the upper surface and the lower surface;
A first surface having a plurality of electrodes, and a second surface opposite to the first surface, wherein the first surface is located on a lower surface side of the sealing body. A semiconductor chip located on the first surface of the semiconductor chip, and a tape having an adhesive layer on both surfaces corresponding to the electrode and a predetermined portion serving as an opening;
The semiconductor chip is bonded via the first surface on the opposite side with Do that surface of the surface to be bonded, the part of the other portion of the second surface on the opposite side of the first surface of the tape A plurality of conductive leads that protrude more than the lower surface of the sealing body,
A conductive plating film formed on the protruding surface of the lead and exposed on the lower surface of the sealing body;
A conductive connection body located in the sealing body, penetrating through the opening, connected to the electrode at one end, and connected to the lead at the other end;
Some of the leads have one end exposed on the side surface of the sealing body and the other end is located on the tape surface, and some of the leads have one end exposed on the side surface of the sealing body. One end is located in the opening part of the said predetermined part, and the said other lead is located in the opening part of the said predetermined part, and the other end is located on the said tape surface, The semiconductor device characterized by the above-mentioned.   2. The semiconductor device according to claim 1, wherein a protruding electrode is formed so as to overlap the exposed surface of the plating film.   The semiconductor device according to claim 1, wherein the plating film protrudes from a lower surface of the sealing body.   The semiconductor device according to claim 1, wherein a protruding end surface of the protruding portion of the lead is exposed on a lower surface of the sealing body.   The semiconductor device according to claim 1, wherein the remaining lead has a structure in which the one end projects into the opening of the predetermined portion.   The semiconductor device according to claim 1, wherein the opening of the predetermined portion provided in the tape is provided in the center of the tape.   The semiconductor device according to claim 1, wherein the connection body is formed of a wire extending in a curved line, and the wire is connected to a lead portion other than the protruding portion of the lead.   The semiconductor device according to claim 7, wherein the wire is connected to the electrode first and then connected to the lead.   The semiconductor device according to claim 7, wherein a position of the wire connecting the electrode and the lead is connected to the lead closer to the center of the semiconductor chip than the electrode.   The semiconductor device according to claim 7, wherein a plating film for connection is formed on a surface of the lead to which the wire is connected.   2. The semiconductor device according to claim 1, wherein the lead and the electrode respectively positioned in the opening of the tape are overlapped and connected via the connection body.   The semiconductor device according to claim 11, wherein a plating film for connection is formed on a surface of the lead to which the connection body is connected.   12. The semiconductor device according to claim 11, wherein the lead portion located in the opening is bent in one step and is closer to the semiconductor chip than the lead portion located on the tape. .   The lead is bent stepwise in a step shape, and a part of the second surface of the lead is closer to the lower surface of the sealing body than the second surface of the other lead part. 2. The semiconductor device according to 1.   The lead has a structure in which a second surface of a part of the lead is etched to a predetermined thickness, and the second surface of the lead that is not etched is closer to the lower surface of the sealing body. 2. The semiconductor device according to 1. A sealing body made of an insulating resin having upper and lower surfaces and side surfaces connecting the upper surface and the lower surface;
A first surface having a plurality of electrodes, and a second surface opposite to the first surface, wherein the first surface is located on a lower surface side of the sealing body. A semiconductor chip located in
A tape that is bonded to the first surface of the semiconductor chip and has an adhesive layer on both surfaces corresponding to the electrode and a predetermined portion serving as an opening;
A plurality of conductive leads on which the semiconductor chip of the tape is bonded via the first surface on the opposite side with Do that surface of the surface to be bonded,
A conductive plating film partially formed on a second surface opposite to the first surface of the lead and exposed on a lower surface of the sealing body;
A conductive connection body located in the sealing body, penetrating through the opening, connected to the electrode at one end, and connected to the lead at the other end;
Some of the leads have one end exposed on the side surface of the sealing body and the other end is located on the tape surface, and some of the leads have one end exposed on the side surface of the sealing body. One end is located in the opening part of the said predetermined part, and the said other lead is located in the opening part of the said predetermined part, and the other end is located on the said tape surface, The semiconductor device characterized by the above-mentioned.   The semiconductor device according to claim 16, wherein a protruding electrode is formed so as to overlap the exposed surface of the plating film.   The semiconductor device according to claim 16, wherein the remaining lead has a structure in which the one end projects into the opening of the predetermined portion.   The semiconductor device according to claim 16, wherein the opening of the predetermined portion provided in the tape is provided in the center of the tape.   The semiconductor device according to claim 16, wherein the connection body includes a wire extending in a curved line, and the wire is connected to a surface of the lead on which the plating film is not provided.   21. The semiconductor device according to claim 20, wherein the wire is connected to the electrode first and then connected to the lead.   21. The semiconductor device according to claim 20, wherein a position of the wire connecting the electrode and the lead is connected to the lead closer to the center of the semiconductor chip than the electrode.   21. The semiconductor device according to claim 20, wherein a plating film for connection is formed on a surface of the lead to which the wire is connected.   17. The semiconductor device according to claim 16, wherein the lead and the electrode respectively positioned in the opening of the tape are overlapped and connected via the connection body.   25. The semiconductor device according to claim 24, wherein a plating film for connection is formed on a surface of the lead to which the connection body is connected.   25. The semiconductor device according to claim 24, wherein the lead portion located in the opening is bent in one step and is closer to the semiconductor chip than the lead portion located on the tape. . (A) preparing a semiconductor chip having a first surface having a plurality of electrodes and a second surface opposite to the first surface;
(B) a rectangular frame, a plurality of leads extending from the inside of the frame into the frame, a connecting portion provided at a predetermined portion of the frame and supported by some of the leads, and the connecting portion A product forming portion comprising a plurality of leads extending from the frame to the frame side, the semiconductor chip being stacked on the product forming portion, and a part of the second surface of the lead is the second A step of preparing a lead frame that protrudes to the surface side of the substrate and is provided with a plating film on the protruding surface;
(C) An insulating tape having an adhesive layer on both sides having a unit tape portion corresponding to the product forming portion, wherein the unit tape portion corresponds to a portion corresponding to the electrode of the semiconductor chip and the connecting portion. A step of preparing a tape having an opening in a portion to be
(D) bonding the tape to a first surface that is opposite to the second surface of the lead frame in a state in which a peripheral edge of the connection portion is exposed in the opening corresponding to the connection portion;
(E) removing the connecting part in the opening and separating the leads connected by the connecting part;
(F) a step of bonding the semiconductor chip to the tape through a first surface so that the electrode of the semiconductor chip is located in the opening;
(G) connecting each electrode located in the opening and a predetermined portion of the lead bonded to the tape with a conductive connector;
(H) a step of covering the lead frame, the semiconductor chip, and the connection body with a resin layer made of an insulating resin in a state where the plating film of the lead frame is exposed;
(I) Cutting the resin layer and the lead frame vertically and horizontally and removing the frame to form a plurality of semiconductor devices in which the cut ends of the leads are exposed on the side surfaces of the sealing body formed by the resin layer. Process,
A method for manufacturing a semiconductor device, comprising:   28. The method of manufacturing a semiconductor device according to claim 27, wherein a protruding electrode is formed on the plating film exposed from the resin layer after the step (h).   28. The method of manufacturing a semiconductor device according to claim 27, wherein in the step (b), the connecting portion is provided at the center of the frame. In the step (b), a connection plating film is formed on the surface of the lead connecting the connection body,
In the step (g), a wire is used as the connection body, one end of the wire is connected to the electrode, a middle portion of the wire is connected to the lead, and the wire is connected to the connection portion of the lead. 28. The method of manufacturing a semiconductor device according to claim 27, wherein the semiconductor device is cut. In the step (b), a connection plating film is formed on the surface of the lead connecting the connection body,
28. The method of manufacturing a semiconductor device according to claim 27, wherein, in the step (g), the electrodes and the leads respectively positioned in the opening of the tape are overlapped and connected via the connection body.   32. The method of manufacturing a semiconductor device according to claim 31, wherein, in the step (b), the lead portion positioned in the opening is bent so as to protrude in a stepped manner toward the first surface. .   32. The method of manufacturing a semiconductor device according to claim 31, wherein a pressure contact material is used as the connection body.   In the step (b), the lead is partially bent in one step, and the second surface of the lead on which the plating film is formed protrudes from the second surface of the other lead portion. 28. A method of manufacturing a semiconductor device according to claim 27, wherein:   In the step (b), the second surface of the lead is partially removed by etching so that the second surface of the lead on which the plating film is formed protrudes from the second surface of the other lead portion. 28. A method of manufacturing a semiconductor device according to claim 27. (A) preparing a semiconductor chip having a first surface having a plurality of electrodes and a second surface opposite to the first surface;
(B) a rectangular frame, a plurality of leads extending from the inside of the frame into the frame, a connecting portion provided at a predetermined portion of the frame and supported by some of the leads, and the connecting portion A product forming portion comprising a plurality of leads extending from the frame to the frame side, the semiconductor chip being stacked on the product forming portion, and a part of the second surface of the lead is the second Preparing a lead frame protruding on the surface side of
(C) An insulating tape having an adhesive layer on both sides having a unit tape portion corresponding to the product forming portion, wherein the unit tape portion corresponds to a portion corresponding to the electrode of the semiconductor chip and the connecting portion. A step of preparing a tape having an opening in a portion to be
(D) bonding the tape to a first surface that is opposite to the second surface of the lead frame in a state in which a peripheral edge of the connection portion is exposed in the opening corresponding to the connection portion;
(E) removing the connecting part in the opening and separating the leads connected by the connecting part;
(F) a step of bonding the semiconductor chip to the tape through a first surface so that the electrode of the semiconductor chip is located in the opening;
(G) connecting each electrode located in the opening and a predetermined portion of the lead bonded to the tape with a conductive connector;
(H) a step of covering the lead frame, the semiconductor chip and the connection body with a resin layer made of an insulating resin in a state where the protruding portion of the lead of the lead frame is exposed;
(I) forming a plating film on the protruding portion of the lead exposed on the surface of the resin layer;
(J) The resin layer and the lead frame are cut vertically and horizontally, and the frame is removed to form a plurality of semiconductor devices in which the cut ends of the leads are exposed on the side surfaces of the sealing body formed by the resin layer. Process,
A method for manufacturing a semiconductor device, comprising:   37. The method of manufacturing a semiconductor device according to claim 36, wherein a protruding electrode is formed on the plating film exposed from the resin layer after the step (h). In the step (b), a connection plating film is formed on the surface of the lead connecting the connection body,
In the step (g), a wire is used as the connection body, one end of the wire is connected to the electrode, a middle portion of the wire is connected to the lead, and the wire is connected to the connection portion of the lead. 38. The method of manufacturing a semiconductor device according to claim 37, wherein the semiconductor device is cut. In the step (b), a connection plating film is formed on the surface of the lead connecting the connection body,
37. The method of manufacturing a semiconductor device according to claim 36, wherein, in the step (g), the electrodes and the leads respectively positioned in the openings of the tape are overlapped and connected via the connection body.   In the step (b), the lead is partially bent in one step, and the second surface of the lead on which the plating film is formed protrudes from the second surface of the other lead portion. 37. A method of manufacturing a semiconductor device according to claim 36, wherein:   In the step (b), the second surface of the lead is partially removed by etching so that the second surface of the lead on which the plating film is formed protrudes from the second surface of the other lead portion. 37. A method of manufacturing a semiconductor device according to claim 36. (A) preparing a semiconductor chip having a first surface having a plurality of electrodes and a second surface opposite to the first surface;
(B) a rectangular frame, a plurality of leads extending from the inside of the frame into the frame, a connecting portion provided at a predetermined portion of the frame and supported by some of the leads, and the connecting portion A product forming portion comprising a plurality of leads extending from the frame to the frame side, the semiconductor chip being stacked on the product forming portion, and external electrode terminals on the second surface of the leads are formed. Preparing a flat lead frame in which a plating film is provided on
(C) An insulating tape having an adhesive layer on both sides having a unit tape portion corresponding to the product forming portion, wherein the unit tape portion corresponds to a portion corresponding to the electrode of the semiconductor chip and the connecting portion. A step of preparing a tape having an opening in a portion to be
(D) bonding the tape to a first surface that is opposite to the second surface of the lead frame in a state in which a peripheral edge of the connection portion is exposed in the opening corresponding to the connection portion;
(E) removing the connecting part in the opening and separating the leads connected by the connecting part;
(F) a step of bonding the semiconductor chip to the tape through a first surface so that the electrode of the semiconductor chip is located in the opening;
(G) connecting each electrode located in the opening and a predetermined portion of the lead bonded to the tape with a conductive connector;
(H) a step of covering the lead frame, the semiconductor chip, and the connection body with a resin layer made of an insulating resin in a state where the plating film of the lead frame is exposed;
(I) Cutting the resin layer and the lead frame vertically and horizontally and removing the frame to form a plurality of semiconductor devices in which the cut ends of the leads are exposed on the side surfaces of the sealing body formed by the resin layer. Process,
A method for manufacturing a semiconductor device, comprising:   43. The method of manufacturing a semiconductor device according to claim 42, wherein a protruding electrode is formed on the plating film exposed from the resin layer after the step (h). In the step (b), a connection plating film is formed on the surface of the lead connecting the connection body,
In the step (g), a wire is used as the connection body, one end of the wire is connected to the electrode, a middle portion of the wire is connected to the lead, and the wire is connected to the connection portion of the lead. 43. The method of manufacturing a semiconductor device according to claim 42, wherein the semiconductor device is cut. In the step (b), a connection plating film is formed on the surface of the lead connecting the connection body,
43. The method of manufacturing a semiconductor device according to claim 42, wherein, in the step (g), the electrodes and the leads respectively positioned in the opening of the tape are overlapped and connected via the connection body.

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