JP4670236B2 - Display device and driving method thereof - Google Patents

Description

  The present invention relates to a display device and a driving method thereof, and in particular, an active matrix display device in which pixels including self-luminous elements (hereinafter referred to as “self-luminous elements”) as display elements are arranged in a matrix, and the same The present invention relates to a driving method.

  As a self-luminous element, there is, for example, an organic EL (electroluminescence) element that utilizes a phenomenon in which an organic thin film emits light when an electric field is applied. An organic EL display device using this organic EL element as a display element of a pixel has low power consumption because the organic EL element can obtain a luminance of several hundred nits with a driving voltage as low as 10 V or less, and is self-luminous. The liquid crystal display device does not require an illuminating device that is essential for the liquid crystal display device, can be easily reduced in weight and thickness, and the response speed of the organic EL element is as high as about several μs. Compared to a hold-type display device typified by a display device, there is a problem that an afterimage problem does not occur when displaying a moving image, and the display performance is excellent.

  Thus, in recent years, organic EL display devices with features such as low power consumption, easy weight reduction and thinning, and excellent display performance when displaying moving images have been particularly reduced in power consumption and weight. In addition, it is promising as a flat panel display suitable for use as a display device of a mobile terminal device represented by a mobile phone or a personal digital assistant (PDA) that is required to be thin. Among these organic EL display devices, in particular, active matrix organic EL display devices using a thin film transistor (TFT) having polycrystalline silicon as an active layer are actively developed as pixel drive elements.

  On the other hand, in a mobile device, a contact-type touch panel using a resistive thin film is generally used as a coordinate detection device, and is widely used as an information input means (for example, see Non-Patent Document 1).

Magazine "Mechatronics" Technical Research Committee, 1993, VOL18, No12, p. 36-37

  However, since the contact-type touch panel is a method for detecting a potential change at a contact point, it is impossible to detect two or more contact points. In addition, since a configuration in which a touch panel is disposed on the display surface is unavoidable, there is a problem that the thickness of the device is inevitably increased and the light emission luminance of the display unit is decreased.

  In recent years, mobile phones equipped with a CCD sensor or CMOS sensor and equipped with a camera function have been widely used, and mobile phones with a built-in fingerprint sensor for personal authentication have also appeared. However, since these sensors are not integrated with the image display unit, there is a problem that the mounting density of the device is increased.

  The present invention has been made in view of the above problems, and the object of the present invention is to capture image information without increasing the thickness of the device or reducing the light emission luminance of the display unit. An object of the present invention is to provide a display device and a driving method thereof.

  In order to achieve the above object, according to the present invention, there is provided a pixel array unit in which pixels including a light emitting circuit and a light receiving circuit are arranged in a matrix, and each pixel in the pixel array unit is connected to the light emitting circuit. In a display device that performs light emission control in units and performs light reception control in row units for the light receiving circuit of each pixel in the pixel array unit, light reception wired in columns for each pixel in the pixel array unit The light receiving signal output from the light receiving circuit through each of the signal lines is converted into a digital signal and output.

  Each pixel of the pixel array section includes a light emitting circuit and a light receiving circuit, and thus has a light receiving function in addition to an original light emitting function (display function). Then, the light receiving signal output from the light receiving circuit of each pixel to the light receiving signal line is converted into a digital signal and output to the outside, so that an image from the pixel array unit can be obtained without providing a CCD sensor or a CMOS sensor outside the display device. Information can be captured and output as digital data, or coordinate information can be captured from the pixel array portion and output as digital data without providing a touch panel.

  According to the present invention, image information can be captured without providing a CCD sensor or a CMOS sensor or a touch panel, and the captured image information can be output as digital data. A system can be configured at low cost without increasing the thickness or reducing the light emission luminance of the display unit.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 shows an outline of the configuration of a display device according to an embodiment of the present invention, for example, an active matrix organic EL display device in which pixels including organic EL elements that are self-luminous elements as display elements are arranged in a matrix. FIG.

  As is apparent from FIG. 1, the active matrix organic EL display device 10 according to this embodiment includes a pixel array in which a large number of pixels 11 including a light emitting circuit and a light receiving circuit (both not shown) are arranged in a matrix. And a light emission control unit 13, a light reception control unit 14, and an A / D (analog-digital) conversion unit 15 as peripheral drive circuits, for example, an A / D conversion unit 15. The peripheral drive circuit including the pixel array unit 12 is integrally formed on the same substrate (not shown) as the pixel array unit 12.

  The pixel array section 12 is provided with light emission control line groups 16-1 to 16-m and light emission control line groups 17-1 to 17-m for each row with respect to the arrangement of the pixels 11 in m rows and n columns. The video signal lines 18-1 to 18-n and the light receiving signal lines 19-1 to 19-n are wired for each column. As will be described later, each of the light emission control line groups 16-1 to 16-m includes, for example, first and second light emission control lines 16A and 16B, and one end of each of the light emission control line groups 16-1 to 16-m is connected to the light emission control unit 13. The light emission control line groups 17-1 to 17-m are also composed of, for example, first and second light reception control lines 17A and 17B, as will be described later, and one end thereof is connected to the light reception control unit 14.

  The light emission control unit 13 is mainly composed of a shift register, and should be driven to emit light by driving the first light emission control lines 16A-1 to 16A-m while sequentially scanning in a predetermined scanning cycle during the light emission period. The pixels 11 are sequentially selected in units of rows. A video signal is supplied to each pixel 11 in the row selected by the light emission control unit 13 from a video signal generation circuit (not shown) through video signal lines 18-1 to 18-n.

  The light reception control unit 14 is mainly composed of a shift register, and should be driven to receive light by scanning the first light reception control lines 17A-1 to 17A-m sequentially in a predetermined scanning cycle during the imaging period. The pixels 11 are sequentially selected in units of rows. A light reception signal is output from each pixel 11 in the row selected by the light reception control unit 14. This light reception signal is output to the outside of the pixel array section 12 through the light reception signal lines 19-1 to 19-n.

  The A / D conversion unit 15 includes n A / D conversion circuits 15-1 to 15-n connected to one ends of the light receiving signal lines 19-1 to 19-n, and each pixel 11 of the selected row. The analog light reception signals supplied through the light reception signal lines 19-1 to 19-n are converted into digital light reception signals # 1 to #n and output.

(Pixel circuit)
FIG. 2 is a circuit diagram illustrating an example of a circuit configuration of the pixel 11. The pixel circuit 20 according to this example has a light emitting circuit 22 and a light receiving circuit 23 including an organic EL element 21 that is a self-light emitting element. In the pixel circuit 20 according to this example, attention is paid to the fact that the organic EL element 21 which is a light emitting element functions as a light receiving element in the reverse bias state, and the organic EL element 21 is also used as the light receiving element of the light receiving circuit 23. ing.

  In addition to the organic EL element 21, the light emitting circuit 22 includes thin film transistors 221 to 224 and a storage capacitor 225 as drive elements. Incidentally, a thin film transistor (hereinafter referred to as “TFT”) has polycrystalline silicon as an active layer, and can be formed with a small element size for each pixel due to its high driving capability, which is advantageous for high definition of an organic EL display device. It is.

  The organic EL element 21 has a cathode connected to, for example, the ground. The TFT 221 is a video signal sampling transistor, which is composed of, for example, an N-channel transistor, and has a gate corresponding to the first light emission control line 16A (corresponding to each one of the light emission control line groups 16-1 to 16-m in FIG. 1). The sources are connected to the video signal lines 18 (corresponding to the data lines 18-1 to 18-n in FIG. 1), respectively. The TFT 222 is a driving transistor for the organic EL element 21 and is composed of, for example, a P-channel transistor, and has a gate connected to the drain of the TFT 221 and a source connected to the positive power supply VDD, for example.

  The TFT 223 is a mode switching transistor, which is composed of, for example, an N-channel transistor, and has a gate connected to the mode switching control line 24 and a drain connected to the drain of the TFT 222. The TFT 224 is a transistor for controlling the light emission period of the organic EL element 21 and is made of, for example, an N-channel transistor, and has a gate of each of the second light emission control lines 16B (light emission control line groups 16-1 to 16-m in FIG. 1). The drain is connected to the source of the TFT 223, and the source is connected to the anode of the organic EL element 21. The storage capacitor 225 is connected between the gate and source of the TFT 222.

  The light receiving circuit 23 has, for example, five N-channel TFTs 231 to 235, and is configured to use the organic EL element 21 as a light receiving element by putting the organic EL element 21 in a reverse bias state during the light receiving period. The TFT 231 is a light reception current control transistor of the organic EL element 21, and has a gate connected to the first light reception control line 17A (corresponding to each one of the light reception control line groups 17-1 to 17-m in FIG. 1) Are connected to the anode of the organic EL element 21, respectively. The TFT 232 is a canceling transistor, and has a gate connected to the second light receiving control line 17B (corresponding to the other one of the light receiving control line groups 17-1 to 17-m in FIG. 1) and a drain connected to the drain of the TFT 231. Each is connected, and a constant cancel voltage Vcan is applied to the source.

  The TFT 233 has a diode-connected configuration in which the gate and the drain are connected in common. The gate and the drain are connected to the common drain connection point of the TFTs 231 and 232, and the source is connected to the first bias power supply Vb1. The TFT 234 has a gate commonly connected to the gate and drain of the TFT 233, and constitutes a current mirror circuit 236 together with the TFT 233. The source of the TFT 234 is connected to the second bias power supply Vb2.

Here, the first bias power supply Vb1 is set so that the organic EL element 21 is in a reverse bias state when receiving light, that is, the anode voltage is lower than the cathode voltage. Specifically, in this example, since the cathode voltage Vk is at the ground level (0 [V]), it is set to a negative power supply voltage, for example, about −5 [V]. On the other hand, the second bias voltage Vb2 is set so that a bias voltage larger than that of the first bias power supply Vb1 can be applied to the organic EL element 21. Specifically, when Vb1 = −5 [V], Vb2 = −8 [V] is set.

  The current mirror circuit 236 is a kind of current amplification circuit for amplifying the light reception signal current of the organic EL element 21 and outputting it to the light reception signal line 19. Therefore, the current amplifier circuit is not limited to a current mirror configuration. The TFT 235 is a light reception signal control transistor, and has a gate connected to the first light reception control line 17A, a drain connected to the light reception signal line 19, and a source connected to the drain of the TFT 234.

(A / D conversion circuit)
FIG. 3 is a circuit diagram showing an example of the configuration of the i-column A / D conversion circuit 15-i of the A / D conversion unit 15.

  In FIG. 3, the circuit input terminal 151 is connected to one end of the light receiving signal line 19-i in the i column of the pixel array unit 12. The resistor R is connected between the circuit input terminal 151 and a DC power source having a predetermined read voltage Vread. When a current corresponding to the light reception signal of the pixel 11 flows through the resistor R, the potential of the node N11 is determined. Specifically, the potential of the node N11 is lower than the read voltage Vread by a voltage drop at the resistor R due to the light reception signal current (light reception signal voltage).

  The switch S1 is connected between the node N11 and the node N12, and selectively takes in (samples) the potential of the node N11, that is, the light reception signal voltage when turned on. The switch S3 has one end connected to the node N12, and selectively supplies the reference voltage Vref generated by the reference voltage generation circuit 152 to the node N12 when turned on. One end of the holding capacitor C1 is connected to the node N12 (the output end of the switch S1). The inverting amplifier 153 has an input terminal connected to the node N13 (the other end of the storage capacitor C1). Note that, instead of the reaction amplifier 153, an inverter with an amplification factor = 1 can be used. The switch S2 is connected between the node N13 and the node N14 (between the input and output terminals of the inverting amplifier 153).

  Here, the holding capacitor C1 functions to hold a potential difference between the potential of the node N11 and the operating point voltage Vop of the inverting amplifier 153. The switch S2 is short-circuited between the input and output terminals of the inverting amplifier 153 by being turned on when the operating point voltage of the inverting amplifier 153 is canceled. The latch circuit 154 is composed of, for example, a D-type flip-flop, is connected between the node N14 and the circuit output terminal 155, and latches the output of the inverting amplifier 153 in synchronization with a clock CK given from the outside. The latch output of the latch circuit 154 is output to the outside through the circuit output terminal 155. Note that the switches S1 to S3 are constituted by TFTs, for example.

  Next, the operation of the active matrix organic EL display device 10 according to the present embodiment having the above configuration will be described. FIG. 4 shows an outline of the operation during one frame period. As is apparent from the drawing, the video signal is first captured for all pixels (for one frame), and then the operation proceeds to a light receiving operation. The light receiving operation period is divided into three periods: a cancel signal output period, an imaging period, and a light receiving signal output period.

  First, the operation during the video signal capturing period will be described. In the pixel circuit 20 shown in FIG. 2, the TFT 221 is supplied with the write scanning signal WS from the light emission control unit 13 of FIG. 1 through the first light emission control line 16 </ b> A to the gate. Sig is sampled. The sampled video signal Sig is held by the holding capacitor 224 for one frame period. This video signal sampling operation is repeated in order from the first row to the m-th row under scanning by the light emission control unit 13, whereby the video signal is captured for all pixels.

  Note that switching between the light emission mode and the light reception mode is performed by the mode switching control signal mod given through the mode switching control line 24 in the pixel circuit 20 shown in FIG. That is, when the mode switching control signal mod is substantially at the VDD level (hereinafter referred to as “H” level), the light emission mode is set by turning on the TFT 223 in the light emission circuit 22 (conduction), and the mode When the switching control signal mod is substantially at the ground level (hereinafter referred to as “L” level), the light receiving mode is set by turning off the TFT 223 (non-conduction).

  Next, the operation in the light receiving operation period will be described with reference to the timing chart of FIG. FIG. 5 representatively shows the first pixel row # 1, and the operations of the other pixel rows # 2 to #m are basically the same.

  First, when the mode switching control signal mod becomes “L” level, the light emission mode is shifted to the light reception mode, and the light emission operation of the pixel 11 is stopped. In the cancel signal output period, the read scanning signal READ and the cancel control signal CANCEL supplied from the light receiving control unit 14 through the first and second light receiving control lines 17A and 17B are set to the “H” level only for one horizontal reading period. . Then, since the TFTs 231 and 232 are turned on, the light reception signal current of the organic EL element 21 can be read through the TFT 231 and the cancel voltage Vcan is supplied to the current mirror circuit 236 through the TFT 232.

  As a result, the light reception signal current determined by the cancel voltage Vcan is output from the light reception circuit 23 of each pixel 11 in the first row, and the corresponding A / D conversion circuit 15-is transmitted through the light reception signal lines 18-1 to 18-n. 1 to 15-n. The light reception signal current in the cancel signal output period does not depend on the light incident on the organic EL element 21 and becomes a current Ican including characteristic variations of the circuit elements of the current mirror circuit 236.

  Here, the circuit operation of the A / D conversion circuit 15-i in FIG. 3 in one horizontal reading period (cancellation signal output period) will be described with reference to the timing chart in FIG.

In the first certain period when the read scanning signal READ is in the “H” level state, the switches S1 and S2 of the A / D conversion circuit 15-i are turned on (closed) and the switch S3 is turned off (open). Thus, the terminal potential on the switch S1 side of the storage capacitor C1, that is, the potential of the node N12 becomes the voltage V1can determined by the voltage drop due to the resistor R and the current Ican. As a result, the potential of the input side node N13 of the inverting amplifier 153 becomes the operating point voltage Vop of the inverting amplifier 152 because the input / output terminal of the inverting amplifier 153 is short-circuited by the switch S2. At this time, the output of the inverting amplifier 153 becomes the “L” level.

  Subsequently, after the switches S1 and S2 are in the “L” level state, the switch S3 is turned on, whereby the reference voltage Vref is input to the holding capacitor C1 via the switch S3. The clock CK is given to 154. The operation of the A / D conversion circuit 15-i at this time is as follows.

First, the inter-terminal voltage Vcap of the capacitor C1 is
Vcap = V1can-Vop
It is. Here, when the reference voltage Vref is input, the input voltage Vuin of the inverting amplifier 153 can be expressed by the following equation by the potential holding operation of the holding capacitor C1.
Vuin = Vref− (V1can−Vop)

  When the reference voltage Vref is larger than the voltage V1can, the input voltage Vuin of the inverting amplifier 153 becomes larger than the operating point voltage Vop of the inverting amplifier 153, so that the output of the inverting amplifier 153 (that is, the input of the latch circuit 153) is Invert. Therefore, as shown in FIG. 6, when the reference voltage Vref output from the reference voltage generation circuit 152 is changed stepwise in the state where the switch S3 is on, the reference voltage Vref becomes higher than the voltage V1can. At this point, the output of the inverting amplifier 153 is inverted. Then, the output of the latch circuit 154, that is, the output OUT of the A / D conversion circuit 15-i is inverted in synchronization with the clock CK to become the “L” level. As a result, the pulse width Dc as shown in FIG. It becomes a single peak pulse.

  The pulse width Dc of the unimodal pulse is a data width corresponding to the current caused by the characteristic variation of the circuit elements of the current mirror circuit 236 in the light receiving circuit 23 of the pixel 11 in the first row. That is, the current resulting from the characteristic variation can be A / D converted as the data width Dc at the time of cancellation. Then, in an external system (not shown), the current mirror circuit 236 in the light receiving circuit 23 of the pixel 11 in the first row is measured by measuring the pulse width Dc of the unimodal pulse as the number of clocks CK within the pulse period. It is possible to detect a current due to the characteristic variation of the circuit elements. This operation is performed for each horizontal line (pixel row) every horizontal reading period, and A / D conversion data Dc at the time of canceling each pixel is stored in a memory (not shown) of the external system.

  After the cancellation signal output period, the imaging period starts. During the imaging period, the read scanning signal READ and the cancel control signal CANCEL are both at the “L” level. In this imaging period, the potential charged in the inter-terminal capacitance of the organic EL element 21 during the cancel signal output period is discharged by the light leakage current of the organic EL element 21, whereby light reception signal data (image data) can be acquired. . As an imaging period, a period of about 1 to 2 ms is usually required. After the imaging period ends, the process proceeds to a light reception signal output period.

  Next, the circuit operation of the A / D conversion circuit 15-i in FIG. 3 during the light reception signal output period will be described with reference to the timing chart in FIG.

  In the light receiving signal output period, unlike the cancel signal output period, only the read scanning signal READ is in the “H” level state, and the cancel control signal CANCEL is in the “L” level state. As a result, the received light signal current corresponding to the amount of incident light read from the organic EL element 21 through the TFT 231 is amplified by the current mirror circuit 236. As a result, a light receiving signal current corresponding to the image data captured in the imaging period is output from the light receiving circuit 23 of each pixel 11 in the first row. Then, A / D conversion is performed on the received light signal current by the A / D converter 15 to obtain received light signal data Dr.

  Here, it is assumed that the cancel voltage Vcan is set so that the light reception signal current at the time of cancellation is always larger than the light reception signal current at the time of reading the image data. Then, the A / D conversion data Dc at the time of cancellation corresponds to the variation of the light receiving circuit 23 of the pixel 11, and the A / D conversion data Dr at the time of reading the image data is image data including the variation of the light receiving circuit 23. Therefore, a value obtained by subtracting the A / D conversion data Dr at the time of image data reading from the A / D conversion data Dc at the time of cancellation finally becomes image data (imaging data) subjected to A / D conversion. Therefore, the image data can be obtained by subtracting the A / D conversion data Dr at the time of reading the image data from the A / D conversion data Dc at the time of cancellation stored in the memory of the external system and restoring the data to the memory.

  In the A / D conversion circuit 15-i (15-1 to 15-n) having the above configuration, the latch circuit 154 can easily change the cycle of the clock CK used for A / D conversion and the number of steps of the reference voltage Vref. It is possible to change the number of imaging gradations.

  In the A / D conversion circuit 15-i according to the present example, the reference voltage Vref is made variable in a stepped manner with a predetermined number of steps, and a latch circuit 154 is arranged at the subsequent stage of the inverting amplifier 153, and the latch circuit 154 is arranged. By latching the output of the inverting amplifier 153 in synchronization with the clock CK, the received light signal is A / D converted as gradation data. However, the reference voltage Vref is fixed, and the received light signal current of the organic EL element 21 is changed. It is also possible to adopt a configuration in which the received light signal current is converted into 1-bit digital data and output by comparing the voltage V1can and the reference voltage Vref. In the case of adopting such a configuration, the circuit configuration of the A / D conversion circuit can be simplified, which is useful when the organic EL display device has a function as a coordinate detection device, for example.

  When the operation of the light receiving signal output period, that is, the light receiving operation period is completed, the mode switching control signal mod becomes “H” level and the TFT 223 is turned on in the pixel circuit 20 of FIG. , And enters the light emission period in which the organic EL element 21 is driven to emit light based on the video signal captured at the beginning of one frame period. In this light emission period, the TFT 222 supplies a drive current corresponding to the signal level of the video signal Sig held in the holding capacitor 225 to the organic EL element 21 via the TFTs 223 and 224, and the organic EL element 21 is supplied to the video signal. Light is emitted at a luminance corresponding to the signal level of Sig. Thereby, an image is displayed.

  In this image display, if an image is displayed continuously until the end of one frame period, when displaying a moving image, pixels along the contour of the moving image are displayed until immediately before the frame is switched. In combination with the afterimage effect, the next frame is sensed as if an image is displayed on the contour portion. This becomes a so-called image blur at the time of moving image display and contributes to deterioration of image quality.

  The TFT 224 controls the light emission period of the organic EL element 21 based on the light emission control signal ONCNT given to the gate through the second light emission control line 16B, thereby eliminating the image blur at the time of moving image display. That is, when the light emission control signal ONCNT is at “H” level, the TFT 224 is turned on, and the organic EL element 21 is caused to emit light by continuing to drive the driving current supplied from the TFT 222 through the TFT 223 to the organic EL element 21. Then, when the light emission control signal ONCNT becomes “L” level, the TFT 224 is turned off, and the supply of the drive current to the organic EL element 21 is interrupted to turn off the organic EL element 21.

  Through the series of operations described above, the operations of the video signal capturing period, light receiving operation period (cancellation signal output period + imaging period + light receiving signal output period) and light emission period in one frame period are completed.

  As described above, in the organic EL display device 10 in which the pixels 11 including the light emitting circuit 22 and the light receiving circuit 23 are arranged in a matrix, the light receiving circuit 23 of each pixel 11 is connected to the light receiving signal lines 19-1 to 19-n. By converting the output light reception signals into digital light reception signals by the A / D conversion circuits 15-1 to 15-n and outputting them, the image can be obtained without providing a CCD sensor, a CMOS sensor, or a touch panel. In addition to being able to capture information, the captured image information can be output to the outside as digital data, so there is no need to increase the thickness of the device or decrease the light emission luminance of the display unit at a low cost. System can be configured.

  In particular, since the organic EL element 21 which is a light emitting element is used as a light receiving element by putting the organic EL element 21 in a reverse bias state, the number of elements constituting the pixel circuit 20 can be reduced. The configuration can be simplified, which is advantageous for miniaturization of the pixel 11.

  The light receiving circuit 23 includes a current amplifying circuit, for example, a current mirror circuit 236, which amplifies a current flowing through the organic EL element 21 at the time of light reception, that is, a light receiving signal current and outputs the amplified light to the light receiving signal lines 19-1 to 19-n Therefore, even if the light reception signal current flowing through the organic EL element 21 is weak, the light reception signal current can be reliably extracted and output as pixel information.

  In addition, in the light receiving circuit 23, a current corresponding to a certain cancel voltage Vcan is made to flow through the current mirror circuit 236 in addition to the light receiving signal current, so that the current mirror circuit 236 also rides the received light signal current. Therefore, the difference between the A / D conversion data of the current corresponding to the constant cancel voltage Vcan and the A / D conversion data of the received light signal current is calculated in the external system. This characteristic variation can be canceled by performing the calculation process. As a result, even if there is a difference in the characteristic variation caused by the circuit elements between the pixels 11, it is possible to obtain image data with very high image quality that is not affected by the individual pixel variation.

  The A / D conversion circuits 15-1 to 15-n basically have a comparison circuit configuration including three switches S1 to S3, a holding capacitor C1, a reference voltage generation circuit 152, an inverting amplifier 153, and a latch circuit 154. Since the A / D conversion circuits 15-1 to 15-n can be arranged for each pixel column of the pixel array unit 12 due to the simple configuration, these A / D conversion circuits 15-1 to 15-15. -N can be integrally formed on the same substrate as the pixel array unit 12 to form a panel. Further, by incorporating the A / D conversion circuits 15-1 to 15-n into the panel, the external system can be simplified. In addition, since the cycle of the clock CK used for A / D conversion and the number of steps of the reference voltage Vref are variable, the number of imaging gradations can be easily changed.

  In the above embodiment, the configuration in which the organic EL element 21 is also used as the light receiving element of the light receiving circuit 23 has been described as an example. However, a structure in which a dedicated light receiving element is provided in the light receiving circuit 23 may be employed. . As the light-receiving element, a so-called diode-connected photodiode in which the drain and gate of amorphous silicon or polycrystalline silicon TFT are connected, a PIN (positive intrinsic negative) diode, or the like can be used. As described above, by adopting a configuration in which the light receiving circuit 23 is provided with the dedicated light receiving element, it is not necessary to sequentially perform the light emitting operation and the light receiving operation, and both operations can be performed asynchronously.

  Further, in the above embodiment, in one frame period in which each operation of the light emitting circuit 22 and the light receiving circuit 23 of each pixel 11 is executed in units of rows, first, a video signal is captured, and then each operation in the light receiving operation period is executed. Although the case of shifting to the later light emission period has been described as an example, the order of the operations is merely an example, and the present invention is not limited to this. That is, immediately after the video signal is captured, the operation of the light emission period is started, and thereafter, the operation proceeds to the light reception operation period, or each operation of the light reception operation period is executed first, and then the video signal is captured and the light emission period is started. It is also possible to make a transition.

  Furthermore, in the above-described embodiment, the A / D conversion circuits 15-1 to 15-n are exemplified by a case where a circuit having a comparison circuit configuration that compares the voltage V1can corresponding to the light reception signal current with the reference voltage Vref is used. Although described above, the present invention is not limited to this, and any circuit system may be used as long as the circuit configuration can be arranged for each pixel column of the pixel array unit 12.

  Since the display device according to the present invention can be used not only as a screen display unit but also as a coordinate detection device or an imaging device, it can be mounted on a mobile device as a screen display unit and coordinate detection device. In addition, it can be mounted as a screen display unit and an imaging device in a terminal device such as a mobile phone having a camera function.

1 is a block diagram illustrating an outline of a configuration of an active matrix organic EL display device according to an embodiment of the present invention. It is a circuit diagram which shows an example of the circuit structure of a pixel. It is a circuit diagram which shows an example of a structure of an A / D conversion circuit. It is a figure which shows the outline of the operation | movement of 1 frame period. It is a timing chart with which it uses for operation | movement description of a light reception operation | movement period. It is a timing chart with which it uses for description of operation | movement of a cancellation signal output period. It is a timing chart used for operation | movement description of a light reception signal output period.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Active matrix type organic EL display device, 11 ... Pixel, 12 ... Pixel array part, 13 ... Light emission control part, 14 ... Light reception control part, 15 ... A / D conversion part, 15-1 to 15-n ... A / D conversion circuit, 16-1 to 16-m ... light emission control line group, 17-1 to 17-n ... light reception control line group, 18-1 to 18-n ... video signal line, 19-1 to 19-n ... Light receiving signal line, 20... Pixel circuit, 21... Organic EL element, 22.

Claims (8)

A pixel array unit in which pixels including a light emitting circuit that emits a light emitting element in response to a video signal and a light receiving circuit that outputs a light receiving signal are arranged in a matrix;
In one frame period, the display device operates the light emitting circuit and the light receiving circuit, respectively.
One frame period includes a video signal capture period, a cancel signal output period, an imaging period, a light reception signal output period, and a light emission period in that order,
The light emitting circuit includes:
A light emitting device having a cathode connected to a reference power source;
A driving transistor having a source connected to a positive power source and supplying a driving current to the light emitting element;
A storage capacitor connected between the gate and source of the driving transistor;
A sampling transistor whose source is connected to the video signal line and whose gate is connected to the light emission control line;
as well as,
A mode switching transistor that is connected between an anode of the light emitting element and a drain of the driving transistor and that switches between a light emitting mode and a light receiving mode;
In the video signal capturing period, the video signal supplied from the video signal line is sampled by the sampling transistor and held in the holding capacitor,
In the light emission period, the mode switching transistor switches to the light emission mode, and based on the video signal held in the storage capacitor, the current to be supplied to the light emitting element is controlled by the driving transistor to cause the light emitting element to emit light,
The light receiving circuit is
Current amplification circuit,
A first transistor having a source connected to the anode of the light emitting element, a drain connected to an input terminal of the current amplifier circuit, and a gate connected to a first light receiving control line ;
as well as,
A second transistor having a drain connected to the drain of the first transistor, a gate connected to a second light receiving control line , and a predetermined fixed voltage applied to the source;
In the light receiving operation period including the cancel signal output period, the imaging period, and the light receiving signal output period, the mode switching transistor switches to the light receiving mode.
In the cancel signal output period, the second transistor and the first transistor are turned on and the fixed voltage is supplied to the current amplifier circuit and the light emitting element, so that the current amplifier circuit supplies the fixed voltage to the current amplifier circuit. Output current including the characteristic variation of the circuit elements
In the imaging period, imaging is performed by the light emitting element to which a reverse bias is applied by turning off the second transistor and the first transistor,
A display device that outputs a current corresponding to the amount of light received by the light emitting element from the current amplification circuit by turning on the first transistor during the light reception signal output period. An analog-to-digital converter that converts a current output from the current amplification circuit during the cancellation signal output period and a current output from the current amplification circuit during the light reception signal output period into a digital signal;
With an external system,
The external system is:
Conversion data based on a current corresponding to the fixed voltage output from the analog-digital conversion unit in the cancel signal output period, and the light emitting element output from the analog-digital conversion unit in the light reception signal output period The display device according to claim 1, wherein a difference from conversion data based on a current corresponding to the amount of received light is taken. 3. The display device according to claim 1, wherein an anode voltage of the light emitting element is set to be lower than a cathode voltage during the cancel signal output period and the light reception signal output period. The analog-digital converter is
First switch means for taking in the voltage of the light receiving element generated by the current flowing in the light receiving element of the light receiving circuit;
A holding capacitor having one end connected to the output end of the first switch;
An inverting amplifier having an input terminal connected to the other end of the storage capacitor;
Second switch means for selectively short-circuiting the input / output terminals of the inverting amplifier;
Third switch means for applying a variable reference voltage to one end of the holding capacitor;
When the first switch means and the second switch means are turned on, and the third switch means is turned off, the voltage across the holding capacitor is set,
Next, when the first switch means and the second switch means are turned off and the third switch means is turned on, the reference voltage is supplied to one end of the storage capacitor. The display device according to any one of claims 1 to 3. The analog-digital conversion means includes
A latch circuit that latches the output of the inverting amplifier in synchronization with a clock;
The display device according to claim 4, wherein the reference voltage is variable stepwise with a predetermined number of steps. The display device according to claim 5, wherein a cycle of the clock and a step number of the reference voltage are variable. A pixel array unit in which pixels including a light emitting circuit that emits light from a light emitting element according to a video signal and a light receiving circuit that outputs a light receiving signal are arranged in a matrix;
In one frame period, each of the light emitting circuit and the light receiving circuit is operated,
One frame period includes a video signal capture period, a cancel signal output period, an imaging period, a light reception signal output period, and a light emission period in that order,
The light emitting circuit includes:
A light emitting device having a cathode connected to a reference power source;
A driving transistor having a source connected to a positive power source and supplying a driving current to the light emitting element;
A storage capacitor connected between the gate and source of the driving transistor;
A sampling transistor whose source is connected to the video signal line and whose gate is connected to the light emission control line;
as well as,
A mode switching transistor that is connected between an anode of the light emitting element and a drain of the driving transistor and that switches between a light emitting mode and a light receiving mode;
The light receiving circuit is
Current amplification circuit,
A first transistor having a source connected to the anode of the light emitting element, a drain connected to an input terminal of the current amplifier circuit, and a gate connected to a first light receiving control line ;
as well as,
A driving method of a display device including a second transistor having a drain connected to a drain of the first transistor, a gate connected to a second light receiving control line , and a predetermined fixed voltage applied to the source,
The light emitting circuit includes:
In the video signal capturing period, the video signal supplied from the video signal line is sampled by the sampling transistor and held in the holding capacitor,
In the light emission period, the mode switching transistor switches to the light emission mode, and based on the video signal held in the storage capacitor, the driving transistor controls the current passed through the light emitting element to cause the light emitting element to emit light,
The light receiving circuit is
In the light receiving operation period including the cancel signal output period, the imaging period, and the light receiving signal output period, the mode switching transistor switches to the light receiving mode.
In the cancel signal output period, the second transistor and the first transistor are turned on and the fixed voltage is supplied to the current amplifier circuit and the light emitting element, so that the current amplifier circuit is connected to the current amplifier circuit. Output current including the characteristic variation of the circuit elements
In the imaging period, imaging is performed by the light emitting element to which a reverse bias is applied by turning off the second transistor and the first transistor,
A method for driving a display device, wherein a current corresponding to an amount of light received by the light emitting element is output from the current amplification circuit by turning on the first transistor in the light reception signal output period. An analog-to-digital converter that converts a current output from the current amplification circuit during the cancellation signal output period and a current output from the current amplification circuit during the light reception signal output period into a digital signal;
With an external system,
The external system is:
Conversion data based on a current corresponding to the fixed voltage output from the analog-digital conversion unit in the cancel signal output period, and the light emitting element output from the analog-digital conversion unit in the light reception signal output period The display device driving method according to claim 7, wherein a difference from conversion data based on a current corresponding to the amount of received light is calculated.

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