JP4635836B2 - シート状電子回路モジュール - Google Patents
シート状電子回路モジュール Download PDFInfo
- Publication number
- JP4635836B2 JP4635836B2 JP2005328380A JP2005328380A JP4635836B2 JP 4635836 B2 JP4635836 B2 JP 4635836B2 JP 2005328380 A JP2005328380 A JP 2005328380A JP 2005328380 A JP2005328380 A JP 2005328380A JP 4635836 B2 JP4635836 B2 JP 4635836B2
- Authority
- JP
- Japan
- Prior art keywords
- insulating resin
- sheet
- resin layer
- wiring board
- semiconductor chips
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
2 配線導体
2a,32,42 電極端子
3 外部接続端子
4 貫通導体
5,6,33,43 半導体チップ
7,34,44 バンプ
8,14,16,17 第1の絶縁性樹脂層
9,15,18,19 第2の絶縁性樹脂層
10 チップ部品
11 はんだ
12 モールド樹脂
31 実装基板
35 第1の樹脂コート
36 第2の樹脂コート
45 樹脂シート
Claims (3)
- 少なくとも一方の面に配線導体が形成され、前記一方の面に対向する他方の面に前記配線導体に接続される外部接続端子が形成された配線基板と、
前記一方の面に実装される複数の半導体チップと、
前記半導体チップの電極パッドと前記配線導体に設けられた電極端子とを電気的に接続するとともに前記半導体チップと前記配線基板とを接着固定する第1の絶縁性樹脂シートと、
複数の前記半導体チップを包含する領域に対応する前記他方の面の領域上に形成された第2の絶縁性樹脂シートとを備え、
前記第1の絶縁性樹脂シートは、前記一方の面の複数の前記半導体チップを包含する領域でかつ前記配線基板の前記外部接続端子が形成されていない方の端部から空間を挟んだ内側の箇所から前記配線基板の前記外部接続端子が形成されている方の端部まで延在して形成され、かつ前記第2の絶縁性樹脂シートは前記第1の絶縁性樹脂シートと同一量であり、前記他方の面の前記配線基板の前記外部接続端が形成されていない方の端部から前記外部接続端子の前記他方の面の中心部側の端部まで延在して形成することを特徴とするシート状電子回路モジュール。 - 前記第2の絶縁性樹脂シートが、前記第1の絶縁性樹脂シートと同一材料からなり、かつ、それらの外形状を同じにしていることを特徴とする請求項1に記載のシート状電子回路モジュール。
- 前記第1の絶縁性樹脂シートと前記第2の絶縁性樹脂シートとは、同一形状のシート状の材料を用いることを特徴とする請求項1または2に記載のシート状電子回路モジュール。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005328380A JP4635836B2 (ja) | 2005-11-14 | 2005-11-14 | シート状電子回路モジュール |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005328380A JP4635836B2 (ja) | 2005-11-14 | 2005-11-14 | シート状電子回路モジュール |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2007134618A JP2007134618A (ja) | 2007-05-31 |
JP2007134618A5 JP2007134618A5 (ja) | 2008-09-25 |
JP4635836B2 true JP4635836B2 (ja) | 2011-02-23 |
Family
ID=38156003
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005328380A Expired - Fee Related JP4635836B2 (ja) | 2005-11-14 | 2005-11-14 | シート状電子回路モジュール |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4635836B2 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102034798B (zh) * | 2009-09-28 | 2013-09-04 | 日月光半导体制造股份有限公司 | 封装结构以及封装制程 |
US10840203B2 (en) * | 2016-05-06 | 2020-11-17 | Smoltek Ab | Assembly platform |
CN106793707B (zh) * | 2017-01-17 | 2023-03-14 | 扬州扬杰电子科技股份有限公司 | 一种二极管模块的框架及其加工方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003347483A (ja) * | 2002-05-28 | 2003-12-05 | Matsushita Electric Ind Co Ltd | 回路部品モジュールおよびその製造方法 |
JP2004363406A (ja) * | 2003-06-06 | 2004-12-24 | Honda Motor Co Ltd | 樹脂封止電子部品ユニット及びその製造方法 |
-
2005
- 2005-11-14 JP JP2005328380A patent/JP4635836B2/ja not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003347483A (ja) * | 2002-05-28 | 2003-12-05 | Matsushita Electric Ind Co Ltd | 回路部品モジュールおよびその製造方法 |
JP2004363406A (ja) * | 2003-06-06 | 2004-12-24 | Honda Motor Co Ltd | 樹脂封止電子部品ユニット及びその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2007134618A (ja) | 2007-05-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100408616B1 (ko) | 반도체 장치, 전자 기기의 제조 방법, 전자 기기 및 휴대정보 단말 | |
JP5192825B2 (ja) | 半導体装置およびその製造方法、ならびに積層半導体装置の製造方法 | |
JP4504798B2 (ja) | 多段構成半導体モジュール | |
JP2790122B2 (ja) | 積層回路基板 | |
US6022761A (en) | Method for coupling substrates and structure | |
US6846699B2 (en) | Semiconductor device and method of manufacture thereof, circuit board, and electronic instrument | |
US8599571B2 (en) | Memory card | |
CN101278383B (zh) | 电子电路装置及其制造方法 | |
JP2006303114A (ja) | 多段構成半導体モジュールおよびその製造方法 | |
JP2004362602A (ja) | Rfidタグ | |
JP2006344917A (ja) | 半導体装置、積層型半導体装置、および半導体装置の製造方法 | |
JP2012028408A (ja) | ソケット及びその製造方法 | |
JP5980566B2 (ja) | 半導体装置及びその製造方法 | |
US20080248611A1 (en) | Manufacturing method of semiconductor device | |
KR20170016550A (ko) | 반도체 패키지의 제조 방법 | |
JP2002270717A (ja) | 半導体装置 | |
KR20120058118A (ko) | 적층 패키지의 제조 방법, 및 이에 의하여 제조된 적층 패키지의 실장 방법 | |
JP4360240B2 (ja) | 半導体装置と半導体装置用多層基板 | |
JP4635836B2 (ja) | シート状電子回路モジュール | |
JP2005340393A (ja) | 小型実装モジュール及びその製造方法 | |
KR20010063682A (ko) | 플립 칩 본딩 기술을 이용한 반도체 칩 실장 방법 | |
KR100769204B1 (ko) | 반도체 패키지 및 그 제조방법 | |
JPH07226455A (ja) | 半導体パッケージおよびその製造方法 | |
WO2001033623A1 (en) | Semiconductor device and its manufacturing method | |
KR101392765B1 (ko) | 반도체 패키지 및 그 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20080807 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20080807 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20090701 |
|
RD01 | Notification of change of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7421 Effective date: 20091126 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20100202 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100309 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20100427 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100527 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20100622 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100705 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20101026 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20101108 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20131203 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20131203 Year of fee payment: 3 |
|
LAPS | Cancellation because of no payment of annual fees |