JP4570607B2 - High frequency module package - Google Patents

Description

  The present invention relates to a high-frequency module package, and more particularly to a high-frequency module package with improved transmission characteristics.

  2. Description of the Related Art Conventionally, a dielectric package having a laminated structure that allows high-frequency signals to pass is known.

  FIG. 15 is a cross-sectional view of a dielectric package having a stacked structure. For example, a structure as shown in FIG. 15 is considered as a wiring (RF signal line) structure through which a signal having a frequency of about 5 GHz or less passes.

  Referring to FIG. 15, the dielectric package includes first to fifth conductive pattern layers and dielectric layers interposed between the layers.

  16 to 20 are plan views of the conductor patterns of the respective layers of the fifth layer to the first layer. 16 to 20, the conductor portion is shown by hatching.

  The first layer constituting the lowermost part of the conductor pattern layer is called a package back surface pattern layer (6), and the wiring structure is electrically connected to the outside by this pattern layer.

  The fourth layer from the bottom of the conductor pattern layer is called a chip connecting pattern layer (5) and is a layer to which chips are directly connected. In the fourth layer and the first layer, a chip connection RF signal line (2) and a package back surface RF signal line (4) are provided, respectively. The chip connection RF signal line (2) and the package back surface RF signal line (4) are electrically connected by an RF signal line via (3) penetrating from the first layer to the fourth layer.

  A GND (ground) pattern (1) is provided in the first layer, the fourth layer, and the fifth layer, and each is electrically connected by a GND via (7).

  However, when the frequency is further increased, for example, when a signal of about 10 GHz or more is passed, there is a problem that the transmission characteristics are deteriorated in the package configured as described above.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a high-frequency module package that can obtain good transmission characteristics even when the frequency is increased.

  The following factors can be considered as causes of the deterioration of the transmission characteristics when the frequency increases.

Capacitive coupling between the connection portion of the chip connection RF signal line (2) and the RF signal line via (3) and the GND pattern (1) around the connection portion. RF signal line via the package back surface (4) and the RF signal line via. Capacitive coupling between the connection portion to (3) and the surrounding GND pattern (1). Connection portion between the RF signal line for chip connection (2) and the RF signal line via (3), and a pattern layer for chip connection. Capacitive coupling with the GND pattern (1) in the upper layer (fifth layer) than (5)-Resonance of the GND via (7) connecting the chip connecting pattern layer (5) and the package back surface pattern layer (6) 15 to 20, the chip connecting RF signal line (2) constitutes a coplanar line structure or a grounded coplanar line structure having a characteristic impedance of 50Ω, for example. Further, the RF signal line via (3) connecting the chip connecting pattern layer (5) and the package back surface pattern layer (6) is arranged by arranging the GND via (7) around the RF signal line via (3). Similarly, the characteristic impedance is designed to be 50Ω, for example.

  However, in the conventional structure shown in FIGS. 15 to 20, the coupling portion between the chip connecting RF signal line (2) and the RF signal line via (3) has a large capacitive coupling with the surrounding GND pattern (1). It has a structure. This unnecessary capacitance causes mismatching in characteristic impedance, resulting in degradation of transmission characteristics.

  The same applies to the capacitive coupling between the connection part of the RF signal line (4) and the RF signal line via (3) on the back surface of the package and the surrounding GND pattern (1). That is, in FIG. 20, the package back surface RF signal line (4) forms a coplanar line structure or a grounded coplanar line structure with a characteristic impedance of 50Ω, for example. The RF signal line via (3) connecting the chip connection RF signal line (2) and the package back surface RF signal line (4) has the GND via (7) disposed around the RF signal line via (3). Thus, the characteristic impedance is similarly designed to be 50Ω, for example.

  However, in the conventional structure shown in FIG. 20, the capacitive coupling between the connection portion of the RF signal line (4) and the RF signal line via (3) on the back surface of the package and the GND pattern (1) around it is large. Unnecessary capacitance causes mismatching of characteristic impedance, and transmission characteristics deteriorate.

  Further, the connection portion of the RF signal line for chip connection (2) and the RF signal line via (3), and the GND pattern (1) in the layer above the chip connection pattern layer (5) (for example, the fifth layer in FIG. 15). Similarly, because of the large capacitive coupling structure, there is a problem that unnecessary capacitance causes mismatching in characteristic impedance and transmission characteristics deteriorate.

  Further, regarding the GND via (7) connecting the chip connecting pattern layer (5) and the package back surface pattern layer (6), in the conventional structure shown in FIGS. 15 to 20, when the frequency becomes higher, There is a problem that resonance occurs when the via length of the GND via (7) connecting the chip connecting pattern layer (5) and the package back surface pattern layer (6) is approximately equal to λ / 2 (λ: wavelength). Resonance causes a problem that a signal having a specific frequency does not pass (a singular point is generated in a specific portion of the signal).

In order to solve the above problems, the present invention has the following configuration.
In other words, according to one aspect of the present invention, a high frequency module package includes a high frequency module in which a chip connecting pattern layer and a package back surface pattern layer of a dielectric package having a laminated structure are connected to an RF signal line and a GND respectively by vias. The module package is characterized in that the RF signal line via for connecting the RF signal line of the chip connecting pattern layer and the RF signal line of the package back surface pattern layer is shifted in two or more stages .

  Preferably, the high frequency module package is characterized in that when the wavelength of the signal flowing through the RF signal line is λ, the distance between the GND patterns of each layer is λ / 2 or less.

[First Embodiment]
FIG. 1 is a cross-sectional view of a dielectric package having a laminated structure according to the first embodiment of the present invention, and corresponds to FIG. 2 to 6 are diagrams in which the conductor patterns of the respective layers are seen in a plan view. 2 to 6, the conductor portion is indicated by hatching.

  In the following, portions of the dielectric package in the present embodiment that are different from the prior art will be described.

  First, referring to FIG. 1, in the present embodiment, the GND pattern (1) on the right side of the fourth layer (chip connection pattern layer (5)) is deleted. That is, comparing the structure of the conventional example of FIG. 17 and the structure of the present embodiment of FIG. 3, in this embodiment, the connection of the RF signal line for chip connection (2) and the RF signal line via (3) is connected. In order to reduce the capacitance between the portion and the surrounding GND pattern (1), the GND pattern around the connection portion of the chip connecting RF signal line (2) and the RF signal line via (3) is deleted. More specifically, as shown in FIG. 3, the chip connecting RF signal line (2) has a shape in which the pattern becomes narrower toward the RF signal line via (3), and a portion where no conductor portion is formed ( The portion shown in white in the figure becomes thicker as it proceeds from the direction in which the chip connecting RF signal line (2) exists to the direction in which the RF signal line via (3) exists.

Further, the GND pattern (1) in the right part of the RF signal line via (3) is deleted.
4 and 5, in the third layer and the second layer, the GND pattern (1) for connecting the four GND vias (7) is formed in a planar shape.

  Further, as shown in FIG. 6, in order to reduce the capacitance between the connection portion of the package back surface RF signal line (4) and the RF signal line via (3) and the surrounding GND pattern (1), The GND pattern (1) around the connection portion of the RF signal line (4) and the RF signal line via (3) is deleted. Thereby, also in the first layer, the distance from the RF signal line via (3) to the surrounding GND pattern (1) is long.

  In this manner, in this embodiment, unnecessary capacity in the package can be reduced. As a result, it is possible to prevent deterioration of transmission characteristics due to characteristic impedance mismatch.

[Second Embodiment]
FIG. 7 is a cross-sectional view of a dielectric package having a laminated structure according to the second embodiment of the present invention.

  The dielectric package in the present embodiment is different from the dielectric package in the first embodiment in that the chip connection RF signal line (2) and the RF signal line via (3) are connected to each other and the chip connection pattern. In order to reduce the capacity of the GND pattern (1) above the layer (5), the chip connection pattern layer (5) and the GND pattern (1) above the chip connection pattern layer (5) The distance is increased, and the unnecessary capacitance in this portion is reduced to such an extent that no mismatch in characteristic impedance occurs.

  Thereby, in the present embodiment, the unnecessary capacity in the package can be further reduced as compared with the first embodiment. Then, it is possible to prevent deterioration of transmission characteristics due to characteristic impedance mismatch.

[Third Embodiment]
FIG. 8 is a cross-sectional view of a dielectric package having a laminated structure according to the third embodiment of the present invention, and corresponds to FIG. Moreover, FIGS. 9-13 is the figure which looked at the conductor pattern of each layer planarly. 9 to 13, the conductor portion is shown by hatching.

  The dielectric package in the present embodiment is different from the dielectric package in the first embodiment in that the RF signal line via (3) causes a chip connection pattern layer (5) and an intermediate layer (chip connection pattern layer). Connect the RF signal line (10) (see FIG. 11) of the lower layer of (5), which is the third layer in the example of FIG. 8 from the position facing the air of the pattern layer for chip connection (5). It is a point. Further, the RF signal line (10) of the mediation layer and the package back surface pattern layer (6) are connected by vias. As a result, the package according to the present embodiment has a structure in which vias are shifted by two or more stages as shown in FIG. As a result, the distance between the RF signal line for chip connection (2) and the GND pattern (1) above the chip connection pattern layer (5) is increased. It can be made small enough not to occur. Thereby, deterioration of transmission characteristics can be prevented.

  In the above embodiment, the via is shifted to two stages, but may be shifted to two or more stages.

  Furthermore, in the above-described embodiment, as a countermeasure against resonance of the GND via (7) connecting the chip connecting pattern layer (5) and the package back surface pattern layer (6), the distance between the GND patterns of each layer is λ / 2 or less. It is desirable to install the GND pattern so that the wavelength of the signal flowing through the RF signal line is λ.

FIG. 14 is a diagram for explaining an effect in the third embodiment.
In this graph, the horizontal axis indicates the frequency of the signal flowing through the package, and the vertical axis indicates reflection. In the graph, the solid line indicates the characteristic when the via has a two-stage structure as in the third embodiment, and the dotted line indicates the characteristic when the via has a one-stage structure as in the first embodiment. ing.

  As shown in the figure, it can be seen that the two-stage via has an effect of suppressing reflection in the high frequency region.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

It is sectional drawing of the semiconductor package in the 1st Embodiment of this invention. It is the figure which looked at the conductor pattern of the 5th layer of the semiconductor package of FIG. 1 planarly. It is the figure which looked at the conductor pattern of the 4th layer of the semiconductor package of FIG. 1 planarly. It is the figure which looked at the conductor pattern of the 3rd layer of the semiconductor package of FIG. 1 planarly. It is the figure which looked at the conductor pattern of the 2nd layer of the semiconductor package of FIG. 1 planarly. It is the figure which looked at the conductor pattern of the 1st layer of the semiconductor package of FIG. 1 planarly. It is sectional drawing of the semiconductor package in the 2nd Embodiment of this invention. It is sectional drawing of the semiconductor package in the 3rd Embodiment of this invention. It is the figure which looked at the conductor pattern of the 5th layer of the semiconductor package of FIG. 8 planarly. It is the figure which looked at the conductor pattern of the 4th layer of the semiconductor package of FIG. 8 planarly. It is the figure which looked at the conductor pattern of the 3rd layer of the semiconductor package of FIG. 8 planarly. It is the figure which looked at the conductor pattern of the 2nd layer of the semiconductor package of FIG. 8 planarly. It is the figure which looked at the conductor pattern of the 1st layer of the semiconductor package of FIG. 8 planarly. It is a figure which shows the effect in 3rd Embodiment. It is sectional drawing of the semiconductor package in a prior art. It is the figure which looked at the conductor pattern of the 5th layer of the semiconductor package of FIG. 15 planarly. It is the figure which looked at the conductor pattern of the 4th layer of the semiconductor package of FIG. 15 planarly. It is the figure which looked at the conductor pattern of the 3rd layer of the semiconductor package of FIG. 15 planarly. It is the figure which looked at the conductor pattern of the 2nd layer of the semiconductor package of FIG. 15 planarly. It is the figure which looked at the conductor pattern of the 1st layer of the semiconductor package of FIG. 15 planarly.

Explanation of symbols

  1 GND pattern, 2 chip connection RF signal line, 3 RF signal line via, 4 package back surface RF signal line, 5 chip connection pattern layer, 6 package back surface pattern layer, 7 GND via, 10 mediation layer RF signal line.

Claims (2)

A high-frequency module package in which a chip connection pattern layer and a package back surface pattern layer of a dielectric package having a laminated structure are connected to an RF signal line and a GND respectively by vias,
A package for a high frequency module comprising a structure in which RF signal line vias for connecting an RF signal line of a chip connecting pattern layer and an RF signal line of a package back surface pattern layer are shifted to two or more stages . 2. The high-frequency module according to claim 1, wherein when the wavelength of a signal flowing through the RF signal line is λ, the distance between the GND patterns of the respective layers is λ / 2 or less. For package.

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