JP4286497B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present invention relates to a semiconductor device.Regarding the manufacturing method ofMore particularly, the present invention relates to a technique useful for easily handling a semiconductor substrate such as a thinned silicon wafer in manufacturing a semiconductor device such as an LSI chip.
[0002]
[Prior art]
Conventionally, a silicon wafer used as a substrate in the manufacture of a semiconductor device has been relatively thick with a thickness of about 200 μm or more, so its handling (formation of a metal layer by plating, sputtering, vapor deposition, etc., each chip unit) (Such as “dicing”) is also relatively easy, and when it is used for a specific application (such as a silicon chip having an antenna effect), the chip has a shielding function. Processing with a metal layer formed on the back surface of the silicon wafer was also possible.
[0003]
On the other hand, with recent demands for higher density and thinner semiconductor devices (devices), various methods have been proposed to meet this demand. As one of the methods, for example, for each region to be divided as each device of the silicon wafer, a hole is drilled at a required depth, and the hole is filled with a conductor by plating or the like. Further, on the surface of the silicon wafer, After forming a desired device pattern (including a circuit pattern, a wiring pattern, etc.) so as to be electrically connected to the conductor, the device pattern is covered with an insulating film made of polyimide resin, etc. The back surface is polished by a back grinding method or the like, and the wafer is thinned to a predetermined thickness (about 50 μm). On the other hand, the conductor is exposed, and then the wafer is diced into individual chips. There is a way to do it. In this method, external connection terminals such as metal bumps are bonded to the back surface (surface on which the conductor is exposed) of the silicon wafer before dicing, or the device has a shielding function. In addition, a metal layer is formed on the back surface of the silicon wafer.
[0004]
Further, when dicing, mechanical means such as a dicer is usually used.
[0005]
[Problems to be solved by the invention]
As described above, since the thickness of the conventional silicon wafer was relatively large, the handling thereof was relatively easy. However, in accordance with the recent demand for thinning, a process for thinning the silicon wafer is performed. It is technically difficult to handle the thinned silicon wafer as it is. This is because cracks may occur during the handling of the thinned silicon wafer, or the silicon wafer may be warped in some cases.
[0006]
That is, there is a problem that it is very difficult to handle the thinned silicon wafer without damaging it (formation of a metal layer by plating or the like, dicing for each chip).
[0007]
In addition, since dicing is performed by mechanical means such as a dicer in the conventional technology, for example, when manufacturing a micro device such as a microchip, a dicing interval between devices on the silicon wafer is very narrow. For this reason, it takes a considerable amount of time to complete dicing and leads to an increase in cost, which is not realistic.
[0008]
In this case, if the thickness of the silicon wafer is relatively large, there is a disadvantage that the time required for dicing is further increased by that amount. On the other hand, if the silicon wafer is thinned to a predetermined thickness, dicing is performed. During this process, the silicon wafer may be cracked or broken due to the mechanical shock during the process. Therefore, the dicing requires a careful attention and is technically difficult.
[0009]
SUMMARY OF THE INVENTION In view of the above-described problems in the prior art, an object of the present invention is to make it easy to handle a thinned semiconductor substrate in manufacturing a semiconductor device intended for high density and thinning, and the semiconductor The purpose is to enable dicing of the substrate in a short time.
[0010]
[Means for Solving the Problems]
  In order to solve the above problems of the prior art, according to one aspect of the present invention,Thinned to a predetermined thicknessA semiconductor substrate with a protective film having a protective film attached to the surface of each side of the semiconductor substrate where each element forming region to be divided as a semiconductor device is defined is opposite to the side to which the protective film is attached. Expose only the side surfaceTo be airtight sealed from the outsideA step of fixing and holding to the jig; a step of forming a metal layer on the entire exposed surface of the semiconductor substrate with a protective film fixed and held by the jig; and each element of the metal layer by laser. A step of removing a portion corresponding to the boundary portion that divides the formation region, and a portion where the metal layer is removed by dry etching or wet etching using the metal layer from which the portion corresponding to the boundary portion is removed as a mask And a step of dividing the semiconductor substrate into each semiconductor device so as to include one element formation region.
[0011]
  According to the method for manufacturing a semiconductor device according to this embodiment,Thinned to a predetermined thicknessHandling of semiconductor substrates (backsidePlating etc.Metal layer formation and each semiconductor device (chip) unitDividing (dicing)Etc.)ThatA semiconductor substrate with a protective film in which the surface of the semiconductor substrate on which the element formation regions are defined is covered with a protective film, So that only the back side (the side opposite to the side where the protective film is attached) is exposed and hermetically sealed from the outsideSince it is fixed and held on a jig,Its thinnedThe semiconductor substrate can be easily handled without damaging it.
[0012]
  Also,After removing the part corresponding to the boundary part that divides each element formation area of the metal layer formed on the entire exposed side of the semiconductor substrate with a protective film with a laser, the part corresponding to the boundary part is removed The semiconductor substrate is divided into individual semiconductor device (chip) units (dicing) by etching using the formed metal layer as a mask. That meansDicing of each semiconductor device (chip) unit is not a mechanical means such as a dicer used in the prior art, but a portion not removed by the laser (that is, each chip to be divided into each chip unit) Dry etching using the metal layer of the portion corresponding to the element formation region as an etching resistOr wet etchingTherefore, batch dicing can be performed in a short time.
[0013]
Thus, it becomes possible to spur future new semiconductor chip manufacturing technologies such as microchips by enabling dicing of thinned semiconductor substrates in a short time.
[0016]
  Also,According to the above formIn the method of manufacturing a semiconductor device, after the step of dividing the semiconductor substrate into each semiconductor device, a step of patterning each exposed metal layer of each semiconductor device into a shape of a required circuit element by a laser is included.You may do it.
[0017]
  thisAccording to the form, the above formIn addition to the effects obtained by the method for manufacturing a semiconductor device according to the present invention, the metal layer of each semiconductor device is patterned into a required shape by a laser after dicing is further performed. Can be used as an inductance, an antenna, or the like. This leads to a reduction in the pattern area formed in each semiconductor device.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 schematically shows an example of the configuration of a jig used when carrying out the method for manufacturing a semiconductor device according to the present invention.
[0020]
As shown in the drawing, the jig 10 includes a lower part 11 for holding and holding the processing object, an upper part 12 for holding the processing object from above in cooperation with the lower part 11, and a processing It is comprised from the jig clamp 13 which fixes both parts 11 and 12 which pinch | interpose and hold | maintain a target object from the peripheral surface direction (refer FIG.1 (c)).
[0021]
As will be described later, the object to be treated here is a surface on the side where a device pattern such as a circuit pattern, a wiring pattern, etc. of the silicon wafer 21 (shown by a broken line in the figure) is formed (ie, the final object) In addition, a protective film is attached to a surface of each element forming region to be divided as a semiconductor device (chip) (hereinafter referred to as “wafer with protective film” for convenience).
[0022]
The lower part 11 and the upper part 12 are each made of stainless steel (SUS) or the like, and each surface is processed with Teflon (registered trademark). As shown in FIG. 1A, the lower part 11 is formed in a circular shape, and a packing P1 made of silicone rubber, Teflon, or the like is disposed in a ring shape in the vicinity along the peripheral surface. The size of the packing P1 (ring) is selected to be slightly larger than the size of the silicon wafer 21. On the other hand, the upper part 12 is formed in a ring shape as shown in FIG. 1B, and the outer diameter of the ring is the same as the outer diameter of the lower part 11, and is defined by the inner diameter of the ring. The size of the opening is selected to be smaller than the size of the silicon wafer 21. Further, a packing P2 made of the same material is disposed in the vicinity of the inner peripheral surface of the upper part 12 in the vicinity.
[0023]
A method for setting the wafer with the protective film on the jig 10 (11 to 13) configured as described above will be described with reference to FIG.
[0024]
First, as shown to Fig.2 (a), an adhesive (not shown) is apply | coated to the surface of the lower part 11 in which the packing P1 is formed, and the protective film 22 of the wafer 20 with a protective film is affixed. The wafer 20 with a protective film is fixed to a predetermined position of the lower part 11 with an adhesive with the surface on the side being worn down. Thus, by fixing the wafer 20 with a protective film using an adhesive, the difference is caused by the difference in thermal expansion coefficient between both surfaces (the silicon wafer 21 side and the protective film 22 side) of the wafer 20 with the protective film. The possibility that the wafer is warped can be eliminated.
[0025]
Next, the parts 11 and 12 are aligned so that the packing P2 of the upper part 12 contacts the peripheral surface of the silicon wafer 21 and the packing P1 of the lower part 11 contacts the peripheral surface of the upper part 12. Then, the parts 11 and 12 holding the wafer 20 with the protective film are firmly fixed and held by a plurality of jig clamps 13 (four in the example of FIG. 2B) so as to be sandwiched from the circumferential direction. To do. Thereby, only the back surface (surface opposite to the surface on which the device pattern is formed) of the silicon wafer 21 is exposed to the outside of the wafer 20 with the protective film. That is, the wafer 20 with the protective film is hermetically sealed from the outside by the packings P1 and P2 of the parts 11 and 12, except for the back surface of the silicon wafer 21.
[0026]
The semiconductor device manufacturing method according to the first embodiment will be described below with reference to FIGS. 3 and 4 showing the manufacturing steps in order.
[0027]
First, in the first step (see FIG. 3A), the silicon wafer 21 thinned to a thickness of about 50 μm is formed on the surface on which the device pattern is formed (the lower surface in the illustrated example). The wafer with protective film 20 to which the protective film 22 having a thickness of about 100 μm to 1 mm is attached is set on the jigs 11 to 13 by the method described with reference to FIG.
[0028]
The protective film 22 is made of, for example, acrylic or rubber on one side of a sheet-like support made of a resin film made of an epoxy resin or a polyimide resin, or a plastic film such as PET (polyethylene terephthalate). What apply | coated the adhesive (resin in a non-hardened state) is used. Alternatively, as another form of the protective film 22, when a relatively thick silicon wafer having a thickness of about 100 μm to 300 μm is thinned by mechanical polishing such as a back grinding method, its one side (on the polished side and A back grind protective tape (hereinafter also referred to as “BG tape”) attached to the opposite surface) may be used as it is.
[0029]
The protective film 22 is for facilitating the handling of the thinned silicon wafer 21 in the subsequent steps, and for preventing the silicon wafer 21 from being damaged during the handling.
[0030]
In the next step (see FIG. 3B), a metal layer 23 is formed by electroless plating on the back surface of the silicon wafer 21 where the wafer 20 with protective film is exposed.
[0031]
That is, as shown in the figure, a plating tank 41 containing an electroless nickel (Ni) plating solution 42 (a solution containing Ni ions and a reducing agent) was prepared and set in the jigs 11 to 13 in the previous step. The wafer 20 with the protective film is immersed in the plating tank 41 to cause an oxidation-reduction reaction in the electroless Ni plating solution 42 so that Ni ions are reduced to Ni at the same time as the reducing agent is oxidized, By depositing Ni on the back surface of the silicon wafer 21, an electroless Ni plating layer (metal layer 23) is formed to a thickness of about 0.2 μm to 0.4 μm. As the electroless Ni plating solution 42, for example, an electroless Ni plating solution: Melplate NI-867 manufactured by Meltex is preferably used.
[0032]
The electroless Ni plating layer 23 is formed to improve the adhesion between the underlying silicon (Si) wafer 21 and the metal layer formed in the next step.
[0033]
After forming the metal layer 23 (electroless Ni plating layer), the wafer 20 with the protective film is taken out from the plating tank 41 in a state set in a jig.
[0034]
In the next step (see FIG. 3C), a metal layer 24 is further formed by electroless plating on the metal layer 23 (electroless Ni plating layer) formed in the previous step. The formation of the metal layer 24 is performed by a “substitution plating” process by replacing the base layer with a metal (Ni in this case).
[0035]
That is, as shown in the drawing, a plating tank 43 containing an electroless gold (Au) plating solution 44 (a solution containing Au ions and a reducing agent) is prepared, and the silicon wafer 21 of the wafer 20 with the protective film is prepared in the previous step. An electrode having an electroless Ni plating layer 23 formed on the back surface thereof is immersed in a plating tank 43, and the Au ions in the electroless Au plating solution 44 are exchanged with Au in exchange for oxidation and dissolution of the underlying metal ions (Ni ions). In this way, Au is deposited on the electroless Ni plating layer 23 to form an electroless Au plating layer (metal layer 24) very thin (less than 0.05 μm). As the electroless Au plating solution 44, for example, an electroless Au plating solution: Melplate AU-601 manufactured by Meltex is preferably used.
[0036]
The electroless Au plating layer 24 is formed to lower the electrical resistance of the entire metal layer (Ni / Au) formed on the back surface of the silicon wafer 21.
[0037]
Further, in this step, a very thin metal layer 24 (electroless Au plating layer) of 0.05 μm or less is formed by displacement plating, but in the case of forming a thicker layer, a step shown in FIG. The electroless Au plating process as performed in step 1 is performed.
[0038]
After forming the metal layer 24 (electroless Au plating layer), the wafer 20 with the protective film is taken out from the plating tank 43 in a state of being set on a jig.
[0039]
In the next step (see FIG. 4A), the two-layered metal layer (electroless Ni plating layer 23 / electroless Au plating layer 24) is patterned by laser trimming. That is, predetermined portions of the metal layers 23 and 24 are removed by a laser. The predetermined portion to be removed is a portion corresponding to a boundary portion that divides each element formation region of the silicon wafer 21 to be finally divided as a semiconductor device (chip) (a portion indicated by SP in FIG. 6B). ). As the laser, for example, a UV-YAG laser, an excimer laser, or the like is used.
[0040]
In the next step (see FIG. 4B), a predetermined portion of the metal layers 23 and 24 removed in the previous step, that is, each element formation region is divided by dry etching (plasma etching in this embodiment). The silicon wafer 21 is divided into individual semiconductor device (chip) units (dicing) so as to include one element formation region along the boundary portion. The gas used for plasma discharge is mainly oxygen (O₂), Nitrogen (N₂), Hydrogen (H₂) Or the like is used, but in order to increase the etching rate, CF_Four, SF₆A mixture of reactive gases such as the above is used.
[0041]
As a result, each semiconductor device (chip) is separated in a state of being stuck to the protective film 22.
[0042]
In this step, dicing of each semiconductor device unit is performed by plasma etching. However, dicing is performed by etching (ion beam etching) using, for example, an ion beam such as argon (Ar) ions. It is also possible. Alternatively, dicing can be performed by wet etching using a solution such as an acid, an alkali, or an organic solvent instead of the dry etching.
[0043]
In this case, it should be noted that when dicing each semiconductor device unit, before the protective film 22 holding each semiconductor device is divided (that is, the state in which the protective film 22 is completely cut). In the previous stage), the processing such as plasma etching is terminated.
[0044]
After this step, the wafer with protective film 20 diced into each semiconductor device unit is removed from the jigs 11-13.
[0045]
In the last step (see FIG. 4C), the protective film 22 is peeled off from the wafer 20 with the protective film diced for each semiconductor device unit. That is, each semiconductor device (chip) 30 is removed from the protective film 22. Each semiconductor device 30 includes a silicon substrate 21a including a corresponding element formation region, and Ni / Au metal layers 23a and 24a formed on the back surface of the silicon substrate 21a. Note that a semiconductor device (a portion indicated by 31 in the figure) manufactured from the peripheral portion of the silicon wafer is removed as a defective chip.
[0046]
As described above, according to the manufacturing method of the semiconductor device according to the first embodiment, the thinned silicon wafer 21 is handled (formation of the metal layers 23 and 24 on the back surface of the wafer, and each semiconductor device ( Prior to performing (chip) 30-unit dicing or the like), the wafer 20 with the protective film in which the surface of the silicon wafer 21 on which the device pattern is formed is covered with the protective film 22 as shown in FIG. Are fixedly held by the jigs 11 to 13, and can be easily handled without damaging the thinned silicon wafer 21.
[0047]
Further, 30 units of dicing of each semiconductor device (chip) is not a mechanical means such as a dicer used in the prior art, but laser trimming as shown in FIGS. 4 (a) and 4 (b). Since the metal layers 23 and 24 of the portion not removed by the step (the portion corresponding to each element forming region to be divided into each chip unit) are performed by plasma etching using the etching resist, a large amount is collectively processed in a short time. Dicing can be performed. As described above, it becomes possible to accelerate a new silicon chip manufacturing technology such as a microchip by enabling mass dicing of the thinned silicon wafer 21 in this way.
[0048]
Further, since dicing is performed by plasma etching, curvilinear dicing processing that cannot be performed by dicing by conventional mechanical means is also possible.
[0049]
Further, when the protective film 22 is used as it is without removing the back grind protective tape (BG tape) used when the silicon wafer is thinned, it is not necessary to newly attach a protective film to the silicon wafer 21. The process can be simplified.
[0050]
Further, the presence of the metal layers 23 and 24 on the back surface of the silicon wafer 21 allows the chip to have a shielding function when used for a silicon chip having an antenna effect, for example.
[0051]
Further, since the metal layers 23 and 24 are patterned by laser trimming (removal of predetermined portions of the metal layers 23 and 24), a resist for patterning (dry film or the like) used in the prior art is used. It is not necessary to use the resist, and it is not necessary to remove the resist. As a result, the process can be simplified, and damage to the BG tape by the resist stripping solution as used conventionally can be eliminated.
[0052]
Furthermore, the wafer 20 with the protective film is fixedly held on the jigs 11 to 13 so as to swing in the plating solutions 42 and 44 during the electroless plating process (see FIGS. 3B and 3C). Etc.
[0053]
Further, in the conventional technology, vapor deposition or sputtering is performed to form a metal layer on a silicon wafer, and since such processing is performed while maintaining a vacuum state by extracting air from the processing chamber, Undesirable gas is generated from the BG tape adhered to the silicon wafer.
[0054]
On the other hand, in this embodiment, the metal layers 23 and 24 are formed by electroless plating treatment (see FIGS. 3B and 3C), and the protective film 22 (BG tape) is formed on each jig. Since the parts 11 and 12 are completely cut off from the plating solutions 42 and 44 by the packings P1 and P2, it is possible to prevent gas from being generated from the protective film 22 (BG tape).
[0055]
Next, a semiconductor device manufacturing method according to the second embodiment will be described with reference to FIG. 5 showing a part of the manufacturing process.
[0056]
The semiconductor device manufacturing method according to the second embodiment is performed in the steps of FIGS. 4A and 4B, compared to the semiconductor device manufacturing method according to the first embodiment (FIGS. 3 and 4). Instead of the processing performed, as shown in FIG. 5A, predetermined portions (each element formation region of the silicon wafer 21) of the metal layers 23 and 24 are divided by a laser (UV-YAG laser, excimer laser, etc.). Each portion of the semiconductor device (chip) is removed so that each of the silicon wafers 21 includes one element formation region along the removed portions of the metal layers 23 and 24 by the laser. ) It is different in that dicing is performed in units. The other steps are the same as those in the first embodiment, and a description thereof will be omitted.
[0057]
As described above, the semiconductor device manufacturing method according to the present embodiment is characterized in that the patterning process of the metal layers 23 and 24 and the dicing process of the silicon wafer 21 are performed in one step.
[0058]
According to the manufacturing method of the semiconductor device according to the second embodiment, in addition to the effects obtained in the first embodiment, the patterning process of the metal layers 23 and 24 and the dicing process of the silicon wafer 21 are further performed. Since the process is performed in a single process (see FIG. 5A), the process can be simplified.
[0059]
Furthermore, since the metal layers 23 and 24 are formed on the back surface of the silicon wafer 21, heat from the laser can be effectively dissipated through the metal layers 23 and 24 when dicing with the laser, Damage to the circuit of the silicon wafer 21 due to heat can be prevented.
[0060]
Next, a method for manufacturing a semiconductor device according to the third embodiment will be described with reference to FIG.
[0061]
6A shows a part of the manufacturing process of the semiconductor device according to this embodiment, and FIG. 6B schematically shows an example of the pattern formed in the process of FIG. Is.
[0062]
The semiconductor device manufacturing method according to the third embodiment is different from the semiconductor device manufacturing method according to the first and second embodiments (FIGS. 3, 4, and 5) in FIG. As shown in FIG. 6A, a laser (UV-YAG laser, excimer laser) is used between the step and the step of FIG. 4C or between the step of FIG. 5A and the step of FIG. 5B. Etc.) is different in that a process for patterning the metal layers 23 and 24 of each semiconductor device after dicing into a required shape is added. The other steps are the same as those in the first and second embodiments, and the description thereof is omitted.
[0063]
As described above, in the method of manufacturing the semiconductor device according to the present embodiment, after the silicon wafer 21 is diced, the metal layers 23 and 24 of each semiconductor device (chip) are formed by EP in a required circuit element (FIG. 6B). It is characterized in that it is patterned into the shape of the portion shown in FIG. Circuit elements to be patterned include an antenna and a SAW filter in addition to the coil-shaped inductance element EP as shown in FIG. Note that SP indicates a portion corresponding to a boundary portion that divides each element formation region of the silicon wafer 21 to be finally divided into units of chips.
[0064]
According to the method for manufacturing a semiconductor device according to the third embodiment, in addition to the effects obtained in the first and second embodiments, the dicing is performed for each semiconductor device (chip). Since each of the metal layers 23 and 24 is patterned into a required circuit element shape, it can be used as an inductance, an antenna, a SAW filter, or the like according to the shape to be patterned. It is possible to reduce the pattern area to be formed.
[0065]
The reason why the laser trimming (FIG. 6A) is performed after dicing is that if the metal layers 23 and 24 are patterned into a required circuit element shape before dicing, plasma dicing (FIG. This is because the metal layers 23 and 24 cannot be used as a dicing protective film in the case of b)) or laser dicing (FIG. 5A) (that is, the circuit element pattern may be damaged).
[0066]
【The invention's effect】
As described above, according to the present invention, in manufacturing a semiconductor device intended for high density and thinning, the thinned semiconductor substrate can be easily handled and the dicing of the semiconductor substrate can be performed. This can be done in a short time.
[Brief description of the drawings]
FIG. 1 is a view showing a configuration example of a jig used when a semiconductor device manufacturing method according to the present invention is carried out.
2 is a view for explaining a method of setting a wafer with a protective film on the jig shown in FIG. 1; FIG.
FIG. 3 is a cross-sectional view showing a manufacturing step of the semiconductor device according to the first embodiment of the invention.
4 is a cross-sectional view showing a manufacturing step that follows the manufacturing step of FIG. 3. FIG.
FIG. 5 is a cross-sectional view showing a part of the manufacturing process of the semiconductor device according to the second embodiment of the present invention.
FIG. 6 is a diagram schematically showing a part of a manufacturing process of a semiconductor device according to a third embodiment of the present invention and an example of a pattern formed in the process.
[Explanation of symbols]
10 ... Jig,
11 ... Lower parts,
12 ... Upper part,
13 ... Jig clamp,
20 ... Wafer with protective film,
21 ... Silicon wafer (semiconductor substrate),
21a ... silicon substrate,
22 ... Protective film (BG tape, etc.)
23, 23a ... electroless Ni plating layer (first metal layer),
24, 24a ... electroless Au plating layer (second metal layer),
30 ... Semiconductor device (chip),
41, 43 ... electroless plating tank,
42 ... electroless Ni plating solution,
44 ... Electroless Au plating solution,
EP: pattern (circuit element) formed by laser trimming of the metal layer,
P1, P2 ... packing,
SP: A portion corresponding to a boundary portion that divides each element formation region (semiconductor device).

Claims (5)

A semiconductor substrate with a protective film in which a protective film is attached to a surface of each semiconductor substrate thinned to a predetermined thickness on a side where each element formation region to be divided as a semiconductor device is defined. Fixing and holding to a jig so as to expose only the surface opposite to the side to which is attached and to hermetically seal from the outside ,
Forming a metal layer on the entire exposed side of the semiconductor substrate with a protective film fixedly held by the jig;
Removing a portion of the metal layer corresponding to a boundary portion dividing each element formation region by a laser; and
One element formation region is included in each of the semiconductor substrates along the removed portion of the metal layer by dry etching or wet etching using the metal layer from which the portion corresponding to the boundary portion has been removed as a mask. And a step of dividing the semiconductor device into each semiconductor device.   2. The process of dividing the semiconductor substrate into semiconductor devices, wherein the dry etching or wet etching is terminated before the protective film holding the semiconductor devices is divided. A method for manufacturing a semiconductor device.   2. The method according to claim 1, further comprising the step of patterning each exposed metal layer of each semiconductor device into a shape of a required circuit element by a laser after the step of dividing the semiconductor substrate into each semiconductor device. Or the manufacturing method of the semiconductor device of 2. The step of forming the metal layer includes
Immersing the semiconductor substrate with a protective film fixedly held in the jig in a first electroless metal plating solution, and depositing the metal by an oxidation-reduction reaction to form a first metal layer;
A semiconductor substrate with a protective film on which the first metal layer is formed is immersed in a second electroless metal plating solution, and a second metal layer is obtained by displacement plating treatment by replacing the metal of the first metal layer with a metal. The method of manufacturing a semiconductor device according to claim 1, further comprising:   The semiconductor substrate is polished to a predetermined thickness by polishing a relatively thick semiconductor substrate in which each element formation region is defined on one side from a surface opposite to the side on which each element formation region is defined. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is obtained by thinning.

Images