JP4282391B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device in which a gate electrode is formed on a high dielectric constant insulating film.
[0002]
[Prior art]
2. Description of the Related Art In recent years, high integration in semiconductor integrated circuit devices has greatly advanced, and in a MOS (Metal Oxide Semiconductor) type semiconductor device, elements such as transistors and the like for achieving high integration have been miniaturized and improved in performance. Yes. In particular, with regard to the gate insulating film which is one of the elements constituting the MOS structure, the thinning is rapidly progressing to cope with the miniaturization, high speed operation and low voltage of the transistor.
[0003]
As a material constituting the gate insulating film, a silicon oxide film (SiO ₂ film) has been conventionally used. On the other hand, when the gate insulating film becomes thinner with the miniaturization of the gate electrode, the tunnel current generated by the carriers (electrons and holes) directly tunneling through the gate insulating film, that is, the gate leakage current increases. . For example, the thickness of the gate insulating film required for a 130 nm node device is about 2 nm for a SiO ₂ film, but this region is a region where a tunnel current starts to flow. Therefore, when the SiO ₂ film is used as the gate insulating film, the gate leakage current cannot be suppressed and the power consumption is increased.
[0004]
In view of this, research has been conducted in which a material having a higher dielectric constant is used as the gate insulating film instead of the SiO ₂ film. As an insulating film having a high dielectric constant (hereinafter referred to as a High-k film), a TiO ₂ film, a Ta ₂ O ₅ film, an Al ₂ O ₅ film, and the like have been conventionally studied, but recently, an HfO ₂ film is used. , HfAlO _x films, HfSiO _x films, and the like are attracting attention because of their excellent stability on silicon.
[0005]
FIG. 4 is a cross-sectional view showing a manufacturing process of a field effect transistor according to a conventional method when a high-k film is used as a gate insulating film.
[0006]
After element isolation regions 402 and 403 are formed on a silicon substrate 401, an SiO ₂ film 404 is formed by a thermal oxidation method. Next, a high-k film 405, a polycrystalline silicon film 406 as a gate electrode, and a SiO ₂ film 407 as a mask material are grown in order. Thereafter, an antireflection film 408 is formed for the purpose of improving the dimensional uniformity of the gate electrode, and then a resist pattern 409 is formed by photolithography (FIG. 4A).
[0007]
Next, the antireflection film 408 and the SiO ₂ film 407 are dry-etched using the resist pattern 409 as a mask to form a SiO ₂ film pattern 410 (FIG. 4B).
[0008]
Next, the polycrystalline silicon film 406 is dry-etched using the SiO ₂ film pattern 410 as a mask to form a polycrystalline silicon film pattern 411 (FIG. 4C).
[0009]
Finally, the high-k film 405 and the SiO ₂ film 404 are etched to complete the gate electrode.
[0010]
Here, as a method of etching the High-k film 405, a method of performing dry etching of Zr _1-x Al _x O _y using BCl ₃ (see, for example, Non-Patent Document 1), Cl ₂ , BCl, or the like. _In addition to a method of performing dry etching of Al ₂ O ₃ using a chlorine-containing gas such as ₃ or HCl, there is a method of performing dry etching using a fluorocarbon gas or a mixed gas of HBr and O ₂ .
[0011]
[Non-Patent Document 1]
K. Pelhos et al., “Etching of high-k dielectric Zr _1-x Al _x O _y films indexline, in a high dielectric constant Zr _1-x Al _x O _y film in a chlorine-containing plasma. -Containing plasma) "," Journal of Vacuum Science and Technology ", American Vacuum Society, July / August 2001, A 19, Vol. 4, No. 4, p. 1361-1366
[0012]
[Problems to be solved by the invention]
However, in the conventional method using a halogen gas as an etching gas, the polycrystalline silicon film pattern 411 is also etched when the high-k film 405 is etched, so that a gate electrode having a desired dimension cannot be obtained. (FIG. 4D).
[0013]
The present invention has been made in view of such problems. That is, an object of the present invention is to provide a method of manufacturing a semiconductor device capable of preventing a polycrystalline silicon film pattern from being etched when a high-k film is etched and forming a gate electrode having a desired dimension. It is to provide.
[0014]
Other objects and advantages of the present invention will become apparent from the following description.
[0015]
[Means for Solving the Problems]
The present invention provides a semiconductor device manufacturing method in which an oxide film containing silicon, a high dielectric constant insulating film, and a gate electrode containing silicon are formed in this order on a semiconductor substrate.
A high dielectric constant insulating film is dry-etched using boron trichloride gas and nitrogen gas, and after dry etching, an oxide film containing silicon and a film made of boron nitride formed on the side wall of the gate electrode during dry etching And are removed .
[0017]
The present invention also provides a method for manufacturing a semiconductor device in which an oxide film containing silicon, a high dielectric constant insulating film, and a gate electrode containing silicon are formed in this order on a semiconductor substrate, using boron trichloride gas and nitrogen gas. After dry etching of the high dielectric constant insulating film, the dry etching is stopped at the same time as the oxide film containing silicon is exposed, and then the remaining high dielectric constant insulating film is dry etched using hydrogen bromide gas and oxygen gas. It is characterized by.
[0018]
In the present invention, after dry etching, the oxide film containing silicon and the film made of boron nitride formed on the side wall of the gate electrode during dry etching can be removed.
[0019]
In the present invention, removal of the oxide film containing silicon and the film made of boron nitride can be performed by wet etching using either hydrofluoric acid or phosphoric acid.
[0020]
In the present invention, the high dielectric constant insulating film can be one film selected from the group consisting of an HfO ₂ film, an HfAlO _x film, and an HfSiO _x film.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
Embodiment 1 FIG.
1A to 1E are cross-sectional views illustrating the manufacturing steps of the semiconductor device according to the present embodiment.
[0022]
First, element isolation regions 102 and 103 are formed on a silicon substrate 101 as a semiconductor substrate using a known method, and an oxide film containing silicon is formed in a region sandwiched between the element isolation region 102 and the element isolation region 103. The SiO ₂ film 104 is formed. The SiO ₂ film 104 can be formed by, for example, a thermal oxidation method or the like, but may be formed by other methods. The thickness of the SiO ₂ film 104 can be set to, for example, about 1 nm.
[0023]
Next, a high-k film 105 is formed on the element isolation regions 102 and 103 and the SiO ₂ film 104. In the present invention, the High-k film refers to an insulating film having a relative dielectric constant larger than that of the SiO ₂ film. As the High-k film 105, for example, an HfO ₂ film, an HfAlO _x film, an HfSiO _x film, or the like can be used. The film thickness of the High-k film 105 can be set to, for example, about 2 nm to 3 nm.
[0024]
After the high-k film 105 is formed, a polycrystalline silicon film 106 serving as a gate electrode and an SiO ₂ film 107 serving as a mask material are sequentially formed thereon. The thickness of the polycrystalline silicon film 106 can be about 150 nm, for example. The film thickness of the SiO ₂ film 107 can be set to about 100 nm, for example.
[0025]
After the SiO ₂ film 107 is formed, an antireflection film 108 is formed thereon. The antireflection film 108 serves to eliminate exposure light reflection at the interface between the resist film and the antireflection film by absorbing exposure light transmitted through the resist film when the resist film to be formed next is patterned. . As the antireflection film 108, a film containing an organic substance as a main component can be used, and for example, it can be formed by a spin coating method or the like. In the present invention, the antireflection film may be omitted.
[0026]
Next, a resist film (not shown) is formed on the antireflection film 108, and a resist pattern 109 having a desired line width is formed by photolithography. The structure shown in FIG. 1A is obtained through the above steps.
[0027]
Next, as shown in FIG. 1B, a SiO ₂ film pattern 110 to be a gate mask is formed.
[0028]
First, the antireflection film 108 and the SiO ₂ film 107 are etched using the resist pattern 109 of FIG. Thereafter, the resist pattern 109 that has become unnecessary is removed. The etching conditions may be set so that the resist pattern 109 disappears by etching almost simultaneously with the etching of the antireflection film 108 and the exposure of the SiO ₂ film 107. In this case, the SiO ₂ film 107 is etched using an antireflection film pattern (not shown) as a mask. After the SiO ₂ film pattern 110 is formed, the antireflection film pattern can be removed by performing a plasma treatment using oxygen gas, for example.
[0029]
Next, the structure shown in FIG. 1C is obtained by etching the polycrystalline silicon film 106 using the SiO ₂ film pattern 110 as a mask. In the figure, a polycrystalline silicon film pattern 111 is a gate electrode, and has a structure in which a SiO ₂ film 104, a high-k film 105, and a gate electrode are formed in this order on a silicon substrate 101.
[0030]
Next, the high-k film 105 is etched using the SiO ₂ film pattern 110 as a mask. Etching can be performed by, for example, low-pressure high-density plasma using inductive coupling. In the present embodiment, by supplying BCl ₃ (boron trichloride) gas and N ₂ (nitrogen) gas in the etching atmosphere, while forming the sidewall protective film 112 on the sidewall of the polycrystalline silicon film pattern 111, The high-k film 105 is etched. This will be described in detail below.
[0031]
FIG. 2 is an example of a dry etching apparatus used in this embodiment. As shown in the figure, a dry etching apparatus 200 includes a lower electrode 202 and an upper electrode 203 disposed at a position facing the lower electrode 202 at a predetermined interval in a vacuum chamber 201. The lower electrode 202 is connected to a radio frequency (RF) power source 204, and the upper electrode 203 is connected to a radio frequency (RF) power source 205.
[0032]
The lower electrode 202 also serves as a substrate mounting table, and the silicon substrate 206 is mounted on the lower electrode 202. At this time, the silicon substrate 206 is placed so that the surface on which the High-k film (not shown) is formed faces the upper electrode 203. The lower ring 207 serves to position the silicon substrate 206 on the lower electrode 202.
[0033]
An etching gas supply pipe 208 that supplies an etching gas G is connected to the vacuum chamber 201. The upper electrode 203 has a hollow portion (not shown) inside, and an etching gas G is introduced into the hollow portion from the etching gas supply pipe 208. A plurality of gas ejection ports (not shown) are provided on the surface of the upper electrode 203 facing the silicon substrate 206, and the etching gas G in the hollow portion is introduced into the vacuum chamber 201 from the gas ejection ports. Is done. In addition, a plate-like member 209 for controlling the gas injection direction and an upper ring 210 for supporting the plate-like member 209 are provided around the gas injection port.
[0034]
Next, the process of etching the High-k film will be described with reference to FIGS.
[0035]
First, the silicon substrate 206 is placed on the lower electrode 202. Here, the silicon substrate 206 has the structure of FIG. That is, on the silicon substrate 101, the SiO ₂ film 104, the high-k film 105, the polycrystalline silicon film pattern 111, and the SiO ₂ film pattern 110 are formed in this order. The silicon substrate 206 is placed so that the surface on which these films are formed faces the upper electrode 203 side.
[0036]
Next, the etching gas G is introduced into the vacuum chamber 201 at a predetermined flow rate. In the present embodiment, the etching gas G passes through the etching gas supply pipe 208 and enters the vacuum chamber 201 from the gas ejection port through the hollow portion provided in the upper electrode 203. In the present embodiment, a mixed gas of BCl ₃ gas and N ₂ gas is used as the etching gas G.
[0037]
Next, when a high frequency is applied to each of the upper electrode 203 and the lower electrode 202, the etching gas that has reached the plasma discharge region 211 is turned into plasma. As a result, B _x N _y (boron nitride) is generated in the etching atmosphere by the reaction between BCl ₃ and N _2, and adheres to the sidewall of the polycrystalline silicon film pattern 111. The B _x N _y film is a very hard film and has sufficient physical strength as a side wall protective film.
[0038]
Further, since the BCl ₃ gas is suitable for processing the High-k film 111, the sidewall protective film 112 is formed by the adhesion of B _x N _y , while the etching of the High-k film 105 also proceeds. At this time, since the sidewall protective film 112 is formed on the sidewall of the polycrystalline silicon film pattern 111, the sidewall of the polycrystalline silicon film pattern 111 is not etched together with the high-k film 105. Therefore, the High-k film 105 can be etched while suppressing side etching of the gate electrode. FIG. 1D is a cross-sectional view of the semiconductor device after the etching of the high-k film 105 is completed.
[0039]
Note that gas generated by etching, excess etching gas G, and the like are discharged out of the vacuum chamber 201 through the exhaust port 212 shown in FIG.
[0040]
After the etching of the High-k film 105 is completed, the unnecessary side wall protective film 112 is removed together with the SiO ₂ film 104 by a wet etching method using a hydrofluoric acid solution or a phosphoric acid solution.
[0041]
Through the above steps, the structure shown in FIG. 1E can be obtained.
[0042]
According to the present embodiment, by etching the High-k film using BCl ₃ gas and Cl ₂ gas, the sidewall protective film is formed on the sidewall of the polycrystalline silicon film pattern, and the High-k film is formed. Etching can be performed. Therefore, side etching of the polycrystalline silicon film pattern can be prevented and a gate electrode having a desired dimension can be formed.
[0043]
In the etching process of the high-k film 105 in this embodiment, first, a high frequency is applied only to the upper electrode 203 of the dry etching apparatus 200 to form the sidewall protective film B _x N _y , and then the upper electrode 203 and The high-k film 105 may be etched by applying a high frequency to the lower electrode 202. By applying a high frequency only to the upper electrode 203, BCl ₃ and N ₂ can be reacted to generate B _x N _y . The generated B _x N _y adheres to the side wall of the polycrystalline silicon film pattern 111 to form a side wall protective film 112. Next, when a high frequency is applied to the lower electrode 202, the plasma-ized etching gas is attracted to the silicon substrate 206 side, so that the high-k film 105 can be etched. As described above, the side-etching can be more effectively prevented by performing the etching of the High-k film 105 after setting the conditions for easily forming the sidewall protective film 112 first.
[0044]
In addition, the dry etching apparatus in this embodiment may use an apparatus other than that shown in FIG. 2 as long as the apparatus has independent RF power sources for the plasma generation unit and the ion energy control unit for the semiconductor substrate.
[0045]
Embodiment 2. FIG.
This embodiment is characterized in that the etching process of the high-k film is performed in two stages.
[0046]
A method of etching a High-k film according to the present embodiment will be described with reference to FIGS.
[0047]
First, in the same manner as the method shown in FIGS. 1A to 1C described in the first embodiment, element isolation regions 302 and 303 are formed on a silicon substrate 301 as a semiconductor substrate, and then SiO _2. A polycrystalline silicon film pattern 311 and a SiO ₂ film pattern 310 are formed through the film 304 and the high-k film 305 (FIG. 3A). Here, as the High-k film 305, as in the first embodiment, an HfO ₂ film, an HfAlO _x film, an HfSiO _x film, or the like can be used.
[0048]
Next, the high-k film 305 is etched. In the present invention, an apparatus similar to the dry etching apparatus (FIG. 2) described in Embodiment 1 can be used. It should be noted that other dry etching apparatuses may be used as long as they have independent RF power sources for the plasma generation unit and the ion energy control unit for the semiconductor substrate.
[0049]
First, the silicon substrate 206 is placed on the lower electrode 202. At this time, the silicon substrate 206 is placed so that the SiO ₂ film pattern (not shown) faces the upper electrode 203 side. In this embodiment, as shown in FIG. 3A, the silicon substrate 206 is formed on the silicon substrate 301 with the SiO ₂ film 304, the high-k film 305, and the polycrystalline silicon film pattern 311 as the gate electrode. Has a structure formed in this order.
[0050]
Next, as an etching gas G, a mixed gas of BCl ₃ gas and N ₂ gas is introduced into the vacuum chamber 201 at a predetermined flow rate. Specifically, the etching gas G passes through the etching gas supply pipe 208, passes through a hollow portion (not shown) provided in the upper electrode 203, and is supplied from the gas ejection port (not shown) to the vacuum chamber 201. Get inside.
[0051]
Next, when a high frequency is applied to each of the upper electrode 203 and the lower electrode 202, the etching gas that has reached the plasma discharge region 211 is turned into plasma. At this time, B _x N _y is generated in the plasma atmosphere by the reaction between BCl ₃ and N _2, and adheres to the side wall of the polycrystalline silicon film pattern 311, thereby forming the side wall protective film 312. At the same time, the High-k film 305 is etched by BCl ₃ gas.
[0052]
In the present embodiment, the etching is stopped when the High-k film 305 is etched and a part of the underlying SiO ₂ film 304 is exposed. At this time, the etching of the High-k film 305 does not need to be completely completed. For example, as shown in FIG. 3B, the High-k film 305 may partially remain. .
[0053]
Next, the etching gas G is changed to a gas having a high selectivity with respect to the SiO ₂ film, and is introduced into the vacuum chamber 201 at a predetermined flow rate. For example, a mixed gas of HBr (hydrogen bromide) gas and O ₂ (oxygen) gas can be used. Subsequently, the high-k film 305 is etched. By using an etching gas having a large selection ratio with respect to the SiO ₂ film, the remaining High-k film 305 can be etched while suppressing the etching of the SiO ₂ film 304.
[0054]
Note that the gas generated by the etching and the surplus etching gas G are discharged out of the vacuum chamber 201 from the exhaust port 212 shown in FIG.
[0055]
Through the above steps, the structure shown in FIG. 3C can be obtained. Thereafter, the SiO ₂ film 304 and the sidewall protective film 312 are removed by a wet etching method using a hydrofluoric acid solution or a phosphoric acid solution, thereby completing the gate electrode structure (FIG. 3D).
[0056]
According to the present embodiment, by using BCl ₃ gas and N ₂ gas as the etching gas, the high-k film is etched while forming the sidewall protective film, so that side etching of the polycrystalline silicon film pattern is prevented. Thus, a gate electrode having a desired dimension can be formed.
[0057]
Further, according to the present embodiment, the etching of the High-k film is temporarily stopped when the underlying SiO ₂ film is exposed, and the etching gas is changed to one having a high selectivity with respect to the SiO ₂ film. By etching the High-k film again, the etching of the High-k film can proceed while suppressing the etching of the SiO ₂ film.
[0058]
In Embodiments 1 and 2, the example using a polycrystalline silicon film as the gate electrode material has been described, but the present invention is not limited to this. Any film containing silicon such as amorphous silicon or silicon germanium can be used as the gate electrode material. In addition, the gate electrode may have a multilayer structure, and a part thereof may include a polycrystalline silicon film, an amorphous silicon film, a silicon germanium film, or the like.
[0059]
In the first and second embodiments, the example in which the SiO ₂ film is used as the base film of the High-k film is shown, but the present invention is not limited to this. The base film of the high-k film may be an oxide film containing silicon, and for example, a silicon oxynitride film may be used.
[0060]
In Embodiments 1 and 2, the example in which the High-k film is used as the gate insulating film of the transistor has been described, but the present invention is not limited to this. For example, the present invention can be applied to an example in which a high-k film is used as a capacitor film as a passive element.
[0061]
【The invention's effect】
According to the present invention, by using BCl ₃ gas and N ₂ gas as the etching gas, the High-k film can be etched while forming the side wall protective film, so that side etching of the gate electrode is prevented. A gate electrode having a desired dimension can be formed.
[0062]
Further, according to the present invention, the etching of the High-k film is performed by dividing into etching using BCl ₃ gas and N ₂ gas and etching using a gas having a high selectivity with respect to the underlying SiO ₂ film, Side etching of the gate electrode can be prevented, and etching of the SiO ₂ film can be suppressed.
[Brief description of the drawings]
FIGS. 1A to 1E are cross-sectional views illustrating manufacturing steps of a semiconductor device according to a first embodiment.
FIG. 2 is an example of a dry etching apparatus used in the present invention.
FIGS. 3A to 3D are cross-sectional views illustrating the manufacturing steps of the semiconductor device according to the second embodiment. FIGS.
FIGS. 4A to 4D are cross-sectional views showing a manufacturing process of a conventional semiconductor device. FIGS.
[Explanation of symbols]
101, 206, 301, 401 Silicon substrate, 102, 103, 302, 303, 402, 403 Element isolation region, 111, 311, 411 Polycrystalline silicon film pattern, 104, 107, 304, 404, 407 SiO ₂ film, 105 305,405 High-k film, 106,406 Polycrystalline silicon film, 108,408 Antireflection film, 109,409 Resist pattern, 110,310,410 SiO ₂ film pattern, 112,312 Side wall protective film, 200 Dry etching Apparatus, 201 vacuum chamber, 202 lower electrode, 203 upper electrode, 204, 205 high frequency power supply, 207 lower ring, 208 etching gas supply pipe, 209 plate member, 210 shaped part ring, 211 plasma discharge area, 212 exhaust port.

Claims (5)

In a semiconductor device manufacturing method in which an oxide film containing silicon, a high dielectric constant insulating film, and a gate electrode containing silicon are formed in this order on a semiconductor substrate,
The high dielectric constant insulating film is dry-etched using boron trichloride gas and nitrogen gas, and after the dry etching, the silicon-containing oxide film and the sidewall of the gate electrode are formed during the dry etching. A method of manufacturing a semiconductor device, comprising removing a film made of boron nitride . In a semiconductor device manufacturing method in which an oxide film containing silicon, a high dielectric constant insulating film, and a gate electrode containing silicon are formed in this order on a semiconductor substrate,
The high dielectric constant insulating film is dry-etched using boron trichloride gas and nitrogen gas, and the dry etching is stopped simultaneously with the exposure of the oxide film containing silicon, and then hydrogen bromide gas and oxygen gas are used. A method of manufacturing a semiconductor device, comprising dry-etching the remaining high dielectric constant insulating film. 3. The semiconductor according to claim 2 , wherein after the dry etching, the oxide film containing silicon and a film made of boron nitride formed on a sidewall of the gate electrode during the dry etching are removed. Device manufacturing method. Removal of film made of an oxide film and the boron nitride including silicon, the manufacturing of the semiconductor device according to claim 1 or 3, characterized in that the wet etching using one of hydrofluoric acid and phosphoric acid Method. The high dielectric constant insulating film, HfO ₂ film, the semiconductor device according to HfAlO _x film and HfSiO _x any one of claims 1-4, characterized in that the film is a first film selected from the group consisting of Production method.

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