JP4189041B2 - Manufacturing method of semiconductor substrate and inspection method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor substrate and a method for inspecting a semiconductor substrate, and is particularly suitable for a semiconductor substrate used for a memory device or a logic device having a MOS structure.
[0002]
[Prior art]
A CZ silicon substrate cut out from single crystal silicon manufactured by a Czochralski method (CZ (Czochralski) method) is mainly used as a silicon wafer that is a substrate of a semiconductor device. A substrate (epitaxial wafer) in which a single crystal Si layer (epitaxial layer) is formed on a CZ silicon substrate by vapor phase epitaxial growth is also widely used.
[0003]
It is known that when a MOS capacitor is formed on a silicon substrate and the gate oxide film breakdown voltage is evaluated, oxygen precipitates (BMD: Bulk Micro Defect) in which oxygen contained in the CZ silicon substrate precipitates become a characteristic deterioration factor. However, in the epitaxial layer of the epitaxial wafer, oxygen is not mixed from the gas phase during the epitaxial growth and contains only interstitial oxygen diffused from the CZ silicon substrate during the epitaxial growth process. Is very low, and the gate oxide film has almost no defective breakdown voltage.
[0004]
In the case of an epitaxial wafer, it is possible to form an epitaxial layer having a conductivity type different from that of the substrate, and there are many advantages such as easy latch-up in circuit design. In particular, p⁺P on mold substrate^-P on p with mold layer⁺Structure wafers have improved soft error resistance, p⁺It has advantages such as gettering action of metal impurities by boron in the mold region, and is an ideal substrate in a highly integrated semiconductor device. Further, when a trench capacitor formed in a substrate is used as a memory cell of a DRAM device, it is necessary to hold a charge amount of a certain level or more in the capacitor.⁺By using the mold substrate, it is possible to suppress the expansion of the depletion layer around the trench capacitor, and it is easy to secure the charge capacity.
[0005]
[Problems to be solved by the invention]
p on p⁺Wafer or n on p⁺The wafer is suitable as a substrate for highly integrated devices due to its structure, but the conductivity type is p.⁺There are problems due to the type. As the boron concentration in the silicon substrate increases (especially 10%).¹⁸atoms / cm^ThreeAs described above, it is already known that precipitation of interstitial oxygen tends to increase rapidly.
[0006]
FIG. 14 is a graph showing the boron concentration dependency of the BMD density after heat treatment of a silicon wafer at a temperature of 600 ° C. for 3 hours and at a temperature of 1000 ° C. for 16 hours. BMD density is about 10 boron concentration¹⁸atoms / cm^ThreeIt turns out that it becomes high rapidly at the border.
[0007]
In the case of the DRAM having the trench capacitor structure described above, p⁺Since the trench capacitor is formed in the mold region, it is expected that the BMD existing at a high density adversely affects device characteristics such as deterioration of the oxide film breakdown voltage of the trench capacitor.
[0008]
Further, even in a device having no trench structure, when the PN junction is applied to the BMD generation substrate portion, PN junction deterioration such as an increase in leakage current occurs. In a device that does not use a trench structure, since the element active layer depth is relatively shallow, for example, p on p⁺With an epi wafer with a structure, it is possible to prevent deep PN junctions from being applied to the substrate by increasing the thickness of the epi layer. However, as device miniaturization advances, high flatness of the wafer is required, and when the epi thickness increases, the epi thickness becomes uneven. The flatness deteriorates due to the property, and there is a limit to increasing the epi thickness.
[0009]
Here, the prior art and its technical knowledge for solving this problem will be described.
The CZ method is a method in which single crystal growth is performed using silicon dissolved in a quartz crucible as a raw material and single crystal silicon as a seed crystal. In the silicon solution, oxygen is mixed from the crucible and atmosphere, and is taken into the single crystal silicon in the process of solidifying. Therefore, oxygen exceeding the solid solubility limit exists in the single crystal silicon cooled to room temperature. Oxygen dissolved in single crystal silicon exists between silicon lattices. By heating this single crystal silicon at a relatively low temperature of about 800 ° C. or less, oxygen existing above the solid solubility limit precipitates in the silicon crystal, and forms an oxygen precipitation nucleus composed of silicon and oxygen. The deposition rate depends on the degree of supersaturation and the diffusion rate of oxygen, and the degree of supersaturation increases as the temperature decreases, and the diffusion rate of oxygen increases as the temperature increases. The heat treatment is most likely to form precipitation nuclei. The size of the precipitation nuclei is very small and is predicted to be 1 nm or less. The oxygen precipitation nuclei are subjected to heat treatment (medium temperature heat treatment) in a temperature range of about 1000 ° C., so that oxygen around the precipitation nuclei gathers to increase in size and become oxygen precipitates (BMD). The oxygen precipitate (BMD) thus grown can be easily observed by an electron microscope, an infrared scattering method, a selective etching method, or the like.
[0010]
In addition, it is known that whether oxygen precipitate nuclei grow or shrink during low temperature heat treatment and medium temperature heat treatment depends on the size of the precipitated oxygen precipitate nuclei and the oxygen concentration in the semiconductor substrate. When the size of the oxygen precipitation nuclei is a certain value or more, the oxygen precipitation nuclei grow by heat treatment, but when the size of the oxygen precipitation nuclei is less than a certain value, the oxygen precipitation nuclei are reduced by the heat treatment. The critical size for growth / reduction of oxygen precipitation nuclei is larger as the oxygen concentration in the semiconductor substrate is lower.
[0011]
The oxygen precipitate density increases as the interstitial oxygen concentration increases, and the longer the low-temperature heat treatment time and the subsequent medium-temperature heat treatment time, the higher the density of oxygen precipitates. In order to form a defective layer (DZ), it is necessary to reduce the interstitial oxygen concentration of the surface layer.
[0012]
In order to form DZ in the element formation region, a method is generally used in which the interstitial oxygen is outwardly diffused to reduce the oxygen concentration in the silicon surface layer by annealing the wafer at a high temperature in a non-oxidizing atmosphere. . The higher the temperature, the more efficiently the outward diffusion of oxygen, and a temperature of about 1200 ° C. is used.
[0013]
However, high-temperature heat treatment exceeding about 1100 ° C. requires a high level of technology and increases capital investment, resulting in a problem that the cost of the finally obtained semiconductor product is high. P on p⁺When epitaxial wafers were subjected to high temperature heat treatment, there was a problem of influence on device characteristics due to boron redistribution.
[0014]
The present invention has been made to solve the above problems, and p.⁺Wafer or p on p⁺Method of manufacturing a semiconductor substrate capable of forming a defect-free layer (DZ) having a depth sufficient to prevent adverse effects on device characteristics when a semiconductor device is manufactured using an epi-wafer while avoiding a high-temperature heat treatment process And an appropriate inspection method for the density of oxygen precipitates (BMD) in the semiconductor substrate.
[0015]
  According to the method for manufacturing a semiconductor substrate of the present invention, the boron concentration is 10¹⁸atoms / cm^ThreeThat's itSilicon on a silicon single crystal plateA silicon single crystal layer forming step of forming a single crystal layer;In a laminate comprising the silicon single crystal plate and the silicon single crystal layerIn the temperature range of 450-750 ° CMore than 3 hoursA first heat treatment step for performing heat treatment, and a second heat treatment step for performing heat treatment in a temperature region of 900 to 1100 ° C. after the first heat treatment step,The oxygen diffusion depth from the surface of the silicon single crystal plate by the first and second heat treatment steps and all the heat treatment steps in the semiconductor device manufacturing step using the completed semiconductor substrate prevents adverse effects on device characteristics. There is provided a method of manufacturing a semiconductor substrate, characterized in that the time of the second heat treatment step is set so that a defect-free layer depth from the surface of the silicon single crystal plate sufficient to do so can be secured. .
[0016]
In this way, p⁺When a semiconductor device is manufactured using a wafer, it is possible to provide a semiconductor substrate having a defect-free layer (DZ) having a depth sufficient to prevent adverse effects on device characteristics.
[0022]
Even in this embodiment, a semiconductor substrate (p on p) having a defect-free layer (DZ) deep enough to prevent adverse effects on device characteristics.⁺Epi wafers) can be provided.
[0032]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, some embodiments of the present invention will be described with reference to the drawings.
[0033]
The present invention provides p⁺Wafer or p on p⁺When a device is manufactured using an epi-wafer, the formation of BMD on the wafer surface layer that may adversely affect the device characteristics is prevented. Specifically, a P-type wafer containing high density and containing boron is subjected to a heat treatment in a temperature range of approximately 450 to 750 ° C. for a predetermined time, so that a medium temperature heat treatment (approximately 900 to 1100 ° C.) is performed for a necessary and sufficient time. ), Oxygen precipitates (BMD) are formed in the electrically inactive bulk region where no element is formed, while a sufficient defect-free layer (DZ) is formed in the surface layer where the element is formed. It is a thing.
[0034]
The present invention has been made based on new knowledge obtained from experimental results and the like described below, in addition to the technical knowledge in the prior art described above.
[0035]
p^-Wafer (resistivity 5 Ωcm, boron concentration 2.7 × 10¹⁵cm^-3) And p + wafer (resistivity 0.008 Ωcm, boron concentration 2 × 10)¹⁹cm^-3) And a semiconductor substrate on which single crystal silicon is epitaxially grown to a thickness of 3 μm, respectively, and the following experiment was conducted using the low temperature heat treatment temperature for forming oxygen precipitation nuclei as a parameter. All base wafers have an interstitial oxygen concentration of 1.0 × 10¹⁸atoms / cm^ThreeThis is a CZ substrate. In a two-step heat treatment (low temperature + medium temperature (about 1000 ° C.)), the low-temperature heat treatment temperature is about 400 to 800 ° C., and the cross section of the semiconductor substrate after the two-step heat treatment is etched including HF: 100CC, CrO2: 50 g, H2O: 100CC The BMD was selectively etched by etching with a solution using a Zirtl etching method to obtain the BMD density.
[0036]
FIG. 6 is a graph showing the dependence of the BMD density in the semiconductor substrate on the low-temperature heat treatment temperature. As shown in FIG.⁺It can be seen that a wafer using a wafer as a substrate has a very high BMD density in a temperature range of about 450 to 750 ° C., and particularly has a maximum value at about 600 ° C.
[0037]
Then p^-Wafer (resistivity 5 Ωcm, boron concentration 2.7 × 10¹⁵cm^-3) And p⁺Wafer (resistivity 0.008Ωcm, boron concentration 2 × 10¹⁹cm^-3) Was used to conduct the following experiment.
[0038]
In a two-step heat treatment (low temperature (about 600 ° C.) + Medium temperature (about 1000 ° C.)), when the low temperature heat treatment time is constant, the relationship between the medium temperature heat treatment time and the BMD density with the medium temperature heat treatment time as a parameter, The relationship between the heat treatment time and the DZ depth was determined. In addition, in a two-stage heat treatment (low temperature (about 600 ° C.) + Medium temperature (about 1000 ° C.)), when the intermediate temperature heat treatment time is constant, the relationship between the low temperature heat treatment time and the BMD density with the low temperature heat treatment time as a parameter, The relationship between the low temperature heat treatment time and the DZ depth was determined. Interstitial oxygen concentration is 1.0 × 10¹⁸atoms / cm^ThreeThis is a CZ substrate.
[0039]
7 and 8 show the relationship between the intermediate temperature heat treatment time and the BMD density when the low temperature heat treatment time is constant in the two-step heat treatment (low temperature (about 600 ° C.) + Medium temperature (about 1000 ° C.)). (1000 ° C. annealing time dependency), medium temperature heat treatment time and relationship between DZ depth (DZ depth dependency on 1000 ° C. annealing time). 9 and 10 show the relationship between the low temperature heat treatment time and the BMD density when the intermediate temperature heat treatment time is constant in the two-step heat treatment (low temperature (about 600 ° C.) + Medium temperature (about 1000 ° C.)) (BMD FIG. 5 is a graph showing the relationship between density (600 ° C. annealing time dependency) and low temperature heat treatment time and DZ depth (DZ depth dependency on 600 ° C. annealing time). For the measurement of the BMD density and the DZ depth, a method was used in which infrared light was incident from the wafer surface and the scattered light was evaluated.
[0040]
From this result, the following can be said. p^-On the wafer, DZ is not formed under any conditions, whereas p⁺In the wafer, the DZ depth is increased by increasing the medium temperature heat treatment time, and the DZ depth is increased by increasing the low temperature heat treatment time.
[0041]
Further, graphs showing the dependency of the DZ depth on the boron concentration, the dependency of the DZ depth on the low temperature heat treatment, and the dependency on the medium temperature heat treatment of the DZ depth, which are known from the experimental results and the like, are shown. 11 is a graph showing the boron concentration dependency of the DZ depth, FIG. 12 is a graph showing the low temperature heat treatment temperature dependency of the DZ depth, and FIG. 13 is a graph showing the medium temperature heat treatment temperature dependency of the DZ depth. It is.
[0042]
From FIG. 11, the boron concentration of the semiconductor substrate is about 1 × 10.¹⁸cm^-3As a result, the formed DZ depth increases rapidly, and the boron concentration is about 1 × 10¹⁹cm^-3It can be seen that the DZ depth is stable at a high level of 12 to 13 μm before and after. From FIG. 12, it can be seen that a sufficient DZ depth is obtained when the low-temperature heat treatment temperature is about 450 to 750 ° C. From FIG. 13, it can be seen that the DZ depth formed suddenly increases with the intermediate temperature heat treatment temperature of about 850 ° C., and a sufficient DZ depth is obtained at about 900 ° C. or more. Also from FIGS. 12 and 13, p^-It can be seen that DZ is not formed on the wafer under any conditions.
[0043]
The above phenomenon is interpreted as follows. 10 boron¹⁸cm^-3Since the silicon wafer contained in a high concentration as described above has a very high oxygen precipitation nucleus formation rate, oxygen precipitation nuclei are generated at a high density. This is as shown in FIG.
[0044]
Further, as shown in FIG. 8, the longer the intermediate temperature heat treatment time, the greater the DZ depth. Therefore, not only the oxygen precipitation nuclei on the surface layer but also the oxygen precipitates grown from the oxygen precipitation nuclei may disappear by the intermediate temperature heat treatment. I understand.
[0045]
Conventionally, it has been said that high-temperature heat treatment at about 1200 ° C. is necessary for the disappearance of the grown oxygen precipitates. However, in the present invention, the BMD density is very high and the size of each BMD is small, so 900 ° C. to 1100 ° C. Even in the middle temperature heat treatment, oxygen precipitates are reduced and eliminated.
[0046]
That is, in a silicon single crystal containing boron at a high density, oxygen precipitation nuclei are generated at a high density by low-temperature heat treatment, but a DZ region is easily formed in the vicinity of the surface by subsequent medium-temperature heat treatment at about 1000 ° C. It is possible.
[0047]
From the experimental results and new technical knowledge described above, the conditions of the method for manufacturing a semiconductor substrate according to the present invention were derived. The first condition is that the boron concentration contained in the semiconductor substrate is about 10%.¹⁸cm^-3That is all. This is a concentration at which oxygen precipitation nuclei are formed at a sufficiently high density. The second condition is that the low-temperature heat treatment temperature is about 450 to 750 ° C. This is a temperature at which oxygen precipitation nuclei having a necessary and sufficient concentration and an appropriate size are formed. The third condition is that the low-temperature heat treatment time is about 3 hours or more. The fourth condition is that the intermediate temperature heat treatment temperature is approximately 900 to 1100 ° C. This is a temperature at which DMD is formed in the device formation region by growing BMD in the device non-formation region. The fifth condition is that the intermediate temperature heat treatment time is about 6 hours or more. However, each of the above conditions is defined by the condition that a sufficient DZ depth is obtained as a result.
[0048]
The method for introducing high-concentration boron into a semiconductor substrate is p.⁺The wafers are not limited to those fabricated using a single-type silicon crystal, but can be formed by a method such as ion implantation or solid phase diffusion.⁺A wafer in which a mold region is formed may be used.
[0049]
P⁺Regardless of whether the single crystal silicon layer is epitaxially grown on the wafer before or after the low temperature heat treatment or the intermediate temperature heat treatment, the semiconductor substrate manufacturing method according to the present invention allows p⁺From experimental results and the like, it was found that DZ having a sufficient depth can be formed in the element formation region of the wafer. P⁺The single crystal silicon layer formed on the wafer may be p-type or n-type.
[0050]
FIG. 1 is an explanatory view schematically showing a manufacturing process by a method for manufacturing a semiconductor substrate according to the present invention.
Containing boron concentration of about 10¹⁸cm^-3P above⁺A wafer 1 is prepared (FIG. 1A). This p⁺The wafer 1 is subjected to low-temperature heat treatment in a temperature range of about 450 to 750 ° C. for about 3 hours or more to form oxygen precipitation nuclei 2 having a necessary and sufficient concentration and size (FIG. 1B). Furthermore, when intermediate temperature heat treatment in the temperature range of about 900 to 1100 ° C. is performed for about 6 hours or more, oxygen precipitates (BMD) 3 are formed in an electrically inactive bulk region where no element is formed. A defect-free layer (DZ) 4 having a sufficient depth is formed on the surface layer on which (1) is formed.
[0051]
Hereinafter, manufacturing conditions of the wafer according to each example manufactured according to the method for manufacturing a semiconductor substrate according to the present invention will be described.
[0052]
The wafer according to the first example was manufactured as follows.
Boron 1 × 10¹⁹~ 2x10¹⁹atoms / cm^Three, Oxygen 8 × 10¹⁷atoms / cm^ThreeOn a silicon wafer with a diameter of 200 mm, a thickness of 2.5 μm and a boron concentration of 2 × 10¹⁵atoms / cm^ThreeA silicon single crystal layer of trichlorosilane (SiHCl_Three) As a source gas and epitaxial growth is performed at 1150 ° C. This wafer is held in a dry oxygen atmosphere at a temperature of 600 ° C. for 6 hours using a vertical resistance heating furnace. This wafer is used as a substrate for device manufacture.
[0053]
The wafer according to the second example was manufactured as follows.
A silicon wafer having an epitaxial layer manufactured by the same method as in the first embodiment is held in a dry oxygen atmosphere at a temperature of 600 ° C. for 6 hours in a vertical resistance heating furnace, and then up to 1000 ° C. at 5 ° C./min. The temperature is raised and held for 10 hours. Thereafter, the temperature is lowered to 800 ° C. at −10 ° C./min, and the wafer is taken out of the furnace. This wafer is used as a substrate for device manufacture.
[0054]
The wafer according to the third example was manufactured as follows.
Boron 1 × 10¹⁹~ 2x10¹⁹atoms / cm^ThreeThe single crystal ingot containing in the range is held in a resistance heating furnace at a temperature of 700 ° C. for 10 hours. Thereafter, a wafer is cut out from the ingot to form an epitaxial layer having a thickness of 3 μm. This wafer is used as a substrate for device manufacture.
[0055]
The wafer according to the fourth example was manufactured as follows.
Boron 1 × 10¹⁹~ 2x10¹⁹atoms / cm^Three, Oxygen 8 × 10¹⁷atoms / cm^ThreeThe contained silicon wafer with a diameter of 200 mm is held in a dry oxygen atmosphere at a temperature of 600 ° C. for 6 hours in a vertical resistance heating furnace. Then, thickness 3μm, boron concentration 2 × 10¹⁵atoms / cm^ThreeA silicon single crystal layer of trichlorosilane (SiHCl_Three) As a source gas and epitaxial growth is performed at 1150 ° C. This wafer is used as a substrate for device manufacture.
[0056]
The wafer according to the fifth example was manufactured as follows.
Boron 1 × 10¹⁹atoms / cm^Three, Oxygen 1.0 × 10¹⁸atoms / cm^ThreePolycrystalline silicon is grown on the contained silicon wafer to a thickness of 2 μm by low pressure CVD. The temperature is about 620 ° C., and the source gas is silane (SiH_Four). Only one surface of the wafer is subjected to chemical mechanical polishing to remove a portion of the polycrystalline silicon layer and the underlying single crystal silicon layer to form a mirror surface. This wafer is used as a substrate for device manufacture.
[0057]
The wafer according to the sixth example was manufactured as follows.
Boron 2 × 10¹⁹atoms / cm^Three, Oxygen 7 × 10¹⁷atoms / cm^ThreeThickness 3μm, boron concentration 2 × 10 on silicon wafer¹⁵atoms / cm^ThreeThe silicon layer is epitaxially grown in the gas phase. The wafer is held in a normal resistance heating furnace at a temperature of 600 ° C. for 6 hours in a dry oxygen atmosphere, then heated to 1000 ° C. at 5 ° C./min and held for 10 hours. Thereafter, the temperature is lowered to 800 ° C. at −10 ° C./min, and the wafer is taken out of the furnace. This wafer is used as a substrate for device manufacture.
[0058]
The wafer according to the seventh example was manufactured as follows.
Boron 1.5 × 10¹⁹atoms / cm^ThreeOn the silicon wafer to be contained, the thickness is 2.5 μm and the boron concentration is 2.5 × 10.¹⁶atoms / cm^ThreeIn the process of manufacturing a DRAM having a trench capacitor on a wafer obtained by epitaxially growing a silicon single crystal layer containing the trench, the trench is opened by RIE (Reactive Ion Etching) method, and then polycrystalline silicon is formed in the trench by LP-CVD method. Embed. The processing temperature in this step is 625 ° C., and the processing time is 3 hours. After this step, it is kept in a nitrogen atmosphere at a temperature of 1000 ° C. for 16 hours.
[0059]
The wafer according to the eighth example was manufactured as follows.
Boron 1 × 10¹⁹atoms / cm^ThreeOn the silicon wafer to be contained, the thickness is 2.5 μm and the phosphorus concentration is 1 × 10¹⁵atoms / cm^ThreeThe silicon single crystal layer is formed in the vapor phase by the epitaxial growth method. The wafer is held in a normal resistance heating furnace at a temperature of 600 ° C. for 6 hours in a dry oxygen atmosphere, then heated to 1000 ° C. at 5 ° C./min and held for 10 hours. Thereafter, the temperature is lowered to 800 ° C. at −10 ° C./min, and the wafer is taken out of the furnace. This wafer is used as a substrate for device manufacture.
[0060]
In each of the above embodiments, as described above, the temperature region of the low-temperature heat treatment needs to be about 450 to 750 ° C. in order to form BMD with a high density as shown in FIG. Further, the low temperature heat treatment time is desirably 3 hours or more in order to obtain a sufficient DZ depth as shown in FIG.
[0061]
In addition, the same effect is acquired even if it uses nitrogen, hydrogen, argon, or these mixed gas other than oxygen for the atmosphere of the heat processing at about 450-750 degreeC in the above each Example. In other words, the type of gas used as the atmosphere during the low-temperature heat treatment is not particularly limited as long as the temperature condition meets the conditions of the present invention. Even in the step of depositing the polycrystalline silicon layer as in the fifth embodiment, the same effect can be obtained as long as the temperature and time conditions are satisfied regardless of the type of the source gas.
[0062]
The boron concentration produced in each of the above examples was 10¹⁶-10^{twenty one}atoms / cm^ThreeIn order to implement a semiconductor substrate inspection method for predicting the BMD density and the DZ depth when a semiconductor device is manufactured using a silicon single crystal substrate included in the region After performing low temperature heat treatment in the temperature range of about 450 to 750 ° C. for forming oxygen precipitate nuclei and medium temperature heat treatment in the temperature range of about 900 to 1100 ° C. which combines oxygen precipitate nucleation growth and DZ formation, It is necessary to measure the density of the precipitate. At this time, as described above, since the DZ depth is determined by the oxygen depth distribution by oxygen diffusion and the intermediate temperature heat treatment, the heat treatment at about 900 ° C. or more is involved in the DZ formation. Therefore, in order to predict the DZ depth formed in the semiconductor device manufacturing process more accurately, it is necessary to accurately simulate the thermal history in the semiconductor device manufacturing process.
[0063]
Specifically, the oxygen diffusion depth by all the heat treatment steps in the first and second heat treatment steps and the semiconductor device manufacturing step using the completed semiconductor substrate ensures the required defect-free layer depth. What is necessary is just to set intermediate temperature heat processing time so that it may become possible. The diffusion depth L when heat treatment is performed at times t1, t2,..., Tn at temperatures T1, T2,..., Tn is the diffusion coefficient of oxygen in silicon at the respective temperatures, D1, D2,. When Dn, L = (D1 t1 + D2 t2... + Dn tn) 1/2.
[0065]
As apparent from each of the examples and experimental results described above, p on p is obtained by the method for manufacturing a semiconductor substrate according to the present invention.⁺Structure or n on p⁺In a silicon wafer having a structure, a region where an element is formed can be a defect-free layer. One example of a semiconductor device using the semiconductor substrate was produced as follows.
[0066]
Boron 2 × 10¹⁹atoms / cm^Three, Oxygen 7 × 10¹⁷atoms / cm^ThreeOn the silicon wafer to be contained, the thickness is 2.5 μm and the boron concentration is 2 × 10.¹⁵atoms / cm^ThreeThe silicon layer is epitaxially grown in the gas phase. The wafer is held in a normal resistance heating furnace at a temperature of 600 ° C. for 6 hours in a dry oxygen atmosphere, then heated to 1000 ° C. at 5 ° C./min and held for 10 hours. The temperature is lowered to 800 ° C. at −10 ° C./min, and the wafer is taken out of the furnace. This wafer is used as a substrate for manufacturing a DRAM having a trench capacitor having a depth of 7.5 μm.
[0067]
2A is a cross-sectional view of a DRAM manufactured by the method for manufacturing a semiconductor substrate according to the present invention, and FIG. 2B is a cross-sectional view of a DRAM manufactured by a conventional manufacturing method. In both cases, the semiconductor substrate is p⁺The single crystal silicon layer 10 is epitaxially grown on the wafer 9, but as described above, the boron concentration, oxygen concentration, heat treatment process, and the like are different.
[0068]
FIG. 2A shows a cross-sectional structure of a DRAM having a trench capacitor 11 having a depth of 7.5 μm in a semiconductor substrate, in which the BMD 13 does not exist and the DZ 12 is formed in the element formation region. On the other hand, in FIG. 2B, the BMD 13 is also formed in the element formation region 14 which is a portion corresponding to the DZ 12 of the DRAM manufactured by the method for manufacturing a semiconductor substrate according to the present invention. The BMD density outside the element formation region with a depth of 10 μm or more is different between the present invention and the conventional substrate, respectively.
5 × 10^Tencm^-33 × 10^Tencm^-3There is almost no difference.
[0069]
FIG. 3 is a graph showing the results of measuring the DZ depth of the present invention and the conventional wafer using an infrared scattering method and a transmission electron microscope. Most of the semiconductor substrates manufactured by the conventional manufacturing method have a DZ depth of 10 μm or less, whereas the semiconductor substrate according to the present invention has a DZ depth of 10 μm or more, and is a region where a device is formed. It is clear that a sufficient defect-free layer is formed.
[0070]
The DZ widths after forming the DRAM using the wafers according to the first to seventh embodiments were 12 μm, 12 μm, 13 μm, 11 μm, 12 μm, 13 μm, and 13 μm, respectively.
[0071]
FIG. 4 is a graph showing the results of evaluating the oxide film breakdown voltage of a trench capacitor having a width of 0.6 μm and a depth of 7 μm formed on the present invention and a conventional silicon wafer. The gate oxide film was a thermal oxide film having a thickness of 10 nm, and the one having a breakdown electric field of 8 MV / cm or more was regarded as acceptable. As shown in FIG. 4, it can be seen that the oxide film breakdown voltage is greatly improved by the present invention.
[0072]
As described above, a semiconductor device manufactured using a semiconductor substrate manufactured by the method for manufacturing a semiconductor substrate according to the present invention can make an element formation region a defect-free layer in a wide range of BMD density.
[0073]
FIG. 5 is a graph showing the dependence of the yield on the DZ depth when a 64M DRAM is manufactured using these substrates by evaluating the DZ depth by the semiconductor substrate inspection method according to the present invention. When the DZ depth was too narrow, a clear decrease in yield was observed.
[0074]
The appropriate DZ depth varies depending on the device, but if the present invention is used, the DZ width can be changed not only by changing the intermediate temperature heat treatment conditions (time and temperature) but also by changing the low temperature heat treatment conditions (time and temperature).
[0075]
Moreover, although the example of the trench type device has been shown, the same effect can be obtained with a stack type device or a device other than the trench type such as a processor.
[0076]
Note that the first heat treatment and the second heat treatment of the present invention may be performed in the device manufacturing process. In this case, both the first heat treatment and the second heat treatment may be performed as one heat process, or a plurality of heat processes may be combined so as to obtain a predetermined BMD density and DZ depth. In addition, a heat treatment such as a CVD process or an oxidation process that does not directly aim at the DZ formation may be used for the DZ formation. As described in the fifth embodiment, since the temperature and time of the heat treatment are affected by the DZ formation and there is no influence of the atmosphere and the film, it can be used as a thermal process for forming the DZ even in the CVD process.
[0077]
Further, the first silicon single crystal layer can be formed by a modification of the CZ method, for example, the MCZ (magnetic field application CZ) method, the CCZ (continuous CZ) method, or the DLCZ (two-layer CZ) method. In the MCZ method, any magnetic field direction and shape are adopted.
[0078]
【The invention's effect】
As described above, according to the method for manufacturing a semiconductor substrate according to the present invention, oxygen precipitation nuclei are deposited on the silicon single crystal having the region containing the first concentration of boron, or oxygen precipitation from the oxygen precipitation nuclei. A first heat treatment step for growing an object, and a temperature higher than the temperature in the first heat treatment step, which is sufficiently high to reduce the oxygen precipitate nuclei or the oxygen precipitates on which the precipitate nuclei have grown, and boron redistribution is an element A second heat treatment step of performing a heat treatment at a temperature within a sufficiently low range so as not to affect the characteristics, and forming a defect-free layer with a predetermined depth in a predetermined region on the one main surface side. So p⁺When manufacturing a semiconductor device using a wafer, it is possible to manufacture a semiconductor substrate having a defect-free layer (DZ) having a depth sufficient to prevent adverse effects on device characteristics while avoiding a high-temperature heat treatment process.
[0079]
This method includes a step of forming a second silicon single crystal layer by p on p⁺A semiconductor substrate having a defect-free layer (DZ) deep enough to prevent adverse effects on device characteristics while avoiding a high-temperature heat treatment process can also be manufactured.
[0080]
In addition, according to the method for inspecting a semiconductor substrate according to the present invention, after the second heat treatment step, the measurement step of measuring the density of the oxygen precipitation nuclei precipitated in the silicon single crystal and grown on the oxygen precipitates Thus, the time for the second heat treatment step can be set accurately.
[Brief description of the drawings]
FIG. 1 is an explanatory view schematically showing a manufacturing process by a method for manufacturing a semiconductor substrate according to the present invention.
2A is a cross-sectional view of a DRAM manufactured by a method for manufacturing a semiconductor substrate according to the present invention, and FIG. 2B is a cross-sectional view of a DRAM manufactured by a conventional manufacturing method.
FIG. 3 is a graph showing the results of measuring the DZ depth of the present invention and a conventional semiconductor substrate using an infrared scattering method and a transmission electron microscope.
FIG. 4 is a graph showing a result of forming a trench capacitor in the semiconductor substrate of the present invention and a conventional semiconductor substrate and evaluating an oxide film breakdown voltage.
FIG. 5 is a graph showing DZ depth dependence of yield of a DRAM manufactured using a semiconductor substrate according to the present invention.
FIG. 6 is a graph showing the dependence of the BMD density in a semiconductor substrate on the low-temperature heat treatment temperature when a two-step heat treatment is performed.
FIG. 7 is a graph showing the relationship between the intermediate temperature heat treatment time and the BMD density when the low temperature heat treatment time is made constant in the case of performing the two-step heat treatment.
FIG. 8 is a graph showing the relationship between the intermediate temperature heat treatment time and the DZ depth when the low temperature heat treatment time is made constant in the case of performing the two-step heat treatment.
FIG. 9 is a graph showing the relationship between the low temperature heat treatment time and the BMD density when the medium temperature heat treatment time is kept constant in the case of performing the two-step heat treatment.
FIG. 10 is a graph showing the relationship between the low temperature heat treatment time and the DZ depth when the intermediate temperature heat treatment time is kept constant in the case of performing the two-step heat treatment.
FIG. 11 is a graph showing the boron concentration dependence of DZ depth.
FIG. 12 is a graph showing the dependence of DZ depth on low-temperature heat treatment temperature.
FIG. 13 is a graph showing the dependence of DZ depth on low-temperature heat treatment temperature.
FIG. 14 is a graph showing the dependency of BMD density on boron concentration.
[Explanation of symbols]
1 P⁺Wafer
2 Oxygen precipitation nuclei
3 Oxygen precipitate (BMD)
4 Defect-free layer (DZ)
9 High concentration boron-containing silicon single crystal
10 Single crystal silicon layer
11 Trench capacitor
12 DZ
13 BMD
14 Element formation region

Claims (3)

A silicon single crystal layer forming step of forming a silicon single crystal layer on a silicon single crystal plate having a boron concentration of 10 ¹⁸ atoms / cm ³ or more;
A first heat treatment step of performing a heat treatment for 3 hours or more in a temperature region of 450 to 750 ° C. on the laminate including the silicon single crystal plate and the silicon single crystal layer ;
After the first heat treatment step, a second heat treatment step of performing heat treatment in a temperature range of 900 to 1100 ° C.,
The oxygen diffusion depth from the surface of the silicon single crystal plate by the first and second heat treatment steps and all the heat treatment steps in the semiconductor device manufacturing step using the completed semiconductor substrate prevents adverse effects on device characteristics. A time for the second heat treatment step is set so that a defect-free layer depth from the surface of the silicon single crystal plate sufficient to do so can be secured . 2. The method of manufacturing a semiconductor substrate according to claim 1, wherein the silicon single crystal plate is a substrate cut out from single crystal silicon formed by a CZ (Czochralski) method or a modified method thereof, and the silicon single crystal layer formation A process is a formation process by an epitaxial growth method, The manufacturing method of the semiconductor substrate characterized by the above-mentioned. 2. The method of manufacturing a semiconductor substrate according to claim 1, wherein the first heat treatment step is performed in a temperature region of 450 to 600 ° C., and the second heat treatment step is performed in a temperature region of 900 to 1000 ° C. 3.

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