JP4174026B2 - Image processing device - Google Patents

Description

Industrial application fields

  The present invention relates to an image processing apparatus having a frame memory for display, and in particular, high visualization (visual) such as video game machines and graphic computers that generate images based on compressed image data and computer graphics drawing data. It is suitable when performance is required.

  For example, in computer graphics, a so-called 3D (three-dimensional = three-dimensional) graphics system usually draws a surface of an object when drawing a realistic object (the object to be drawn is called an object). Decompose into multiple polygons (the smallest unit (triangle or quadrangle) of graphics handled by the drawing device is called a polygon), draw each polygon in turn in a frame memory (frame buffer memory) corresponding to the monitor display screen, Drawing image data is stored in the frame memory, read out and displayed on the monitor display screen, thereby reconstructing a stereoscopically visible image.

  In parallel with the 3D graphics system as described above, a digital moving image reproduction system in which a secondary storage device such as a CD-ROM disk on which image data is compressed and recorded and an image decompression device may be mounted. . Although the digital video playback system is less interactive than the 3D graphics system, it has the advantage of easily playing back images that are difficult to express with the 3D graphics system. It is used as a supplement.

  Conventionally, in an image processing apparatus provided with this kind of display frame memory (frame buffer), the number of bits of pixels of image data written in the frame memory is generally fixed. For example, in a game machine or the like, drawing with 3D graphics does not require so high image quality, so the number of bits per pixel consisting of three primary color data R (red), G (green), and B (blue) is R , G and B are 5 bits each, 15 bits / pixel, and are fixed at a resolution of 32,000 colors.

  As described above, since the number of bits per pixel of the frame memory is conventionally fixed, as described above, in the system combining the 3D graphics system and the digital video playback system, the video is played back. Even when there was a margin in the capacity of the frame memory at the time of display, the resolution was 15 bits / pixel and only a resolution of 32,000 colors was obtained.

  Considering the display of this moving image, it is considered that the number of bits per pixel of the frame memory is fixed to be able to display 16.7 million colors, for example, each of R, G, and B is 8 bits and 24 bits / pixel. However, this increases the memory area for display of the frame memory, and considering that this number of bits is not necessary for a 3D graphics drawing image, it is inefficient.

  In view of the above points, an object of the present invention is to provide an image processing apparatus capable of optimizing the number of bits per pixel of a frame memory in accordance with the image quality of a displayed image.

In order to solve the above problems, an image processing apparatus according to the present invention includes a frame memory, a drawing processing means for writing image data in the frame memory, and image data written in the frame memory, each pixel having a first bit First image data reading means for reading out the number of image data, second image data reading means for reading out the image data written in the frame memory as if each pixel has the second number of bits, and the frame memory A first switching unit that reads out the image data from one of the first image data reading unit and the second image data reading unit to the other based on a switching instruction from the drawing processing unit. Switching means .

  In a preferred embodiment, a D / A converter that converts image data read from the frame memory into an analog image signal, and a data supply source to the D / A converter are the first image data read-out. And a second switching means for switching from one of the means and the second image data reading means to the other based on the switching instruction.

Action

  According to the present invention having the above-described configuration, the recognition unit 61 recognizes whether the image data has been written in the frame memory with the first number of bits or the second number of bits.

  Based on the recognition information of the recognition means 61, when the image data read from the frame memory 63 is of the first number of bits / pixel, the switching means SW1 and SW2 are switched so that the first image The data reading means 64 is selected, and image data is read from the frame memory 63. When the image data read from the frame memory 63 is the second number of bits / pixel, the switching means SW1 and SW2 are switched to select the second image data reading means 65, and the frame memory 63 is selected. Image data is read out from.

  Thus, the image data written / read out to / from the frame memory 63 can be optimized according to the image quality.

  An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows an example of the configuration of an image processing apparatus according to an embodiment of the present invention. This example is an embodiment of a game machine having a 3D graphic function and a digital moving image playback function.

  In FIG. 1, reference numeral 41 denotes a system bus (main bus). A CPU 42, a main memory 43, and a sorting controller 45 are connected to the system bus 41.

  An image decompression unit 51 is connected to the system bus 41 via an input FIFO buffer memory (hereinafter, FIFO buffer memory is abbreviated as a FIFO buffer) 54 and an output FIFO buffer 55. Further, the CD-ROM decoder 52 is connected to the system bus 41 via the FIFO buffer 56, and the drawing device unit 61 is connected to the system bus 41 via the FIFO buffer 62.

  A frame memory 63 is connected to the drawing device unit 61. In this frame memory 63, the data of the drawn image formed by the drawing command is written as will be described later, and the image data decompressed and decoded by the image decompressing unit 51 is written. The reproduced image is displayed.

  Reference numeral 71 denotes a control pad as operation input means, which is connected to the system bus 41 via an interface 72. Further, the system bus 41 is connected to a boot ROM 73 that stores a program for starting up the game machine.

  The CPU 42 manages the entire apparatus. In the apparatus of this example, the display image data from the frame memory 63 is 15 bits / pixel image data (hereinafter referred to as image data of the first number of bits) of 5 bits each for R, G, and B. The first mode (hereinafter referred to as the normal mode), and R, G, and B each having 8-bit image data of 24 bits / pixel (hereinafter referred to as image data having the second number of bits). Two modes of a second mode (hereinafter referred to as a high resolution mode) can be selected, and the CPU 42 switches the mode.

  In addition, the CPU 42 performs a part of processing when an object is drawn as a collection of many polygons. That is, the CPU 42 creates an example of a drawing command for generating a drawing image for one screen on the main memory 43 as will be described later.

  The CPU 42 has a cache memory 46, and a part of the CPU instructions can be executed without fetching from the system bus 41. Further, the CPU 42 is provided with a coordinate calculation device unit 44 as a CPU internal coprocessor for performing coordinate conversion calculation for polygons when creating a drawing command. The coordinate calculation unit 44 performs three-dimensional coordinate conversion and three-dimensional to two-dimensional conversion on the display screen.

  As described above, since the CPU 42 has the instruction cache 46 and the coordinate arithmetic unit 44 inside, the processing can be performed to some extent without using the system bus 41, so the system bus 41 is released. It's easy to do.

  The CD-ROM decoder 52 is connected to a CD-ROM driver 53 and decodes data recorded on a CD-ROM disc attached to the CD-ROM driver 53. The CD-ROM disc records application programs (for example, game programs), moving image and still image image data compressed by, for example, discrete cosine transform (DCT), and texture image image data for modifying polygons. Has been. The application program on the CD-ROM disc includes a polygon drawing command. The FIFO buffer 56 has a capacity for one sector of the recording data of the CD-ROM disc.

  The image decompression unit 51 performs decompression processing of compressed image data reproduced from a CD-ROM disc, and includes hardware of a Huffman code decoder, an inverse quantization circuit, and an inverse discrete cosine transform circuit. The CPU 42 may process the Huffman code decoder as software.

  In this example, the image expansion device unit 51 decodes the compressed image data into image data having a first bit number of 15 bits / pixel and an image having a second bit number of 24 bits / pixel. Decoding processing in two modes, that is, a decoding processing mode for decompressing data, can be performed. The CPU 42 issues a mode switching instruction to the image expansion device unit 51. According to this mode switching instruction, in the normal mode, the image decompression unit 51 decodes the compressed image data into image data having the first bit number, and in the high resolution mode, the image data is converted into image data having the second bit number. Decode.

  In the case of this example, as shown in FIG. 7 to be described later, the image decompression unit 51 converts one image (one frame) into a small area of about 16 × 16 pixels (pixels) (hereinafter referred to as a macroblock). Image decompression decoding is performed in units of macroblocks. Data transfer is performed with the main memory 43 in units of macroblocks. Therefore, the FIFO buffers 54 and 55 have a capacity corresponding to a macro block.

  A frame memory 63 is connected to the drawing device unit 61 via the local bus 11. The drawing device unit 61 executes a drawing command transferred from the main memory 43 via the FIFO buffer 62 and writes the result into the frame memory 63. The execution of drawing by this drawing command is performed only in the normal mode. The drawing image data is image data having a first bit number of 15 bits / pixel. The FIFO buffer 62 has a memory capacity for one drawing command.

  The frame memory 63 stores an image memory area for storing rendered images and moving image images for display, a texture area for storing texture images, and a table memory area for storing a color lookup table (color conversion table CLUT). Is provided. Two types of color look-up tables are prepared for the normal mode and the high resolution mode. For the normal mode, a part for the high resolution mode can be used.

  FIG. 2 shows the memory space of the frame memory 63. The frame memory 63 is addressed with two-dimensional addresses of columns and rows. Of this two-dimensional address space, the area AT is a texture area. A plurality of types of texture patterns can be arranged in the texture area AT. AC is a table memory area of the color conversion table CLUT.

  As will be described later, the data of the color conversion table CLUT is transferred from the CD-ROM disk to the frame memory 63 by the sorting controller 45 through the CD-ROM decoder 52. The data of the texture image on the CD-ROM disc is decompressed by the image decompressing unit 51 and transferred to the frame memory 63 via the main memory 43.

  In FIG. 2, AD is an image memory area, and includes a frame buffer area for two areas, a drawing area and a display area. In this example, a frame buffer area currently used for display is referred to as a display buffer, and a frame buffer area where drawing is performed is referred to as a drawing buffer. In this case, while drawing is performed using one as a drawing buffer, the other is used as a display buffer. When drawing is completed, the two buffers are switched to each other. Switching between the drawing buffer and the display buffer is performed in synchronization with vertical synchronization when drawing is completed.

  In this example, two read circuits (unpack circuits) are prepared for reading from the display buffer of the frame memory 63. That is, the unpack circuit 64 is a readout circuit for a normal mode, and assumes 15 bits / 1 pixel (which can be considered as 2 bytes / 1 pixel), and the image data is displayed in the display buffer of the frame memory 63 every 15 bits. Read from. The unpack circuit 65 is a readout circuit for the high resolution mode, and reads out image data from the display buffer of the frame memory 63 every 24 bits as 24 bits / 1 pixel (3 bytes / 1 pixel).

  These unpack circuits 64 and 65 are switched by switches SW1 and SW2. The switches SW1 and SW2 are for explanation, and actually, the operation on / off of the unpack circuits 64 and 65 is switched by a switching control signal.

  Switching between the unpack circuits 64 and 65 is performed by a switching control signal from the drawing device unit 61. Since the mode switching instruction is given from the CPU 42 to the drawing device unit 61, the drawing device unit 61 forms a switching control signal for the switches SW1 and SW2 based on the instruction. The mode switching instruction from the CPU 42 is given when switching between the display buffer area and the drawing buffer area of the image memory area AD of the frame memory 63. At the time of writing image data to the frame memory 63, the CPU 42 recognizes whether the image data of the first bit number or the second image data is currently being written. It is only necessary to sequentially write the transferred image data to the drawing buffer of the frame memory 63.

  As described above, the image data read by the unpack circuit 64 or the unpack circuit 65 is converted into an analog image signal by the D / A converter 66, output to the image monitor device 67, and displayed on the screen. Note that the D / A converter 66 changes the number of bits of the input image data R, G, and B in accordance with the mode switching, so that the switching process is performed accordingly.

  The sorting controller 45 has the same function as a so-called DMA controller, transfers image data between the main memory 43 and the image decompression unit 51, and sends a drawing command sequence from the main memory 43 to the drawing unit 61. The transfer device unit is configured. The sorting controller 45 performs the above-described transfer process without the intervention of the CPU 42 through a gap where other devices such as the CPU 42 and the control pad 71 open the system bus 41. In this case, the CPU 42 can notify the sorting controller 45 of the opening of the system bus 41, or the sorting controller 45 can forcibly request the CPU 42 to release the bus.

  The main memory 43 includes a memory area for compressed image data and a memory area for decompressed image data subjected to decompression decoding processing for moving image and still image data. The main memory 43 includes a memory area for graphics data such as a drawing command sequence (hereinafter referred to as a packet buffer).

  The packet buffer is used for setting the drawing command sequence by the CPU 42 and transferring the drawing command sequence to the drawing device unit 61, and is shared by the CPU 42 and the drawing device unit 61. In this example, a packet buffer for setting a drawing command sequence (hereinafter referred to as a setting packet buffer) and a packet buffer for transfer are used so that the CPU 42 and the drawing device unit 61 operate in parallel. (Hereinafter referred to as an execution packet buffer), and when one is a setting packet buffer, the other is used as an execution packet buffer. The functions of two packet buffers are exchanged.

  The processing of this apparatus will be described below.

[Import data from CD-ROM disc]
When the apparatus (game machine) in the example of FIG. 1 is turned on and a CD-ROM disk is loaded, the CPU 42 executes a program for performing a so-called initialization process for executing the game in the boot ROM 73. . Then, the recording data of the CD-ROM disc is captured. At this time, each user data is decoded based on the identification information ID in the user data of each sector of the CD-ROM disc, and the data is checked. Based on this check result, the CPU 42 executes a process according to the reproduction data having the contents indicated by each ID.

  That is, compressed image data, a drawing command, and a program executed by the CPU 42 are read from the CD-ROM disk via the CD-ROM driver 53 and the CD-ROM decoder 52 and loaded into the main memory 43 by the sorting controller 45. The Of the loaded data, the information of the color conversion table is transferred to the area CLUT of the frame memory 63.

[Processing and transfer of drawing instruction sequence]
Polygons that make up the surface of an object are displayed in a three-dimensional manner on a two-dimensional image display surface by drawing in order from polygons that are deep in the depth direction according to Z data that is three-dimensional depth information. Can do. The CPU 42 creates, on the main memory 43, a drawing command sequence for causing the drawing device unit 61 to perform drawing in order from the polygons at deep positions in the depth direction.

  By the way, in computer graphics, a so-called Z buffer method is used in which Z data is stored in a memory for each pixel and the display priority order of polygons is determined. However, in this Z buffer method, a large capacity memory must be used to store Z data. Therefore, in this example, the CPU 42 performs processing for determining the display priority order of polygons as follows.

  Therefore, in this example, the polygon drawing command IP has a structure as shown in FIG. 3A. That is, the polygon drawing command IP includes a header before the polygon drawing data PD, and the header portion includes a tag TG and a command identification code CODE.

  In the tag TG, an address on the main memory 43 in which the next drawing command is stored is written. The command identification code CODE includes identification data IDP indicating what the drawing command has and other information necessary for the drawing command. The polygon drawing data PD is composed of data such as the vertex coordinates of the polygon. When the drawing command IP is, for example, a drawing command for a quadrangular polygon and the polygon is mapped with one color, the identification data IDP indicates that, and other necessary information includes Color data to be mapped is described.

  FIG. 3B is a drawing command of this quadrilateral polygon, and the coordinates (X0, Y0), (X1, Y1), (X2, Y2), (X3, Y3) of four points are described in the polygon drawing data PD. The command identification code CODE includes color data (R, G, B) of three primary colors for mapping the inside of the polygon with one color.

  The CPU 42 calculates the movement of the object and the viewpoint based on the user's operation input from the control pad 71, and creates a polygon drawing command sequence on the main memory 43. Next, the polygon rendering command sequence tag is rewritten in the display order with the Z data. At this time, only the tag is rewritten without changing the address of each drawing command on the main memory 43.

  When the drawing command sequence is completed, the sorting controller 45 sequentially traces the tag TG of each drawing command and transfers the drawing command from the main memory 43 to the drawing device unit 61 for each drawing command. Therefore, the FIFO buffer 62 only needs to have a capacity for one drawing command.

  In the drawing device unit 61, since the transmitted data is already sorted, the polygon drawing commands IP1, IP2, IP3,..., IPn are sent to the tags TG1, TG2, and TGn as shown in FIG. The results are stored in the image memory area AD of the frame memory 63 by sequentially executing in accordance with TG3,.

  At the time of drawing the polygon, the data is sent to the gradient calculation unit of the drawing device unit 61 to perform the gradient calculation. The gradient calculation is a calculation for obtaining the inclination of the plane of the mapping data when the inside of the polygon is filled with the mapping data in polygon drawing. In the case of texture, the polygon is filled with texture image data, and in the case of Gouraud shading, the polygon is filled with luminance values.

  When a texture is pasted on a polygon constituting the surface of an object, the texture data in the texture area AT is two-dimensionally mapped. For example, texture patterns T1, T2, and T3 as shown in FIG. 5A are converted into coordinates on a two-dimensional screen so as to match the polygons on each surface of the object as shown in FIG. 5B. The texture patterns T1, T2, T3 thus mapped are pasted on the surface of the object OB1, as shown in FIG. 5C. This is arranged in the image memory area AD and displayed on the display screen of the image display monitor 65.

  In the case of a still image texture, the texture pattern on the main memory 43 is transferred to the texture area AT on the frame memory 63 via the drawing device unit 61. The drawing device unit 61 pastes this on the polygon. Thereby, the texture of the still image is realized on the object. This still image texture pattern data can be recorded on a CD-ROM disc.

  Furthermore, animation textures are possible. In the case of a moving image texture, the moving image data decompressed and decoded by the image decompressing unit 51 is sent to the texture area AT on the frame memory 63, as will be described later. Since the texture area AT is provided in the frame memory 63, the texture pattern itself can be rewritten for each frame. As described above, when a moving image is sent to the texture area AT, the texture is dynamically rewritten and changed every frame. If the texture mapping to the polygon is performed by the moving image in the texture area AT, the moving image texture is realized.

[Decompression and transfer of compressed image data]
Of the input data to the main memory 43, the compressed image data is written again into the main memory 43 by the CPU 42 after the CPU 42 decodes the Huffman code. Then, the sorting controller 45 transfers the image data after the decoding process of the Huffman code from the main memory 43 to the image expansion device unit 51 via the FIFO buffer 54. Prior to this, the CPU 42 is instructed to the image expansion device unit 51 to perform decoding in the normal mode or in the high resolution mode. The image decompression unit 51 performs inverse quantization processing and inverse DCT processing, and performs decompression decoding processing of image data in a mode in accordance with an instruction from the CPU 42.

  The expanded image data is transferred to the main memory 43 by the sorting controller 45 via the FIFO buffer 55. In this case, as described above, the image expansion device unit 51 performs image data expansion processing in units of macroblocks. Therefore, the compressed data in units of macro blocks is transferred from the main memory 43 to the input FIFO buffer 54 by the sorting controller 45. When the decompression decoding process for one macroblock is completed, the image decompressing unit 51 puts the resulting decompressed image data into the output FIFO buffer 55 and also receives the compressed data of the next macroblock from the input FIFO buffer 54. Take out and perform decompression decoding.

  The sorting controller 45 transfers the decompressed image data of one macro block to the main memory 43 unless the system bus 41 is opened and the output FIFO buffer 55 of the image decompressing device 51 is empty. One macroblock of compressed image data is transferred from the main memory 43 to the input FIFO buffer 54 of the image decompression unit 51.

  The CPU 42 transfers the decompressed data to the frame memory 63 via the drawing device unit 61 when a certain amount of macroblocks of the decompressed image data is accumulated in the main memory 43. At this time, if the decompressed image data is transferred to the image memory area AD of the frame memory 63, it is displayed on the image monitor device 65 as a background moving image as it is. Further, it may be transferred to the texture area AT of the frame memory 63. The image data of the texture area AT is used for modifying the polygon as a texture image.

  In this case, when the drawing image is combined with the background moving image, the image data of the background moving image is decompressed and decoded as image data having the first number of bits in the normal mode and transferred to the frame memory 63. Similarly, when the decompressed image data is transferred to the texture area AT, it is decompressed and decoded as image data having the first number of bits in the normal mode. This is because the drawing image data is formed with the first number of bits. In the case of a background image that is not combined with the drawn image, it is decompressed and decoded as high-resolution second-bit image data.

  When image data decompressed and decoded by the image decompression device 51 is transferred from the main memory 43 to the frame memory 63, a transfer command as shown below is used in this example. In this manner, the CPU 42 converts the decompressed image data into the transfer command format.

  That is, FIG. 6 shows the structure of this transfer instruction. This transfer command has substantially the same format as the drawing command, and includes a tag TG at the head and then identification data IDP. The tag TG is composed of an address value of the main memory 43 in which the next drawing command or transfer command is stored, similarly to the drawing command. The identification data IDP describes data indicating that this is a transfer command for decompressed image data.

  In FIG. 6, the next data “H” and “W” indicate the height and width of the decompressed data area to be transferred. The height and width of this transfer area correspond to the area on the screen for one frame. Data “X” and “Y” indicate the coordinates of the transfer destination. Since the transfer area is a rectangle, this coordinate indicates the upper left coordinate of the rectangle area. The coordinates are coordinates in the area AD if the transfer destination is in the image memory area AD of the frame memory 63, and coordinates in the area AT if the transfer destination is in the texture area AT.

  In the case of the transfer instruction of the decompressed image data, the above tags TG to the coordinates “X” and “Y” are headers, and the size of the header is identified from the identification data IDP. From the identification data IDP to the coordinates “X” and “Y” correspond to the command identification code CODE of the drawing command in FIG.

  Following this header, pixel data PIX0, PIX1, PIX2,..., PIXn of decompressed image data are included in this transfer command. As described above, each pixel data is 15 bits in the normal mode and 24 bits in the high resolution mode. The decompressed image data is transferred from the main memory 43 to the frame memory 63 via the drawing device unit 61 by the sorting controller 45 in units of this transfer command.

  By the way, as described above, the image decompression unit 51 divides an image of one frame into macroblocks each composed of horizontal × vertical = 16 × 16 pixels and performs decompression decoding in units of macroblocks. Now, for example, assuming an image in which one frame is composed of pixels of horizontal × vertical = 320 × 240, as shown in FIG. 7, one frame is divided into 300 macroblocks.

  In transferring these 300 macroblocks to the drawing device unit 61, if a transfer command is created in units of macroblocks, the overhead of the header portion becomes too large. Therefore, in this example, as shown in FIG. 8, a plurality of (15 in FIG. 8) macroblocks in one column in the vertical direction are connected and used as a unit to be sent by a transfer command.

  An example of the first transfer command of one frame is shown in FIG. That is, in FIG. 9, the coordinates “X” and “Y” are “0” and “0”. In the next transfer command, the coordinates “X” and “Y” become “16” and “0”.

  As described above, since the decompressed image data is also converted into a transfer command format similar to the rendering command, the polygon drawing command and the transfer command are mixed and transferred by the sorting controller 45 by using the tag TG. In addition, an image can be drawn and generated in the frame memory 63 by the drawing device unit 61.

[Description of Image Data Reading Process from Frame Memory 63]
First, the CPU 42 instructs the drawing device unit 61 to output the image data of one frame buffer area A (which is a display buffer) of the image memory area AD of the frame memory 63 to the image monitor device 67. put out. At this time, the CPU 42 also sends a mode switching control signal indicating whether the mode is the normal mode or the high resolution mode to the drawing device unit 61.

  When the normal mode is designated, the drawing device unit 61 switches the switches SW1 and SW2 to the N side and selects the unpack circuit 64. At this time, each of the pixel data PIX is written in every 15 bits (2 bytes) in the display buffer of the image memory area AD of the frame memory 63 as indicated by an ellipse in FIG. 10A. .

  As described above, the unpack circuit 64 reads the image data every 15 bits (2 bytes) from the display buffer in the image memory area AD of the frame memory 63, and sequentially transfers the read image data to the D / A converter 66. Convert to analog image signal. As a result, the reproduced image is displayed on the screen of the image monitor device 67. In this example, the normal mode displays (1) only the rendered image, (2) the composite image in which the texture image is pasted on the rendered polygon, and (3) the 15-bit obtained by decompression decoding. / In the background image consisting of a moving image or still image of pixels, a drawing image drawn as many polygons is synthesized, (4) Only a moving image or still image of 15 bits / pixel obtained by decompression decoding, etc. is there.

  When the high resolution mode is designated, the drawing device unit 61 switches the switches SW1 and SW2 to the H side and selects the unpacking circuit 65. At this time, each of the pixel data PIX is written in every 24 bits (3 bytes) in the display buffer of the image memory area AD of the frame memory 63 as shown by an ellipse in FIG. 10B. .

  The unpack circuit 65 reads the image data every 24 bits (3 bytes) from the display buffer in the image memory area AD of the frame memory 63, and sequentially transfers the read image data to the D / A converter 66 to convert it into an analog image signal. To do. As a result, the reproduced image is displayed on the screen of the image monitor device 67. In this example, a 24-bit / pixel moving image or still image obtained by decompression decoding is displayed in this high resolution mode.

  During the reading of the image data from one frame buffer A, the CPU 42 generates data to be transferred to the drawing device unit 61 in the main memory 43 next time. In the case of generating the drawing command sequence, the operation input of the control pad 71 is read, and the coordinate value of the drawing command sequence of one packet buffer (which is a set packet buffer) of the main memory 43 is read according to this operation input. And the tag of each drawing command in the drawing command sequence is rewritten. In the case of decompressed image data, it is converted into data in the transfer command format as described above. The CPU 42 recognizes whether the expanded image data of 15 bits / pixel or the expanded image data of 24 bits / pixel.

  Then, through the drawing command generation processing by the CPU 42 or the processing for changing the decompressed image data to the transfer command format, the sorting controller 45 causes the main memory to be stored in the other frame buffer area B (which is a drawing buffer). A drawing command sequence or decompressed image data is transferred from 43. The CPU 42 recognizes whether the data transferred at this time is a drawing command sequence, 15-bit / pixel decompressed image data, or 24-bit / pixel decompressed image data.

  Next, when all drawing command sequences and transfer command sequences from the main memory 43 are transferred to the drawing device unit 61, the CPU 42 uses the other frame buffer area B of the frame memory 63 as a display buffer, thereby drawing image data. Or a command to the drawing device unit 61 to read out the decompressed image data and output it to the image monitor device 65. At this time, as described above, since the CPU 42 also sends a mode switching control signal instructing whether the mode is the normal mode or the high resolution mode to the drawing device unit 61, the drawing device unit 61 switches the switch SW1 in the same manner as described above. And SW2 are switched, and a reading process corresponding to the normal mode and the high resolution mode is performed. At the same time, the frame buffer area A of the frame memory 63 is switched to the drawing buffer.

  Then, while reading out image data using the other frame buffer area B as a display buffer area, the CPU 42 generates data to be transferred to the drawing device unit 61 in the main memory 43 as described above. Then, through the drawing command generation processing by the CPU 42 or the processing for changing the decompressed image data to the transfer command format, the sorting controller 45 causes the main memory to be stored in one frame buffer area A (which is a drawing buffer). A drawing command sequence or decompressed image data is transferred from 43.

  By repeating the above operations, a moving image can be displayed. In addition, the unpacking circuits 64 and 65 are switched according to the normal mode and the high resolution mode, and a reading process according to the image quality of the image data written in the frame memory 63 is performed.

  In the above description, the case where the number of bits per pixel is two has been taken as an example, but it goes without saying that the present invention can be similarly applied even when there are three or more.

  In the above example, image data and application programs are recorded on the CD-ROM disc. However, as the recording medium, other recording media such as a magnetic disk and a semiconductor memory such as a memory card can be used. .

  Further, although DCT is used as an image data compression method, various other image data compression methods can be used.

1 is a block diagram of an embodiment of an image processing apparatus according to the present invention. It is a figure for demonstrating the memory area | region in one Example of this invention. It is a figure which shows the example of the polygon drawing command in one Example of this invention. It is a figure for demonstrating the drawing display order of the polygon in one Example of this invention. It is a figure for description of texture mapping. It is a figure for demonstrating the example of the data structure at the time of transfer of the image data in one Example of this invention. It is a figure which shows the example of the image of 1 frame. It is a figure for demonstrating the transfer unit of the image data in one Example of this invention. It is a figure which shows the example of the data structure at the time of transfer of the image data in one Example of this invention. It is a figure for demonstrating the several example of the bit number per pixel in one Example of this invention.

Explanation of symbols

41 System bus 42 CPU
43 Main memory 44 Coordinate operation unit 45 Sorting controller 46 Cache memory 51 Image decompression unit 52 CD-ROM decoder 53 CD-ROM driver 54, 55 FIFO buffer 61 Drawing unit 62 FIFO buffer 63 Frame memory 65 Image display monitor 71 Control pad AD Image memory area AT Texture area PIX Pixel

Claims (3)

Frame memory,
A process of writing image data in which the three primary color data R, G, B of each pixel is composed of data of the first bit number to the frame memory, and the three primary color data R, G, B of each pixel are Rendering processing means for performing processing of writing image data composed of data of a second bit number different from the number of 1 bits into the frame memory;
First image data reading means for reading out the image data written in the frame memory on the assumption that the three primary color data R, G, B of each pixel are image data composed of the data of the first number of bits, respectively. ,
Second image data reading means for reading out the image data written in the frame memory on the assumption that the three primary color data R, G, B of each pixel are image data composed of the data of the second number of bits, respectively ; ,
Read means for reading the image data from the frame memory is changed from one of the first image data read means and the second image data read means to the other based on a switching instruction from the drawing processing means. And a first switching means for switching. A D / A converter for converting image data read from the frame memory into an analog image signal;
Second switching means for switching a data supply source to the D / A converter from one of the first image data reading means and the second image data reading means to the other based on the switching instruction. The image processing apparatus according to claim 1, further comprising: The image processing apparatus according to claim 1, wherein:
The frame memory is provided with a texture area for storing texture, and an image area for storing image data read by the first image data reading means and the second image data reading means,
The drawing processing means includes:
When rendering a polygon in which the three primary color data R, G, and B of each pixel are composed of the data of the first bit number, the three primary color data R, G, and B of each pixel are the first bit number, respectively. A texture composed of the data is stored in the texture area, the polygon is stored in the image area, and the stored texture is pasted on the stored polygon. An image processing apparatus.

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