JP4020367B2

JP4020367B2 - Manufacturing method of semiconductor device

Info

Publication number: JP4020367B2
Application number: JP2002113368A
Authority: JP
Inventors: 義彦根本
Original assignee: Renesas Technology Corp
Current assignee: Renesas Technology Corp
Priority date: 2001-04-17
Filing date: 2002-04-16
Publication date: 2007-12-12
Anticipated expiration: 2022-04-16
Also published as: TWI223391B; TW200401400A; JP2003007909A

Description

【０００１】
【発明の属する技術分野】
この発明は、基板本体の表面の回路形成面から裏面に達する貫通電極を有する半導体装置の製造方法、その半導体装置、およびその半導体装置を組み込んだ電子機器に関するものである。
【０００２】
【従来の技術】
図６３（ａ）〜図６３（ｇ）は貫通電極を有する従来の半導体装置の各製造工程を示すそれぞれの断面図である。
以下、この半導体装置の製造手順について図に基づいて説明する。
先ず、図６３（ａ）に示すように、表面の回路形成面に所定機能を有する回路素子部２０２を複数個配置した基板本体２０１を製造する。
次に、図６３（ｂ）に示すように、シリコンウエハで構成された基板本体２０１の表面から１００μｍ弱の孔２０３を複数形成する。
その次に、孔２０３の内壁面に絶縁膜を形成し、その後電気めっきの陰極となる金属膜を絶縁膜上に堆積する。そして、これを陰極として図６２（ｃ）に示すように孔２０３の内部を金属で埋めて貫通電極２０４を形成する。
次に、図６３（ｄ）に示すように、基板本体２０１の裏面を貫通電極２０４の端面が露出するまで削除し、また図６２（ｅ）に示すように、基板本体２０１の裏面を選択的にエッチングする。
その次に、化学蒸着法（ＣＶＤ）により、図６２（ｆ）に示すように、基板本体２０１の裏面にＳｉＯ_２で構成された絶縁膜２０５を堆積する。
その後、写真製版法を用いて絶縁膜２０５の貫通電極２０４の部分をエッチング除去することで、図６３（ｇ）に示すように貫通電極２０４が基板本体２０１を貫通した半導体装置集合体が製造され、最後にこの半導体装置集合体を複数個に分割することで半導体装置が製造される。
【０００３】
【発明が解決しようとする課題】
上記構成の貫通電極２０４を有する半導体装置の製造方法では、貫通電極を形成する前に、エッチング加工をしているが、このようにエッチング加工を用いた場合には、トレンチエッチング加工できる孔２０３の深さの最大値は１００μｍ程度であり、従って図６３（ｄ）に示すように貫通電極２０４の端面が露出するまで基板本体２０１の裏面を削除したときには、基板本体２０１の肉厚は極めて薄くならざるを得ない。
この状態からの後工程では、図６３（ｅ）〜図６３（ｇ）に示すように、基板本体２０１の裏面のエッチング処理工程、エッチング処理後の絶縁膜２０５の形成工程、写真製版法により貫通電極２０４の部分の絶縁膜２０５のエッチング除去工程が控えており、極薄化した基板本体２０１がこれらのハンドリングで破損してしまい、半導体装置の製品歩留まりが良くないという問題点があった。
【０００４】
この発明は、かかる問題点を解決することを課題とするものであって、半製品のハンドリングでの破損を低減させ、貫通電極を有する半導体装置を歩留まり良く、かつ簡単に製造することができる半導体装置、およびその製造方法を得ることを目的とする。
また、その製造方法で得られた半導体装置を組み入れた電子機器を得ることを目的とする。
【０００５】
【課題を解決するための手段】
この発明の半導体装置の製造方法は、表面の回路形成面に所定機能を有する回路素子部を複数個形成した基板本体の裏面に支持板を貼り付ける工程と、前記基板本体の回路素子部の周縁部あるいは回路素子部内の所定部分のどちらか少なくとも一方に前記支持板に達する第１の溝部を形成する工程と、絶縁材料を用いて、前記回路素子部に形成された電極部を露出させるようにして前記回路形成面に絶縁膜を形成する工程と、前記第１の溝部の前記絶縁膜に前記支持板が露出する孔を形成する工程と、前記電極部から前記孔の少なくとも内壁の一部に達する金属配線パターンを形成する工程と、前記孔の底面を所定量除去する工程と、前記孔内に前記回路形成面から突出するように導電性材料を埋め込み貫通電極を形成する工程と、前記回路素子部の周縁部に前記支持板に達する第２の溝部を形成する工程と、前記支持板を除去して複数個の半導体装置に分離する工程とを備えたものである。
【０００６】
この発明の半導体装置の製造方法は、表面の回路形成面に所定機能を有する回路素子部を複数個形成した基板本体の裏面に第１の支持板を貼り付ける工程と、前記基板本体に前記第１の支持板に達する第１の溝部を形成する工程と、絶縁材料を用いて、前記回路素子部に形成された電極部を露出させるようにして前記回路形成面に絶縁膜を形成する工程と、前記第１の溝部の前記絶縁膜に前記支持板が露出する孔を形成する工程と、前記電極部から前記孔の少なくとも内壁の一部に達する金属配線パターンを形成する工程と、前記孔の底面を所定量除去する工程と、前記孔内に前記回路形成面から突出するように導電性材料を埋め込み貫通電極を形成する工程と、前記回路素子部の周縁部に前記支持板に達する第２の溝部を形成する工程と、前記半導体基板の回路形成面側に第２の支持板を貼り付ける工程と、前記第１の支持板を除去する工程と、前記貫通電極に触針して回路素子部の回路機能を検査する工程と、第２の支持板を除去することで、複数個の半導体装置に分離する工程とを備えたものである。
【０００７】
この発明の半導体装置の製造方法は、支持板に穴部を形成する工程と、この穴部に電極材料を充填して第１の突起電極を形成する工程と、前記支持板の所定位置に第１の突起電極と接続される第１の金属配線パターンを形成する工程と、表面の回路形成面に所定機能を有する回路素子部を複数個形成した基板本体の裏面を接着材を用いて前記支持板上に貼り付ける工程と、回路素子部間の基板本体の領域おいて前記第１の金属配線パターンの手前の前記接着材で形成された絶縁層にまで達する第１の溝部を形成し、基板本体を複数の半導体基板に分割する工程と、絶縁材料を用いて、前記半導体基板の表面では前記回路素子部の電極部を除いて絶縁膜を形成し、また前記第１の溝部内の前記絶縁膜に支持板に達する孔を形成する工程と、電極部から前記孔の少なくとも内壁の一部に達するように、第２の金属配線パターンを形成する工程と、前記孔の底面の絶縁層を除去して第１の金属配線パターンを露出させる工程と、前記孔に金属を埋め込み貫通電極を形成する工程と、前記第２の金属配線パターンの所定箇所に第２の突起電極を設ける工程と、前記第１の溝部に沿って前記支持板に達する第２の溝部を設ける工程と、前記支持板を除去する工程とを備えたものである。
【０００８】
【発明の実施の形態】
実施の形態１．
図１ないし図１０はこの発明の半導体装置の製造方法における各製造工程での図である。
以下、半導体装置１００の製造手順について図に基づいて説明する。
先ず、基板本体１の表面の回路形成面に所定機能を有する回路素子部２を複数個配置する（第１の工程）。
次に、図２に示すように、基板本体１の回路形成面と反対側の裏面を所定厚さまで削除する（第２の工程）。
その後、図３に示すように基板本体１の裏面に例えばアルミニウム金属板である支持板３を貼り付ける（第３の工程）。この貼り付けは、基板本体１を陽極、支持板３を陰極として電場を印加する陽極接合により行われる。なお、支持板３を基板本体１の裏面に貼り付ける前に、基板本体１の裏面に酸化膜である酸化シリコンが形成されている。半導体基板の裏面は電気的、化学的に安定化し、半導体装置は電気的な性能や信頼性が向上する。
次に、図４（ａ）及び図４（ｂ）に示すように、回路素子部２の領域以外の基板本体１の領域おいて第１の支持板３に達する第１の溝部４を例えばダイシングを用いて格子状に形成する（第４の工程）。この結果、基板本体１は複数の半導体基板５０に分割される。
【０００９】
その次に、図５（ａ）及び図５（ｂ）に示すように、例えば絶縁材料として感光性ポリイミド樹脂を用いて、半導体基板５０の表面では、回路素子部２で電極部５を露出させるようにして絶縁膜６を形成し、また第１の溝部４では支持板３に達する孔７を写真製版法（フォトリソグラフィー）により形成する。なお、感光性ポリイミド樹脂の代わりに感光性ガラスを用いてもよい（第５の工程）。
次に、図６（ａ）及び図６（ｂ）に示すように、電極部５から孔７の少なくとも内壁の一部に達するように、金属配線パターン８を形成する（第６の工程）。
【００１０】
引き続き、図７に示すように、露出した孔７の底面の支持板３を例えばウエットエッチングにより所定量除去する（第７の工程）。
その後、図８に示すように例えばはんだのような導電性金属を、例えば第１の支持板３を陰極として電気めっきによって孔７に金属配線パターン８の表面から突出するように埋め込み、貫通電極１０を形成する（第８の工程）。
次に、図９（ａ）及び図９（ｂ）に示すように、第１の溝部４の中心線上に沿って第１の支持板３に達する第２の溝部９を例えばダイシングソーを用いて格子状に形成する（第９の工程）。
最後に、図１０（ａ）及び図１０（ｂ）に示すように、第１の支持板３をウエットエッチングにより除去して、周縁部において表面から裏面に達する貫通電極１０を有する複数個の半導体装置１００が製造される（第１０の工程）。
このようにして製造された半導体装置１００は、回路素子部２を一主面上に形成した半導体基板５０において、回路形成面からこの回路形成面の反対側の面に達する貫通孔７を有し、この貫通孔７に沿って導電路である、金属配線パターン８および貫通電極１０を有し、この導電路８、１０の周囲を取り囲む絶縁材料である感光性ポリイミド樹脂を有するものにおいて、隣接する導電路８、１０間にはこの絶縁材料以外介在しない。
【００１１】
上記の実施の形態の半導体装置の製造方法では、周縁部に貫通電極１０を有する半導体装置１００を簡単に製造することができる。
また、基板本体１に支持板３を貼り付ける前に、基板本体１の裏面を所定量除去するので、半導体基板５０上の孔７をより簡単に形成することができる。
また、基板本体１の裏面に酸化膜である酸化シリコンが形成されているので、半導体基板５０の裏面は電気的、化学的に安定化し、半導体装置１００は電気的な性能や信頼性が向上する。
また、基板本体１の裏面に支持板３を陽極接合により貼り付けるので、接着剤等の異種材料が介在せず、耐薬品性等の工程中の制約が少なくなる。
【００１２】
また、第１の溝部４はダイシングソーを用いて形成されるので、簡単に、かつ能率良く第１の溝部４を形成することができる。
また、回路素子部２間の第１の溝部４内では第１の溝部４に沿って二列に並んだ孔７を形成するので、周縁部の貫通電極１０は共通の第１の溝部４で形成されるため、製造工程が簡単で、製造が容易である。
なお、第１の溝部４をリアクティブイオンエッチングによって形成することもできるが、この場合には、より寸法精度の高い第１の溝部４を形成することができる。
【００１３】
また、絶縁材料である感光性ポリイミドを用いて、第１の溝部４で支持板３に達する孔７を形成する際に、同時に半導体基板１の表面では絶縁膜６を形成するので、回路素子部２の保護形成膜を形成する工程をわざわざ設ける必要性はない。また、感光性を有しない絶縁材料と比較して工程を簡略化することができる。
また、第２の溝部９もダイシングソーを用いて形成されるので、簡単に、第１の溝部４と同様に、能率良く第２の溝部９を形成することができる。
【００１４】
また、この実施の形態では、支持板３は金属板であり、孔７の底面の所定量の除去は腐蝕液を用いたエッチング法で行われており、半導体装置１００の裏面から突出した貫通電極を簡単に形成することができる。その金属板はアルミニウム板であり、軽量であり、かつ低コストで得ることができる。
また、支持板３の除去も腐蝕液を用いたエッチング法で行われているので、支持板３を簡単に除去することができる。
【００１５】
また、孔７内の金属の埋め込みは、支持板３を陰極として電気めっきを用いて行われているので、無電解めっきと比較して選択成長性が高く、孔７の部分のみの埋め込みが可能となる。また、使用できる材料の選択枝が広い。
【００１６】
実施の形態２．
図１１ないし図１３はこの発明の実施の形態２の半導体装置の製造方法の各工程を示す図である。
なお、この実施の形態及び他の各実施の形態については、図１ないし図１０と同一及び同等部材、部位については同一符号を付して説明する。
この実施の形態の製造工程は、上記第１の工程から上記第９の工程までは実施の形態１と同一である。
【００１７】
この実施の形態では、図９（ａ）、図９（ｂ）に示した第９の工程の後に、図１１に示すように半導体基板５０の回路形成面側に接着剤１１を用いて少なくとも接着面側が絶縁体である第２の支持板１２を貼り付ける。なお、第２の支持板１２の代わりに支持フィルムを貼り付けてもよい。
その後、図１２に示すように、支持板３をウエットエッチングにより除去する。
次に、この半導体装置１００の中途製品を図１３に示すように反転させて貫通電極１０にプローブ針１３を触針して回路素子部２の回路機能を検査する。
最後に、第２の支持板１２を剥離もしくはその他の方法で除去することで、図１０に示した半導体装置１００が得られる。
【００１８】
この発明の実施の形態に係る半導体装置の製造方法によれば、第１の支持板３を除去した後も複数の半導体装置１００は、第２の支持板１２により、個別化せず、それだけハンドリングが容易となり、回路素子部２の機能の検査を容易にすることができる。
【００１９】
実施の形態３．
図１４ないし図２１はこの発明の実施の形態３の半導体装置の製造方法の各工程を示す図である。
この実施の形態では、図１４に示すように基板本体１の裏面とアルミニウム金属板の第１の支持板３との間に絶縁層１４が形成されている。この絶縁層１４は、例えばポリイミド前駆体のような接着材料で構成されており、この接着材料を用いて基板本体１の裏面に第１の支持板３を接着させた後、この接着材料を熱硬化させることで形成される。他の製造の各工程は、実施の形態１の各工程と同じであり、この実施の形態では、図２１に示すように、半導体基板５０の裏面に絶縁層１４が形成された半導体装置３５０が得られる。
【００２０】
この実施の形態では、基板本体１の裏面と支持板３との間は接着材料で接着され、接着後には硬化されて絶縁層１４となり、支持板３の除去後には半導体基板５０の裏面に残留するので、接着材がそのまま半導体装置３５０の安定した絶縁層を形成することになる。
【００２１】
実施の形態４．
図２２ないし図２８はこの発明の実施の形態４の半導体装置の製造方法の各工程を示す図である。
この実施の形態の製造工程は、実施の形態１における第３の工程まで、即ち基板本体１の裏面に第１の支持板３を貼り付ける図３に示した工程までは、実施の形態１と同じである。
この実施の形態では、その次に、図２２に示すように、回路素子部２を囲むように支持板３に達する第１の溝部１５を例えばダイシングを用いて形成する。
【００２２】
その後、図２３に示すように、例えば絶縁材料として感光性ポリイミド樹脂を用いて、半導体基板５０の表面では、回路素子部２で電極部５を露出させるようにして絶縁膜１７を形成し、また第１の溝部１５では支持板３に達する孔１６をそれぞれ写真製版法（フォトリソグラフィー）により形成する。なお、感光性ポリイミド樹脂の代わりに感光性ガラスを用いてもよい。
次に、図２４に示すように、電極部５から孔１６の少なくとも内壁の一部に達するように、絶縁膜１７上に金属配線パターン８を形成する。
【００２３】
引き続き、図２５に示すように、露出した孔１６の底面の支持板３を例えばウエットエッチングにより所定量除去する。
その後、図２６に示すように例えばはんだのような導電性金属を、例えば支持板３を陰極として電気めっきによって孔１６に絶縁膜１７の表面から突出するように埋め込み、貫通電極１０を形成する。
次に、図２７に示すように、隣接した第１の溝部１５間の中心線に沿って支持板３に達する格子状の第２の溝部９を例えばダイシングソーを用いて形成する。
そして、最後に、図２８に示すように、支持板３をウエットエッチングにより除去することで、周縁部に表面から裏面に達する貫通電極１０を有する半導体装置３００が得られる。
【００２４】
この実施の形態によれば、回路素子部２間には二列に延びた第１の溝部１５をそれぞれ形成し、各第１の溝部１５内に一列に並んだ孔１６を形成するので、実施の形態１の半導体装置の製造方法と比較して、第２の溝部９は基板本体１に形成されるので、基板本体１を切断する従来の刃を使用することができる。また、半導体装置３００の周縁部は半導体基板５０の一部であり、実施の形態１ないし３の半導体装置１００，２００と比較して剛性が高く、それだけ、周縁部の貫通電極１０をより保護することができる。
【００２５】
実施の形態５．
図２９ないし図４０はこの発明の実施の形態５の半導体装置の製造方法の各工程を示す図である。
この実施の形態では、先ず、図２９に示すようにアルミニウム金属板の支持板２０に穴部２１を形成する。
次に、図３０に示すように、この穴部２１に電極材料を充填して第１の突起電極２３を形成する。
その後、図３１に示すように、支持板２０の所定位置に第１の突起電極２３と接続された第１の金属配線パターン２２を形成する。
次に、図２に示した基板本体１を、図３２に示すように、例えばポリイミド樹脂の接着材を用いて第１の金属配線パターン２２上に貼り付ける。この接着材は、熱硬化させることで絶縁層２４を形成する。
【００２６】
次に、図３３に示すように、回路素子部１間の基板本体１の領域おいて第１の金属配線パターン２２の手前まで達する第１の溝部２５を例えばダイシングを用いて格子状に形成する。この溝部２５の形成により、基板本体１は複数の半導体基板５０に分割される。
【００２７】
その次に、図３４に示すように、例えば絶縁材料として感光性ポリイミド樹脂を用いて、半導体基板５０の表面では、回路素子部２で電極部５を露出させるようにして絶縁膜６を形成し、また第１の溝部２５では支持板２０に達する孔２６を写真製版法（フォトリソグラフィー）により形成する。なお、感光性ポリイミド樹脂の代わりに感光性ガラスを用いてもよい。
次に、図３５に示すように、電極部５から孔２６の少なくとも内壁の一部に達するように、第２の金属配線パターン２７を形成する。
【００２８】
引き続き、図３６に示すように、孔２６の底面の絶縁層２４を除去して第１の金属配線パターン２７を露出させる。
その後、図３７に示すように例えばはんだのような導電性金属を孔２６に、例えば支持板２０を陰極として電気めっきによって第２の金属配線パターン２７の表面から突出するように埋め込み貫通電極３０を形成する。
次に、図３８に示すように、第２の金属配線パターン２７の所定箇所に第２の突起電極２８を設ける。
【００２９】
その次に、図３９示すように、第１の溝部２５の中心線に沿って支持板２０に達する格子状の第２の溝部２９を例えばダイシングソーを用いて形成する。
そして、最後に支持板２０をウエットエッチングにより除去することで、表面側では貫通電極３０を通じて電気的に接続された第２の突起電極２８が設けられ、裏面側では貫通電極３０を通じて電気的に接続された第１の突起電極２３が設けられた半導体装置４００が製造される。
【００３０】
この実施の形態では、第１の突起電極２３及び第２の突起電極２８を有する半導体装置４００を簡単に製造することができる。
【００３１】
実施の形態６．
図４１は実施の形態６の製造方法で製造された半導体装置５００であり、この半導体装置５００では実施の形態５の第２の突起電極２８が削除されている。図４２の半導体装置６００は実施の形態５の第１の突起電極２３が削除された例であり、図４３の半導体装置７００は半導体基板５０の回路形成面上に第２の突起電極２８を設け、またその反対面上に第１の突起電極２３を設けた例である。
【００３２】
実施の形態７．
図４４はこの発明の実施の形態７の製造方法で製造された半導体装置８００の断面図、図４５は図４４の要部拡大図である。
この実施の形態では、貫通電極３０が埋め込まれた孔２６の底面にある絶縁層２４を除去して導電路である第１の金属配線パターン２２を露出した後に、回路形成面の一部にある電極を孔２６の内壁の少なくとも一部分に達するように導電路である第２の金属配線パターン２７を形成している。即ち、図４３に示した実施の形態６の半導体装置７００と比較して、第１の金属配線パターン２２を露出する工程と、第２の金属配線パターン２７を形成する工程とが入れ替わっている。また、孔２６に金属を埋め込み貫通電極３０を形成する工程も無い。
なお、図４６の半導体装置９００は、回路素子部２間には二列に延びた第１の溝部１５をそれぞれ形成し、各第１の溝部１５内に一列に並んだ孔１６を形成して製造された半導体装置９００の要部断面図である。
【００３３】
なお、上記各実施の形態１〜７の半導体装置の製造方法については、直径がほぼ３〜３０ｎｍの金属粒子を界面活性剤で覆い溶液中に分散した独立分散超微粒子を、スピン塗布して半導体基板の表面及び第１の溝部に被着して焼成した後、その焼成部の一部を削除して、電極部を露出させ、また前記第１の溝部では孔を形成するようにしてもよい。この場合には、廃水処理等の環境への影響が少なく、またスピン塗布のため、半導体装置の製造プロセスとの整合性が良い。
【００３４】
また、孔内の導電性材料の金属を埋め込み方法として、無電解めっきで行ってもよい。この場合には、埋め込み工程の時間が短く、また簡便である。
また、孔内の導電性材料として、導電性ペーストを用いてもよい。この場合には、埋め込み工程が簡略できる。
また、孔内の導電性材料の埋め込みは、直径がほぼ３〜３０ｎｍの金属粒子を界面活性剤で覆い溶液中に分散した独立分散超微粒子をスクリーン印刷し焼成によって行うこともできる。
また、孔内の導電性材料の埋め込みは、ガス中蒸着法により生成した金属超微粒子を、減圧室のステージ上に載置した半導体基板上で、孔に指向したノズルから吹き付けるガスデポジション法により行うこともできる。この場合には、埋め込み工程の時間が短く、また材料を無駄なく使用でき、環境への影響が少ない。
【００３５】
また、金属膜を蒸着により半導体基板及び第１の溝部の全面に形成し、この金属膜を陰極として電気めっきにより孔に金属を埋め込んだ後金属配線パターンを形成することもできる。この場合には、孔に金属を埋め込む電気めっきの際に、支持板として金属（導電体）を用いる必要性がない。
また、孔の底面を所定量除去した後、電極部から前記孔の底面まで達する金属配線パターンを形成するようにしてもよい。この場合には、電気的接続の信頼性が向上する。
【００３６】
また、回路素子部の内部にリアクティブイオンエッチングにより第１の溝部を設け、突起電極を半導体装置の周縁部以外にも設けるようにしてもよい。
【００３７】
実施の形態８．
図４７は実施の形態１の製造方法で製造された半導体装置１００を複数段に互いに貫通電極１０が接続するように積層して構成された電子機器の断面図でり、この実施の形態では、高集積、高機能の電子機器を得ることができる。
【００３８】
実施の形態９．
図４８は実施の形態１の製造方法で製造された半導体装置１００の貫通電極１０に例えばチップコンデンサのような受動素子３１を搭載した小形の回路基板３２を接続して一体化した回路機能を有する電子機器を示した図である。この場合には、従来の所謂ハイブリッドＩＣに比べて小型化することができる。
【００３９】
実施の形態１０．
図４９は実施の形態１の製造方法で製造された半導体装置１００の貫通電極１０に表裏両面から電子部品３５を有する第１の回路基板３３、及び電子部品３６を有する第２の回路基板３４を接続した電子機器を示した図である。この場合には、三次元的な接続構造となり、自由度が高く、高集積な電子機器を得ることができる。
【００４０】
実施の形態１１．
図５０は実施の形態１の製造方法で製造された半導体装置１００を回路基板４０のコア４１に埋め込み、貫通電極１０の表裏両面に回路基板４０の両面の配線層４２を接続した電子機器の部分断面図である。この場合には、三次元的な接続構造となり、高自由度、高集積、小型化された電子機器を得ることができる。また、配線遅延が少なくなるという効果もある。
【００４１】
なお、実施の形態８ないし１１では、何れも実施の形態１の製造方法で製造された半導体装置１００を組み入れた電子機器について説明したが、実施の形態１〜７の製造方法で製造された半導体装置２００，３００，４００，５００，６００，７００，８００、および後述する実施の形態１２〜１８の製造方法で製造される半導体装置にも適用できるのは勿論である。
【００４２】
実施の形態１２．
図５１（ａ）ないし図５１（ｇ）はこの発明の実施の形態１２の半導体装置の製造方法の各工程を示す図である。
【００４３】
以下、この半導体装置の製造手順について図に基づいて説明する。
先ず、図５１（ａ）に示すように、表面の回路形成面に所定機能を有する回路素子部２１１を複数個配置した基板本体２１０を製造する。また、シリコンウエハで構成された支持板基材２１２を予め用意しておく（第１の工程）。
次に、図５１（ｂ）に示すように、シリコンウエハで構成された基板本体２１０の回路形成面の反対側の裏面を、後工程のトレンチエッチング工程で形成される孔２１３の深さよりも薄い厚さまで研削する。一方、支持板基材２１２の表面には例えばＡｌ膜を形成して中間膜２１４を形成し、さらにその中間膜２１４の表面に、例えばＳｉＯ_２またはアルミナで構成された絶縁膜２１５を形成して支持板２１７を製造する（第２の工程）。
【００４４】
その後、図５１（ｃ）に示すように、支持板２１７と、薄く研磨された基板本体２１０とを陽極接合する（第３の工程）。このとき、絶縁膜２１５の表面にはＰＳＧ（Phosphosilicate Glass）もしくはＢＳＰＳＧ（Brophosphosilicate Glass）と呼ばれる材料が付着される。このようにすることで、絶縁膜２１５中には、リン、またはボロンがドープされ、絶縁膜２１５の表面には電荷が誘起し易くなり、陽極接合が容易となる。また、絶縁膜の表面だけではなく、絶縁膜そのものをこれらの材料で構成することもできる。
なお、先に説明した実施の形態における陽極接合についても、絶縁膜表面または絶縁膜そのものにＰＳＧもしくはＢＳＰＳＧの材料を用いることができる。
【００４５】
次に、図５１（ｄ）に示すように、回路素子部２１１からエッチングによって深さ１００μｍ程度の支持板２１２に達するエッチング処理を行う（第４の工程）。
その次に、図５１（ｅ）に示すように、孔２１３の内壁面に絶縁膜を形成し、その後電気めっきの陰極となる金属膜を絶縁膜上に堆積する。そして、この金属膜を陰極として電気めっきで孔２１３の内部に導電性材料からなる貫通電極２１６を形成する。
その後、図５１（ｆ）に示すように、支持板２１２を除去し、また中間膜２１４および貫通電極２１６の端面が同一面になるまで、裏面を削除する（第５の工程）。このとき、貫通電極２１６の端面は平坦化されている。
【００４６】
最後に、図５１（ｇ）に示すように、中間膜２１４をエッチングにより完全に除去して、基板本体２１０の裏面から貫通電極２１６が突出した半導体装置集合体を製造し、この半導体装置集合体を複数個に分割して半導体装置を製造する（第６の工程）。この工程では、エッチング処理は、中間膜２１４のみに行われ、絶縁膜２１５までは及ばず、結果として、絶縁膜２１５は基板本体２１０の裏面に転写されたことになる。また、エッチング処理される、支持板基材２１２、中間膜２１４については、エッチングされ易い材料を選択して用いればよい。
【００４７】
上記工程で製造された半導体装置では、製造途中において、支持板基材２１２により基板本体２１０は支持されており、従来必要とした、薄型化した後の絶縁膜形成とその貫通電極の開口が不要となり、加工精度の要求されない単純な工程（図５１（ｆ）、図５１（ｇ）参照）のみで基板本体２１０の裏面から突出した貫通電極２１６が形成でき、製造工程での基板本体２１２の破損の発生は低減され、半導体装置の製品歩留まりが向上する。
また、基板本体２１０の裏面側には、絶縁膜２１５が設けられているので、裏面側の削除時に、電極材料が基板本体の裏面に残留し、それが基板本体中に拡散し、期待しないエネルギー順位を形成して、半導体装置の特性を劣化させるようなことを防止することができる。
【００４８】
また、支持板基材２１２と基板本体２１０との接合には陽極接合が用いられており、支持板基材２１２と基板本体２１０との間には異種材料が介在しないためエッチングによる孔２１３の形成が簡単になる。
また、支持板基材２１２にはＳｉ、中間膜２１４にはＡｌ、絶縁膜２１５にはＳiＯ_２といった現在の半導体製造工程で一般に用いられ、それだけ加工技術も高度に発達し、確立している材料を使用しているため、製品の歩留まりが向上するとともに、製造コストも低減される。
【００４９】
図５２は図５１に示した方法により製造された半導体装置３５０の要部断面図である。
基板本体２１０の孔２１３は回路形成面に対してほぼ垂直に形成されている。この孔２１３の垂直壁面には、貫通絶縁膜２１８が形成されている。この孔２１３には貫通電極２１６が貫通しており、この貫通電極２１６の両端部は突出している。基板本体２１０の裏面側では、貫通電極２１６の下端面を除いて絶縁膜２１５が形成されている。この絶縁膜２１５と貫通絶縁膜２１８とは垂直に交差している。
実施の形態１２による半導体装置３５０では、貫通電極２１６と基板本体２１０との間では、基板本体２１０の裏面が露出するようなことはなく、絶縁性に問題がなく、また貫通電極２１６の端面に絶縁膜２１５が乗り上げるようなことは無く、貫通電極における接合性に問題が生じない。
また、基板本体２１０から貫通した複数の貫通電極２１６の下端面は、基板本体２１０の回路形成面とほぼ平行で、かつ平坦な面を有しており、さらに基板本体２１０の絶縁膜２１５からのそれぞれの貫通電極２１６の突出量はほぼ等しいので、半導体装置同士を積層して電気的に接合したときの接合性が良い。
【００５０】
実施の形態１３．
図５３（ａ）ないし図５３（ｇ）はこの発明の実施の形態１３の半導体装置の製造方法の各工程を示す図である。
以下、この半導体装置の製造手順について図に基づいて説明する。
先ず、図５３（ａ）に示すように、表面の回路形成面に所定機能を有する回路素子部２１１を複数個配置した基板本体２１０を製造する。また、シリコンウエハで構成された支持板基材２１２の表面にはＡｌ膜で構成された中間膜２１４を形成する（第１の工程）。
次に、図５３（ｂ）に示すように、基板本体２１０の回路形成面と反対側の裏面を、後工程のトレンチエッチング工程で形成される孔２１３の深さよりも薄い厚さまで削除する。一方、表面にＡｌ膜の中間膜２１４が形成された支持板基材２１２では、その中間膜２１４の表面に、ポリイミド樹脂で構成され、絶縁膜２２０となる接着剤を塗布し、支持板２２１を形成する（第２の工程）。
【００５１】
その後、図５３（ｃ）に示すように、支持板２２１上に薄く研磨された基板本体２１０を上記接着剤を硬化させることで接着する（第３の工程）。
その後、図５３（ｄ）〜図５３（ｇ）に示す手順で半導体装置は製造されるが、その各工程は、実施の形態１２で述べた図５１（ｄ）〜図５１（ｇ）と同様である。
【００５２】
この実施の形態の半導体装置では、接着剤であるポリイミド樹脂前駆体が実施の形態１２の半導体装置で用いられた陽極接合の代わりとして使用されている。
陽極接合は技術的に高度でそれだけ工程コストも嵩むことになるが、ポリイミド樹脂を用いることにより、工程コストの低減を図ることができる。
【００５３】
実施の形態１４．
図５４（ａ）ないし図５４（ｇ）はこの発明の実施の形態１４の半導体装置の製造方法の各工程を示す図である。
この実施の形態では、実施の形態１２の半導体装置の製造方法と比較して、中間膜２１４が形成されていない点、即ち実施の形態１２の支持板２１７は支持板基材２１２に中間膜２１４および絶縁膜２１５が積層されていたのに対して、実施の形態１４の支持板２３０は支持板基材２１２の上面に絶縁膜２１５が形成されている点で異なり、その結果図５４（ｂ）〜図５４（ｆ）の工程が異なる。
なお、この実施の形態でも、基板本体２１０と支持板基材２１２との接合は陽極接合であり、また、孔２１３の内壁面に絶縁膜を形成し、その後電気めっきの陰極となる金属膜を絶縁膜上に堆積し、この金属膜を陰極として電気めっきで孔２１３の内部に貫通電極２１６を形成している。
【００５４】
この実施の形態では、研削加工の目途となる中間膜２１４が形成されていないため、基板本体２１０の裏側の研削加工は、図５３（ｆ）に示すように、絶縁膜２１５層に達しない状態で停止しなければならない。そのため、寸法のみにより研削程度を制御しなければならず、高い研削加工精度が要求されるものの、中間膜２１４を形成する工程が不要となる点で製造工程が簡単化される。
なお、支持板基材２１２としてＳｉウエハの代わりにＡｌを用いることもできる。これにより、簡単にエッチングでき、実施の形態１２の半導体装置と同じ作用、効果を得ることができる。
また、支持板基材２１２の裏面研削を裏面に貫通電極２１６が露出しない段階で停止し、その後支持板基材２１２を完全にエッチング除去して自動的に貫通電極２１６を基板本体２１０の裏側から突出させるようにしてもよい。これによれば、研削精度はそれほど高くなくてもよい。
ただし、絶縁膜２１５からの各貫通電極２１６の突出量は、図５４（ｄ）のトレンチエッチングのエッチング深さとその均一性に大きく依存することになり、各突出量の均一性が劣り、また突出した貫通電極２１６の端面の平坦性の点でも劣る。
【００５５】
なお、支持板が中間膜２１４および絶縁膜２１５を共に形成していない支持板基材２１２のみの場合でも貫通電極を有する半導体装置を製造することができる。
即ち、次の手順で半導体装置を製造することができる。
最初に、支持板基材２１２の表面に、図５１（ｂ）で示された基板本体２１０の裏面をポリイミド樹脂で接合し、その後ポリイミド樹脂を硬化して絶縁膜を形成する。次に、回路形成面から支持板基材２１２に達する孔２１３を形成し、孔２１３の内側壁に貫通絶縁膜を形成する。その後、孔２１３内に導電性材料を埋め込み貫通電極２１６を形成する。次に、支持板基材２１２を、貫通電極２１６の端部が突出し、かつ絶縁膜２２０を残して除去する。こうして、製造された集合体半導体装置を複数に分割すればよい。
【００５６】
実施の形態１５．
図５５（ａ）ないし図５５（ｇ）はこの発明の実施の形態１５の半導体装置の各製造工程を示す図である。
この実施の形態では、実施の形態１２の半導体装置の製造方法と比較して、埋め込み酸化膜２４１を有するＳＯＩ（Silicon on Insulator）ウエハで基板本体２４０を構成している点、および貫通電極２１６を形成する際に、孔２１３の内壁面に絶縁膜が形成されない点が異なる。
【００５７】
この実施の形態では、基板本体２４０の裏面を、総厚数ミクロン程度の厚さになるまで機械研削、化学的機械研磨、エッチング、あるいはこれらの併用によって加工し、埋め込み酸化膜２４１の片面を露出させる（図５５（ｂ）参照）。
この後、基板本体２４０と支持板基材２１２とを陽極接合により接合し（図５５（ｃ）参照）、支持板基材２１２に達する孔２１３を形成する（図５５（ｄ）参照）。
次に、孔２１３の内壁面に電気めっきの陰極となる金属膜を形成し、電気めっきにより貫通電極２１６を形成する（図５５（ｅ）参照）。
その後、貫通電極２１６の端面が露出するまで支持板基材２１２を研削（図５５（ｆ）参照）する。
次に、支持板基材２１２をエッチングにより完全に除去して半導体装置集合体を製造し（図５５（ｇ）参照）、この集合体を分割して半導体装置を製造する。
なお、必要に応じて中間膜２１４等を形成するようにしてもよい。
【００５８】
この実施の形態の半導体装置では、基板本体２４０の埋め込み酸化膜２４１が、実施の形態１２の絶縁膜２１５に相当するので、支持板基材２１２には絶縁膜２１５を形成する工程が下記に述べるように不要であるため、製造工程が簡単になるだけでなく、貫通電極２１６の絶縁性も向上する。
また、基板本体２４０はＳＯＩウエハで構成されているので、ＳＯＩウエハ自体が従来のウエハと比較して高速動作するため、貫通電極を用いた、素子相互の接続（積層実装）による電送路の短縮と相俟って、より高速動作の電子機器を提供することができる。
【００５９】
図５６は基板本体２１０がＳｉウエハで構成された場合での貫通電極２１６が形成されたときの図、図５７は基板本体２４０がＳＯＩウエハで構成された場合での貫通電極２１６が形成されたときの図である。
但し、両図は、基板本体２１０を用いた場合と、基板本体２４０を用いた場合の違いを明確に示すための対比図であり、実施の形態１２および実施の形態１５の半導体装置と構成を異にしている。
図５６のものの場合には、基板本体２１０は導電性を有するため、孔２１３の内壁面に一旦絶縁膜２５０を形成した後、電気めっきの陰極となる金属膜２５１をその上に堆積し、その後孔２１３の内部に金属を埋め込み、貫通電極２１６を形成している。
一方、図５７のものの場合には、基板本体２４０はＳＯＩウエハで構成されており、この基板本体２４０の回路素子部２１１を含む半導体膜２５１は極めて薄く、その下層に絶縁膜である埋め込み酸化膜２４１があり、さらにその下層の支持板基材２１２は最終的には除去してしまうので、孔２１３の内壁面の絶縁膜は不要となる。
【００６０】
実施の形態１６．
図５８（ａ）ないし図５８（ｇ）はこの発明の実施の形態１６の半導体装置の各製造工程を示す図である。
この実施の形態では、実施の形態１５の半導体装置の製造方法と比較して、基板本体２６０をＳＯＩウエハの代わりに、極薄の半導体層を例えば石英ガラスからなる絶縁基材２６１に貼った貼り合せ型ＳＯＩである点が異なる。
【００６１】
この実施の形態の半導体装置では、基板本体２６０の裏面を機械研削、化学的機械研磨、エッチング、あるいはこれらの併用によって、基板本体２６０を所定厚さに加工後、実施の形態１５と同様の手順に従って、裏面から貫通電極２１６を突出させる。
このものの場合、エッチングの深さの限界程度まで、絶縁基材２６１を厚くすることができるので、実施の形態１５の半導体装置と比較して、各製造工程での半製品の取り扱いが容易である。
【００６２】
実施の形態１７．
図５９（ａ）ないし図５９（ｇ）はこの発明の実施の形態１７の半導体装置の各製造工程を示す図である。
この実施の形態では、実施の形態１６の半導体装置の製造方法と比較して、支持板基材２７０としてＳｉウエハの代わりにＡｌを用いた点が異なる。
この実施の形態では、支持板基材２７０に金属板を用いており、孔２１３形成後、孔２１３の内部は電気めっきによって貫通電極２１６が形成される。孔２１３の内壁面での絶縁膜、および電気めっきの陰極となる金属膜の形成は不要であり、支持板基材２７０を陰極として電気めっきで孔２１３の内部を金属で埋めている。
【００６３】
図６０は支持板基材２１２がＳｉウエハで構成された場合での貫通電極２１６が形成されたときの図、図６１は支持板基材２７０が金属で構成された場合での貫通電極２１６が形成されたときの図である。
但し、両図は、支持板基材２１２を用いた場合と、支持板基材２７０を用いた場合の違いを明確に示すための対比図であり、実施の形態１６および実施の形態１７の半導体装置と構成を異にしている。
図６０のものの場合には、孔２１３を含む全面に、一旦電気めっきの陰極となる金属膜２５１を形成し、孔２１３以外はめっき成長しないように、フォトレジスト２７２を形成しなければならないのに対して、図６１のものの場合には、金属膜２５１、フォトレジスト２７２の形成工程が不要である。
なお、Ｓｉウエハの表面に例えばＣｕで構成された金属からなる中間膜を体積した支持板を形成し、この中間膜に達し、Ｓｉウエハに達しない孔を形成することで、中間膜を陰極として電気めっきにより貫通電極を形成するようにしてもよい。
【００６４】
実施の形態１８．
図６２（ａ）ないし図６２（ｅ）はこの発明の実施の形態１８の半導体装置の製造方法の各工程を示す図である。
以下、この半導体装置の製造手順について図に基づいて説明する。
先ず、図６２（ａ）に示すようにＳＯＩウエハ２６２に絶縁基材２６１を貼り合わせて構成された基板本体２６０の回路形成面に所定機能を有する回路素子部２１１を形成する（第１の工程）。
次に、図６２（ｂ）に示すように、回路素子部２１１からエッチングによって絶縁基材２６１に達する深さ１００μｍ程度の孔２１３を形成する（第２の工程）。
その次に、図６２（ｃ）に示すように、電気めっきで孔２１３の内部に、孔側壁に絶縁膜を形成せずして貫通電極２１６を形成する（第３の工程）。
その後、図６２（ｄ）に示すように、貫通電極２１６の端面が露出するまで基板本体２６０の裏面を研削する（第４の工程）。
最後に、図６２（ｅ）に示すように、絶縁基材２６１を所定の厚さまでエッチングにより除去して、基板本体２６０の裏面から貫通電極２１６が突出した半導体装置集合体を製造し、この半導体装置集合体を複数個に分割して半導体装置を製造する（第５の工程）。
【００６５】
この半導体装置では、支持板基材を用いなくても、貫通電極を有する半導体装置を製造する例である。
なお、上記実施の形態１６〜１８では、ＳＯＩウエハ２６２に絶縁基材２６１を貼り合わせて構成された基板本体２６０を用いて半導体装置を製造した場合について説明したが、ＴＦＴ基板を用いても同様の効果を得ることができる。
【００６６】
【発明の効果】
以上説明したように、この発明の半導体装置の製造方法によれば、表面の回路形成面に所定機能を有する回路素子部を複数個形成した基板本体の裏面に支持板を貼り付ける工程と、前記基板本体の回路素子部の周縁部あるいは回路素子部内の所定部分のどちらか少なくとも一方に前記支持板に達する第１の溝部を形成する工程と、絶縁材料を用いて、前記回路素子部に形成された電極部を露出させるようにして前記回路形成面に絶縁膜を形成する工程と、前記第１の溝部の前記絶縁膜に前記支持板が露出する孔を形成する工程と、前記電極部から前記孔の少なくとも内壁の一部に達する金属配線パターンを形成する工程と、前記孔の底面を所定量除去する工程と、前記孔内に前記回路形成面から突出するように導電性材料を埋め込み貫通電極を形成する工程と、前記回路素子部の周縁部に前記支持板に達する第２の溝部を形成する工程と、前記支持板を除去して複数個の半導体装置に分離する工程とを備えたので、製造途中において基材が薄くなるようなことはなく、ハンドリングが容易となり、貫通電極を有する半導体装置を簡単に製造することができる。
【００６７】
また、この発明の半導体装置の製造方法によれば、第１の溝部を回路素子部の周縁部に形成し、第２の溝部を第１の溝部の内部に形成したので、機械加工により製造することができる。
【００６８】
また、この発明の半導体装置の製造方法によれば、基板本体に支持板を貼り付ける前に、基板本体の裏面を所定量除去するので、半導体基板の孔をより簡単に形成することができる。
【００６９】
また、この発明の半導体装置の製造方法によれば、第１の溝部はダイシングソーを用いて形成されるので、簡単に、かつ能率良く第１の溝部を形成することができる。
【００７０】
また、この発明の半導体装置の製造方法によれば、第１の溝部はリアクティブイオンエッチングによって形成されるので、寸法精度の高い第１の溝部を形成することができる。
【００７１】
また、この発明の半導体装置の製造方法によれば、絶縁材料は感光性ポリイミドあるいは感光性ガラスであり、孔は写真製版法（フォトリソグラフィー）により形成されるので、感光性を有しない絶縁材料と比較して工程を簡略化することができる。
【００７２】
また、この発明の半導体装置の製造方法によれば、第２の溝部はダイシングソーを用いて形成されるので、簡単に、かつ能率良く第２の溝部を形成することができる。
【００７３】
また、この発明の半導体装置の製造方法によれば、直径がほぼ３〜３０ｎｍの金属粒子を界面活性剤で覆い溶液中に分散した独立分散超微粒子を、スピン塗布して半導体基板の表面及び第１の溝部に形成した孔内部に被着して焼成した後、その焼成部の一部を削除して、孔内部を埋め込む金属部分を形成するので、廃水処理等の環境への影響が少なく、またスピン塗布のため、半導体装置の製造プロセスとの整合性が良い。
【００７４】
また、この発明の半導体装置の製造方法によれば、孔内の導電性材料の埋め込みは、ガス中蒸着法により生成した金属超微粒子を、減圧室のステージ上に載置した半導体基板上で、孔に指向したノズルから吹き付けるガスデポジション法により行われるので、請求項９に係る工程と同様に埋め込み工程の時間が短く、また材料を無駄なく使用でき、環境への影響が少ない。
【００７５】
また、この発明の半導体装置の製造方法によれば、支持板は金属板であり、孔の底面の所定量の除去は腐蝕液を用いたエッチング法で行われるので、半導体装置の裏面の突起電極を簡単に形成することができる。
【００７６】
また、この発明の半導体装置の製造方法によれば、孔内の金属の埋め込みは、支持板を陰極として電気めっきを用いて行われるので、無電解めっきと比較して選択成長性が高く、孔部分のみの埋め込みが可能となる。また、使用できる材料の選択枝が広い。
【００７７】
また、この発明の半導体装置の製造方法によれば、表面の回路形成面に所定機能を有する回路素子部を複数個形成した基板本体の裏面に第１の支持板を貼り付ける工程と、前記基板本体に前記第１の支持板に達する第１の溝部を形成する工程と、絶縁材料を用いて、前記回路素子部に形成された電極部を露出させるようにして前記回路形成面に絶縁膜を形成する工程と、前記第１の溝部の前記絶縁膜に前記支持板が露出する孔を形成する工程と、前記電極部から前記孔の少なくとも内壁の一部に達する金属配線パターンを形成する工程と、前記孔の底面を所定量除去する工程と、前記孔内に前記回路形成面から突出するように導電性材料を埋め込み貫通電極を形成する工程と、前記回路素子部の周縁部に前記支持板に達する第２の溝部を形成する工程と、前記半導体基板の回路形成面側に第２の支持板を貼り付ける工程と、前記第１の支持板を除去する工程と、前記貫通電極に触針して回路素子部の回路機能を検査する工程と、第２の支持板を除去することで、複数個の半導体装置に分離する工程とを備えたので、第１の支持板を除去した後も複数の半導体装置は、第２の支持板により、個別化せず、それだけハンドリングが容易となり、回路素子部の機能の検査を容易にすることができる。
【００７８】
また、この発明の半導体装置の製造方法によれば、第１の溝部を回路素子部の周縁部に形成し、第２の溝部を第１の溝部の内部に形成したので、基板本体を切断する従来の刃を使用することができる。
【００７９】
また、この発明の半導体装置の製造方法によれば、孔の底面を所定量除去した後、電極部から前記孔の底面まで達する金属配線パターンを形成するので、電気的接続の信頼性が向上する。
【００８０】
また、この発明の半導体装置の製造方法によれば、回路素子部間の第１の溝部内では第１の溝部に沿って二列に並んだ孔を形成し、この二列の孔の間に第２の溝部を形成するので、周縁部の貫通電極は共通の第１の溝部で形成されるため、製造工程が簡単で、製造が容易である。
【００８１】
また、この発明の半導体装置の製造方法によれば、回路素子部間には二列に延びた第１の溝部をそれぞれ形成し、各第１の溝部内に一列に並んだ孔を形成し、二列に延びた第１の溝部の間に第２の溝部を形成するので、請求項２２の半導体装置の製造方法と比較して、第２の溝部の形成は基板本体に設けられるので、基板本体を切断する従来の刃を使用することができる。また、半導体装置の周縁部は半導体基板であり、請求項２２の半導体装置と比較して剛性が高く、それだけ、周縁部の貫通電極をより保護することができる。
【００８２】
また、この発明の半導体装置の製造方法によれば、半導体基板の裏面に支持板を陽極接合により貼り付けるので、接着剤等の異種材料が介在せず、耐薬品性等の工程中の制約が少なくなる。
【００８３】
また、この発明の半導体装置の製造方法によれば、基板本体の裏面と支持板との間は接着材料で接着され、接着後には硬化されて絶縁層となり、支持板の除去後には半導体基板の裏面に残留するので、接着材がそのままそのまま半導体装置の安定した絶縁層を形成することになる。
【００８４】
また、この発明の半導体装置の製造方法によれば、支持板を半導体基板の裏面に貼り付ける前に、半導体基板の裏面に酸化膜を形成するので、半導体基板の裏面は電気的、化学的に安定化し、半導体装置は電気的な性能や信頼性が向上する。
【００８５】
また、この発明の半導体装置の製造方法によれば、回路素子部の内部に第１の溝部を設けるので、貫通電極を半導体装置の周縁部以外にも設けることができる。
【００８６】
また、この発明の半導体装置の製造方法によれば、支持板に穴部を形成する工程と、この穴部に電極材料を充填して第１の突起電極を形成する工程と、前記支持板の所定位置に第１の突起電極と接続される第１の金属配線パターンを形成する工程と、表面の回路形成面に所定機能を有する回路素子部を複数個形成した基板本体の裏面を接着材を用いて前記支持板上に貼り付ける工程と、回路素子部間の基板本体の領域おいて前記第１の金属配線パターンの手前の前記接着材で形成された絶縁層にまで達する第１の溝部を形成し、基板本体を複数の半導体基板に分割する工程と、絶縁材料を用いて、前記半導体基板の表面では前記回路素子部の電極部を除いて絶縁膜を形成し、また前記第１の溝部内の前記絶縁膜に支持板に達する孔を形成する工程と、電極部から前記孔の少なくとも内壁の一部に達するように、第２の金属配線パターンを形成する工程と、前記孔の底面の絶縁層を除去して第１の金属配線パターンを露出させる工程と、前記孔に金属を埋め込み貫通電極を形成する工程と、前記第２の金属配線パターンの所定箇所に第２の突起電極を設ける工程と、前記第１の溝部に沿って前記支持板に達する第２の溝部を設ける工程と、前記支持板を除去する工程とを備えたので、第１の突起電極及び第２の突起電極を有する半導体装置を簡単に製造することができる。
【図面の簡単な説明】
【図１】この発明の実施の形態１の半導体装置の製造方法における製造途中の断面図である。
【図２】この発明の実施の形態１の半導体装置の製造方法における製造途中の断面図である。
【図３】この発明の実施の形態１の半導体装置の製造方法における製造途中の断面図である。
【図４】図４（ｂ）はこの発明の実施の形態１の半導体装置の製造方法における製造途中の平面図、図４（ａ）は図４（ｂ）のＡ−Ａ線に沿った断面図である。
【図５】図５（ｂ）はこの発明の実施の形態１の半導体装置の製造方法における製造途中の平面図、図５（ａ）は図５（ｂ）のＢ−Ｂ線に沿った断面図である。
【図６】図６（ｂ）はこの発明の実施の形態１の半導体装置の製造方法における製造途中の平面図、図６（ａ）は図６（ｂ）のＣ−Ｃ線に沿った断面図である。
【図７】この発明の実施の形態１の半導体装置の製造方法における製造途中の断面図である。
【図８】図８（ｂ）はこの発明の実施の形態１の半導体装置の製造方法における製造途中の平面図、図８（ａ）は図８（ｂ）のＤ−Ｄ線に沿った断面図である。
【図９】図９（ｂ）はこの発明の実施の形態１の半導体装置の製造方法における製造途中の平面図、図９（ａ）は図９（ｂ）のＥ−Ｅ線に沿った断面図である。
【図１０】図１０（ｂ）はこの発明の実施の形態１の半導体装置の製造方法における製造途中の平面図、図１０（ａ）は図１０（ｂ）のＦ−Ｆ線に沿った断面図である。
【図１１】この発明の実施の形態２の半導体装置の製造方法における製造途中の断面図である。
【図１２】この発明の実施の形態２の半導体装置の製造方法における製造途中の断面図である。
【図１３】この発明の実施の形態２の半導体装置の製造方法における製造途中の断面図である。
【図１４】この発明の実施の形態３の半導体装置の製造方法における製造途中の断面図である。
【図１５】この発明の実施の形態３の半導体装置の製造方法における製造途中の断面図である。
【図１６】この発明の実施の形態３の半導体装置の製造方法における製造途中の断面図である。
【図１７】この発明の実施の形態３の半導体装置の製造方法における製造途中の断面図である。
【図１８】この発明の実施の形態３の半導体装置の製造方法における製造途中の断面図である。
【図１９】この発明の実施の形態３の半導体装置の製造方法における製造途中の断面図である。
【図２０】この発明の実施の形態３の半導体装置の製造方法における製造途中の断面図である。
【図２１】この発明の実施の形態３の半導体装置の製造方法における製造途中の断面図である。
【図２２】この発明の実施の形態４の半導体装置の製造方法における製造途中の断面図である。
【図２３】この発明の実施の形態４の半導体装置の製造方法における製造途中の断面図である。
【図２４】この発明の実施の形態４の半導体装置の製造方法における製造途中の断面図である。
【図２５】この発明の実施の形態４の半導体装置の製造方法における製造途中の断面図である。
【図２６】この発明の実施の形態４の半導体装置の製造方法における製造途中の断面図である。
【図２７】この発明の実施の形態４の半導体装置の製造方法における製造途中の断面図である。
【図２８】この発明の実施の形態４の半導体装置の製造方法における製造途中の断面図である。
【図２９】この発明の実施の形態５の半導体装置の製造方法における製造途中の断面図である。
【図３０】この発明の実施の形態５の半導体装置の製造方法における製造途中の断面図である。
【図３１】この発明の実施の形態５の半導体装置の製造方法における製造途中の断面図である。
【図３２】この発明の実施の形態５の半導体装置の製造方法における製造途中の断面図である。
【図３３】この発明の実施の形態５の半導体装置の製造方法における製造途中の断面図である。
【図３４】この発明の実施の形態５の半導体装置の製造方法における製造途中の断面図である。
【図３５】この発明の実施の形態５の半導体装置の製造方法における製造途中の断面図である。
【図３６】この発明の実施の形態５の半導体装置の製造方法における製造途中の断面図である。
【図３７】この発明の実施の形態５の半導体装置の製造方法における製造途中の断面図である。
【図３８】この発明の実施の形態５の半導体装置の製造方法における製造途中の断面図である。
【図３９】この発明の実施の形態５の半導体装置の製造方法における製造途中の断面図である。
【図４０】この発明の実施の形態５の半導体装置の製造方法における製造途中の断面図である。
【図４１】この発明の実施の形態６の半導体装置の製造方法における製造途中の断面図である。
【図４２】この発明の実施の形態６の半導体装置の製造方法における製造途中の断面図である。
【図４３】この発明の実施の形態６の半導体装置の製造方法における製造途中の断面図である。
【図４４】この発明の実施の形態７の半導体装置の製造方法における製造途中の断面図である。
【図４５】図４４の要部拡大図である。
【図４６】半導体装置の製造方法における別の例の製造途中の断面図である。
【図４７】この発明の実施の形態８の電子機器の断面図である。
【図４８】この発明の実施の形態９の電子機器の断面図である。
【図４９】この発明の実施の形態１０の電子機器の断面図である。
【図５０】この発明の実施の形態１１の電子機器の断面図である。
【図５１】図５１（ａ）〜図５１（ｇ）はこの発明の実施の形態１２の半導体装置の製造方法の各工程を示す図である。
【図５２】図５１の製造方法により製造された半導体装置の要部断面図である。
【図５３】図５３（ａ）〜図５３（ｇ）はこの発明の実施の形態１３の半導体装置の製造方法の各工程を示す図である。
【図５４】図５４（ａ）〜図５４（ｇ）はこの発明の実施の形態１４の半導体装置の製造方法の各工程を示す図である。
【図５５】図５５（ａ）〜図５５（ｇ）はこの発明の実施の形態１５の半導体装置の製造方法の各工程を示す図である。
【図５６】ウエハを用いた基板本体に貫通電極が設けられている様子を示す図である。
【図５７】ＳＯＩウエハを用いた基板本体に貫通電極が設けられている様子を示す図である。
【図５８】図５８（ａ）〜図５８（ｇ）はこの発明の実施の形態１６の半導体装置の製造方法の各工程を示す図である。
【図５９】図５９（ａ）〜図５９（ｇ）はこの発明の実施の形態１７の半導体装置の製造方法の各工程を示す図である。
【図６０】支持板基材がＳｉウエハで構成された場合での貫通電極が形成されたときの図である。
【図６１】支持板基材が金属で構成された場合での貫通電極が形成されたときの図である。
【図６２】図６２（ａ）〜図６２（ｇ）はこの発明の実施の形態１８の半導体装置の製造方法の各工程を示す図である。
【図６３】従来の半導体装置の製造方法の各工程を示す図である。
【符号の説明】
１基板本体、２回路素子部、３第１の支持板、４，１５，２５第１の溝部、６,１７絶縁膜、７，１６孔、８金属配線パターン、９第２の溝部、１０貫通電極（突起電極）、１１接着材、１２第２の支持板、１３プローブ、１４，１７絶縁層、２０支持板、２１穴部、２３第１の突起電極、２２第１の金属配線パターン、２４絶縁層、２７第２の金属配線パターン、２８第２の突起電極、３０導電部、３１受動素子、３２回路基板、３３第１の回路基板、３４第２の回路基板、３５，３６電子部品、４０回路基板、４１コア、５０半導体基板、１００，２００，３００，３５０，４００，５００，６００，７００，８００，９００半導体装置、２１０，２４０，２６０基板本体、２１２，２７０支持板基材、２１１回路素子部、２１３孔、２１４中間膜、２１５絶縁膜、２１７支持板、２１８貫通絶縁膜、２１５絶縁膜、２２１，２３０支持板、２４１埋め込み酸化膜、２５１金属膜、２６１絶縁基材、２６２ＳＯＩウエハ。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device having a through electrode extending from a circuit forming surface on the surface of a substrate body to the back surface, the semiconductor device, and an electronic apparatus incorporating the semiconductor device.
[0002]
[Prior art]
63 (a) to 63 (g) are cross-sectional views showing respective manufacturing steps of a conventional semiconductor device having a through electrode.
Hereinafter, the manufacturing procedure of the semiconductor device will be described with reference to the drawings.
First, as shown in FIG. 63A, a substrate body 201 is manufactured in which a plurality of circuit element portions 202 having a predetermined function are arranged on the front circuit forming surface.
Next, as shown in FIG. 63 (b), a plurality of holes 203 of less than 100 μm are formed from the surface of the substrate body 201 made of a silicon wafer.
Next, an insulating film is formed on the inner wall surface of the hole 203, and then a metal film serving as a cathode for electroplating is deposited on the insulating film. Then, using this as a cathode, the inside of the hole 203 is filled with metal as shown in FIG.
Next, as shown in FIG. 63 (d), the back surface of the substrate body 201 is deleted until the end face of the through electrode 204 is exposed, and as shown in FIG. 62 (e), the back surface of the substrate body 201 is selectively removed. Etch into.
Then, by chemical vapor deposition (CVD), as shown in FIG. ₂ An insulating film 205 constituted by is deposited.
Thereafter, the through electrode 204 portion of the insulating film 205 is removed by etching using a photoengraving method, whereby a semiconductor device assembly in which the through electrode 204 penetrates through the substrate body 201 as shown in FIG. 63 (g) is manufactured. Finally, the semiconductor device assembly is divided into a plurality of semiconductor devices.
[0003]
[Problems to be solved by the invention]
In the manufacturing method of the semiconductor device having the through electrode 204 having the above structure, the etching process is performed before the through electrode is formed. When the etching process is used in this way, the hole 203 that can be etched by the trench is formed. The maximum depth is about 100 μm. Therefore, when the back surface of the substrate body 201 is deleted until the end surface of the through electrode 204 is exposed as shown in FIG. 63 (d), the thickness of the substrate body 201 becomes extremely thin. I must.
In the subsequent process from this state, as shown in FIGS. 63 (e) to 63 (g), the back surface of the substrate body 201 is etched, the insulating film 205 is formed after the etching process, and piercing is performed by photolithography. The etching removal process of the insulating film 205 in the electrode 204 portion is refrained, and the substrate body 201 that has been made extremely thin is damaged by these handlings, and there is a problem that the product yield of the semiconductor device is not good.
[0004]
An object of the present invention is to solve such problems, a semiconductor capable of reducing breakage in handling of a semi-finished product and easily manufacturing a semiconductor device having a through electrode with a high yield. An object is to obtain an apparatus and a method for manufacturing the same.
Another object of the present invention is to obtain an electronic device incorporating a semiconductor device obtained by the manufacturing method.
[0005]
[Means for Solving the Problems]
A method of manufacturing a semiconductor device according to the present invention includes a step of attaching a support plate to a back surface of a substrate body in which a plurality of circuit element portions having a predetermined function are formed on a circuit forming surface on the front surface, Forming a first groove that reaches the support plate in at least one of a predetermined portion in a portion or a circuit element portion; Forming an insulating film on the circuit forming surface using an insulating material so as to expose an electrode portion formed in the circuit element portion; and exposing the support plate to the insulating film in the first groove portion Forming a hole to be in front Power saving Forming a metal wiring pattern that reaches at least a part of the inner wall of the hole from the pole, removing a predetermined amount of the bottom surface of the hole, and a conductive material so as to protrude from the circuit forming surface into the hole Forming a through-hole electrode, forming a second groove reaching the support plate at the peripheral edge of the circuit element portion, and removing the support plate and separating the semiconductor device into a plurality of semiconductor devices. It is equipped with.
[0006]
The method of manufacturing a semiconductor device according to the present invention includes a step of attaching a first support plate to a back surface of a substrate body in which a plurality of circuit element portions having a predetermined function are formed on a front circuit forming surface, Forming a first groove reaching one support plate; Forming an insulating film on the circuit forming surface using an insulating material so as to expose an electrode portion formed in the circuit element portion; and exposing the support plate to the insulating film in the first groove portion Forming a hole to be in front Power saving Forming a metal wiring pattern that reaches at least a part of the inner wall of the hole from the pole, removing a predetermined amount of the bottom surface of the hole, and a conductive material so as to protrude from the circuit forming surface into the hole Forming a through electrode, forming a second groove reaching the support plate at the periphery of the circuit element portion, and attaching a second support plate to the circuit forming surface side of the semiconductor substrate A step of removing the first support plate, a step of inspecting the circuit function of the circuit element portion by touching the through electrode, and removing the second support plate, thereby providing a plurality of semiconductors. And a step of separating into an apparatus.
[0007]
The method of manufacturing a semiconductor device according to the present invention includes a step of forming a hole in the support plate, a step of filling the hole with an electrode material to form a first protruding electrode, and a step at a predetermined position of the support plate. Forming a first metal wiring pattern to be connected to one protruding electrode, and supporting the back surface of the substrate body on which a plurality of circuit element portions having a predetermined function are formed on the front circuit forming surface using an adhesive A step of affixing on the board, and a first groove portion reaching the insulating layer formed of the adhesive before the first metal wiring pattern in the region of the substrate body between the circuit element portions; A step of dividing the main body into a plurality of semiconductor substrates, and using an insulating material, an insulating film is formed on the surface of the semiconductor substrate except for an electrode portion of the circuit element portion, and the first groove portion In the insulating film A step of forming a hole reaching the support plate, a step of forming a second metal wiring pattern so as to reach at least part of the inner wall of the hole from the electrode portion, and removing the insulating layer on the bottom surface of the hole A step of exposing the first metal wiring pattern, a step of embedding metal in the hole to form a through electrode, a step of providing a second protruding electrode at a predetermined position of the second metal wiring pattern, and the first A step of providing a second groove portion that reaches the support plate along the groove portion and a step of removing the support plate.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
Embodiment 1 FIG.
1 to 10 are diagrams in each manufacturing process in the method of manufacturing a semiconductor device according to the present invention.
Hereinafter, a manufacturing procedure of the semiconductor device 100 will be described with reference to the drawings.
First, a plurality of circuit element portions 2 having a predetermined function are arranged on the circuit forming surface on the surface of the substrate body 1 (first step).
Next, as shown in FIG. 2, the back surface opposite to the circuit forming surface of the substrate body 1 is deleted to a predetermined thickness (second step).
Thereafter, as shown in FIG. 3, a support plate 3 made of, for example, an aluminum metal plate is attached to the back surface of the substrate body 1 (third step). This attachment is performed by anodic bonding in which an electric field is applied using the substrate body 1 as an anode and the support plate 3 as a cathode. Before attaching the support plate 3 to the back surface of the substrate body 1, silicon oxide as an oxide film is formed on the back surface of the substrate body 1. The back surface of the semiconductor substrate is electrically and chemically stabilized, and the electrical performance and reliability of the semiconductor device are improved.
Next, as shown in FIGS. 4A and 4B, the first groove portion 4 reaching the first support plate 3 in the region of the substrate body 1 other than the region of the circuit element portion 2 is, for example, diced. To form a lattice shape (fourth step). As a result, the substrate body 1 is divided into a plurality of semiconductor substrates 50.
[0009]
Next, as shown in FIGS. 5A and 5B, for example, a photosensitive polyimide resin is used as an insulating material, and the electrode portion 5 is exposed by the circuit element portion 2 on the surface of the semiconductor substrate 50. In this manner, the insulating film 6 is formed, and the hole 7 reaching the support plate 3 is formed in the first groove portion 4 by photolithography (photolithography). Note that photosensitive glass may be used instead of the photosensitive polyimide resin (fifth step).
Next, as shown in FIGS. 6A and 6B, the metal wiring pattern 8 is formed so as to reach at least part of the inner wall of the hole 7 from the electrode portion 5 (sixth step).
[0010]
Subsequently, as shown in FIG. 7, the support plate 3 on the bottom surface of the exposed hole 7 is removed by a predetermined amount, for example, by wet etching (seventh step).
Thereafter, as shown in FIG. 8, for example, a conductive metal such as solder is embedded in the hole 7 so as to protrude from the surface of the metal wiring pattern 8 by electroplating using the first support plate 3 as a cathode, and the through electrode 10 Is formed (eighth step).
Next, as shown in FIGS. 9A and 9B, the second groove portion 9 reaching the first support plate 3 along the center line of the first groove portion 4 is formed using, for example, a dicing saw. It forms in a lattice shape (9th process).
Finally, as shown in FIGS. 10A and 10B, the first support plate 3 is removed by wet etching, and a plurality of semiconductors having through electrodes 10 reaching from the front surface to the back surface at the peripheral edge. The apparatus 100 is manufactured (tenth process).
The semiconductor device 100 manufactured in this way has a through-hole 7 reaching from the circuit formation surface to the surface opposite to the circuit formation surface in the semiconductor substrate 50 having the circuit element portion 2 formed on one main surface. In the case of having a metal wiring pattern 8 and a through electrode 10 which are conductive paths along the through hole 7 and having a photosensitive polyimide resin which is an insulating material surrounding the conductive paths 8 and 10, they are adjacent to each other. No other insulating material is interposed between the conductive paths 8 and 10.
[0011]
In the manufacturing method of the semiconductor device of the above embodiment, the semiconductor device 100 having the through electrode 10 at the peripheral edge can be easily manufactured.
In addition, since a predetermined amount of the back surface of the substrate body 1 is removed before the support plate 3 is attached to the substrate body 1, the holes 7 on the semiconductor substrate 50 can be formed more easily.
Further, since silicon oxide, which is an oxide film, is formed on the back surface of the substrate body 1, the back surface of the semiconductor substrate 50 is electrically and chemically stabilized, and the semiconductor device 100 is improved in electrical performance and reliability. .
In addition, since the support plate 3 is attached to the back surface of the substrate body 1 by anodic bonding, different materials such as an adhesive are not present, and restrictions in the process such as chemical resistance are reduced.
[0012]
In addition, since the first groove 4 is formed using a dicing saw, the first groove 4 can be formed easily and efficiently.
In addition, since the holes 7 arranged in two rows along the first groove 4 are formed in the first groove 4 between the circuit element portions 2, the peripheral through electrode 10 is formed by the common first groove 4. Since it is formed, the manufacturing process is simple and the manufacturing is easy.
In addition, although the 1st groove part 4 can also be formed by reactive ion etching, in this case, the 1st groove part 4 with higher dimensional accuracy can be formed.
[0013]
In addition, when the hole 7 reaching the support plate 3 is formed in the first groove portion 4 using the photosensitive polyimide that is an insulating material, the insulating film 6 is simultaneously formed on the surface of the semiconductor substrate 1. There is no need to provide a step for forming the second protective film. Further, the process can be simplified as compared with an insulating material having no photosensitivity.
In addition, since the second groove portion 9 is also formed using a dicing saw, the second groove portion 9 can be formed easily and efficiently as in the case of the first groove portion 4.
[0014]
Further, in this embodiment, the support plate 3 is a metal plate, and a predetermined amount of the bottom surface of the hole 7 is removed by an etching method using a corrosive liquid, and the through electrode protruding from the back surface of the semiconductor device 100 Can be easily formed. The metal plate is an aluminum plate, is lightweight, and can be obtained at low cost.
Further, since the support plate 3 is removed by an etching method using a corrosive liquid, the support plate 3 can be easily removed.
[0015]
Further, since the metal in the hole 7 is embedded by electroplating using the support plate 3 as a cathode, the selective growth is higher than that of the electroless plating, and only the hole 7 can be embedded. It becomes. In addition, there are wide choices of materials that can be used.
[0016]
Embodiment 2. FIG.
11 to 13 are views showing each process of the semiconductor device manufacturing method according to the second embodiment of the present invention.
In addition, about this embodiment and each other embodiment, it attaches | subjects and demonstrates the same code | symbol about the same and equivalent member and site | part as FIG. 1 thru | or FIG.
The manufacturing process of this embodiment is the same as that of the first embodiment from the first process to the ninth process.
[0017]
In this embodiment, after the ninth step shown in FIGS. 9A and 9B, at least bonding is performed using the adhesive 11 on the circuit forming surface side of the semiconductor substrate 50 as shown in FIG. The 2nd support plate 12 whose surface side is an insulator is affixed. A support film may be attached instead of the second support plate 12.
Thereafter, as shown in FIG. 12, the support plate 3 is removed by wet etching.
Next, the intermediate product of the semiconductor device 100 is inverted as shown in FIG. 13, and the probe needle 13 is brought into contact with the through electrode 10 to inspect the circuit function of the circuit element unit 2.
Finally, the second support plate 12 is peeled or removed by other methods, whereby the semiconductor device 100 shown in FIG. 10 is obtained.
[0018]
According to the method of manufacturing a semiconductor device according to the embodiment of the present invention, even after the first support plate 3 is removed, the plurality of semiconductor devices 100 are not individually separated by the second support plate 12 and handled as much. Thus, the function of the circuit element unit 2 can be easily inspected.
[0019]
Embodiment 3 FIG.
14 to 21 are views showing each process of the semiconductor device manufacturing method according to the third embodiment of the present invention.
In this embodiment, as shown in FIG. 14, an insulating layer 14 is formed between the back surface of the substrate body 1 and the first support plate 3 made of an aluminum metal plate. The insulating layer 14 is made of, for example, an adhesive material such as a polyimide precursor. After the first support plate 3 is adhered to the back surface of the substrate body 1 using the adhesive material, the adhesive material is heated. It is formed by curing. The other manufacturing steps are the same as those in the first embodiment. In this embodiment, as shown in FIG. 21, the semiconductor device 350 in which the insulating layer 14 is formed on the back surface of the semiconductor substrate 50 is provided. can get.
[0020]
In this embodiment, the back surface of the substrate body 1 and the support plate 3 are bonded with an adhesive material, cured after bonding to become the insulating layer 14, and remain on the back surface of the semiconductor substrate 50 after the support plate 3 is removed. Therefore, the adhesive forms the stable insulating layer of the semiconductor device 350 as it is.
[0021]
Embodiment 4 FIG.
22 to 28 are views showing each process of the semiconductor device manufacturing method according to the fourth embodiment of the present invention.
The manufacturing process of this embodiment is the same as that of the first embodiment until the third process in the first embodiment, that is, the process shown in FIG. 3 in which the first support plate 3 is attached to the back surface of the substrate body 1. The same.
In this embodiment, next, as shown in FIG. 22, the first groove 15 reaching the support plate 3 is formed by using, for example, dicing so as to surround the circuit element portion 2.
[0022]
Thereafter, as shown in FIG. 23, for example, a photosensitive polyimide resin is used as an insulating material, and an insulating film 17 is formed on the surface of the semiconductor substrate 50 so as to expose the electrode portion 5 in the circuit element portion 2. In the first groove portion 15, holes 16 reaching the support plate 3 are formed by photolithography (photolithography). Photosensitive glass may be used instead of the photosensitive polyimide resin.
Next, as shown in FIG. 24, a metal wiring pattern 8 is formed on the insulating film 17 so as to reach at least a part of the inner wall of the hole 16 from the electrode portion 5.
[0023]
Subsequently, as shown in FIG. 25, a predetermined amount of the support plate 3 on the bottom surface of the exposed hole 16 is removed by wet etching, for example.
Thereafter, as shown in FIG. 26, a conductive metal such as solder is embedded in the hole 16 so as to protrude from the surface of the insulating film 17 by electroplating, for example, using the support plate 3 as a cathode, and the through electrode 10 is formed.
Next, as shown in FIG. 27, a grid-like second groove portion 9 reaching the support plate 3 along the center line between the adjacent first groove portions 15 is formed using, for example, a dicing saw.
Finally, as shown in FIG. 28, the support plate 3 is removed by wet etching, so that the semiconductor device 300 having the penetrating electrode 10 reaching the back surface from the front surface to the peripheral portion is obtained.
[0024]
According to this embodiment, the first groove portions 15 extending in two rows are formed between the circuit element portions 2, and the holes 16 aligned in a row are formed in each first groove portion 15. Compared with the manufacturing method of the semiconductor device of Form 1, the second groove portion 9 is formed in the substrate body 1, so that a conventional blade for cutting the substrate body 1 can be used. In addition, the peripheral portion of the semiconductor device 300 is a part of the semiconductor substrate 50 and has higher rigidity than the semiconductor devices 100 and 200 of the first to third embodiments, and accordingly, the through electrode 10 at the peripheral portion is further protected. be able to.
[0025]
Embodiment 5 FIG.
29 to 40 are diagrams showing each step of the semiconductor device manufacturing method according to the fifth embodiment of the present invention.
In this embodiment, first, as shown in FIG. 29, a hole 21 is formed in a support plate 20 of an aluminum metal plate.
Next, as shown in FIG. 30, the hole 21 is filled with an electrode material to form a first protruding electrode 23.
Thereafter, as shown in FIG. 31, a first metal wiring pattern 22 connected to the first protruding electrode 23 is formed at a predetermined position of the support plate 20.
Next, as shown in FIG. 32, the substrate body 1 shown in FIG. 2 is affixed onto the first metal wiring pattern 22 using, for example, a polyimide resin adhesive. This adhesive material is thermally cured to form the insulating layer 24.
[0026]
Next, as shown in FIG. 33, in the region of the substrate body 1 between the circuit element portions 1, the first groove portions 25 reaching to the front of the first metal wiring pattern 22 are formed in a lattice shape using, for example, dicing. . The formation of the groove 25 divides the substrate body 1 into a plurality of semiconductor substrates 50.
[0027]
Next, as shown in FIG. 34, for example, a photosensitive polyimide resin is used as an insulating material, and an insulating film 6 is formed on the surface of the semiconductor substrate 50 so as to expose the electrode portion 5 in the circuit element portion 2. In the first groove portion 25, a hole 26 reaching the support plate 20 is formed by photolithography. Photosensitive glass may be used instead of the photosensitive polyimide resin.
Next, as shown in FIG. 35, a second metal wiring pattern 27 is formed so as to reach at least a part of the inner wall of the hole 26 from the electrode portion 5.
[0028]
Subsequently, as shown in FIG. 36, the insulating layer 24 on the bottom surface of the hole 26 is removed to expose the first metal wiring pattern 27.
Thereafter, as shown in FIG. 37, the embedded through electrode 30 is formed so as to protrude from the surface of the second metal wiring pattern 27 by electroplating, for example, using a conductive metal such as solder in the hole 26, for example, using the support plate 20 as a cathode. Form.
Next, as shown in FIG. 38, a second protruding electrode 28 is provided at a predetermined location of the second metal wiring pattern 27.
[0029]
Next, as shown in FIG. 39, a grid-like second groove portion 29 reaching the support plate 20 along the center line of the first groove portion 25 is formed using, for example, a dicing saw.
Finally, the support plate 20 is removed by wet etching, so that the second protruding electrode 28 electrically connected through the through electrode 30 is provided on the front surface side and electrically connected through the through electrode 30 on the back surface side. The semiconductor device 400 provided with the first protruding electrode 23 is manufactured.
[0030]
In this embodiment, the semiconductor device 400 having the first protruding electrode 23 and the second protruding electrode 28 can be easily manufactured.
[0031]
Embodiment 6 FIG.
FIG. 41 shows a semiconductor device 500 manufactured by the manufacturing method of the sixth embodiment. In this semiconductor device 500, the second protruding electrode 28 of the fifth embodiment is omitted. The semiconductor device 600 of FIG. 42 is an example in which the first protruding electrode 23 of the fifth embodiment is deleted, and the semiconductor device 700 of FIG. 43 is provided with the second protruding electrode 28 on the circuit formation surface of the semiconductor substrate 50. In addition, the first protruding electrode 23 is provided on the opposite surface.
[0032]
Embodiment 7 FIG.
44 is a cross-sectional view of a semiconductor device 800 manufactured by the manufacturing method according to the seventh embodiment of the present invention, and FIG. 45 is an enlarged view of a main part of FIG.
In this embodiment, the insulating layer 24 on the bottom surface of the hole 26 in which the through electrode 30 is embedded is removed to expose the first metal wiring pattern 22 that is a conductive path, and then is part of the circuit formation surface. A second metal wiring pattern 27 as a conductive path is formed so that the electrode reaches at least a part of the inner wall of the hole 26. That is, as compared with the semiconductor device 700 of the sixth embodiment shown in FIG. 43, the process of exposing the first metal wiring pattern 22 and the process of forming the second metal wiring pattern 27 are interchanged. Further, there is no process of filling the hole 26 with metal and forming the through electrode 30.
46, the first groove portions 15 extending in two rows are formed between the circuit element portions 2, and the holes 16 aligned in a row are formed in each first groove portion 15. In the semiconductor device 900 of FIG. FIG. 6 is a main part sectional view of a manufactured semiconductor device 900.
[0033]
In addition, about the manufacturing method of the semiconductor device of said each Embodiment 1-7, spin-coat the independent dispersion | distribution ultrafine particle which covered the metal particle with a diameter of about 3-30 nm with surfactant, and disperse | distributed in the solution, and is semiconductor. After depositing and firing on the surface of the substrate and the first groove, a part of the fired part may be deleted to expose the electrode part, and a hole may be formed in the first groove. . In this case, there is little influence on the environment such as wastewater treatment, and the consistency with the semiconductor device manufacturing process is good because of spin coating.
[0034]
Moreover, you may carry out by electroless plating as a filling method of the metal of the electroconductive material in a hole. In this case, the time of the embedding process is short and simple.
Moreover, you may use a conductive paste as a conductive material in a hole. In this case, the embedding process can be simplified.
The conductive material can be embedded in the holes by screen-printing and firing independently dispersed ultrafine particles in which metal particles having a diameter of about 3 to 30 nm are covered with a surfactant and dispersed in a solution.
In addition, the conductive material in the hole is embedded by a gas deposition method in which ultrafine metal particles generated by a gas evaporation method are sprayed from a nozzle directed to the hole on a semiconductor substrate placed on a stage in a decompression chamber. It can also be done. In this case, the time of the embedding process is short, the material can be used without waste, and the influence on the environment is small.
[0035]
Also, a metal wiring pattern can be formed after forming a metal film on the entire surface of the semiconductor substrate and the first groove by vapor deposition, filling the hole in the hole by electroplating using this metal film as a cathode. In this case, there is no need to use a metal (conductor) as a support plate during electroplating in which a metal is embedded in the hole.
Further, after removing a predetermined amount of the bottom surface of the hole, a metal wiring pattern extending from the electrode portion to the bottom surface of the hole may be formed. In this case, the reliability of electrical connection is improved.
[0036]
Further, the first groove portion may be provided by reactive ion etching inside the circuit element portion, and the protruding electrode may be provided in a portion other than the peripheral portion of the semiconductor device.
[0037]
Embodiment 8 FIG.
47 is a cross-sectional view of an electronic device configured by stacking the semiconductor devices 100 manufactured by the manufacturing method of the first embodiment so that the through electrodes 10 are connected to each other in a plurality of stages. In this embodiment, A highly integrated and highly functional electronic device can be obtained.
[0038]
Embodiment 9 FIG.
48 has a circuit function in which a small circuit board 32 on which a passive element 31 such as a chip capacitor is mounted is connected to and integrated with the through electrode 10 of the semiconductor device 100 manufactured by the manufacturing method of the first embodiment. It is the figure which showed the electronic device. In this case, the size can be reduced as compared with a conventional so-called hybrid IC.
[0039]
Embodiment 10 FIG.
49 shows a first circuit board 33 having an electronic component 35 and a second circuit board 34 having an electronic component 36 on both sides of the through electrode 10 of the semiconductor device 100 manufactured by the manufacturing method of the first embodiment. It is the figure which showed the connected electronic device. In this case, a three-dimensional connection structure is obtained, and a highly integrated electronic device with a high degree of freedom can be obtained.
[0040]
Embodiment 11 FIG.
FIG. 50 shows a part of an electronic device in which the semiconductor device 100 manufactured by the manufacturing method of the first embodiment is embedded in the core 41 of the circuit board 40 and the wiring layers 42 on both sides of the circuit board 40 are connected to the front and back surfaces of the through electrode 10. It is sectional drawing. In this case, a three-dimensional connection structure is obtained, and a highly flexible, highly integrated, and miniaturized electronic device can be obtained. In addition, there is an effect that the wiring delay is reduced.
[0041]
In the eighth to eleventh embodiments, the electronic apparatus incorporating the semiconductor device 100 manufactured by the manufacturing method of the first embodiment has been described. However, the semiconductor manufactured by the manufacturing method of the first to seventh embodiments. Needless to say, the present invention can also be applied to the devices 200, 300, 400, 500, 600, 700, 800 and semiconductor devices manufactured by the manufacturing methods of Embodiments 12 to 18 described later.
[0042]
Embodiment 12 FIG.
51 (a) to 51 (g) are views showing each process of the semiconductor device manufacturing method according to the twelfth embodiment of the present invention.
[0043]
Hereinafter, the manufacturing procedure of the semiconductor device will be described with reference to the drawings.
First, as shown in FIG. 51A, a substrate body 210 is manufactured in which a plurality of circuit element portions 211 having a predetermined function are arranged on the front circuit forming surface. Further, a support plate base material 212 made of a silicon wafer is prepared in advance (first step).
Next, as shown in FIG. 51B, the back surface opposite to the circuit formation surface of the substrate body 210 made of a silicon wafer is thinner than the depth of the hole 213 formed in the subsequent trench etching process. Grind to thickness. On the other hand, an Al film, for example, is formed on the surface of the support plate base material 212 to form an intermediate film 214, and further, for example, SiO 2 ₂ Alternatively, an insulating film 215 made of alumina is formed to manufacture the support plate 217 (second step).
[0044]
Thereafter, as shown in FIG. 51C, the support plate 217 and the thinly polished substrate body 210 are anodically bonded (third step). At this time, a material called PSG (Phosphosilicate Glass) or BSPSG (Brophosphosilicate Glass) is attached to the surface of the insulating film 215. By doing so, the insulating film 215 is doped with phosphorus or boron, and electric charges are easily induced on the surface of the insulating film 215, so that anodic bonding is facilitated. Further, not only the surface of the insulating film but also the insulating film itself can be composed of these materials.
Note that PSG or BSPSG material can also be used for the anodic bonding in the above-described embodiment for the insulating film surface or the insulating film itself.
[0045]
Next, as shown in FIG. 51D, an etching process is performed to reach the support plate 212 having a depth of about 100 μm by etching from the circuit element portion 211 (fourth step).
Next, as shown in FIG. 51E, an insulating film is formed on the inner wall surface of the hole 213, and then a metal film serving as a cathode for electroplating is deposited on the insulating film. Then, a through electrode 216 made of a conductive material is formed inside the hole 213 by electroplating using this metal film as a cathode.
Thereafter, as shown in FIG. 51 (f), the support plate 212 is removed, and the back surface is deleted until the end surfaces of the intermediate film 214 and the through electrode 216 become the same surface (fifth step). At this time, the end face of the through electrode 216 is flattened.
[0046]
Finally, as shown in FIG. 51 (g), the intermediate film 214 is completely removed by etching to produce a semiconductor device assembly in which the through electrodes 216 protrude from the back surface of the substrate body 210. This semiconductor device assembly Is divided into a plurality of parts to manufacture a semiconductor device (sixth step). In this step, the etching process is performed only on the intermediate film 214 and does not reach the insulating film 215. As a result, the insulating film 215 is transferred to the back surface of the substrate body 210. For the support plate base material 212 and the intermediate film 214 to be etched, materials that are easily etched may be selected and used.
[0047]
In the semiconductor device manufactured in the above process, the substrate body 210 is supported by the support plate base material 212 during the manufacturing process, so that it is not necessary to form an insulating film after thinning and to open the through electrode, which is conventionally required. Thus, the through electrode 216 protruding from the back surface of the substrate body 210 can be formed only by a simple process that does not require processing accuracy (see FIGS. 51 (f) and 51 (g)), and the substrate body 212 is damaged in the manufacturing process. Occurrence is reduced and the product yield of semiconductor devices is improved.
In addition, since the insulating film 215 is provided on the back surface side of the substrate body 210, when the back surface side is deleted, the electrode material remains on the back surface of the substrate body, which diffuses into the substrate body and is not expected energy. By forming the order, it is possible to prevent the characteristics of the semiconductor device from being deteriorated.
[0048]
In addition, anodic bonding is used for bonding the support plate base material 212 and the substrate main body 210, and no different material is interposed between the support plate base material 212 and the substrate main body 210, so that the hole 213 is formed by etching. Becomes easier.
Further, Si is used for the support plate base material 212, Al is used for the intermediate film 214, and SiO is used for the insulating film 215. ₂ In general, the processing technology is highly developed and the use of established materials is used in the current semiconductor manufacturing process, so that the yield of products is improved and the manufacturing cost is also reduced.
[0049]
FIG. 52 is a fragmentary cross-sectional view of the semiconductor device 350 manufactured by the method shown in FIG.
The hole 213 of the substrate body 210 is formed substantially perpendicular to the circuit formation surface. A through insulating film 218 is formed on the vertical wall surface of the hole 213. A through electrode 216 penetrates through the hole 213, and both end portions of the through electrode 216 protrude. On the back side of the substrate body 210, an insulating film 215 is formed except for the lower end surface of the through electrode 216. The insulating film 215 and the through insulating film 218 intersect perpendicularly.
In the semiconductor device 350 according to the twelfth embodiment, the back surface of the substrate body 210 is not exposed between the through electrode 216 and the substrate body 210, and there is no problem in insulation, and the end surface of the through electrode 216 is not exposed. The insulating film 215 does not run over, and there is no problem with the bonding property of the through electrode.
Further, the lower end surfaces of the plurality of through electrodes 216 penetrating from the substrate body 210 have a flat surface that is substantially parallel to the circuit formation surface of the substrate body 210, and from the insulating film 215 of the substrate body 210. Since the protruding amounts of the respective through electrodes 216 are substantially equal, the bonding property when the semiconductor devices are stacked and electrically bonded is good.
[0050]
Embodiment 13 FIG.
53 (a) to 53 (g) are views showing each process of the manufacturing method of the semiconductor device according to the thirteenth embodiment of the present invention.
Hereinafter, the manufacturing procedure of the semiconductor device will be described with reference to the drawings.
First, as shown in FIG. 53 (a), a substrate body 210 is manufactured in which a plurality of circuit element portions 211 having a predetermined function are arranged on the front circuit forming surface. Further, an intermediate film 214 made of an Al film is formed on the surface of the support plate base material 212 made of a silicon wafer (first step).
Next, as shown in FIG. 53B, the back surface opposite to the circuit formation surface of the substrate body 210 is deleted to a thickness thinner than the depth of the hole 213 formed in the subsequent trench etching process. On the other hand, in the support plate base material 212 having an Al film intermediate film 214 formed on the surface, an adhesive made of polyimide resin and serving as the insulating film 220 is applied to the surface of the intermediate film 214, and the support plate 221 is attached. Form (second step).
[0051]
Thereafter, as shown in FIG. 53 (c), the substrate body 210 thinly polished on the support plate 221 is bonded by curing the adhesive (third step).
Thereafter, the semiconductor device is manufactured according to the procedure shown in FIGS. 53D to 53G, and each step is the same as FIGS. 51D to 51G described in the twelfth embodiment. It is.
[0052]
In the semiconductor device of this embodiment, a polyimide resin precursor that is an adhesive is used in place of the anodic bonding used in the semiconductor device of the twelfth embodiment.
Although anodic bonding is technically advanced and increases the process cost, the process cost can be reduced by using a polyimide resin.
[0053]
Embodiment 14 FIG.
54 (a) to 54 (g) are views showing each process of the manufacturing method of the semiconductor device according to the fourteenth embodiment of the present invention.
In this embodiment, compared to the method of manufacturing the semiconductor device of the twelfth embodiment, the intermediate film 214 is not formed, that is, the support plate 217 of the twelfth embodiment is formed on the support plate base material 212 on the intermediate film 214. And the insulating film 215 are stacked, whereas the support plate 230 of the fourteenth embodiment is different in that the insulating film 215 is formed on the upper surface of the support plate base material 212. As a result, FIG. -The process of FIG.54 (f) differs.
Also in this embodiment, the substrate main body 210 and the support plate base material 212 are bonded by anodic bonding, and an insulating film is formed on the inner wall surface of the hole 213, and then a metal film serving as a cathode for electroplating is formed. A through electrode 216 is formed inside the hole 213 by electroplating using the metal film as a cathode deposited on the insulating film.
[0054]
In this embodiment, since the intermediate film 214 that is the target of the grinding process is not formed, the grinding process on the back side of the substrate body 210 does not reach the insulating film 215 layer as shown in FIG. Must stop at. For this reason, the degree of grinding must be controlled only by dimensions, and high grinding accuracy is required, but the manufacturing process is simplified in that the process of forming the intermediate film 214 is not necessary.
Note that Al may be used as the support plate base material 212 instead of the Si wafer. Thereby, etching can be easily performed, and the same operation and effect as the semiconductor device of the twelfth embodiment can be obtained.
Further, the back surface grinding of the support plate base material 212 is stopped at the stage where the through electrode 216 is not exposed on the back surface, and then the support plate base material 212 is completely etched away to automatically remove the through electrode 216 from the back side of the substrate body 210. You may make it project. According to this, the grinding accuracy may not be so high.
However, the protruding amount of each through electrode 216 from the insulating film 215 greatly depends on the etching depth and uniformity of the trench etching in FIG. 54D, and the uniformity of each protruding amount is inferior. Also, the flatness of the end face of the through electrode 216 is inferior.
[0055]
Note that a semiconductor device having a through electrode can be manufactured even when the support plate is only the support plate base material 212 in which neither the intermediate film 214 nor the insulating film 215 is formed.
That is, the semiconductor device can be manufactured by the following procedure.
First, the back surface of the substrate main body 210 shown in FIG. 51B is bonded to the front surface of the support plate base material 212 with a polyimide resin, and then the polyimide resin is cured to form an insulating film. Next, a hole 213 reaching the support plate base material 212 from the circuit formation surface is formed, and a through insulating film is formed on the inner wall of the hole 213. Thereafter, a conductive material is embedded in the hole 213 to form the through electrode 216. Next, the support plate base material 212 is removed with the end of the through electrode 216 protruding and the insulating film 220 left. The assembled semiconductor device thus manufactured may be divided into a plurality of pieces.
[0056]
Embodiment 15 FIG.
55 (a) to 55 (g) are diagrams showing respective manufacturing steps of the semiconductor device according to the fifteenth embodiment of the present invention.
In this embodiment, as compared with the semiconductor device manufacturing method of the twelfth embodiment, an SOI (Silicon on Insulator) wafer having a buried oxide film 241 constitutes the substrate body 240, and the through electrode 216 is The difference is that an insulating film is not formed on the inner wall surface of the hole 213 during the formation.
[0057]
In this embodiment, the back surface of the substrate body 240 is processed by mechanical grinding, chemical mechanical polishing, etching, or a combination thereof until the total thickness becomes several microns, and one surface of the buried oxide film 241 is exposed. (See FIG. 55 (b)).
Thereafter, the substrate main body 240 and the support plate base material 212 are joined by anodic bonding (see FIG. 55C), and a hole 213 reaching the support plate base material 212 is formed (see FIG. 55D).
Next, a metal film serving as a cathode for electroplating is formed on the inner wall surface of the hole 213, and the through electrode 216 is formed by electroplating (see FIG. 55 (e)).
Thereafter, the support plate base material 212 is ground until the end face of the through electrode 216 is exposed (see FIG. 55F).
Next, the support plate base material 212 is completely removed by etching to manufacture a semiconductor device assembly (see FIG. 55G), and the assembly is divided to manufacture a semiconductor device.
Note that the intermediate film 214 and the like may be formed as necessary.
[0058]
In the semiconductor device of this embodiment, since the buried oxide film 241 of the substrate body 240 corresponds to the insulating film 215 of the twelfth embodiment, the process of forming the insulating film 215 on the support plate base material 212 will be described below. Thus, not only the manufacturing process is simplified, but also the insulating property of the through electrode 216 is improved.
In addition, since the substrate main body 240 is composed of an SOI wafer, the SOI wafer itself operates at a higher speed than a conventional wafer. Therefore, the transmission path is shortened by connecting elements (stacked mounting) using through electrodes. In combination with this, it is possible to provide an electronic device that operates at a higher speed.
[0059]
FIG. 56 is a view when the through electrode 216 is formed when the substrate body 210 is formed of a Si wafer, and FIG. 57 is a view when the through electrode 216 is formed when the substrate body 240 is formed of an SOI wafer. It is a figure of time.
However, both figures are contrast diagrams for clearly showing the difference between the case where the substrate main body 210 is used and the case where the substrate main body 240 is used, and the configuration of the semiconductor device of the twelfth and fifteenth embodiments is the same. It is different.
56, since the substrate main body 210 has conductivity, an insulating film 250 is once formed on the inner wall surface of the hole 213, and then a metal film 251 serving as a cathode for electroplating is deposited thereon, and thereafter A metal is embedded in the hole 213 to form a through electrode 216.
On the other hand, in the case of FIG. 57, the substrate body 240 is formed of an SOI wafer, and the semiconductor film 251 including the circuit element portion 211 of the substrate body 240 is extremely thin, and a buried oxide film that is an insulating film is provided below the semiconductor film 251. 241 and the underlying support plate base material 212 is finally removed, so that the insulating film on the inner wall surface of the hole 213 is not necessary.
[0060]
Embodiment 16 FIG.
58 (a) to 58 (g) are diagrams showing each manufacturing process of the semiconductor device according to the sixteenth embodiment of the present invention.
In this embodiment, as compared with the semiconductor device manufacturing method of the fifteenth embodiment, the substrate body 260 is affixed by attaching an ultrathin semiconductor layer to an insulating base material 261 made of, for example, quartz glass instead of an SOI wafer. The difference is that it is a combined SOI.
[0061]
In the semiconductor device of this embodiment, the back surface of the substrate body 260 is processed to a predetermined thickness by mechanical grinding, chemical mechanical polishing, etching, or a combination thereof, and then the same procedure as in Embodiment 15 is performed. Accordingly, the through electrode 216 is projected from the back surface.
In this case, since the insulating base 261 can be thickened to the extent of the etching depth, handling of the semi-finished product in each manufacturing process is easier compared to the semiconductor device of the fifteenth embodiment. .
[0062]
Embodiment 17. FIG.
FIGS. 59 (a) to 59 (g) are diagrams showing respective manufacturing steps of the semiconductor device according to the seventeenth embodiment of the present invention.
This embodiment differs from the semiconductor device manufacturing method of the sixteenth embodiment in that Al is used instead of the Si wafer as the support plate base material 270.
In this embodiment, a metal plate is used for the support plate base material 270, and after the hole 213 is formed, a through electrode 216 is formed inside the hole 213 by electroplating. It is not necessary to form an insulating film on the inner wall surface of the hole 213 and a metal film serving as a cathode for electroplating, and the inside of the hole 213 is filled with metal by electroplating using the support plate substrate 270 as a cathode.
[0063]
FIG. 60 is a view when the through electrode 216 is formed when the support plate base material 212 is made of a Si wafer, and FIG. 61 is a view of the through electrode 216 when the support plate base material 270 is made of a metal. It is a figure when formed.
However, both figures are contrast diagrams for clearly showing the difference between the case where the support plate base material 212 is used and the case where the support plate base material 270 is used. The semiconductors of the sixteenth embodiment and the seventeenth embodiment The configuration is different from the device.
In the case of the one shown in FIG. 60, the metal film 251 serving as a cathode for electroplating is once formed on the entire surface including the hole 213, and the photoresist 272 is formed so as to prevent plating growth except for the hole 213. On the other hand, in the case of FIG. 61, the formation process of the metal film 251 and the photoresist 272 is not necessary.
In addition, a support plate in which an intermediate film made of a metal composed of Cu, for example, is formed on the surface of the Si wafer, and a hole that reaches the intermediate film and does not reach the Si wafer is formed, thereby using the intermediate film as a cathode. The through electrode may be formed by electroplating.
[0064]
Embodiment 18 FIG.
62 (a) to 62 (e) are views showing each process of the manufacturing method of the semiconductor device according to the eighteenth embodiment of the present invention.
Hereinafter, the manufacturing procedure of the semiconductor device will be described with reference to the drawings.
First, as shown in FIG. 62A, a circuit element portion 211 having a predetermined function is formed on a circuit forming surface of a substrate body 260 formed by bonding an insulating base material 261 to an SOI wafer 262 (first step). ).
Next, as shown in FIG. 62B, a hole 213 having a depth of about 100 μm reaching the insulating base material 261 from the circuit element portion 211 is formed by etching (second step).
Next, as shown in FIG. 62C, the through electrode 216 is formed in the hole 213 by electroplating without forming an insulating film on the side wall of the hole (third step).
Thereafter, as shown in FIG. 62 (d), the back surface of the substrate body 260 is ground until the end surface of the through electrode 216 is exposed (fourth step).
Finally, as shown in FIG. 62 (e), the insulating base material 261 is removed by etching to a predetermined thickness to manufacture a semiconductor device assembly in which the through electrode 216 protrudes from the back surface of the substrate body 260. A semiconductor device is manufactured by dividing the device assembly into a plurality of pieces (fifth step).
[0065]
This semiconductor device is an example of manufacturing a semiconductor device having a through electrode without using a support plate substrate.
In Embodiments 16 to 18 described above, the case where the semiconductor device is manufactured using the substrate body 260 configured by bonding the insulating base material 261 to the SOI wafer 262 is described. The effect of can be obtained.
[0066]
【The invention's effect】
As described above, according to the method of manufacturing a semiconductor device of the present invention, the step of attaching a support plate to the back surface of the substrate body in which a plurality of circuit element portions having a predetermined function are formed on the front circuit forming surface, Forming a first groove reaching the support plate in at least one of a peripheral portion of the circuit element portion of the substrate body or a predetermined portion in the circuit element portion; Forming an insulating film on the circuit forming surface using an insulating material so as to expose an electrode portion formed in the circuit element portion; and exposing the support plate to the insulating film in the first groove portion Forming a hole to be in front Power saving Forming a metal wiring pattern that reaches at least a part of the inner wall of the hole from the pole, removing a predetermined amount of the bottom surface of the hole, and a conductive material so as to protrude from the circuit forming surface into the hole Forming a through-hole electrode, forming a second groove reaching the support plate at the peripheral edge of the circuit element portion, and removing the support plate and separating the semiconductor device into a plurality of semiconductor devices. Therefore, the substrate is not thinned during the manufacturing process, handling becomes easy, and a semiconductor device having a through electrode can be easily manufactured.
[0067]
According to the method for manufacturing a semiconductor device of the present invention, the first groove is formed in the peripheral portion of the circuit element portion, and the second groove is formed in the first groove, so that it is manufactured by machining. be able to.
[0068]
In addition, according to the method for manufacturing a semiconductor device of the present invention, a predetermined amount of the back surface of the substrate body is removed before the support plate is attached to the substrate body, so that the holes of the semiconductor substrate can be formed more easily.
[0069]
In addition, according to the method for manufacturing a semiconductor device of the present invention, since the first groove portion is formed using a dicing saw, the first groove portion can be formed easily and efficiently.
[0070]
In addition, according to the method for manufacturing a semiconductor device of the present invention, since the first groove is formed by reactive ion etching, the first groove with high dimensional accuracy can be formed.
[0071]
Further, according to the method for manufacturing a semiconductor device of the present invention, the insulating material is photosensitive polyimide or photosensitive glass, and the hole is formed by a photoengraving method (photolithography). In comparison, the process can be simplified.
[0072]
In addition, according to the method for manufacturing a semiconductor device of the present invention, since the second groove portion is formed using a dicing saw, the second groove portion can be formed easily and efficiently.
[0073]
Further, according to the method for manufacturing a semiconductor device of the present invention, the independently dispersed ultrafine particles in which metal particles having a diameter of about 3 to 30 nm are covered with a surfactant and dispersed in a solution are spin-coated to spin the surface of the semiconductor substrate and After being deposited and fired inside the hole formed in the groove portion of 1, a part of the fired part is deleted to form a metal part that embeds the inside of the hole, so there is little environmental impact such as wastewater treatment, Also, since it is spin-coated, the consistency with the manufacturing process of the semiconductor device is good.
[0074]
Further, according to the method for manufacturing a semiconductor device of the present invention, the embedding of the conductive material in the hole is performed on the semiconductor substrate in which the ultrafine metal particles generated by the vapor deposition method are placed on the stage of the decompression chamber. Since it is performed by the gas deposition method of blowing from the nozzle directed to the hole, the time of the embedding process is short as in the process according to claim 9, the material can be used without waste, and the influence on the environment is small.
[0075]
According to the method for manufacturing a semiconductor device of the present invention, the support plate is a metal plate, and the predetermined amount of the bottom surface of the hole is removed by an etching method using a corrosive solution. Can be easily formed.
[0076]
Further, according to the method for manufacturing a semiconductor device of the present invention, since the filling of the metal in the hole is performed using electroplating with the support plate as the cathode, the selective growth is high compared to the electroless plating. Only the part can be embedded. In addition, there are wide choices of materials that can be used.
[0077]
Further, according to the method of manufacturing a semiconductor device of the present invention, the step of attaching the first support plate to the back surface of the substrate body in which a plurality of circuit element portions having a predetermined function are formed on the circuit forming surface on the front surface, and the substrate Forming a first groove in the body reaching the first support plate; Forming an insulating film on the circuit forming surface using an insulating material so as to expose an electrode portion formed in the circuit element portion; and exposing the support plate to the insulating film in the first groove portion Forming a hole to be in front Power saving Forming a metal wiring pattern that reaches at least a part of the inner wall of the hole from the pole, removing a predetermined amount of the bottom surface of the hole, and a conductive material so as to protrude from the circuit forming surface into the hole Forming a through electrode, forming a second groove reaching the support plate at the periphery of the circuit element portion, and attaching a second support plate to the circuit forming surface side of the semiconductor substrate A step of removing the first support plate, a step of inspecting the circuit function of the circuit element portion by touching the through electrode, and removing the second support plate, thereby providing a plurality of semiconductors. And the step of separating the device, the plurality of semiconductor devices are not individually separated by the second support plate even after the first support plate is removed, and the handling of the semiconductor device is facilitated as much as the function of the circuit element unit. The inspection can be facilitated.
[0078]
According to the method for manufacturing a semiconductor device of the present invention, the first groove is formed in the peripheral portion of the circuit element portion, and the second groove is formed in the first groove, so that the substrate body is cut. A conventional blade can be used.
[0079]
In addition, according to the method of manufacturing a semiconductor device of the present invention, after removing a predetermined amount of the bottom surface of the hole, the metal wiring pattern extending from the electrode portion to the bottom surface of the hole is formed, so that the reliability of electrical connection is improved. .
[0080]
Further, according to the method for manufacturing a semiconductor device of the present invention, the holes arranged in two rows along the first groove portion are formed in the first groove portion between the circuit element portions, and between the two rows of holes. Since the second groove is formed, the through electrode at the peripheral edge is formed by the common first groove, so that the manufacturing process is simple and the manufacturing is easy.
[0081]
Further, according to the method for manufacturing a semiconductor device of the present invention, the first groove portions extending in two rows are formed between the circuit element portions, and the holes aligned in a row are formed in each first groove portion, Since the second groove portion is formed between the first groove portions extending in two rows, the second groove portion is formed in the substrate body as compared with the semiconductor device manufacturing method of claim 22. A conventional blade for cutting the body can be used. Further, the peripheral portion of the semiconductor device is a semiconductor substrate and has higher rigidity than that of the semiconductor device according to the twenty-second aspect, so that the through electrode at the peripheral portion can be further protected.
[0082]
Further, according to the method for manufacturing a semiconductor device of the present invention, since the support plate is attached to the back surface of the semiconductor substrate by anodic bonding, there are no different materials such as adhesives, and there are restrictions in the process such as chemical resistance. Less.
[0083]
Further, according to the method of manufacturing a semiconductor device of the present invention, the back surface of the substrate body and the support plate are bonded with an adhesive material, cured after bonding to become an insulating layer, and after removal of the support plate, the semiconductor substrate Since it remains on the back surface, the adhesive remains as it is to form a stable insulating layer of the semiconductor device.
[0084]
According to the method for manufacturing a semiconductor device of the present invention, the oxide film is formed on the back surface of the semiconductor substrate before the support plate is attached to the back surface of the semiconductor substrate. As a result, the semiconductor device is improved in electrical performance and reliability.
[0085]
According to the method for manufacturing a semiconductor device of the present invention, since the first groove is provided inside the circuit element portion, the through electrode can be provided in a portion other than the peripheral portion of the semiconductor device.
[0086]
According to the method for manufacturing a semiconductor device of the present invention, a step of forming a hole in the support plate, a step of filling the hole with an electrode material to form a first protruding electrode, Forming a first metal wiring pattern to be connected to the first protruding electrode at a predetermined position, and applying an adhesive to the back surface of the substrate body in which a plurality of circuit element portions having a predetermined function are formed on the front circuit forming surface; Using the first groove portion reaching the insulating layer formed of the adhesive material in front of the first metal wiring pattern in the region of the substrate body between the circuit element portions. Forming and dividing the substrate body into a plurality of semiconductor substrates, and using an insulating material, forming an insulating film on the surface of the semiconductor substrate, excluding the electrode portion of the circuit element portion, and the first groove portion In the insulating film A step of forming a hole reaching the support plate, a step of forming a second metal wiring pattern so as to reach at least part of the inner wall of the hole from the electrode portion, and removing the insulating layer on the bottom surface of the hole A step of exposing the first metal wiring pattern, a step of embedding metal in the hole to form a through electrode, a step of providing a second protruding electrode at a predetermined position of the second metal wiring pattern, and the first A step of providing a second groove portion that reaches the support plate along the groove portion and a step of removing the support plate, so that the semiconductor device having the first protruding electrode and the second protruding electrode can be easily obtained. Can be manufactured.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view in the middle of manufacturing in a method for manufacturing a semiconductor device according to a first embodiment of the present invention;
FIG. 2 is a cross-sectional view in the middle of manufacturing in the method for manufacturing a semiconductor device according to the first embodiment of the present invention;
FIG. 3 is a cross-sectional view in the middle of manufacturing in the semiconductor device manufacturing method according to the first embodiment of the present invention;
4 (b) is a plan view in the middle of manufacturing in the method for manufacturing a semiconductor device according to the first embodiment of the present invention, and FIG. 4 (a) is a cross section taken along the line AA in FIG. 4 (b). FIG.
FIG. 5 (b) is a plan view in the middle of manufacturing in the method of manufacturing a semiconductor device according to the first embodiment of the present invention, and FIG. 5 (a) is a cross section taken along line BB in FIG. 5 (b). FIG.
6 (b) is a plan view in the middle of the manufacturing process of the semiconductor device manufacturing method according to the first embodiment of the present invention, and FIG. 6 (a) is a cross section taken along the line CC in FIG. 6 (b). FIG.
FIG. 7 is a cross-sectional view in the middle of manufacturing in the method for manufacturing a semiconductor device according to the first embodiment of the present invention;
8B is a plan view in the middle of the manufacturing process in the method of manufacturing a semiconductor device according to the first embodiment of the present invention, and FIG. 8A is a cross section taken along the line DD in FIG. 8B; FIG.
FIG. 9 (b) is a plan view in the middle of manufacturing in the method for manufacturing a semiconductor device according to the first embodiment of the present invention, and FIG. 9 (a) is a cross section taken along line EE in FIG. 9 (b). FIG.
FIG. 10 (b) is a plan view in the middle of manufacturing in the method of manufacturing a semiconductor device according to the first embodiment of the present invention, and FIG. 10 (a) is a cross section taken along line FF in FIG. 10 (b). FIG.
FIG. 11 is a cross-sectional view in the middle of manufacturing in the semiconductor device manufacturing method according to the second embodiment of the present invention;
FIG. 12 is a cross-sectional view in the middle of manufacturing in the semiconductor device manufacturing method according to the second embodiment of the present invention;
FIG. 13 is a cross-sectional view in the middle of manufacturing in the method for manufacturing a semiconductor device according to the second embodiment of the present invention;
FIG. 14 is a cross-sectional view in the middle of manufacturing in the method for manufacturing a semiconductor device according to Embodiment 3 of the present invention;
FIG. 15 is a cross-sectional view in the middle of manufacturing in the method for manufacturing a semiconductor device according to Embodiment 3 of the present invention;
FIG. 16 is a cross-sectional view in the middle of manufacturing in the method for manufacturing a semiconductor device according to the third embodiment of the present invention;
FIG. 17 is a cross-sectional view in the middle of manufacturing in the semiconductor device manufacturing method according to the third embodiment of the present invention;
FIG. 18 is a cross-sectional view in the middle of the manufacturing process of the semiconductor device manufacturing method according to the third embodiment of the present invention;
FIG. 19 is a cross-sectional view in the middle of manufacturing in the method for manufacturing a semiconductor device according to Embodiment 3 of the present invention;
FIG. 20 is a cross-sectional view in the middle of manufacture in the method for manufacturing a semiconductor device according to Embodiment 3 of the present invention;
FIG. 21 is a cross-sectional view in the middle of the manufacturing process of the semiconductor device manufacturing method according to the third embodiment of the present invention;
FIG. 22 is a cross sectional view showing a manufacturing process in the method of manufacturing a semiconductor device according to the fourth embodiment of the present invention;
FIG. 23 is a cross-sectional view in the middle of manufacturing in the method for manufacturing a semiconductor device according to Embodiment 4 of the present invention;
FIG. 24 is a cross-sectional view in the middle of manufacturing in the method for manufacturing a semiconductor device according to Embodiment 4 of the present invention;
FIG. 25 is a cross sectional view of the manufacturing process of the semiconductor device according to Embodiment 4 of the present invention;
FIG. 26 is a cross sectional view of the manufacturing process of the semiconductor device according to Embodiment 4 of the present invention;
FIG. 27 is a cross-sectional view showing a manufacturing process in the method of manufacturing a semiconductor device according to the fourth embodiment of the present invention;
FIG. 28 is a cross sectional view of the manufacturing process of the semiconductor device according to Embodiment 4 of the present invention;
FIG. 29 is a cross-sectional view in the middle of manufacture of the semiconductor device according to Embodiment 5 of the invention.
FIG. 30 is a cross-sectional view in the middle of manufacturing in the method for manufacturing a semiconductor device according to the fifth embodiment of the present invention;
FIG. 31 is a cross-sectional view in the middle of manufacture of the semiconductor device according to Embodiment 5 of the invention.
FIG. 32 is a cross sectional view showing a manufacturing process in the method of manufacturing a semiconductor device according to the fifth embodiment of the present invention;
FIG. 33 is a cross sectional view showing a manufacturing process in the method of manufacturing a semiconductor device according to the fifth embodiment of the present invention;
34 is a cross sectional view of the semiconductor device according to Embodiment 5 of the present invention in the middle of manufacture in the method for manufacturing; FIG.
FIG. 35 is a cross sectional view showing a manufacturing process in the method of manufacturing a semiconductor device according to the fifth embodiment of the present invention;
FIG. 36 is a cross sectional view showing a manufacturing process in the method of manufacturing a semiconductor device according to the fifth embodiment of the present invention;
FIG. 37 is a cross sectional view showing a manufacturing process in the method of manufacturing a semiconductor device according to the fifth embodiment of the present invention;
FIG. 38 is a cross sectional view showing a manufacturing process in the method of manufacturing a semiconductor device according to the fifth embodiment of the present invention;
FIG. 39 is a cross sectional view showing a manufacturing process in the method of manufacturing a semiconductor device according to the fifth embodiment of the present invention;
FIG. 40 is a cross sectional view showing a manufacturing process in the method of manufacturing a semiconductor device according to the fifth embodiment of the present invention;
FIG. 41 is a cross-sectional view showing a manufacturing process in the method of manufacturing a semiconductor device according to the sixth embodiment of the present invention;
FIG. 42 is a cross sectional view showing a manufacturing process in the method of manufacturing a semiconductor device according to the sixth embodiment of the present invention;
FIG. 43 is a cross-sectional view in the middle of the manufacturing process of the semiconductor device manufacturing method according to the sixth embodiment of the present invention;
FIG. 44 is a cross sectional view of the manufacturing process of the semiconductor device according to Embodiment 7 of the present invention;
45 is an enlarged view of a main part of FIG. 44. FIG.
FIG. 46 is a cross-sectional view of another example of the semiconductor device manufacturing method in the middle of manufacturing;
47 is a cross-sectional view of an electronic device according to an eighth embodiment of the present invention. FIG.
FIG. 48 is a cross-sectional view of an electronic device according to a ninth embodiment of the present invention.
FIG. 49 is a cross-sectional view of an electronic device according to a tenth embodiment of the present invention.
50 is a cross sectional view of an electronic apparatus according to an eleventh embodiment of the present invention. FIG.
51 (a) to 51 (g) are views showing each process of the manufacturing method of the semiconductor device according to the twelfth embodiment of the present invention.
52 is a fragmentary cross-sectional view of the semiconductor device manufactured by the manufacturing method of FIG. 51;
FIGS. 53 (a) to 53 (g) are diagrams showing each step of the manufacturing method of the semiconductor device according to the thirteenth embodiment of the present invention.
54 (a) to 54 (g) are diagrams showing each step of the manufacturing method of the semiconductor device according to Embodiment 14 of the present invention;
55 (a) to 55 (g) are diagrams showing each step of the manufacturing method of the semiconductor device according to the fifteenth embodiment of the present invention.
FIG. 56 is a diagram showing a state in which a through electrode is provided in a substrate body using a wafer.
FIG. 57 is a diagram showing a state in which a through electrode is provided in a substrate body using an SOI wafer.
58 (a) to 58 (g) are diagrams showing each step of the manufacturing method of the semiconductor device according to the sixteenth embodiment of the present invention.
59 (a) to 59 (g) are views showing each process of the manufacturing method of the semiconductor device according to the seventeenth embodiment of the present invention.
FIG. 60 is a view when through electrodes are formed in the case where the support plate base material is composed of a Si wafer.
FIG. 61 is a view when through electrodes are formed in the case where the support plate base material is made of metal.
62 (a) to 62 (g) are views showing each process of the manufacturing method of the semiconductor device according to the eighteenth embodiment of the present invention.
FIG. 63 is a diagram showing each step of the conventional method of manufacturing a semiconductor device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Board | substrate body, 2 Circuit element part, 3 1st support plate, 4, 15, 25 1st groove part, 6,17 Insulating film, 7,16 hole, 8 Metal wiring pattern, 9 2nd groove part, 10 penetration Electrode (projection electrode), 11 Adhesive material, 12 Second support plate, 13 Probe, 14, 17 Insulating layer, 20 Support plate, 21 Hole, 23 First projection electrode, 22 First metal wiring pattern, 24 Insulating layer, 27 Second metal wiring pattern, 28 Second protruding electrode, 30 Conductive part, 31 Passive element, 32 Circuit board, 33 First circuit board, 34 Second circuit board, 35, 36 Electronic component, 40 circuit board, 41 core, 50 semiconductor substrate, 100, 200, 300, 350, 400, 500, 600, 700, 800, 900 semiconductor device, 210, 240, 260 substrate body, 212, 270 support plate base material, 211 circuit Element part, 213 hole, 214 intermediate film, 215 insulating film, 217 support plate, 218 through insulating film, 215 insulating film, 221, 230 support plate, 241 buried oxide film, 251 metal film, 261 insulating substrate, 262 SOI wafer .

Claims

A step of attaching a support plate to the back surface of the substrate body in which a plurality of circuit element portions having a predetermined function are formed on the circuit forming surface on the surface;
Forming a first groove that reaches the support plate in at least one of a peripheral portion of the circuit element portion of the substrate body or a predetermined portion in the circuit element portion;
Using an insulating material to form an insulating film on the circuit forming surface so as to expose the electrode portion formed in the circuit element portion; and
Forming a hole through which the support plate is exposed in the insulating film of the first groove portion;
Forming a metal wiring pattern at least reaching a portion of the inner wall of the hole from the front Symbol electrodes portion,
Removing a predetermined amount of the bottom of the hole;
Embedding a conductive material in the hole so as to protrude from the circuit formation surface, and forming a through electrode;
Forming a second groove portion reaching the support plate at a peripheral edge portion of the circuit element portion;
And a step of removing the support plate and separating the semiconductor device into a plurality of semiconductor devices.

In the step of forming the first groove portion, the first groove portion is formed on a peripheral portion of the circuit element portion, and in the step of forming the second groove portion, the second groove portion is the first groove portion. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is formed inside the semiconductor device.

Before the step of pasting the supporting plate to the substrate body, a manufacturing method of a semiconductor device according to claim 1 or claim 2, characterized in that it further comprises a step of removing a predetermined amount of the back surface of the substrate main body.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein in the step of forming the first groove portion, the first groove portion is formed using a dicing saw.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein in the step of forming the first groove portion, the first groove portion is formed by reactive ion etching.

In the step of forming the insulating film, the insulating material is a photosensitive polyimide or photosensitive glass, claims in the step of forming the hole, the hole is being formed by the photolithography method (photolithography) the method of manufacturing a semiconductor device according to any one of claims 1 to 5.

Wherein in the second step of forming a groove, a method of manufacturing a semiconductor device according to any one of claims 1 to 6 wherein the second groove is characterized in that it is formed by using a dicing saw.

In the step of forming the through electrode, independent dispersed ultrafine particles in which metal particles having a diameter of about 3 to 30 nm are covered with a surfactant and dispersed in a solution are formed by spin coating on the surface of the semiconductor substrate and the first groove portion. 8. The method according to any one of claims 1 to 7 , which is a step of forming a metal portion embedded in the hole by removing a portion of the fired portion after being deposited and fired inside the hole. The manufacturing method of the semiconductor device as described in 2 ..

In the step of forming the through electrode, the embedding of the conductive material in the hole is directed to the hole on the semiconductor substrate on which the metal ultrafine particles generated by the vapor deposition method are placed on the stage of the decompression chamber. the method of manufacturing a semiconductor device according to any one of claims 1 to 7, characterized in that is carried out by a gas deposition method which blows from the nozzle.

In the step of attaching the support plate , the support plate is a metal plate, and in the step of removing a predetermined amount of the bottom surface of the hole, the predetermined amount of the bottom surface of the hole is removed by an etching method using a corrosive liquid. the method of manufacturing a semiconductor device according to any one of claims 1 to 9, characterized in that.

Wherein in the step of forming a through electrode, metal buried in the hole, a manufacturing method of a semiconductor device according to claim 10, characterized in that it is carried out using an electroplating the support plate as a cathode.

A step of attaching a first support plate to the back surface of the substrate body in which a plurality of circuit element portions having a predetermined function are formed on the front circuit forming surface;
Forming a first groove portion reaching the first support plate in the substrate body;
Using an insulating material to form an insulating film on the circuit forming surface so as to expose the electrode portion formed in the circuit element portion; and
Forming a hole through which the support plate is exposed in the insulating film of the first groove portion;
Forming a metal wiring pattern at least reaching a portion of the inner wall of the hole from the front Symbol electrodes portion,
Removing a predetermined amount of the bottom of the hole;
Embedding a conductive material in the hole so as to protrude from the circuit formation surface, and forming a through electrode;
Forming a second groove portion reaching the support plate at a peripheral edge portion of the circuit element portion;
Attaching a second support plate to the circuit forming surface side of the semiconductor substrate;
Removing the first support plate;
A step of inspecting the circuit function of the circuit element unit by contacting the penetrating electrode;
And a step of separating the semiconductor device into a plurality of semiconductor devices by removing the second support plate.

In the step of forming the first groove, said first groove is formed in the peripheral portion of the circuit element portion, in the step of forming the second groove, the second groove of the first groove The method of manufacturing a semiconductor device according to claim 12 , wherein the method is formed inside.

It said step of forming a through electrode, a method of manufacturing a semiconductor device according to any one of claims 1 to 13, characterized in that takes place after the bottom of the hole by a predetermined amount removed.

In the step of forming the hole, in the step of forming the second groove portion, the hole is formed in two rows along the first groove portion in the first groove portion between the circuit element portions . the method of manufacturing a semiconductor device according to any one of the two rows of claims 2 to 11 and forming the second groove during the hole, according to claim 13 and 14.

In the step of forming the first groove portion, first groove portions extending in two rows are formed between the circuit element portions, holes aligned in a row in each first groove portion, and the first groove portions are formed . in the step of forming the second groove of said extending in two rows first claim, characterized in that forming said second groove between the groove 2 through claim 11, claims 13 and 14 A method for manufacturing a semiconductor device according to any one of the above.

It said step of attaching a support plate, a method of manufacturing a semiconductor device according to any one of claims 1 to 16, characterized in that paste by anodic bonding the supporting plate on the back surface of the semiconductor substrate.

Step of attaching the support plate, the between the rear surface of the substrate main body and the supporting plate is bonded with an adhesive material, is cured becomes insulating layer after bonding, after removal of the support plate back surface of said semiconductor substrate the method of manufacturing a semiconductor device according to any one of claims 1 to 16, characterized in that remaining on.

Wherein the support plate before pasting on the back surface of the semiconductor substrate, a manufacturing method of a semiconductor device according to any one of claims 1 to 18 and forming an oxide film on the back surface of the semiconductor substrate.

Wherein in a first step of forming a groove, a method of manufacturing a semiconductor device according to claim 5, characterized in that provided inside said first groove of the circuit element portion.

Forming a hole in the support plate;
Filling the hole with an electrode material to form a first protruding electrode;
Forming a first metal wiring pattern connected to the first protruding electrode at a predetermined position of the support plate;
A step of pasting the back surface of the substrate body formed with a plurality of circuit element portions having a predetermined function on the front circuit forming surface onto the support plate using an adhesive;
In the region of the substrate body between the circuit element portions, a first groove is formed that reaches the insulating layer formed of the adhesive before the first metal wiring pattern, and the substrate body is divided into a plurality of semiconductor substrates. And a process of
Forming an insulating film on the surface of the semiconductor substrate using an insulating material except for the electrode portion of the circuit element portion, and forming a hole reaching the support plate in the insulating film in the first groove portion; ,
Forming a second metal wiring pattern so as to reach at least part of the inner wall of the hole from the electrode portion;
Removing the insulating layer on the bottom surface of the hole to expose the first metal wiring pattern;
Forming a through electrode by embedding a metal in the hole;
Providing a second protruding electrode at a predetermined location of the second metal wiring pattern;
Providing a second groove that reaches the support plate along the first groove;
The method of manufacturing a semiconductor device characterized by comprising the step of removing the support plate.