JP3941316B2 - Semiconductor device manufacturing method, electronic device manufacturing method, semiconductor device, and electronic device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a technique capable of improving the quality of a crystalline semiconductor film formed on a substrate at a relatively low temperature of about 600 ° C. or less and minimizing the quality variation thereof. In particular, this technology can be applied to significantly improve the performance of thin film semiconductor devices using crystalline semiconductor films formed on substrates as channel formation regions of semiconductor devices, and the quality between semiconductor device elements is uniform. The present invention relates to a method for manufacturing a thin film semiconductor device.
[0002]
[Prior art]
When manufacturing a semiconductor device typified by a polycrystalline silicon thin film transistor (p-Si TFT) at a low temperature of about 600 ° C. or lower where a general-purpose glass substrate can be used, the following manufacturing method has been conventionally employed. First, an amorphous silicon film serving as a semiconductor film is formed on a substrate by low pressure chemical vapor deposition (LPCVD). Next, after this amorphous film is irradiated with an excimer laser or the like to form a polycrystalline silicon film (p-Si film), a silicon oxide film to be a gate insulating film is formed by chemical vapor deposition (CVD) or physical It is formed by a vapor deposition method (PVD method). Next, a gate electrode is made of tantalum or the like, and a field effect transistor (MOS-FET) made of metal (gate electrode) -oxide film (gate insulating film) -semiconductor (polycrystalline silicon film) is formed. Finally, an interlayer insulating film is deposited on these films, contact holes are opened, and wiring is performed with a metal thin film to complete a semiconductor device.
[0003]
[Problems to be solved by the invention]
However, in these conventional semiconductor device manufacturing methods, when the energy density of the irradiated laser beam is increased in order to improve the semiconductor characteristics, the semiconductor characteristics are increased even in the same substrate even if the energy density is slightly changed. It was scattered. Therefore, in order to obtain a relatively homogeneous polycrystalline semiconductor film within the substrate, it is necessary to set the energy density of the laser beam to be considerably lower than the optimum value. In addition, since amorphous silicon films are sensitive to fluctuations in the output of laser light, deviations in electrical characteristics such as mobility and threshold voltage between thin film semiconductor elements formed on the same substrate. Was a very big thing. In accordance with such a fact, when a semiconductor device such as a p-Si TFT is manufactured by a conventional manufacturing method, the average value of the electrical characteristics of the completed semiconductor device is, for example, 80 cm if the average value of the mobility of NMOS.²V^-1s^-1In addition, there is a problem that the deviation is recognized to be about 20% of the average value.
[0004]
In view of the above-described circumstances, the present invention is intended to provide a method for stably manufacturing an excellent semiconductor device in a low temperature process of about 600 ° C. or lower.
[0005]
[Means for Solving the Problems]
  A method for manufacturing a semiconductor device according to the present invention includes a semiconductor film forming step of forming a first semiconductor film containing crystal grains on a substrate, and a protective film formation for forming an ion implantation protective film on the first semiconductor film. A step of implanting rare gas element ions into a part of the first semiconductor film, a first crystalline region including the crystal grains, a second crystalline region including the crystal grains, and the first crystalline region And an amorphous region not including the crystal grains sandwiched between the substrate and the second crystalline region, and the substrate and the first semiconductor film sandwiched between the amorphous region and the substrate An ion implantation step of forming a second semiconductor film having a third crystalline region including crystal grains formed in the first semiconductor film at the interface with the first semiconductor film, and crystallizing the second semiconductor film , From the first crystalline region, the second crystalline region, and the third crystalline region, A crystallization step of growing a crystal in an amorphous region to form a third semiconductor film, and growing from the first crystalline region grown from the first crystalline region and from the second crystalline region The second crystal grains form a grain boundary in the amorphous region, and the third crystal grains grown from the third crystalline region are formed in the amorphous region. To do.
[0006]
  The method for manufacturing a semiconductor device includes a base protective film in which the substrate faces the first semiconductor film, and the base protective film has a thickness of 10¹²cm^-2A silicon oxide film having an interface state below about a certain level is preferable. The second semiconductor film has a crystal nucleus density of 3 × 10 5.⁷cm^-2It is preferable to be less than about. The crystal nucleus density of the second semiconductor film is preferably smaller than the crystal nucleus density of the first semiconductor film. The crystal grain size of the third semiconductor film is preferably larger than the crystal grain size of the first semiconductor film. Moreover, it is preferable that the said crystallization process irradiates a laser beam to the said 2nd semiconductor film. In the ion implantation step, the maximum concentration of the rare gas element ions in the amorphous region not including the crystal grains of the second semiconductor film is 5 × 10 5.¹⁹cm^-3About 3 × 10²⁰cm^-3It is preferable that Further, in the ion implantation step, a range center of the rare gas element ions is between the interface between the substrate and the first semiconductor film and the first semiconductor film that is 20 nm away from the interface. Preferably there is. In the ion implantation step, it is preferable that at least part of the portion into which the rare gas element ions are implanted is used for a channel region of a transistor.
[0007]
  Moreover, it is preferable to use the manufacturing method of the said semiconductor device for the manufacturing method of the electronic device concerning this invention.
[0008]
  A semiconductor device according to the present invention includes a semiconductor film having a source region, a drain region, a channel region sandwiched between the source region and the drain region, a gate electrode, the semiconductor film, and the gate electrode. A gate insulating film formed therebetween, crystal grains included in the channel region are larger than crystal grains included in the source region and the drain region, and extend from the source region; and the drain region The crystal grains extending from the surface form grain boundaries in the channel region.
[0009]
  Moreover, it is preferable that the electronic device concerning this invention contains the said semiconductor device.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
The present invention relates to a method for manufacturing a thin film semiconductor device, and relates to a low heat resistant glass substrate having a glass strain point temperature of about 600 ° C. to about 750 ° C., or a silicon film (Si) on various substrates such as a single crystal silicon substrate. Silicon germanium film (Si_xGe_1-x: A semiconductor film forming step of forming a semiconductor material typified by 0 <x <1) as a semiconductor thin film, an ion implantation step of implanting rare gas element ions into the semiconductor film, and a part of the semiconductor film after the ion implantation step And a crystalline semiconductor film forming step in which the semiconductor film is melted and crystallized through a cooling and solidifying process after melting (FIG. 1).
[0011]
In the semiconductor film formation process, first, a polycrystalline film having relatively large crystal grains is formed by devising a method for forming a base protective film, a subsequent cleaning process immediately before the semiconductor film deposition process, a semiconductor film deposition process, and the like (see FIG. 2A). In this state, the crystal grains are not sufficiently large and their distribution is widened. Therefore, in the next ion implantation step, rare gas element ions are implanted into the polycrystalline semiconductor film to destroy most of the crystal grains constituting the polycrystalline body. Since most of the crystal grains are destroyed and only a part of the crystal grains remain, the density of crystal nuclei in the semiconductor into which the rare gas element ions are implanted is significantly reduced (FIG. 2B). In accordance with this principle, the crystal nucleus density after the ion implantation process is surely smaller than the crystal grain density of the polycrystalline semiconductor film immediately after the semiconductor film formation process. Thereafter, a crystalline semiconductor film forming step is performed. Since the semiconductor film with a lowered crystal nucleus density is melted and crystallized, the finally obtained crystalline semiconductor film always has a lower crystal grain density than the film formed before the ion implantation process, and therefore the average crystal grain size increases. (FIG. 2C).
[0012]
If implantation of rare gas element ions into the semiconductor film in the ion implantation process is locally performed by providing an ion implantation protective film in a specific region of the semiconductor film (FIG. 3A), ion implantation protection is performed in the semiconductor film. Only the crystal grains in the region not covered with the film are selectively destroyed, while the crystal grains in the region covered with the ion implantation protective film are protected and survive (FIG. 3B). Thereafter, a crystalline semiconductor film forming step is performed, and the crystal grains that have been protected and survived function as crystal seeds at the time of melt recrystallization, so that the crystals grow laterally and become large crystal grains (see FIG. 3C). In addition, since the position of the crystal grain boundary can be controlled to some extent in this case, the current direction of the semiconductor device (source / drain direction in a MOSFET, Bipolar transistors eliminate the grain boundaries that cross the emitter-collector direction) and can give up and produce high-performance crystalline semiconductor devices. Since the crystal grain boundary can be controlled to some extent, fluctuations in the mobility and threshold voltage of the semiconductor device are remarkably reduced, and a high-performance semiconductor device can always be manufactured stably and without variations. Hereinafter, the manufacturing method of the thin film semiconductor device of this invention is explained in full detail using drawing.
[0013]
In the semiconductor film formation step, a semiconductor film mainly composed of silicon (Si) is formed on the substrate. The semiconductor film has silicon as its main constituent element (silicon atom constituent ratio of about 80% or more) and is in a polycrystalline state. As the substrate, a semiconductor substrate such as single crystal silicon or an insulating substrate such as non-alkali glass or ceramic is usually used. However, if the substrate has a heat resistance of about 600 ° C. or more, it is not limited to the type. A silicon oxide film is preferably deposited on the surface of these substrates as a base protective film for the semiconductor film from about 100 nm to about 10 μm. The silicon oxide film as the base protective film not only simply takes electrical insulation between the semiconductor film and the substrate, but also prevents diffusion of impurities contained in the substrate into the semiconductor film. The interface with the semiconductor film is of good quality. In the present invention, the semiconductor film of the thin film semiconductor device has a thickness of about 10 nm to 150 nm, and the energy band is bent over the entire thickness direction of the semiconductor film (corresponding to a complete depletion model of SOI). Conceivable. Under such circumstances, the interface between the base protective film and the semiconductor film, as well as the interface between the gate insulating film and the semiconductor film, has a significant influence on the electrical conduction. Since the silicon oxide film is a substance that can most reduce the interface trap level when forming an interface with the semiconductor film, it is suitable as a base protective film. The semiconductor film is formed on this base protective film. Accordingly, the base protective film has a thickness of 10 at the interface with the semiconductor film.¹²cm^-2A silicon oxide film having an interface state below about a certain level is desired. Furthermore, in the present invention, suppressing the generation of crystal nuclei in the lower part of the semiconductor film plays an important role. Also in this sense, the base protective film has a density of crystal nuclei generated at the interface with the semiconductor film of 3 × 10.⁷cm^-2It is required to be an insulating film that can be less than about. Objects that can be crystal nuclei are irregularities and steps of about 1 nm or more, dust, dust, fine particles (particles) and the like. Therefore, the concentration on the surface of these insulating films is 3 × 10.⁷cm^-2Must be less than about.
[0014]
The undercoat protective film is formed by a plasma chemical vapor deposition method (PECVD method), a low pressure chemical vapor deposition method (LPCVD method), a vapor deposition method such as a sputtering method, a thermal oxidation method of silicon, or the like. When the substrate is made of high-purity quartz, it is possible to use both the base protective film and the quartz substrate. A semiconductor film is deposited on these underlying protective films by chemical vapor deposition (CVD). As the CVD method, a plasma chemical vapor deposition method (PECVD method) or a low pressure chemical vapor deposition method (LPCVD method) is applied. From the standpoint of obtaining a high-purity semiconductor film in which there are few impurities that can be crystal nuclei in the deposited semiconductor, it is preferable to deposit the semiconductor film by a high vacuum LPCVD method. At this time, higher order silane (Si_nH_{2n + 2}: N = 2, 3, 4) is used as a kind of source gas to deposit a semiconductor film. This is because the semiconductor film is deposited at a high deposition rate even at a low temperature process of about 600 ° C. or less, which is the subject of the present invention, so that the impurity mixing ratio is reduced and the purity of the semiconductor film is increased. A semiconductor film formed by such a vapor deposition method is in an amorphous state immediately after deposition. A thin film in an amorphous state is called an amorphous film, and the thin film is composed of many amorphous grains or amorphous grains and a small amount of crystal grains (M. Miyasaka, et al .: Jpn. J. Appl. Phys. Vol.36 (1997) p.2049). In the present invention, the amorphous film thus obtained is first crystallized to obtain a polycrystalline semiconductor film. Next, most of the polycrystalline semiconductor film is destroyed by an ion implantation process. Ion implantation is performed from the front side of the semiconductor film, and the range center is aligned with the lower part of the semiconductor film, so that only a few crystal nuclei remain in the vicinity of the lower interface of the semiconductor film in the implanted region. Finally, the other part except the lower part of the semiconductor film ion-implanted in the crystalline semiconductor film forming step is melted, and the semiconductor film is recrystallized using the lower part remaining during cooling and solidification of the molten semiconductor film as a crystal source. Proceed to obtain a crystalline semiconductor film (melt crystallized film). If the amorphous grains constituting the amorphous film deposited by the chemical vapor deposition method are large, the crystal grains constituting the polycrystalline semiconductor film obtained from this amorphous film are also large. That is, the crystal nucleus density is reduced. Since the density of crystal nuclei is small, the density of crystal nuclei remaining after ion implantation is naturally reduced. Therefore, the crystal grains constituting the crystalline semiconductor film obtained after the crystalline semiconductor film forming step are also increased, and thus high performance of the thin film semiconductor device is realized. Furthermore, when the above conditions are satisfied, when the ion implantation process is limited to the channel formation region of the semiconductor device and the neighboring region around the channel formation region, the probability of crystal nucleus generation is extremely small in the implantation region. Since the outside is a polycrystalline film composed of crystal grains having a large grain size, crystal growth with a large grain size occurs from the outside to the inside of the implantation region during the crystalline semiconductor film forming step. Eventually, a channel forming region which is the heart of the semiconductor device is formed in this region, so that an excellent thin film semiconductor device can be realized. In such a meaning, the formation of the base protective film and the semiconductor film forming method prior to the semiconductor film forming step are important.
[0015]
In the present invention, as a base protective film forming step prior to the semiconductor film forming step, a silicon oxide film serving as a base protective film for the semiconductor film is formed on the substrate by a vapor deposition method or the like. Further, a cleaning process for cleaning the substrate is provided after the base protective film forming process is completed. The cleaning step includes at least an aqueous solution containing an acid, and it is particularly important to clean the substrate with an aqueous hydrofluoric acid solution. Dust and dust on the underlying protective film not only reduce the purity of the semiconductor formed on it, but also form amorphous nuclei when depositing an amorphous film, or It becomes a crystal nucleus when crystal is grown. That is, the presence of dust or dust on the underlying protective film lowers the purity of the finally obtained crystalline semiconductor film and at the same time reduces the amorphous grains of the amorphous film, and reduces the polycrystalline grains. This is because the density of crystal nuclei after ion implantation is increased, and thus the crystal grains of the melt crystallized film are made smaller, and eventually the performance of the thin film semiconductor device is degraded. Therefore, in order to obtain a good semiconductor device, it is necessary to sufficiently clean the substrate before the semiconductor film is deposited. Accordingly, a crystalline semiconductor film having high purity and large crystal grains will be obtained later. The substrate with the base protective film is washed with an aqueous solution containing a surfactant such as soap, an aqueous solution containing an acid, an aqueous solution containing an alkali, or an organic solvent such as an alcohol such as ethanol or a ketone such as acetone. As an aqueous solution containing an acid, sulfuric acid (H₂SO_Four), Hydrochloric acid (HCl), nitric acid (HNO)_Three), Aqueous solution of hydrofluoric acid (HF), or sulfuric acid and hydrogen peroxide (H₂O₂) And pure water (H₂O) (hereinafter abbreviated as sulfuric acid / hydrogen peroxide), hydrochloric acid, hydrogen peroxide and pure water (hydrochloric acid / water), nitric acid, hydrogen peroxide and pure water Liquid with nitric acid (abbreviated as nitric acid / hydrogen peroxide), sulfuric acid, hydrofluoric acid and pure water (H₂A mixed solution of O), a mixed solution of hydrochloric acid, hydrofluoric acid and pure water, a mixed solution of nitric acid, hydrofluoric acid and pure water, a mixed solution of ammonia, hydrofluoric acid and pure water, etc. are particularly suitable. As an aqueous solution containing an alkali, ammonia (NH_Three) Aqueous solution or a mixed solution of ammonia, hydrogen peroxide solution and pure water (abbreviated as ammonia overwater) is suitable. Before the semiconductor film is deposited, it is necessary to combine these various cleanings as appropriate, and finally to thoroughly wash away with pure water. As an example of preferable cleaning of the glass substrate, there is the following method.
(1) Organic solvent cleaning
(1-1) Cleaning with ketones such as acetone (removing organic substances)
(About 0 to 30 ° C, about 1 to 10 minutes)
(1-2) Washing alcohol such as ethanol (removing organic substances)
(About 0 to 30 ° C, about 1 to 10 minutes)
(1-3) Pure water cleaning (ketone and alcohol removal)
(About 0 to 30 ° C, about 1 to 10 minutes)
(2) Alkali cleaning
(2-1) Ammonia overwater cleaning (metal removal)
(About 50 minutes to 100 degrees C, about 1 minute to 10 minutes)
(2-2) Pure water cleaning (ammonia removal)
(About 0 to 50 ° C, about 1 to 10 minutes)
(3) Acid cleaning
(3-1) Sulfuric acid overwater cleaning (metal removal)
(About 50 minutes to 100 degrees C, about 1 minute to 10 minutes)
(3-2) Pure water cleaning (sulfuric acid removal)
(About 0 to 50 ° C, about 1 to 10 minutes)
(3-3) Hydrochloric acid overwater cleaning (metal removal)
(About 50 minutes to 100 degrees C, about 1 minute to 10 minutes)
(3-4) Pure water cleaning (hydrochloric acid removal)
(About 0 to 50 ° C, about 1 to 10 minutes)
(4) Removal of surface oxide film
(4-1) Hydrofluoric acid aqueous solution cleaning (oxide film surface removal and oxide film surface hydrogen termination)
(About 0 to 30 ° C, about 1 to 10 minutes)
(4-2) Pure water cleaning (hydrofluoric acid removal)
(About 0 to 30 ° C, about 1 to 10 minutes)
Of these four steps, the most important is the removal of the surface oxide film. This is because if the surface layer of the oxide film that forms the base protective film is removed, the metal, dust, etc. adhering to the surface layer are automatically removed. Therefore, when it is desired to minimize the cleaning process before the semiconductor film deposition in response to a request for simplification of the process, the cleaning process may be set so as to include at least cleaning of the surface oxide film removal. However, from the viewpoint of extending the life of the cleaning liquid used for removing the surface oxide film to increase the productivity and more reliably removing impurities on the undercoat protective film, an alkali cleaning or acid before the surface oxide film removing step is performed. Washing is preferably performed. In the cleaning for removing the surface oxide film, a mixed solution of a hydrofluoric acid aqueous solution and an alkaline aqueous solution such as ammonia may be used in addition to a mixed solution of hydrofluoric acid and pure water (hydrofluoric acid aqueous solution) as in the above example. This mixed solution has the advantage of reducing damage to the glass, and is most suitable for cleaning the surface oxide film when using a general alkali-free glass as a substrate. An example of a mixture of hydrofluoric acid aqueous solution and alkaline aqueous solution is ammonium fluoride (NH_FourF) An aqueous solution is conceivable.
[0016]
After the above-described cleaning and the final rinse with pure water are completed, an amorphous semiconductor film is deposited on the base protective film. Various vapor deposition methods are available for semiconductor film deposition. From the standpoint that high-purity semiconductor films can be easily deposited, low-pressure chemical vapor deposition (LPCVD) is particularly suitable. It is. The substrate should be placed in the vapor deposition apparatus immediately (within about 2 hours at the longest) in order to prevent new dust and dirt from adhering to the substrate after washing with pure water is completed. The low pressure chemical vapor deposition method is performed in a high vacuum type low pressure chemical vapor deposition apparatus. This increases the purity of the semiconductor film and minimizes the generation of amorphous nuclei due to impurities, so that the crystalline semiconductor film finally obtained by the present invention is composed of high-purity and large crystal grains. It is for making it. The high vacuum type has a background vacuum degree of 5 × 10 immediately before deposition of the amorphous semiconductor film.^-7In the apparatus that can be set to about Torr or less, specifically, the leakage flow rate from the outside of the apparatus to the film formation chamber is the maximum degassing total flow rate from the cleaned substrate (for example, the maximum degassing total of 17 glass substrates of 300 mm × 300 mm) The flow rate is 1 × 10^-2(Sccm)) of about one tenth or less (according to the previous example, the leakage flow rate from the outside of the apparatus is 1 × 10^-3(Sccm) or less). If the airtightness of the film formation chamber is inevitably less than one tenth of the maximum degassing flow rate from the substrate, the total impurity flow rate (to the film formation chamber) may be This is because there is no significant influence on the sum of the leakage flow rate from the outside of the apparatus and the degassing flow rate from the substrate. Such a high vacuum type low pressure chemical vapor deposition apparatus is not only excellent in airtightness of the film forming chamber, but also has an exhaust speed of 100 sccm / mTorr (100 sccm of inert gas in the film forming chamber). It is further desired to have an exhaust capability of about equal to or greater than the exhaust velocity at which the equilibrium pressure obtained when flowing through the exhaust gas is 1 mTorr. In such a device having a high exhaust capacity, the degassing flow rate of water etc. from a sufficiently cleaned substrate is lowered to a level below the leakage flow rate of the device in a relatively short time of about 1 hour to produce This is because it is possible to remarkably improve the performance.
[0017]
A semiconductor film mainly composed of silicon typified by an amorphous silicon film is a high-order silane (Si_nH_{2n + 2}: N is an integer of 2 or more). In consideration of price and safety, disilane (Si₂H₆) Is the most suitable. In order to deposit a high-purity and high-quality semiconductor film, the leakage flow rate (Q from the outside of the low-pressure chemical vapor deposition apparatus)_L) Higher silane flow rate (Q_SiH) Ratio (R = Q_L/ Q_SiH) Of about 10 ppm or less (R ≦ 10)^-Five) (The previous leakage flow rate is 1 × 10^-3In the case of an example of about (sccm), the disilane flow rate is about 100 sccm or more. ) As described above, the present invention uses a high vacuum type low pressure chemical vapor deposition apparatus and the degassing flow rate from the substrate is less than one tenth of the maximum degassing total flow rate. Q_L) Attempt to deposit semiconductor film after reaching below level. Therefore, the total impurity flow rate is the leakage flow rate from the outside (Q_L) And the same level. The substance that leaks from the outside of the apparatus to the film forming chamber is mainly air. Nitrogen, which accounts for 80% of the air, is inactive, so it does not cause a major problem with respect to semiconductor quality, and the oxygen that accounts for the remaining 20% is a problem as an impurity. On the other hand, among the higher order silanes introduced into the film formation chamber, the substances actually involved in the reaction and taken into the semiconductor film are about 20%, although there are some fluctuations depending on the film formation conditions. Yes. Therefore, even if the worst situation that is impossible in reality is that all impurities such as oxygen existing in the temporary film formation chamber are taken into the semiconductor film, the leakage flow rate (Q_L) Higher silane flow rate (Q_SiH) Ratio (R = Q_L/ Q_SiH) Of about 10 ppm or less (R ≦ 10)^-Five), The concentration of unnecessary impurities such as oxygen atoms with respect to silicon atoms in the deposited semiconductor film is at most 10¹⁷cm^-3Less than about (actually 10¹⁶cm^-3This is because a high-purity semiconductor film can be obtained. When a high-purity polycrystalline semiconductor film is used as an active layer of a thin film semiconductor device (source / drain region or channel formation region of a field effect transistor, or emitter / base / collector region of a bipolar transistor), the semiconductor film forbidden band It has the effect of reducing the trap level in the medium and minimizing the decrease in mobility caused by the impurity element.
[0018]
In addition to the above conditions, the present invention further deposits an amorphous semiconductor film at a relatively low temperature of less than about 430 ° C. At this time, the pressure in the deposition chamber, the flow rate of the higher order silane, or the number of inserted substrates is set so that the deposition rate of the semiconductor film becomes about 0.5 nm / min or more. When an amorphous semiconductor film is deposited at such a low temperature (less than about 430 ° C.) and at a relatively high deposition rate, the amorphous grains constituting the amorphous film obtained by deposition generally increase, and thus The crystal grains of the polycrystalline film obtained when the amorphous film is crystallized significantly increase. As can be understood from this description, one important requirement for realizing a high-performance thin film semiconductor device is the deposition condition of the amorphous film. When an amorphous semiconductor film is deposited at a low temperature of less than about 430 ° C. and a deposition rate of about 0.5 nm / min or more, the generation rate of nuclei (amorphous nuclei) that are the growth source of amorphous grains is amorphous. It is slower than the growth rate of the material film, and therefore the amorphous grains constituting the deposited amorphous film become larger. However, if the substrate cleaning is insufficient when the semiconductor film is deposited, the impurities adhering to the substrate act as amorphous nuclei, so that the amorphous grains are made smaller. Similarly, if the density of the vapor deposition apparatus is insufficient (for example, R = Q_L/ Q_SiH> 10^-Five) Impurity gas leaked from the outside to the deposition chamber adheres to the substrate and forms an arrow-shaped amorphous nucleus, resulting in an excellent amorphous film composed of large-sized amorphous particles. Absent. Further, if the substrate is not sufficiently dried in the film formation chamber (at this time, the background vacuum degree immediately before the semiconductor film deposition is 5 × 10^-7Amorphous grains are reduced by exactly the same principle. In order to obtain a high-performance thin film semiconductor device, the substrate is sufficiently cleaned (at least the cleaning step for removing the surface oxide film), and the film forming device (R = Q_L/ Q_SiH≦ 10^-Five) Is used to dry the substrate well in the film formation chamber (the background vacuum just before the semiconductor film deposition is 5 × 10^-7After setting to about Torr or less, an amorphous semiconductor film is deposited at a deposition temperature of less than about 430 ° C. and a deposition rate of about 0.5 nm / min or more using a higher order silane such as disilane as a source gas. Because it is essential.
[0019]
The semiconductor film formed in the semiconductor film formation step is a polycrystalline semiconductor film. After the amorphous film is deposited by the method described so far, the amorphous film is crystallized and converted into a polycrystalline semiconductor film. In order to obtain a polycrystalline film from an amorphous film, the amorphous film may be crystallized in a solid state, or the amorphous film may be locally less than about 0.1% of the entire substrate and 10 ns. It may be crystallized through a melt state in a very short time of about 1 μs to about 1 μs. In order to crystallize in a solid state, for example, an amorphous film is inserted into a heat treatment furnace in a substantially thermal equilibrium state and subjected to heat treatment at a temperature of about 500 ° C. to 700 ° C. for several minutes to several days, or Heat treatment is performed at a temperature of about 600 ° C. to 900 ° C. for about 0.1 seconds to several minutes using a rapid heat treatment method (RTA method). The heat treatment temperature and time have a relationship that the treatment is completed in a short time as the temperature increases. Therefore, it is recognized that if crystallization is advanced at a high heat treatment temperature, productivity is improved. On the other hand, if the temperature is low, the generation density of crystal nuclei is lowered, so that an effect that a polycrystalline film having a large grain size can be obtained is recognized. Specifically, when the processing temperature is about 550 ° C., a heat treatment time of about one week is required, but at about 600 ° C. for several days, at about 650 ° C. for several hours, at about 700 ° C. for several minutes, at about 800 ° C. It takes a few seconds. Of course, in order to use such a relatively high temperature, it is premised that the heat resistance (strain temperature) of the substrate is at least about 150 ° C. higher than those temperatures. In view of these facts, it can be said that ideally the conditions between the heat treatment at about 550 ° C. for about one week and the heat treatment at about 650 ° C. for several hours are suitable. This method has the effect that the entire substrate is in thermal equilibrium, giving up a uniform polycrystalline film over the entire surface of the substrate, and making the electrical characteristics of the semiconductor device finally produced uniform across the substrate. Have
[0020]
In order to crystallize an amorphous semiconductor film through a local extremely short melting state, it is easiest to irradiate the amorphous film with laser light. Local melt-crystallization in a very short time has the advantage that the substrate selection range can be expanded without causing thermal damage to the substrate. As the laser light, excimer laser light can be used. More specifically, xenon chlorine (XeCl) excimer laser light (wavelength 308 nm), krypton fluorine (KrF) excimer laser light (wavelength 248 nm), or the like is used. Laser irradiation of an amorphous semiconductor film can be classified into three types of phases according to the state of the semiconductor film after irradiation (FIG. 4). That is, the irradiation laser energy density is too weak and the amorphous phase remains in an amorphous state after irradiation, the polycrystalline phase in which a polycrystalline state is obtained after irradiation at an appropriate irradiation energy density, and the irradiation energy density is too strong. It is a microcrystalline phase that becomes a microcrystalline state after irradiation. Separating the amorphous phase from the polycrystalline phase is the surface melting energy density (E_SM), The extreme surface of the amorphous semiconductor film is melted at this energy density. Since only the surface of the semiconductor film melts, the surface melting energy density is independent of the thickness of the semiconductor film. On the other hand, the complete melting energy density (E_cmAt this energy density, the amorphous semiconductor film is completely melted over the entire region in the film thickness direction. Therefore, the complete melting energy density (E_cm) Increases its value as the semiconductor film becomes thicker. The ideal laser energy density for converting an amorphous film into a polycrystalline film in the semiconductor film forming process of the present invention is E_iIn terms of E_iThe value of satisfies the following inequality.
[0021]
(E_cm-E_SM) × k_L+ E_SM<E_i<(E_cm-E_SM) × k_H+ E_SM
k_L= 0.85
k_H= 0.95
As this equation shows, the laser energy density E of the present invention is_iIs set between 85% and 95% of the polycrystalline phase energy density, which means that about 85% to 95% is melted in the thickness direction of the semiconductor film. Ideal laser energy density E_iUsing k_iThe
E_i= (E_cm-E_SM) × k_i+ E_SM
Define the above inequality as
k_L<K_i<K_H
k_L= 0.85
k_H= 0.95
Is rewritten. That is, k_iWhen laser light irradiation is performed with a thickness of about 0.85 to about 0.95, about 85% to about 95% in the thickness direction of the semiconductor film is melted, and the resulting polycrystalline film is formed from relatively large crystal grains. Will be composed. Therefore, in the subsequent ion implantation process, the crystal nucleus density can be drastically reduced, and the electrical characteristics of the finally obtained semiconductor device are also improved. To obtain large grain size E_iE as much as possible_cmIt is desirable to be close to However, as detailed in the prior art section, the output fluctuation of the current excimer laser device is recognized on the order of several percent._HWhen the value is larger than about 0.97, it is recognized that the semiconductor film may enter the microcrystalline phase and finish. In the present invention, E_iThe value of E_cmIs sufficiently smaller than the output deviation of the laser device (k_H= 0.95). By doing so, the average crystal grain size does not become so large at this stage, while the crystal grain size deviation becomes small. The average diameter of the crystal grains is increased after the next step. The melt crystallization is performed so that the same point of the semiconductor film is repeated about 20 times or more and about 80 times or less.
[0022]
In this way, rare gas element ions are implanted into the polycrystalline semiconductor film formed in the semiconductor film formation step, thereby reducing the crystal nucleus density by one step. The ions implanted in the ion implantation step are preferably rare gas elements such as argon (Ar) ions, helium (He) ions, or neon (Ne) ions. This is because these elements are chemically inert and therefore remain in the semiconductor without affecting the electrical characteristics of the semiconductor device. On the other hand, semiconductor elements such as silicon and germanium are also candidates as ion implantation elements, but the range of ion implantation is set near the lower interface of the semiconductor film, as will be described later. For this reason, when the semiconductor element is implanted, the lower interface of the semiconductor film has an unclear spread, and the energy band is bent over the entire semiconductor film. The semiconductor characteristics will be adversely affected. In the case of a rare gas element, even if the range center is set near the lower interface, the lower interface is not disturbed. Therefore, even if a fully depleted semiconductor device is produced, good performance is exhibited. If the rare gas element is argon, the advantage is that the manufacturing cost is reduced and the mass is heavy, so that it is easy to destroy the polycrystalline film and minimize the crystal nucleus density. If the rare gas element is helium, there is an advantage that it is easily detached from the semiconductor film and does not remain after being implanted into the semiconductor film. If the rare gas element is neon, the crystal grains can be destroyed to some extent in the middle of these and the residual in the semiconductor film can be minimized.
[0023]
When rare gas element ions such as argon are implanted into the semiconductor film, the maximum concentration (concentration at the center of the range) of the rare gas element ions in the semiconductor film is 2 × 10.¹⁹cm^-3About 1 × 10^{twenty one}cm^-3Try to be less than or equal to. 2 × 10¹⁹cm^-3If implanted at a concentration higher than about, most of the crystal grains constituting the polycrystalline semiconductor film are surely destroyed. 1 × 10^{twenty one}cm^-3If the implantation is less than or equal to the degree, the rare gas ion element is released from the semiconductor film in a later thermal process, and does not reduce the density of the semiconductor film or create voids in the semiconductor film. As an ideal driving amount, the concentration at the center of the range is 5 × 10.¹⁹cm^-3About 3 × 10²⁰cm^-3Between degrees.
[0024]
The process is performed so that the range center of the rare gas element ions to be implanted exists between the lower interface of the semiconductor film and about 40% of the thickness from the lower interface of the semiconductor film. For example, if the thickness of the semiconductor film is 50 nm, the ion acceleration energy at the time of ion implantation is set so that the center of the range is between the lower interface and 20 nm from the lower interface. This is because there are many crystal nuclei in the subsequent step of forming a crystalline semiconductor film near the lower interface of the semiconductor film, and it is required to destroy these efficiently. In rare gas ion implantation, the semiconductor around the center of the range suffers the most damage, and therefore the crystal nucleus density is most reliably reduced. The most reliable destruction of the part with the highest crystal nucleus density is to align the range center with that part. In other words, the ion implantation process is performed such that the range center of the rare gas element ions implanted in the ion implantation process is within 10 nm ± 10 nm from the lower interface of the semiconductor film.
[0025]
Although the rare gas element ions may be uniformly implanted into the entire semiconductor thin film, it is particularly preferable that the rare gas element ions be selectively implanted only into the channel forming region of the semiconductor device and its neighboring region (FIG. 5A). ). The near region specifically indicates a region within about 1 μm from a region that will be a channel formation region of the thin film semiconductor device later. FIG. 5A shows a device cross-sectional view in the local ion implantation step, and FIG. 5B shows a semiconductor device cross-sectional view created through the local ion implantation step. In FIGS. 5A and 5B, the channel forming regions are drawn to coincide with each other. From these figures, it can be seen that the region into which the rare gas element ions are implanted is a portion of the semiconductor film that will later come under the gate electrode and its periphery. When rare gas element ions are uniformly implanted throughout the semiconductor film, the crystal nucleus density is uniformly reduced throughout the semiconductor film, and large crystal grains are formed throughout. On the other hand, when a rare gas element ion is selectively implanted only into a specific portion of the semiconductor thin film, the semiconductor film is destroyed only at this portion, and the crystal nucleus density is significantly reduced. On the other hand, the polycrystalline film protected by the ion implantation protective film remains in a polycrystalline state. That is, the crystal nucleus density remains high. For this reason, when the semiconductor film is melted and recrystallized in the next crystalline semiconductor film forming step, the region into which the rare gas element ions are implanted is laterally formed using the peripheral polycrystalline film as the nucleus of crystal growth. Growth occurs. The crystal growth rate at the time of melt crystallization is about 10 m / s, and the melting time varies from about 100 nm to about 400 nm depending on the laser irradiation conditions, so that the lateral growth distance of the crystal is about 1 μm to 4 μm. Eventually, about 1 μm to 4 μm on the left and right sides of the ion-implanted region are laterally grown from the polycrystalline body covered with the ion implantation protective film. This indicates the fact that a certain degree of grain boundary control is possible with a transistor having a short gate length (FIG. 5C). For example, under the condition that the lateral growth is 4 μm, even if the distance between neighboring regions is 1 μm, the transistor having a gate length of 6 μm or less always has only one crystal grain boundary crossing the source / drain direction at the center of the channel formation region. . FIG. 5C schematically illustrates this situation. Crystal grains laterally grown from the right and left polycrystals collide with each other at a substantially central portion of the gate electrode to form only one crystal grain boundary crossing the source / drain direction (this is referred to as a lateral growth effect). Since the mobility of the polycrystalline transistor shows a large decrease when electrons or holes cross the grain boundary, the polycrystalline semiconductor device having such a structure clearly shows excellent performance. In a transistor having a long gate length, a region where lateral growth has not reached grows with the same crystal nucleus density as that of the semiconductor film in which ions are uniformly implanted into the entire region. In these regions as well, since the crystal nucleus generation density is significantly lower than in the conventional case, the semiconductor film is composed of crystal grains having a large grain size although lateral growth does not reach. In such a transistor, the effect of large crystal grains and the effect of lateral growth work together to form a semiconductor device that is remarkably superior to conventional ones. As described above, in order to maximize the lateral growth effect, it is desired that the gate length is about 8 μm or less, and the gate length is preferably about 6 μm or less in consideration of the neighborhood region distance.
[0026]
If the channel formation region (FIG. 5A) when the local ion implantation process is performed and the channel formation region (FIG. 5B) after the fabrication of the semiconductor device exactly match, laterally grown crystal grains are formed in the channel formation region. In order to take in as much as possible (in order to take in the lateral growth effect as much as possible), it is preferable that the distance between neighboring regions is small. However, in reality, an alignment error always occurs during the manufacturing process, and these channel formation regions do not exactly match. Therefore, the minimum value of the neighborhood region distance is set larger than the maximum value of the alignment error. Since the alignment error when using a large glass substrate such as 400 mm × 500 mm or 550 mm × 650 mm is about 0.3 μm, the distance between adjacent regions is set to about 1 μm with a margin. Of course, if the alignment error is reduced, the neighborhood region distance can also be reduced. Since the lateral growth effect in the transistor becomes stronger as the neighborhood region distance is smaller, this distance is never short. When the neighborhood region distance is shorter than the crystal lateral growth distance, the lateral growth effect of the transistor occurs. Therefore, the maximum value of the neighborhood region distance is the maximum value of the crystal lateral growth distance, and it can be said that the value is about 4 μm.
[0027]
Thus, after the crystal nucleus density is drastically reduced in the ion implantation process, at least the surface of the semiconductor film is melted and crystallized in the crystalline semiconductor film forming process, and a large-grain crystalline semiconductor film or a lateral growth effect is recognized. A crystalline semiconductor film is obtained. In the crystalline semiconductor film forming step, it is preferable that the semiconductor film is irradiated with light from the front side to promote melt crystallization of the semiconductor film. The reason why light irradiation is performed from the front side is that crystal growth nuclei controlled by an ion implantation process or the like are located in the vicinity of the lower interface of the semiconductor film, and crystallization is advanced using these controlled nuclei. If light is irradiated from the front side, the temperature on the front side is always higher than that near the lower interface, and crystal growth nuclei near the lower interface can be used. As the light irradiation, laser light irradiation which has high energy efficiency and can be crystallized through a local extremely short-time melting state of the semiconductor film is optimal. This is because such laser light irradiation hardly causes thermal damage to the substrate. Among the laser light, excimer laser light can be used, and more specifically, xenon chlorine (XeCl) excimer laser light (wavelength 308 nm), krypton fluorine (KrF) excimer laser light (wavelength 248 nm), or the like is used.
[0028]
In order to irradiate excimer laser light to a semiconductor film ion-implanted locally or uniformly throughout the crystalline semiconductor film forming step, the laser energy density at that time is set to E_CRIn terms of E_CRThe value of satisfies the following inequality.
[0029]
(E_cm-E_SM) × k_LC+ E_SM<E_CR<(E_cm-E_SM) × k_HC+ E_SM
k_LC= 0.85
k_HC= 0.97
E here_cmIs the complete melt energy density of the implanted semiconductor film, E_SMIs the surface melting energy density of the semiconductor film implanted with the arrow ions. Energy density E of laser light irradiated in crystalline semiconductor film formation process_CRIs set between 85% and 97% of the polycrystalline phase energy density. Irradiation laser energy density E_CRUsing k_CRThe
E_CR= (E_cm-E_SM) × k_CR+ E_SM
Define the above inequality as
k_LC<K_CR<K_HC
k_LC= 0.85
k_HC= 0.97
Is rewritten. That is, ideally k_CRWhen laser light irradiation is performed with a thickness of about 0.85 to about 0.97, approximately 85% to 97% in the thickness direction of the semiconductor film is melted, and the resulting polycrystalline film is composed of large crystal grains. It will be. Considering excimer laser light fluctuations, k_HCIs substantially about 0.95. In order to ensure good characteristics, k_LCIs substantially about 0.89. The melt crystallization is performed so that the same point of the semiconductor film is repeated about 20 times or more and about 80 times or less. When laser light irradiation is performed to obtain a polycrystalline semiconductor film in the semiconductor film forming process, each process is performed so that the total number of times of irradiation is about 120 times or less at the same point of the semiconductor film in combination with the laser irradiation of this process. Adjust. This is to prevent surface roughness and impurity contamination when the total number of irradiations is too large, and to obtain a smooth and clean MOS interface.
[0030]
Example 1
FIGS. 6A to 6E are cross-sectional views showing a manufacturing process of a thin film semiconductor device for forming a MOS field effect transistor. In Example 1, crystallized glass having a glass strain point temperature of 750 ° C. was used as the substrate 101. However, even if a substrate other than this is used, its type and size are not limited as long as it can withstand the maximum temperature during the manufacturing process of the thin film semiconductor device. First, a silicon oxide film to be the base protective film 102 is deposited on the substrate 101. If the substrate is a conductive material such as a single crystal silicon substrate doped with impurities at a high concentration, or if it contains unwanted impurities in the semiconductor film such as a ceramic substrate, before the silicon oxide film is deposited A first base protective film such as a tantalum oxide film or a silicon nitride film may be deposited. In the first embodiment, a silicon oxide film is deposited on the substrate 101 by a plasma chemical vapor deposition method (PECVD method) to a thickness of about 200 nm to form a base protective film 102. The silicon oxide film was deposited by ECR-PECVD under the following deposition conditions.
[0031]
Monosilane (SiH_Four) Flow rate ... 60sccm
Oxygen (O₂) Flow rate ... 100sccm
Pressure ... 2.40 mTorr
Microwave (2.45 GHz) output: 2250 W
Applied magnetic field: 875 Gauss
Substrate temperature ... 100 ° C
Deposition time: 40 seconds
Next, after depositing the base protective film, the substrate was cleaned by the following procedure.
[0032]
(1) Isopropyl alcohol cleaning by ultrasonic irradiation (27 ° C, 5 minutes)
(2) Nitrogen bubbled pure water cleaning (27 ° C., 5 minutes)
(3) Ammonia overwater cleaning (80 ° C., 5 minutes)
(4) Cleaning with pure water with nitrogen bubbling (27 ° C, 5 minutes)
(5) Sulfuric acid overwater cleaning (97 ° C, 5 minutes)
(6) Nitrogen bubbled pure water cleaning (27 ° C., 5 minutes)
(7) Diluted hydrofluoric acid aqueous solution (hydrofluoric acid concentration 1.67%) cleaning (27 ° C., 20 seconds)
(8) Pure water cleaning with nitrogen bubbling (27 ° C., 5 minutes)
By the seventh diluted hydrofluoric acid aqueous solution cleaning, the surface layer portion of the underlying oxide film is removed by about 10 nm. An intrinsic amorphous silicon film was deposited to a thickness of about 50 nm by the LPCVD method on the base protective film thus cleaned. The time from the completion of the eighth pure water cleaning until the substrate was installed in the film forming chamber of the LPCVD apparatus was about 25 minutes.
[0033]
The LPCVD system is a hot wall type with a volume of 184.5 l, and the total reaction area after inserting the substrate is about 44000 cm.²It is. The maximum exhaust speed in the film forming chamber is 120 sccm / mTorr. The deposition temperature was 425 ° C., and the substrate was heated and dried at this temperature for 1 hour and 15 minutes. During the drying heat treatment, the deposition chamber in which the substrate is installed has a helium (He) purity of 99.9999% or higher of 200 (sccm) and a hydrogen purity of 99.9999% or higher (H₂) Was introduced at 100 (sccm), and the pressure in the film formation chamber was maintained at about 2.5 mTorr. When the film forming chamber is isolated after the drying process, the pressure increase in the film forming chamber is 9.4 × 10^-6Since it was Torr / min, the leakage flow rate from the outside of the apparatus (Q_L) And the total degas flow rate (Q_TL) In accordance with Boyle-Charles's law
Q_TL(Sccm) = 273.15 (K) /698.15 (K)
× 9.4 × 10^-6(Torr / min) / 760 (Torr)
× 184.5 × 10^Three(Cm^Three)
= 8.93 × 10^-Four(Sccm)
It is. Disilane having a purity of 99.99% or more (Si₂H₆) Was supplied to the film formation chamber at a flow rate of 200 sccm, so that the total impurity leakage flow rate (Q_TLRatio of higher order silane to_TL/ Q_SiH) Is 4.465 × 10^-6It becomes. Therefore, the leakage flow rate (Q_L) Higher silane flow rate (Q_SiH) Ratio (R = Q_L/ Q_SiH) Is 4.465 ppm or less. The degree of vacuum in the film forming chamber immediately before deposition of the semiconductor film after such drying treatment is 2.3 × 10 6 under the temperature equilibrium condition at 425 ° C.^-7It was Torr. The deposition pressure during the deposition of the amorphous silicon film is about 1.1 Torr, and under this condition, the deposition rate of the silicon film is 0.77 nm / min.
[0034]
Next, the amorphous semiconductor film thus obtained was subjected to a heat treatment to crystallize the amorphous film in a solid phase. The heat treatment was performed for 24 hours at a temperature of 600 ° C. in a mixed gas atmosphere of 99% nitrogen and 1% oxygen at atmospheric pressure. By this heat treatment, the semiconductor film is modified from an amorphous state to a polycrystalline state (end of the semiconductor film forming step).
[0035]
Next, as an ion implantation process, argon ions 107 were implanted into the channel forming region 105 and the neighboring region 106 of the polycrystalline semiconductor film 103 (FIG. 6a). As the ion implantation protective film 104, a photoresist having a thickness of 1 μm was used. The neighborhood area distance is 1.0 μm. Argon ion (⁴⁰Ar⁺) Is an acceleration energy of 40 keV and 5 × 10¹⁴cm^-2The semiconductor film was implanted with a dose amount of. The center of the range under these conditions is in the semiconductor film at 9.6 nm from the lower interface of the semiconductor film, and the concentration at the center of the range is about 1.2 × 10.²⁰cm^-3It is. Thus, argon ions were implanted later into the channel formation region of the thin film semiconductor device and its neighboring region, and the polycrystalline film was changed to the destroyed semiconductor film 108 (end of the ion implantation process).
[0036]
After completion of the ion implantation process, the photoresist, which is an ion implantation protective film, is peeled off. As a crystalline semiconductor film formation process, a silicon film locally implanted with argon ions is irradiated with an excimer laser beam of xenon chlorine (XeCl), Melt recrystallization proceeded. The laser beam was condensed into a line having a width of 350 μm and a length of 15 cm, and the substrate was scanned by shifting the line-shaped light in the width direction by 2.5% for each irradiation. Therefore, the same spot on the semiconductor film is subjected to 40 times of laser light irradiation. The irradiation energy density of laser light is 385 mJ · cm^-2It was in. In the excimer laser beam used in the first embodiment, an energy density E that melts only the outermost surface of a 50 nm semiconductor film implanted with argon ions._SMIs 120mJ · cm^-2The energy density E for complete melting_cm400mJ · cm^-2It was in. Therefore, the irradiation energy density of 385 mJ · cm^-2Is k_CROf 0.946, and about 94.6% melted in the film thickness direction of the semiconductor film. The crystalline silicon film thus obtained was patterned to form an island 109 of the semiconductor film (termination of the crystalline semiconductor film forming step) (FIG. 6b).
[0037]
Next, a silicon oxide film 110 was formed by ECR-PECVD so as to cover the island 109 of the patterned semiconductor film. This silicon oxide film functions as a gate insulating film of the semiconductor device. The silicon oxide film deposition conditions for forming the gate insulating film are the same as the deposition conditions for the silicon oxide film of the base protective film except that the deposition time is shortened to 24 seconds. However, immediately before the deposition of the silicon oxide film, the substrate was irradiated with oxygen plasma in an ECR-PECVD apparatus to form a low temperature plasma oxide film on the surface of the semiconductor. The plasma oxidation conditions are as follows.
[0038]
Oxygen (O₂) Flow rate ... 100sccm
Pressure ... 1.85 mTorr
Microwave (2.45 GHz) output: 2000 W
Applied magnetic field: 875 Gauss
Substrate temperature ... 100 ° C
Processing time: 24 seconds
An oxide film of approximately 3.5 nm is formed on the semiconductor surface by plasma oxidation. After the oxygen plasma irradiation was completed, an oxide film was deposited continuously while maintaining a vacuum. Therefore, the silicon oxide film serving as the gate insulating film is composed of a plasma oxide film and a vapor deposition film, and its film thickness is 126 nm. Thus, the gate insulating film deposition was completed (FIG. 6c).
[0039]
Subsequently, a gate electrode 111 is formed by sputtering using a metal thin film. The substrate temperature during sputtering was 150 ° C. In Example 1, a gate electrode was made of tantalum (Ta) with an α structure having a thickness of 750 nm, and the sheet resistance of the gate electrode was 0.8Ω / □. Next, impurity ions 112 serving as donors or acceptors are implanted using the gate electrode as a mask, and source / drain regions 113 and a channel formation region 114 are formed in a self-aligned manner with respect to the gate electrode. In Example 1, a CMOS semiconductor device was produced. When fabricating an NMOS transistor, the PMOS transistor portion is covered with an aluminum (Al) thin film, and phosphine (PH) diluted in hydrogen at a concentration of 5% as an impurity element._Three), And the total ion containing hydrogen at an acceleration voltage of 80 kV is 7 × 10¹⁵cm^-2Was implanted into the source / drain region of the NMOS transistor at a concentration of On the contrary, when fabricating a PMOS transistor, the NMOS transistor portion is covered with an aluminum (Al) thin film, and diborane (B) diluted in hydrogen at a concentration of 5% as an impurity element.₂H₆), And 5 × 10 total ions containing hydrogen at an acceleration voltage of 80 kV¹⁵cm^-2Was implanted into the source / drain region of the PMOS transistor at a concentration of (Fig. 6d). The substrate temperature at the time of ion implantation is 300 ° C.
[0040]
Next, TEOS (Si- (OCH₂CH_Three)_Four) And oxygen as source gases, and an interlayer insulating film 115 was deposited at a substrate temperature of 300 ° C. The interlayer insulating film was made of a silicon dioxide film, and the film thickness was about 500 nm. After the interlayer insulating film was deposited, heat treatment was performed at 350 ° C. for 2 hours in a nitrogen atmosphere to serve as both the baking of the interlayer insulating film and the activation of the impurity element added to the source / drain regions. Finally, a contact hole was opened, aluminum was deposited at a substrate temperature of 180 ° C. by sputtering, and a wiring 116 was formed to complete a thin film semiconductor device (FIG. 6e).
[0041]
The transfer characteristics of the thin film semiconductor device thus prepared were measured. The length and width of the channel formation region of the measured semiconductor device were 10 μm, respectively, and the measurement was performed at room temperature. Mobility ± standard deviation obtained from saturation region at Vds = 8V of NMOS transistor is 216.9 ± 1.9 cm²・ V^{ー 1}・ S^-1The threshold voltage was 3.458 ± 0.206V, and the subthreshold swing was 0.4253 ± 0.0087V. The mobility obtained from the saturation region of the PMOS transistor at Vds = −8 V is 72.4 ± 3.8 cm.²・ V^{ー 1}・ S^-1The threshold voltage was -3.640 ± 0.241V, and the sub-threshold swing was 0.3457 ± 0.0174V. As these measurement results show, these semiconductor devices have almost no variation in the characteristics in the substrate, and high-performance semiconductor devices are uniformly manufactured. On the other hand, in the comparative example in which an amorphous silicon film is deposited and crystallized with a XeCl excimer laser by the prior art, the mobility of the NMOS transistor is 112.2 ± 25.3 cm.²・ V^{ー 1}・ S^-1The threshold voltage is 3.908 ± 0.421V, the subthreshold swing is 0.5866 ± 0.0956V, and the mobility of the PMOS transistor is 40.8 ± 9.9 cm.²・ V^{ー 1}・ S^-1The threshold voltage was −4.505 ± 0.946V, and the sub-threshold swing was 0.4923 ± 0.0740V. As shown in this example, according to the present invention, both N-type and P-type semiconductor devices have a high mobility, a low threshold voltage, and a good thin film semiconductor device exhibiting steep subthreshold characteristics is a general purpose glass. This is because it can be easily, easily and stably produced in a low-temperature process in which a substrate can be used. In addition, the fluctuation range was reduced in all electrical characteristics.
[0042]
【The invention's effect】
As described above in detail, the present invention can easily and stably modify a polycrystalline thin film semiconductor device, which has conventionally had a low quality and a large variation in quality, into a high performance and uniform thin film semiconductor device. The effect of enhancing the operational stability is recognized. Based on such facts, the effects of high-speed operation of the semiconductor device circuit and reduction of the power supply voltage are brought about, and the effect of leading to high-speed response and energy saving of the electronic device is recognized.
[Brief description of the drawings]
FIG. 1 illustrates the principle of the present invention.
FIG. 2 is a diagram illustrating the principle of the present invention.
FIG. 3 is a diagram illustrating the principle of the present invention.
FIG. 4 is a diagram illustrating a phase of laser crystallization.
FIG. 5 is a diagram illustrating the principle of the present invention.
FIG. 6 is a diagram illustrating a manufacturing process of the present invention.
[Explanation of symbols]
101 ... Substrate
102 ... Underlying protective film
103 ... polycrystalline semiconductor film
104 ... Ion implantation protective film
105 ... Channel formation region
106 ... Neighborhood area
107: Noble gas element ion
108 ... Broken semiconductor film
109 ... Island of semiconductor film
110 ... Gate insulating film
111 ... Gate electrode
112 ... Impurity ions
113 ... Source / drain region
114 ... Channel formation region
115 ... Interlayer insulating film
116: Wiring

Claims (12)

A semiconductor film forming step of forming a first semiconductor film containing crystal grains on a substrate;
A protective film forming step of forming an ion implantation protective film on the first semiconductor film;
A rare gas element ion is implanted into a part of the first semiconductor film, the first crystalline region including the crystal grains, the second crystalline region including the crystal grains, the first crystalline region, and the first crystalline region. An amorphous region not including the crystal grains sandwiched between two crystalline regions; and an interface between the substrate and the first semiconductor film sandwiched between the amorphous region and the substrate An ion implantation step of forming a second semiconductor film having a third crystalline region including crystal grains formed in the first semiconductor film;
Crystallizing the second semiconductor film, growing a crystal from the first crystalline region, the second crystalline region, and the third crystalline region to the amorphous region, and forming a third semiconductor film A crystallization step to form,
A first crystal grain grown from the first crystalline region and a second crystal grain grown from the second crystalline region form a grain boundary in the amorphous region;
3. A method of manufacturing a semiconductor device, wherein third crystal grains grown from the third crystalline region are formed in the amorphous region. In claim 1,
A method for manufacturing a semiconductor device, wherein the substrate includes a base protective film facing the first semiconductor film, and the base protective film is a silicon oxide film having an interface state of about 10 ¹² cm ⁻² or less. In claim 1 or 2,
The method of manufacturing a semiconductor device, wherein the second semiconductor film has a density of crystal nuclei of less than about 3 × 10 ⁷ cm ⁻² . In any of claims 1 to 3,
A method for manufacturing a semiconductor device, wherein the crystal nucleus density of the second semiconductor film is smaller than the crystal nucleus density of the first semiconductor film. In any of claims 1 to 4,
A method for manufacturing a semiconductor device, wherein the crystal grain size of the third semiconductor film is larger than the crystal grain size of the first semiconductor film. In any of claims 1 to 5,
In the crystallization step, the second semiconductor film is irradiated with laser light from the surface of the second semiconductor film opposite to the substrate, and the second semiconductor film is irradiated from the surface side of the second semiconductor film. A method for manufacturing a semiconductor device, wherein the second semiconductor film is melted using energy that melts 85% or more and 97% or less of the film thickness toward the film. In any one of Claims 1 thru | or 6.
In the ion implantation step, the maximum concentration of the rare gas element ions in the amorphous region not including the crystal grains of the second semiconductor film is about 5 × 10 ¹⁹ cm ⁻³ to 3 × 10 ²⁰ cm ^−3. A method for manufacturing a semiconductor device. In any one of Claims 1 thru | or 7,
In the ion implantation step, a range center of the rare gas element ions is between the interface between the substrate and the first semiconductor film and the first semiconductor film that is 20 nm away from the interface. A method for manufacturing a semiconductor device. In any of claims 1 to 8,
A method for manufacturing a semiconductor device, wherein in the ion implantation step, at least a part of a portion into which the rare gas element ions are implanted is used for a channel region of a transistor.   10. A method for manufacturing an electronic device, wherein the method for manufacturing a semiconductor device according to claim 1 is used.   A semiconductor device manufactured using the method for manufacturing a semiconductor device according to claim 1.   An electronic apparatus comprising the semiconductor device according to claim 11.

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