JP3692407B2 - Manufacturing method of semiconductor quantum dot device - Google Patents

Description

The present invention relates to a method of manufacturing a semiconductor quantum dot device, in particular, have a high uniformity, a method of manufacturing a semiconductor quantum dot device having quantum dots and densely formed.

  In recent years, quantum dot lasers and the like have been actively developed due to the development of self-organization forming technology of semiconductor nanostructures such as quantum dots. A quantum dot has a structure in which electrons and holes are confined in a very narrow energy potential three-dimensionally. In such a structure, the energy levels of electrons and holes are completely discretized, and the state density function has a sharp pulse shape.

  When quantum dots having such characteristics are introduced into the semiconductor laser active layer, the basic characteristics of the laser are greatly improved. Typical characteristics to be improved include three characteristics: (1) threshold current, (2) modulation characteristics, and (3) spectral characteristics. Here, the threshold current is a basic characteristic of a semiconductor laser. By introducing quantum dots into the active layer, it is possible to expect reduction of the threshold current in addition to suppression of temperature dependence by sharpening of the state density. The dynamic characteristics of the laser, such as modulation characteristics and spectral characteristics, increase the rate of gain with increasing carrier density, that is, the differential gain, by reducing the spread of the state density function and narrowing the gain spectrum. . Since the relaxation oscillation frequency is proportional to the square root of the differential gain, a significant increase in the modulation bandwidth can be expected by using quantum dots in the active layer.

  Currently, InAs / GaAs quantum dots can oscillate in the 1.3 μm band necessary for optical communication in the optical communication field, and in recent years, the wavelength range has been expanded to the 1.52 μm band. It is also approaching the 1.55 μm band, which is another important wavelength band.

  In order to realize the quantum dot laser as described above, it is necessary to form highly uniform and high density quantum dots without causing deterioration of crystallinity. At present, relatively simple quantum dot production methods include self-organization or a method using the Stranski-Krastanow growth mode. As a growth apparatus, a molecular beam epitaxy (MBE) apparatus or a metal organic chemical vapor deposition (MOCVD) apparatus is used.

Here, with reference to FIG. 11, the structure of a conventional semiconductor quantum dot device manufactured by the above method will be described. As shown in the figure, the semiconductor quantum dot device includes a semiconductor buffer layer 110 stacked by crystal growth on a semiconductor substrate (not shown), and a lattice constant different from that of the semiconductor buffer layer 110 and on the semiconductor buffer layer 110. The quantum dot layer 120 having a dot structure formed in the above and an embedded layer 130 formed so as to be embedded so as to embed the dot structure. Here, the semiconductor buffer layer 110 and the buried layer 130 are formed of GaAs, and the quantum dot layer 120 is formed of InAs.
“Optronix”, Optronics Publishing, Vol. 222, No. 8, pp. 91-99 “Special Issue on Light and Nanotechnology”

  By the way, forming the quantum dots using the MBE apparatus and the MOCVD apparatus is a relatively simple method, but has a problem that the two-dimensional uniformity of the dot structure formed in the quantum dot layer 120 is low. is there. This problem directly affects the optical properties.

  That is, ideally, it is desirable that the half width of the photoluminescence output from one quantum dot is the limit, and the half width of the photoluminescence of the entire semiconductor quantum dot element approaches this limit. However, the semiconductor quantum dot device having the structure shown in FIG. 11 has a photoluminescence half width of 50-80 meV and is difficult to put into practical use. At present, the photoluminescence half-value width is improved to 25-30 meV by adjusting the conditions of the low growth rate and low As pressure of the manufacturing method to an appropriate value, but further improvement is necessary for practical use.

The present invention has been made in view of the above problems, and its object is to find a method for producing a semiconductor quantum dot device capable of narrowing the photoluminescence half-value width to the limit by finding conditions for producing highly uniform quantum dots. Is to provide.

  In order to achieve the above object, a semiconductor quantum dot device of the present invention includes a first semiconductor buffer layer formed by crystal growth on a semiconductor substrate, and formed by crystal growth on the first semiconductor buffer layer, A semiconductor buffer layer having a lattice constant different from that of the first semiconductor buffer layer, and a second semiconductor buffer layer having a thickness less than a critical thickness that does not cause three-dimensional growth; and a single atom formed on the second semiconductor buffer layer A third semiconductor buffer layer having a film thickness that causes layer planarization, and a critical film thickness that is formed on the third semiconductor buffer layer, has a lattice constant different from that of the third semiconductor buffer layer, and causes three-dimensional growth. The gist of the present invention is to have a quantum dot layer formed by laminating the film thicknesses.

The method for manufacturing a semiconductor quantum dot device according to the present invention includes a step of forming a first semiconductor buffer layer by stacking on a semiconductor substrate by crystal growth, and a step of forming the first semiconductor buffer layer by crystal growth. Forming a second semiconductor buffer layer by stacking on the first semiconductor buffer layer with a film thickness equal to or less than a critical film thickness that does not cause a three-dimensional growth due to lattice mismatch, and a surface of the second semiconductor buffer layer and annealing step of annealing, after annealing, the crystal growth, a step of forming a third semiconductor buffer layer on the second semiconductor buffer layer by crystal growth, lattice between the second semiconductor buffer layer And a step of forming a quantum dot layer by stacking on the third semiconductor buffer layer with a film thickness equal to or greater than a critical film thickness at which three-dimensional growth due to mismatching occurs.

  According to the present invention, the monoatomic layer can be planarized by providing the coupling strain buffer layer composed of the second semiconductor buffer layer and the third semiconductor buffer layer below the quantum dot layer. Steps extending in various directions in the two-dimensional in-plane direction on the three semiconductor buffer layers can be formed densely. Thereby, the quantum dots can be crystal-grown uniformly and densely in the two-dimensional plane. In addition, since the quantum dots can be grown uniformly, the probability that adjacent quantum dots are polymerized is reduced, and the enlargement of the dots can be suppressed. Furthermore, since the quality of the environment in which quantum dots are grown is the same in any region, the size of the quantum dots can be made uniform.

Therefore, according to the present invention, a two-dimensional surface of the third semiconductor buffer layer is provided by providing a coupled strain buffer layer composed of the second semiconductor buffer layer and the third semiconductor buffer layer under the quantum dot layer. Since the steps can be densely formed in the inward direction, the quantum dots can be formed with high uniformity and high density. As a result, it is possible to provide a method of manufacturing a semiconductor quantum dot device narrowed photoluminescence FWHM of the quantum dots to the limit.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a cross-sectional configuration diagram of a semiconductor quantum dot device according to an embodiment of the present invention.

  As shown in FIG. 1, in the semiconductor quantum dot device according to the present embodiment, a second semiconductor buffer layer 20 and a third semiconductor buffer layer 30 are continuously stacked on a first semiconductor buffer layer 10. The coupled strain buffer layer 60 is formed, and the quantum dot layer 40 is formed on the coupled strain buffer layer 60. An embedded layer 50 is provided so as to embed the quantum dot layer 40.

  Here, one of the features of the semiconductor quantum dot device of the present embodiment is a compound semiconductor having a lattice constant larger than that of the first semiconductor buffer layer 10 on the first semiconductor buffer layer 10 formed on the semiconductor substrate. The second semiconductor buffer layer 20 is formed by crystal growth, strain is formed on the second semiconductor buffer layer 20, and the thickness of the second semiconductor buffer layer 20 is increased by three-dimensional growth of the compound semiconductor. By growing at a critical thickness or less, a surface layer having no defects and only strain is formed on the surface of the second semiconductor buffer layer 20.

  Further, a compound semiconductor is crystal-grown on the second semiconductor buffer layer 20 in which strain is formed to form a third semiconductor buffer layer 30, and the strain on the second semiconductor buffer layer 20 is reduced to the third semiconductor buffer layer 20. A monoatomic layer step is formed in the two-dimensional plane of the third semiconductor buffer layer 30 while inheriting the surface of the layer 30.

  Here, the first semiconductor buffer layer 10 is a layer formed by crystal growth on a semiconductor substrate (not shown). The crystal growth material is preferably a group III-V compound semiconductor, specifically GaAs. In addition to GaAs, InAlAs or InAlGaAs in which a small amount of In or Al is combined with GaAs may be used.

  On the other hand, the second semiconductor buffer layer 20 in the coupled strain buffer layer 60 is a layer formed on the first semiconductor buffer layer 10 by crystal growth. The crystal growth material is preferably a III-V group compound semiconductor containing In element, specifically InxGa1-xAs. However, it is not limited to InGaAs but may be a quaternary mixed crystal semiconductor such as InGaAlAs.

  Here, the second semiconductor buffer layer 20 needs to be crystal-grown at a critical film thickness or less that causes distortion due to lattice mismatch, does not impair crystal quality, and does not cause three-dimensional growth. In order to grow a III-V compound semiconductor containing In element, the lattice mismatch between GaAs and InAs (approximately 7%) is at least smaller, preferably greater than 0 and less than 2.1%.

For example, when the second semiconductor buffer layer 20 is formed of InxGa1-xAs, the crystal quality is not impaired when the composition x is in the range of 0 <x ≦ 0.3. Therefore, when this composition range is converted into the degree of lattice mismatch, the degree of lattice mismatch between GaAs and InAs is about 7%. Therefore, by multiplying this value by the composition x, the crystal quality is not impaired. Inconsistency is obtained. Specifically, when the composition x = 0.12 (In _0.12 Ga _0.88 As), the degree of lattice mismatch becomes about 1% (7% × 0.12 = 0.84%), and similarly the composition x = 0. .3 (In _0.3 Ga _0.7 As), the degree of lattice mismatch is about 2.1%.

  In addition, the second semiconductor buffer layer 20 has a three-dimensional growth (or a defect is introduced) on the surface when crystal growth of a certain film thickness or more is continued due to the effect of lattice mismatch. The relationship between the composition x and the film thickness changes according to the change of the composition x, but within the composition range (0 <x ≦ 0.3), the film thickness d1 is in the range of 0 <d1 ≦ 10 nm. The crystal can be grown as long as the crystal quality is not deteriorated and the three-dimensional growth does not occur.

  Here, “three-dimensional growth” is a phenomenon caused by a difference in lattice constant between crystals, and means that three-dimensional island growth occurs after two-dimensional layer growth occurs. Therefore, “below the critical film thickness at which three-dimensional growth does not occur” means a film thickness below that including the critical film thickness before defects are not introduced and island-like three-dimensional growth occurs.

  Of the coupled strain buffer layer, the third semiconductor buffer layer 30 is a layer formed on the second semiconductor buffer layer 20 by crystal growth. The crystal growth material is preferably a group III-V compound semiconductor, specifically GaAs. Further, the laminated film thickness d2 of GaAs is several atomic layers (several monolayers: ML) to several nm, and specifically, 0 <d2 ≦ 10 nm is desirable.

  Further, the third semiconductor buffer layer 30 has an effect of reducing the uneven surface segregation distribution of In that is generated when the second semiconductor buffer layer 20 is annealed. Thereby, it is possible to obtain a flat surface on which steps of the monoatomic layer exist almost uniformly. This also causes the uniformity and density to vary within the range from zero to several nm of the film thickness d2 of the third semiconductor buffer layer 30 as compared with the case where the quantum dot layer is directly grown on the first semiconductor buffer layer 10. . However, when the film thickness d2 of the third semiconductor buffer layer 30 exceeds several nm, the same state as when the dots are grown directly on the first semiconductor buffer layer 10 is obtained. That is, since the effect of the coupled strain buffer layer 60 disappears, the film thickness d2 of the third semiconductor buffer has the same uniformity and density when dots are formed directly on the first semiconductor buffer layer 10 from zero. Must be in the range. That is, 0 <d2 ≦ 10 nm. Here, “monoatomic layer flattening” means flattening at the atomic level, in other words, a monoatomic layer step height difference is one atom, which means that the surface is substantially flat.

  The quantum dot layer 40 is a layer formed by crystal growth on the third semiconductor buffer layer 30. The crystal growth material is preferably a III-V compound semiconductor, and specifically includes InAs. The crystal growth material is not limited to this, and may be a ternary mixed crystal semiconductor containing a small amount of Ga. At this time, it is desirable that the crystal growth material has a large degree of lattice mismatch with the third semiconductor buffer layer so that three-dimensional growth occurs on the third semiconductor buffer layer. Thereby, the quantum dot layer 40 is formed by growing the dots three-dimensionally by continuing the crystal growth of a certain film thickness or more using the effect of lattice mismatch.

  The buried layer 50 is a layer formed on the quantum dot layer 40 by crystal growth. The crystal growth material is preferably a group III-V compound semiconductor, specifically GaAs. Not only GaAs but also InGaAs obtained by combining a small amount of In with GaAs, or GaAs may be laminated after laminating InGaAs, and the lamination form is not particularly limited. In addition, since low temperature growth is attained by applying triethylgallium (TEG) here, high quality dots can be formed without deforming the quantum dots.

  According to the semiconductor quantum dot device having the above configuration, the monoatomic layer can be planarized by providing a bonding strain buffer layer composed of the second semiconductor buffer layer and the third semiconductor buffer layer below the quantum dot layer. Therefore, steps can be densely formed in various directions within the two-dimensional plane of the third semiconductor buffer layer. Thereby, quantum dots can be crystal-grown uniformly and with high density in a two-dimensional plane. In addition, since the quantum dots can be grown uniformly, the probability that adjacent quantum dots are polymerized is reduced, and the enlargement of the dots can be suppressed. Furthermore, since the quality of the environment in which quantum dots are grown is the same in any region, the size of the quantum dots can be made uniform.

  In the present embodiment, the number of quantum dot layers is one, but the number of layers is not limited to this. For example, the quantum dot layers may have a multilayer structure. In this case, a coupled strain buffer layer (second and third semiconductor buffer layers) may be formed on the buried layer 50, and a quantum dot layer may be crystal-grown thereon by self-organization.

(Production method)
Next, with reference to FIG. 2, the manufacturing method of the semiconductor quantum dot element which concerns on embodiment of this invention is demonstrated. In the present embodiment, GaAs is used for the first semiconductor buffer layer 10, In _0.12 Ga _0.88 As is used for the second semiconductor buffer layer 20, and GaAs is used for the third semiconductor buffer layer 30. In addition, a metal organic chemical vapor deposition method (MOCVD method) was used as the crystal growth method.

  First, as shown in FIG. 2A, a GaAs (001) substrate is prepared as a semiconductor substrate, the substrate temperature is set to 700 ° C., GaAs is grown to a thickness of 250 nm, and the first semiconductor buffer layer 11 is grown. Form. Here, trimethylgallium (TMG) is used as the raw material for the group III element, and tertiary butylarsine (TBA) is used as the raw material for the group V element.

Subsequently, as shown in FIG. 2B, trimethylindium (TMI) is further added to the group III element source without changing the group V source. Then, the substrate temperature is lowered to 500 ° C., In _0.12 Ga _0.88 As is grown on the first semiconductor buffer layer 11 to a thickness of 5 nm, and the second semiconductor buffer layer 21 is formed. Since In _0.12 Ga _0.88 As has a lattice mismatch with GaAs of about 1%, distortion occurs on the surface in the vicinity where the growth film thickness exceeds 5 nm.

  Then, as shown in FIG. 2C, the supply of TMI is stopped, and the substrate temperature is raised to 600 ° C. (At this time, it takes 450 seconds to raise the temperature to 600 ° C., during which the sample is in an annealed state). Then, the third semiconductor buffer layer 31 is formed by growing GaAs on the second semiconductor buffer layer 21 to a thickness of 2 nm.

  Next, as shown in FIG. 2D, the supply of TMG is stopped and TMI is supplied again. Then, the substrate temperature is lowered to 500 ° C., InAs is grown on the third semiconductor buffer layer 31, and the quantum dot layer 41 is formed. Since InAs has a degree of lattice mismatch with GaAs of about 7%, three-dimensional growth occurs in the vicinity of the growth film thickness exceeding 0.57 nm, and InAs quantum dots are formed by self-organization.

  Finally, as shown in FIG. 2E, the raw material of the group III element is switched to triethylgallium (TEG), and the substrate temperature is maintained at 500 ° C., and GaAs is deposited on the quantum dot layer 41 to a thickness of 100 nm. The buried layer 51 is formed by growing to a thickness.

  According to the above manufacturing method, by providing the coupled strain buffer layer including the second semiconductor buffer layer 21 and the third semiconductor buffer layer 31 below the quantum dot layer 41, the second semiconductor buffer Since the single atomic layer can be planarized while the strain formed on the surface of the layer 21 is inherited by the third semiconductor buffer layer 31, it can be applied in various directions within the two-dimensional plane of the third semiconductor buffer layer 31. A spreading step can be formed. As a result, the quantum dots can be made highly uniform in the two-dimensional direction, and at the same time, the density can be increased.

  Further, by using TEG for the buried layer 51, the crystal growth is improved as compared with the conventional case, and the emission wavelength of 1.3 μm can be controlled.

  Furthermore, by raising the substrate temperature from 500 ° C. to 600 ° C. over 450 seconds, the steps formed on the second semiconductor buffer layer 21 can be planarized more two-dimensionally.

  Further, the third semiconductor buffer layer (GaAs) 31 can reduce the uneven surface segregation distribution of In that is generated when the second semiconductor buffer layer (InGaAs) 21 is annealed. As a result, the surface of the third semiconductor buffer layer made of a monoatomic layer becomes a more atomically flat surface.

  Since the film thickness d1 of the second semiconductor buffer layer 21 has a correlation with the composition x of InxGa1-xAs, the film thickness d1 is set to 0 <when the composition is in the range of 0 <x ≦ 0.3. Even if the film thickness is changed within the range of d1 ≦ 10 nm, crystal growth without impairing crystallinity is possible. Further, the film thickness d2 of the third semiconductor buffer layer 31 is not limited to 2 nm, and if it is within the range of 0 <d2 ≦ 10 nm, it is atomically uniform without erasing the distortion of the second semiconductor buffer layer 21. A flat surface can be formed. Further, the annealing temperature is not limited to 600 ° C., and if it is between 500 ° C. and 700 ° C., the uneven surface segregation distribution of In can be reduced.

  Next, the state of the surface of each layer formed in the manufacturing process shown in FIG. 2 will be described with reference to FIGS. The surface of each layer was measured using an atomic force microscope (AFM, Nanoscope IIIa). Hereinafter, an image taken with an atomic force microscope is referred to as an AFM image.

  FIG. 3 is an AFM image obtained by photographing the layer surface 11a of the first semiconductor buffer layer 11 produced in the process of FIG. The first semiconductor buffer layer is made of GaAs. When GaAs is grown in this manner, step bunching having a waveform in a one-dimensional direction is generated on the layer surface 11a.

  FIG. 4 is an AFM image obtained by photographing the layer surface 21a of the second semiconductor buffer layer 21 manufactured in the step of FIG. The second semiconductor buffer layer 21 is made of InGaAs having a lattice constant different from that of the first semiconductor buffer layer 11. Therefore, a spot-like island caused by In is formed on the second semiconductor buffer layer surface 21a.

  FIG. 5 is an AFM image when the second semiconductor buffer layer surface 21a is annealed at 600 ° C. FIG. By annealing the second semiconductor buffer layer 21, In is segregated on the surface and the surface is relaxed. (But if you keep it, dots are still formed due to the boundaries of the large island.)

  FIG. 6 is an AFM image obtained by photographing the layer surface 31a of the third semiconductor buffer layer 31 manufactured in the step of FIG. The third semiconductor buffer layer 31 is made of GaAs. At this time, by setting the film thickness for crystal growth to 0 <d2 ≦ 10 nm, the strain is relieved, and as a result, the step changes to a monoatomic flat surface uniformly existing in various directions in the two-dimensional plane. The interval between the steps is several tens nm to several hundreds nm, and the size of the island (spots or spots close to a disk) formed on the flat step is about 150 nm to 500 nm.

  Next, the size distribution of the quantum dots formed on the layer surface 11a shown in FIG. 3 is shown with reference to FIGS.

  FIG. 7 is an AFM image when quantum dots are directly grown on the layer surface 11a shown in FIG. As shown in the figure, since the layer surface 11a of the first semiconductor buffer layer 11 has wavy step bunching formed in the one-dimensional direction, quantum dots are also formed in the one-dimensional direction depending on the step bunching. ing. In addition, nonuniformity is observed in the size of the formed quantum dots.

FIG. 8 is a distribution diagram in which the horizontal axis represents the height of the quantum dots and the vertical axis represents the number of quantum dots. Here, the number of dots was counted by image processing of the AFM image. As can be seen from the distribution diagram, several to several tens of quantum dots having a height of 2 nm to 13 nm were formed. The density at this time was 1.49 × 10 ¹⁰ cm ⁻² , the average height h of the quantum dots was 9.3 nm, and the average width d was 31.9 nm.

  On the other hand, FIG. 9 is an AFM image of the quantum dots formed on the layer surface 31a shown in FIG. As shown in the figure, since the layer surface 31a has steps formed in the two-dimensional in-plane direction, the quantum dots are also formed to spread uniformly in the two-dimensional in-plane direction depending on this step. From the same image, it can be observed that the size of the formed quantum dots is almost uniform.

Here, in the same manner as described above, the number of dots was counted by image processing of the AFM image of FIG. A distribution map of dots is shown in FIG. As can be seen from this distribution map, quantum dots having a height of about 10 nm accounted for 80% of the total. The density at this time was 1.74 × 10 ¹⁰ cm ⁻² , the average height h of the quantum dots was 9.7 nm, and the average width d was 39.0 nm.

As described above, the InAs quantum dots prepared by inserting a coupling strain buffer layer 60, the quantum dot density is 16.8% higher than the conventional ^{1.49 × 10 10 cm -2, 1.74} × 10 10 increased to cm ^-2 .

  Moreover, as a result of measuring the photoluminescence half width of the semiconductor quantum dot device according to the present embodiment and the photoluminescence half width produced by the conventional technique (FIG. 11), the conventional InAs quantum dot was 26 meV. In comparison, the InAs quantum dots of the present embodiment decreased to 20.5 meV, and the effect of high uniformity appeared.

 Accordingly, the second semiconductor buffer layer (for example, InGaAs) 21 that generates strain due to lattice mismatch with the first semiconductor buffer layer (for example, GaAs) 11 is formed on the first semiconductor buffer layer (for example, GaAs) 11 with 0 <d1. A third semiconductor buffer in which a crystal is grown within a range of ≦ 10 nm, the second semiconductor buffer layer 21 is annealed for a predetermined time, the strain of the second semiconductor buffer layer 21 is relaxed, and a monoatomic layer flat surface is formed. By growing the layer (GaAs) 31 in the range of 0 <d2 ≦ 10 nm, a step of a monoatomic layer that uniformly spreads in the two-dimensional in-plane direction of the third semiconductor buffer layer 31 can be formed. Therefore, quantum dots (InAs) can be crystal-grown with high uniformity and high density. As a result, the growth environment of the quantum dots can be made uniform, so that the photoluminescence half width can be narrowed to the limit.

It is a section lineblock diagram of a semiconductor quantum dot device concerning an embodiment of the invention. It is process sectional drawing explaining the manufacturing process of the semiconductor quantum dot element which concerns on embodiment of this invention. 3 is an AFM image of the surface of the first semiconductor buffer layer shown in FIG. It is an AFM image of the surface of the second semiconductor buffer layer shown in FIG. 3 is an AFM image of the surface of a second semiconductor buffer layer when the second semiconductor buffer layer shown in FIG. 2B is annealed. It is an AFM image of the surface of the 3rd semiconductor buffer layer shown in Drawing 2 (c). 3 is an AFM image showing a quantum dot distribution state when quantum dots are grown on the first semiconductor buffer layer shown in FIG. FIG. 8 is a graph of the quantum dot distribution shown in FIG. 3 is an AFM image showing a quantum dot distribution state when quantum dots are grown on the first semiconductor buffer layer shown in FIG. FIG. 10 is a graph showing the quantum dot distribution shown in FIG. 9. It is a structure sectional view of the conventional semiconductor quantum dot device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10, 11 ... 1st semiconductor buffer layer 20, 21 ... 2nd semiconductor buffer layer 30, 31 ... 3rd semiconductor buffer layer 40, 41 ... Quantum dot layer 50, 51 ... Embedded layer 60 ... Coupling distortion buffer layer DESCRIPTION OF SYMBOLS 110 ... Semiconductor buffer layer 120 ... Quantum dot layer 130 ... Embedded layer

Claims (10)

Forming a first semiconductor buffer layer by stacking on a semiconductor substrate by crystal growth;
A second semiconductor buffer is formed by stacking on the first semiconductor buffer layer with a film thickness equal to or less than a critical film thickness that does not cause three-dimensional growth due to lattice mismatch between the first semiconductor buffer layer and the first semiconductor buffer layer. Forming a layer;
An annealing step of annealing the surface of the second semiconductor buffer layer ;
After the annealing step, the crystal growth, a step of forming a third semiconductor buffer layer on the second semiconductor buffer layer,
A quantum dot layer is formed on the third semiconductor buffer layer by crystal growth so as to have a thickness greater than or equal to a critical thickness at which three-dimensional growth due to lattice mismatch occurs between the third semiconductor buffer layer and the third semiconductor buffer layer. A process for producing a semiconductor quantum dot device. 2. The method of manufacturing a semiconductor quantum dot device according to claim 1 , further comprising a step of forming an embedded layer on the quantum dot layer by crystal growth so as to embed the quantum dot layer. The annealing step is a method of manufacturing a semiconductor quantum dot device according to claim 1 or 2, characterized in that annealing in the range of the substrate temperature 500 ° C. of 700 ° C.. The first semiconductor buffer layer, the third semiconductor buffer layer, the quantum dot layer, and the buried layer are formed of a III-V group compound semiconductor , and the second semiconductor buffer layer contains at least an In element. the method of manufacturing a semiconductor quantum dot device according to any one of claims 1 to 3, characterized in that it is formed by group III-V compound semiconductor. Said second semiconductor buffer layer, lattice mismatch between the first semiconductor buffer layer, any one of claims 1 to 4, characterized in that not more than 2.1% greater than 0 1 The manufacturing method of the semiconductor quantum dot element of a term. The second semiconductor buffer layer includes:
InxGa1-xAs is a formed by a compound semiconductor, the composition x is 0 <to claim 1, characterized in that the thickness d1 in the range of 0 <d1 ≦ 10 nm when in the range of x ≦ 0.3 6. The method for producing a semiconductor quantum dot device according to any one of 5 above. Said first semiconductor buffer layer, said third semiconductor buffer layer and the buried layer, the semiconductor quantum dot device according to any one of claims 1 to 6, characterized in that it is formed by a GaAs Production method. The buried layer, a method of manufacturing a semiconductor quantum dot device according to any one of claims 1 to 7, characterized in that it is formed a triethyl gallium as a source of gallium. The quantum dot layer, a method of manufacturing a semiconductor quantum dot device according to any one of claims 1 to 8, characterized in that it is formed by InAs. 10. The method of manufacturing a semiconductor quantum dot device according to claim 1, wherein a film thickness d <b> 2 of the third semiconductor buffer layer is 0 <d <b> 2 ≦ 10 nm.