JP3630270B2 - Thin film transistor manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The invention of the present application relates to a method of manufacturing a thin film transistor (TFT) having a semiconductor layer on an insulating substrate as an active layer.
[0002]
[Prior art]
In recent years, the demand for liquid crystal display devices as flat display devices has increased, and TFT active matrix addressing that is advantageous for increasing contrast and definition is widely used as a driving method. In this method, a TFT as a switching element is disposed in each pixel, and voltage is applied to the liquid crystal for each pixel. That is, when a signal is input to the scanning lines arranged in the horizontal direction, the TFT is turned on, and the signal voltage from the signal lines arranged in the vertical direction is applied to the liquid crystal.
[0003]
In the TFT method, when an amorphous Si layer is an active layer and a TFT having a low current driving capability is used, this TFT is simply disposed in each pixel as a switching element, and driving of scanning lines and signal lines is performed. Is performed by an external IC mounted via an extraction electrode.
[0004]
In this structure, since the active layer can be formed by a low-temperature plasma CVD method, an inexpensive glass substrate can be used as at least a part of the insulating substrate, and the manufacturing cost is low. However, it is disadvantageous when the density of the extraction electrodes is increased to the extent that the mounting of the external IC reaches the limit, that is, when an ultra-small or ultra-high definition liquid crystal display device is manufactured.
[0005]
On the other hand, when a TFT having a high current driving capability is used with the polycrystalline Si layer as an active layer, the scanning line and signal line driving elements can also be formed integrally and at high density as TFTs. Therefore, it is advantageous when manufacturing an ultra-small or ultra-high definition liquid crystal display device.
[0006]
However, in order to form a polycrystalline Si layer from an amorphous Si layer by solid phase growth by high-temperature furnace heat treatment, a quartz substrate having high purity and low shrinkage after heat treatment is used as at least a part of the insulating substrate. There is a need. As a result, a large insulating substrate cannot be used, and there is a limit to the size of the display screen. Since quartz is used, the manufacturing cost is high.
[0007]
Therefore, as a technique for solving these problems while maintaining the advantages of the above two cases, an amorphous Si layer is deposited on an inexpensive glass substrate by a low-temperature plasma CVD method, and then irradiated by laser light. A method of forming a polycrystalline semiconductor layer for an active layer by melting and recrystallizing an amorphous Si layer by short-time heat treatment has been considered.
[0008]
FIG. 4 shows a first conventional example of the present invention in which a TFT having a top gate structure is manufactured by this method. In this first conventional example, as shown in FIG. 4A, an insulating substrate 11 is formed by laminating an insulating film 11 on a glass substrate (not shown), and a non-plasma CVD method is used on the insulating film 11. Deposit a crystalline Si layer.
[0009]
Thereafter, the amorphous Si layer is melted and recrystallized by short-time heat treatment by laser light irradiation to form a polycrystalline Si layer 12 for the active layer. Then, the polycrystalline Si layer 12 is processed into an active layer pattern, and an SiO _x film 13 as a gate oxide film is deposited by plasma CVD.
[0010]
Next, as shown in FIG. 4B, a gate wiring is formed with the Mo film 14. Thereafter, as shown in FIG. 4C, impurities 15 are ion-implanted into the polycrystalline Si layer 12 through the SiO _x film 13 using the Mo film 14 as a mask, so that the channel region 12a and the sources on both sides thereof are implanted. -The drain 12b is formed. Then, the impurity 15 in the source / drain 12b is activated by heat treatment.
[0011]
Next, as shown in FIG. 4D, an interlayer insulating film 16 is formed, and a connection hole 17 for the source / drain 12b is opened in the interlayer insulating film 16 and the SiO _x film 13. Then, source / drain electrodes are formed with the Al film 18 to complete this TFT.
[0012]
FIG. 5 shows a second conventional example of the present invention for manufacturing a TFT having a bottom gate structure. In this second conventional example, as shown in FIG. 5A, a gate wiring is formed with a Mo film 22 on a glass substrate 21 as an insulating substrate.
[0013]
Next, as shown in FIG. 5 (b), after continuously depositing a SiO _x film 23 and the amorphous Si layer as a gate oxide film by plasma CVD, short by laser light irradiation heat treatment Then, the amorphous Si layer is melted and recrystallized to form a polycrystalline Si layer 24 for the active layer. Thereafter, the SiO _x film 25 is deposited by plasma CVD, and the SiO _x film 25 is processed into a channel region pattern.
[0014]
Next, as shown in FIG. 5C, impurities 26 are ion-implanted into the polycrystalline Si layer 24 using the SiO _x film 25 as a mask to form a channel region 24a and source / drain 24b on both sides thereof. . Then, the impurity 26 in the source / drain 24b is activated by heat treatment by irradiation with laser light or lamp light.
[0015]
Next, as shown in FIG. 5D, the polycrystalline Si layer 24 is processed into an active layer pattern. Thereafter, as shown in FIG. 5E, an interlayer insulating film 27 is formed, and connection holes 28 for the source / drain 24b are formed in the interlayer insulating film 27. Then, source / drain electrodes are formed with the Al film 29 to complete this TFT.
[0016]
Next, a third conventional example will be described. In this third conventional example, an amorphous Si layer for forming a polycrystalline Si layer for an active layer, and a gate oxide film or a mask for ion implantation of impurities remain on the back surface of the channel region. After the SiO _x film to be deposited is continuously deposited by the plasma CVD method, the amorphous Si layer is converted into a polycrystalline Si layer by a short time heat treatment by laser light irradiation, and at the same time, the film quality of the SiO _x film is improved.
[0017]
Next, a fourth conventional example will be described. In the fourth conventional example, after forming an SiO _x film which becomes a gate oxide film or remains on the back surface of the channel region as a mask for ion implantation of impurities, this SiO _{x is} subjected to furnace heat treatment at about 600 ° C. The film quality of the film is improved (for example, JP-A-9-64365).
[0018]
[Problems to be solved by the invention]
However, in the first conventional example shown in FIG. 4, since the SiO _x film 13 as the gate oxide film is formed by the low temperature plasma CVD method, the film quality of the SiO _x film 13 is not necessarily good. For this reason, it has been difficult to produce a TFT having an appropriate threshold voltage and high reliability in the long term due to a small threshold voltage variation due to hot carriers and the like, and a decrease in channel conductance.
[0019]
Further, in the second conventional example shown in FIG. 5, the SiO _x film 25 remaining on the back surface of the channel region 24a as a mask for ion implantation of the impurity 26 is formed by a low temperature plasma CVD method. The film quality of the SiO _x film 25 is not necessarily good. For this reason, it has been difficult to manufacture a TFT having a long-term reliability with little decrease in channel conductance due to hot carriers or the like.
[0020]
In the third conventional example, the laser beam is irradiated with the amorphous Si layer covered with the SiO _x film. However, the amorphous Si layer deposited by the plasma CVD method is exposed to hydrogen. Is contained in a large amount, hydrogen is bumped from the amorphous Si layer by the laser beam irradiation, and the SiO _x film is damaged. For this reason, the yield is low, and it is difficult to manufacture TFTs at low cost.
[0021]
In the above-described fourth conventional example, the film quality of the SiO _x film that becomes a gate oxide film or remains on the back surface of the channel region as a mask for ion implantation of impurities is improved by furnace heat treatment at about 600 ° C. However, the furnace heat treatment is performed in a thermal equilibrium state where the entire object to be processed is isothermal.
[0022]
For this reason, an inexpensive glass substrate shrinks after heat treatment, and at a temperature of about 600 ° C., it is difficult to improve the film quality of the SiO _x film to an excellent film quality close to a thermal oxide film. As a result, it has been difficult to manufacture a TFT having high long-term reliability at a low cost.
[0023]
Therefore, the invention of the present application is superior to a thermal oxide film without changing the structure of the polycrystalline semiconductor layer even if the quality of the insulating film when it is formed on the polycrystalline semiconductor layer for the active layer is inferior. Insulating substrate after heat treatment can improve the film quality of the insulating film up to the film quality, and there is no damage to the insulating film due to the heat treatment and the yield is high, and even if an insulating substrate containing an inexpensive material is adopted It is an object of the present invention to provide a method capable of preventing a thermal contraction of a thin film transistor and manufacturing a thin film transistor with high long-term reliability at low cost without deteriorating characteristics.
[0024]
[Means for Solving the Problems]
In the thin film transistor manufacturing method according to claim 1, an amorphous semiconductor layer or a polycrystalline semiconductor layer is deposited on an insulating substrate, and the deposited amorphous semiconductor layer or polycrystalline semiconductor layer is irradiated with laser light. Since the heat treatment is performed at a temperature higher than the melting point, a polycrystalline semiconductor layer for an active layer having a large crystal grain size and high mobility can be formed. Incidentally, if depositing a polycrystalline semi-conductor layer on an insulating substrate, since it is low temperature as compared with the solid phase growth of the amorphous semiconductor layer is deposited, an insulating substrate comprising an inexpensive material Even if it is adopted, it is possible to prevent thermal contraction of the insulating substrate after the polycrystalline semiconductor layer is deposited.
[0025]
Since the laser beam is irradiated from the insulating film side with the insulating film formed on the polycrystalline semiconductor layer for the active layer, the polycrystalline semiconductor layer absorbs the laser beam even when the laser beam passes through the insulating film. By heating the polycrystalline semiconductor layer, the insulating film can be indirectly heat-treated. For this reason, even if the film quality of the insulating film at the time of formation on the polycrystalline semiconductor layer for the active layer is inferior, the film quality of the insulating film can be improved by heat treatment by laser light irradiation.
[0026]
Moreover, the irradiation energy of the laser light for the heat treatment performed on the insulating film, lower than the irradiation energy of the laser light to the amorphous semiconductor layer or a polycrystalline semiconductor layer deposited. Therefore, the quality of the insulating film can be improved without changing the structure of the polycrystalline semiconductor layer for the active layer that has been formed.
[0027]
Further, since the temperature can be increased to about 2000 ° C. in the heat treatment by laser light irradiation, the film quality of the insulating film can be improved to an excellent film quality close to that of the thermal oxide film. For this reason, the energy level in the part close | similar to this interface among the interface of an insulating film and a polycrystalline-semiconductor layer and an insulating film can be reduced.
[0028]
In addition, since the insulating film is formed on the polycrystalline semiconductor layer and not on the amorphous semiconductor layer, heat treatment is performed by laser light irradiation with the insulating film formed on the amorphous semiconductor layer. There is no damage to the insulating film due to bumping of hydrogen from the amorphous semiconductor layer.
[0029]
Further, as described above, even when laser light passes through the insulating film, the insulating film can be indirectly heat-treated by absorbing the laser light by the polycrystalline semiconductor layer and heating the polycrystalline semiconductor layer. it can. For this reason, heating of the insulating substrate can be prevented, and thermal contraction of the insulating substrate after heat treatment can be prevented even if an insulating substrate containing an inexpensive material is employed.
[0030]
In the thin film transistor manufacturing method according to claim 2, since the optical thickness of the insulating film is an odd multiple of a quarter of the wavelength of the laser beam, the insulating film has a light-transmitting property with respect to the laser beam. Even when it functions purely as an interference film, the reflectance of the laser beam at the interface between the insulating film and the polycrystalline semiconductor layer is minimal. For this reason, the irradiation energy of a laser beam can be used effectively and the effect of heat processing can be acquired reliably.
[0031]
In the method of manufacturing a thin film transistor according to claim 3, since heat treatment of the insulating film pattern Ji Yaneru region after introducing the impurity into polycrystalline semiconductor layer for the active layer as a mask, to form the source and drain It is possible to simultaneously activate the impurities introduced into the polycrystalline semiconductor layer and improve the film quality of the insulating film used as a mask when the impurities are introduced.
[0032]
In the method of manufacturing a thin film transistor according to claim 4 , since the insulating film and the polycrystalline semiconductor layer are processed into an active layer pattern after the insulating film is formed, the insulating film is processed after the polycrystalline semiconductor layer is processed into the active layer pattern. The interface between the polycrystalline semiconductor layer and the insulating film can be kept clean as compared with the case of forming.
[0033]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, first and second embodiments of the present invention will be described with reference to FIGS. FIG. 1 shows a first embodiment applied to a method for manufacturing a TFT having a top gate structure. In the first embodiment, as shown in FIG. 1A, a 200 nm thick SiN _x film and a 200 nm thick SiO _x film are continuously formed on a glass substrate (not shown) by a plasma CVD method. An insulating film 31 is formed by deposition, and an insulating substrate is formed by the glass substrate and the insulating film 31.
[0034]
Thereafter, an amorphous Si layer having a thickness of 40 nm is further continuously deposited on the insulating film 31 by plasma CVD, and heat treatment is performed at 400 ° C. for 1 hour in order to release hydrogen from the amorphous Si layer. Do. Then, an amorphous Si layer is irradiated with an excimer laser beam (not shown) having a wavelength of 308 nm at an energy density of 380 mJ / cm ² for 30 nsec. This amorphous Si layer is applied to the polycrystalline Si layer 32. To do.
[0035]
Thereafter, a SiO _x film 33 having a thickness of 150 nm for forming a gate oxide film is deposited by plasma CVD, and excimer laser light 34 is irradiated from the side of the SiO _x film 33 at an energy density of 250 mJ / cm ² for 30 nsec. Thus, the film quality of the SiO _x film 33 is improved.
[0036]
If the refractive index of the SiO _x film 33 is 1.465, in order to minimize the reflectance of the excimer laser beam 34 at the interface between the SiO _x film 33 and the polycrystalline Si layer 32, the SiO _x film 33 is used. In the first embodiment, 150 nm is used as an approximate value, although it is necessary to accurately set the thickness of (3/4) × (308 / 1.465) = 157 (nm).
[0037]
Next, as shown in FIG. 1B, the SiO _x film 33 and the polycrystalline Si layer 32 are processed into an active layer pattern. Then, as shown in FIG. 1C, a Mo film 35 having a thickness of 200 nm is deposited by sputtering, and this Mo film 35 is processed into a gate wiring pattern.
[0038]
Next, as shown in FIG. 1D, an impurity 36 is ion-implanted into the polycrystalline Si layer 32 through the SiO _x film 33 using the Mo film 35 as a mask, and the channel region 32a and both sides thereof are implanted. Source / drain 32b is formed.
[0039]
Specifically, in order to manufacture an N channel TFT, P ⁺ ions are ion-implanted with an effective dose of 1 × 10 ¹⁵ cm ⁻² , and in order to manufacture a P channel TFT, 8 B ⁺ ions are used. Ions are implanted at an effective dose of × 10 ¹⁴ cm ^-2 . Then, excimer laser light (not shown) is irradiated at an energy density of 200 mJ / cm ² to activate the impurities 36 in the source / drain 32b.
[0040]
Next, as shown in FIG. 1E, an SiN _x film having a thickness of 200 nm and an SiO _x film having a thickness of 200 nm are successively deposited by a plasma CVD method to form an interlayer insulating film 37. to opening a connection hole 3 8 for the drain 32b in the interlayer insulating film 37 and the SiO _x film 33. Then, a source / drain electrode is formed with an Al film 39 having a thickness of 500 nm to complete this TFT.
[0041]
Figure 2 is a more first shown in TFT and 4 prepared in the first embodiment is a I _D -V _G curve in the TFT manufactured in the conventional example, the gate voltage while fixing the drain voltage to 10V The drain current when V is changed from -15V to + 15V is shown.
[0042]
From FIG. 2, in both the N-channel TFT and the P-channel TFT, the characteristic curve of the TFT manufactured in the first embodiment is about 2 in the positive direction of the gate voltage as compared with the TFT manufactured in the first conventional example. The result is shifted by 5 V, and a result indicating a decrease in positive charge, that is, energy level at the interface between the polycrystalline Si layer 32 and the SiO _x film 33 is obtained.
[0043]
FIG. 2 also shows the results of a BT stress test at 200 ° C. for 15 minutes when the gate voltage is −15 V and the source / drain voltage is 0 V. In both the N-channel TFT and the P-channel TFT, the threshold voltage is shifted by 2 to 2.5 V in the negative direction in the TFT manufactured in the first conventional example, whereas in the TFT manufactured in the first embodiment. The threshold voltage is shifted only 0.3 to 0.5 V in the negative direction. Therefore, the long-term reliability improvement effect according to the first embodiment is confirmed.
[0044]
FIG. 3 shows a second embodiment applied to a method for manufacturing a TFT having a bottom gate structure. In the second embodiment, as shown in FIG. 3A, a Mo film 42 having a thickness of 200 nm is deposited on a glass substrate 41 as an insulating substrate by a sputtering method, and this Mo film 42 is formed into a gate wiring pattern. To process.
[0045]
Next, as shown in FIG. 3B, after depositing a 120 nm thick SiO _x film 43 and a 40 nm thick amorphous Si layer as a gate oxide film continuously by a plasma CVD method, Steps similar to those in the first embodiment described above are performed to release hydrogen from the amorphous Si layer, and this amorphous Si layer is made into a polycrystalline Si layer 44.
[0046]
Then, a 150 nm thick SiO _x film 45 is deposited by plasma CVD, and the SiO _x film 45 is processed into a channel region pattern by lithography or the like that exposes from the back side of the glass substrate 41 using the Mo film 42 as a mask. To do.
[0047]
Next, as shown in FIG. 3C, an impurity 46 is ion-implanted into the polycrystalline Si layer 44 using the SiO _x film 45 as a mask with the same dose as that in the first embodiment described above, thereby forming a channel region 44a. And the source / drain 44b on both sides thereof. Then, as shown in FIG. 3D, the excimer laser beam 47 is irradiated at an energy density of 240 mJ / cm ² to activate the impurities 46 in the source / drain 44b and improve the film quality of the SiO _x film 45. At the same time.
[0048]
Next, as shown in FIG. 3E, the polycrystalline Si layer 44 is processed into an active layer pattern. Thereafter, as shown in FIG. 3 (f), an SiO _x film having a thickness of 100 nm and an SiN _x film having a thickness of 200 nm are successively deposited by a plasma CVD method to form an interlayer insulating film 48. A connection hole 49 to 44 b is opened in the interlayer insulating film 48. Then, source / drain electrodes are formed with an Al film 50 having a thickness of 500 nm to complete this TFT.
[0049]
Next, in order to evaluate a decrease in reliability due to hot carriers in the N-channel TFT manufactured in the second embodiment and the N-channel TFT manufactured in the second conventional example shown in FIG. A voltage and a drain voltage of 15 V were applied, and the arrangement of the source and drain was reversed every 10 minutes, and the drain current at a gate voltage of 10 V and a drain voltage of 10 V was measured.
[0050]
The drain current is measured by periodically reversing the arrangement of the source and the drain. When hot carriers are injected into the drain side when the drain voltage is applied, the resistance of the source increases when the drain becomes the source. This is because the effect of injected hot carriers appears remarkably in the drain current when the arrangement of the source and drain is reversed.
[0051]
As a result of this measurement, the drain current decreased to the first 10% after 10 minutes in the N-channel TFT manufactured in the second conventional example, whereas 60 minutes passed in the N-channel TFT manufactured in the second embodiment. Even at that time, the drain current decreased only to the first 90%.
[0052]
In the first and second embodiments described above, the polycrystalline Si layers 32 and 44 for the active layer are formed by irradiating the excimer laser light to the amorphous Si layer deposited by the plasma CVD method. However, by depositing a polycrystalline Si layer by a remote plasma CVD method or the like, and irradiating the polycrystalline Si layer with laser light and performing a heat treatment at a temperature equal to or higher than its melting point, the polycrystalline Si layer 32 for the active layer, 44 may be formed.
[0053]
Even if the deposition is not an amorphous Si layer but a polycrystalline Si layer, the temperature required for deposition may be lower than the temperature at which the amorphous Si layer is solid-phase grown on the polycrystalline Si layer. An insulating substrate including an inexpensive glass substrate or the like can be employed. Even if the crystal grain size of the polycrystalline Si layer is small because the deposition temperature is relatively low, the heat treatment at a temperature equal to or higher than the melting point is performed by irradiating the laser beam. It is possible to form the polycrystalline Si layers 32 and 44 for the high active layer.
[0054]
An excimer laser beam for heat treatment to be applied to the SiO _x films 33 and 45 later in order to prevent the structural change of the polycrystalline Si layers 32 and 44 for the active layer having a larger crystal grain size and higher mobility. The irradiation energy of 34 and 47 is made lower than the irradiation energy of the laser beam to the deposited polycrystalline Si layer. In the first and second embodiments described above, the amorphous Si layer is deposited by the plasma CVD method. However, the amorphous Si layer may be deposited by the sputtering method.
[0055]
In the first and second embodiments described above, in order to minimize the reflectivity of the excimer laser beams 34 and 47 at the interface between the SiO _x films 33 and 45 and the polycrystalline Si layers 32 and 44, the SiO _x film is used. The thicknesses of the layers 33 and 45 are 150 nm. If the refractive index of the SiO _x films 33 and 45 is n, the wavelength of the excimer laser beams 34 and 47 is λ, and the non-negative integer is m, the SiO _x film 33 , 45 thickness d is
d = {(2m + 1) / 4}. (λ / n)
If the above-mentioned reflectance is small, the thickness may not be strictly limited.
[0056]
In the first embodiment described above, both the SiO _x film 33 and the polycrystalline Si layer 32 are processed into the active layer pattern as shown in FIG. Is not contaminated in the patterning process. For this reason, this interface can be maintained in a clean state, and the energy level at this interface can be reduced.
[0057]
However, if the energy level at the above-mentioned interface can be sufficiently reduced by applying heat treatment to the SiO _x film 33 by irradiation with excimer laser light 34, the polycrystalline Si layer 32 is processed into an active layer pattern and then SiO 2 is processed. _{The x} film 33 may be deposited.
[0058]
Furthermore, in the first and second embodiments described above, the polycrystalline Si layers 32 and 44 and the SiO _x films 33 and 45 are used. However, the polycrystalline semiconductor layers other than the polycrystalline Si layer and the insulation other than the SiO _x film are used. A film may be used in place of the polycrystalline Si layers 32 and 44 and the SiO _x films 33 and 45, respectively.
[0059]
【The invention's effect】
In the thin film transistor manufacturing method according to claim 1, the structure of the formed polycrystalline semiconductor layer for the active layer is changed even if the quality of the insulating film at the time of formation on the polycrystalline semiconductor layer for the active layer is inferior. Without reducing the energy level, the energy level at the interface between the insulating film and the polycrystalline semiconductor layer and the portion of the insulating film close to the interface can be reduced.
[0060]
For this reason, in the top gate structure in which the insulating film on the polycrystalline semiconductor layer for the active layer is a gate insulating film, the threshold voltage fluctuation and channel due to hot carriers and the like have an appropriate threshold voltage without deteriorating characteristics. A thin film transistor with low long-term reliability and low decrease in conductance can be manufactured.
[0061]
In addition, the bottom gate structure in which the insulating film on the polycrystalline semiconductor layer for the active layer serves as a mask when introducing impurities for forming the source / drain and the insulating film remains on the back surface of the channel region has characteristics. Without lowering, it is possible to manufacture a thin film transistor with high long-term reliability with little reduction in channel conductance due to hot carriers or the like.
[0062]
In addition, the insulating film is not damaged due to the heat treatment, the yield is high, and even if an insulating substrate containing an inexpensive material is used, thermal contraction of the insulating substrate after the heat treatment can be prevented. It can be manufactured at low cost.
[0063]
In the thin film transistor manufacturing method according to claim 2, since the irradiation energy of the laser beam can be used effectively and the effect of the heat treatment can be obtained with certainty, a thin film transistor with high long-term reliability is reliably manufactured. be able to.
[0064]
In the method of manufacturing a thin film transistor according to claim 3, the improvement in the film quality of the insulating film as a mask when introducing the activation and impurities introduced impurities into a polycrystalline semiconductor layer to form a source over scan and drain Since the steps can be performed simultaneously, the number of manufacturing steps is small, and the thin film transistor can be manufactured at low cost.
[0065]
In the method of manufacturing a thin film transistor according to the fourth aspect , the interface between the polycrystalline semiconductor layer and the insulating film can be maintained in a clean state, so that the energy level at this interface can be further reduced, and the long-term A thin film transistor with higher reliability can be manufactured.
[Brief description of the drawings]
FIG. 1 is a side sectional view showing a first embodiment of the present invention in the order of steps.
2 is a graph of I _D -V _G curve of the TFT manufactured by a TFT and a first conventional example prepared in the first embodiment.
FIG. 3 is a side sectional view showing a second embodiment of the present invention in the order of steps.
FIG. 4 is a side sectional view showing a first conventional example of the invention of the present application in the order of steps.
FIG. 5 is a side sectional view showing a second conventional example of the present invention in the order of steps.
[Explanation of symbols]
31: insulating film (insulating substrate), 32 ... polycrystalline Si layer (polycrystalline semiconductor layer), 33 ... SiO _x film (insulating film), 34 ... excimer laser beam (laser beam), 41 ... glass substrate (insulating Substrate), 44 ... polycrystalline Si layer (polycrystalline semiconductor layer), 44a ... channel region, 45 ... SiO _x film (insulating film), 46 ... impurity, 47 ... excimer laser light (laser light)

Claims (4)

Depositing an amorphous semiconductor layer or a polycrystalline semiconductor layer on an insulating substrate;
A step that form the polycrystalline semiconductor layer for the active layer by performing heat treatment temperature above its melting point the deposited amorphous semiconductor layer or a polycrystalline semiconductor layer is irradiated with a laser beam,
Forming an insulating film on the active layer polycrystalline semiconductor layer;
And a step of applying heat treatment to the insulating film by irradiation with laser light from the insulating film side ,
Manufacturing of a thin film transistor, characterized in that irradiation energy of the laser beam for the heat treatment applied to the insulating film is lower than irradiation energy of the laser beam to the deposited amorphous semiconductor layer or polycrystalline semiconductor layer Method. The thickness d of the insulating film, where n is the refractive index of the insulating film, λ is the wavelength of the laser beam, and m is a non-negative integer,
d = {(2m + 1) / 4}. (λ / n)
2. The method of manufacturing a thin film transistor according to claim 1, wherein: Processing the insulating film into a channel region pattern;
Introducing an impurity into the polycrystalline semiconductor layer using the insulating film of the pattern as a mask;
2. The method of manufacturing a thin film transistor according to claim 1, further comprising a step of performing the heat treatment after the introduction. 2. The method of manufacturing a thin film transistor according to claim 1, wherein the insulating film and the polycrystalline semiconductor layer are processed into a pattern of the active layer after the insulating film is formed.

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