JP3627498B2 - Method for producing silicon single crystal - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for producing a silicon single crystal with few crystal defects and a silicon single crystal wafer.
[0002]
[Prior art]
In recent years, with the miniaturization of elements due to high integration of semiconductor circuits, quality requirements for a silicon single crystal produced by the Czochralski method (hereinafter abbreviated as CZ method) serving as a substrate have increased. . In particular, there are defects due to single crystal growth that deteriorate the oxide breakdown voltage characteristics and device characteristics called Grown-in defects such as FPD, LSTD, and COP, and the reduction of density and size is regarded as important. Yes.
[0003]
In describing these defects, first, a vacancy point defect called vacancy (hereinafter sometimes abbreviated as V) incorporated into a silicon single crystal, and interstitial-Si (interstitial-Si, hereinafter). What is generally known is a factor that determines the concentration of each interstitial silicon point defect called “I” (sometimes abbreviated as “I”).
[0004]
In a silicon single crystal, the V region is a vacancy, that is, a region in which there are many such as recesses and holes generated due to a shortage of silicon atoms, and the I region is a dislocation generated by the presence of extra silicon atoms. Or a region having a large amount of excess silicon atoms, and a neutral (Neutral, hereinafter abbreviated as N) region between the V region and the I region without any shortage or excess of atoms. Will exist. The grown-in defects (FPD, LSTD, COP, etc.) are generated only when V and I are in a supersaturated state. It has been found that it does not exist.
[0005]
The concentration of these two point defects is determined by the relationship between the crystal pulling rate (growth rate) in the CZ method and the temperature gradient G in the vicinity of the solid-liquid interface in the crystal, and OSF (near the boundary between the V region and the I region). The existence of ring-shaped defects called oxidation-induced stacking faults (Oxidation Induced Stacking Faults) has been confirmed.
[0006]
When these defects due to crystal growth are classified, for example, when the crystal diameter is 6 inches, when the growth rate is relatively high, such as about 0.6 mm / min or more, Grown-in defects such as FPD, LSTD, and COP that are present exist in high density throughout the crystal diameter direction, and a region in which these defects exist is called a V-rich region (see FIG. 4A).
[0007]
Further, when the growth rate is 0.6 mm / min or less, the OSF ring described above is generated from the periphery of the crystal as the growth rate is reduced, and L / D that is considered to be caused by a dislocation loop outside the ring. Defects (Large Dislocation: abbreviations for interstitial dislocation loops, LSEPD, LFPD, etc.) are present at low density, and a region where these defects are present is called an I-rich region (see FIG. 4B). Furthermore, when the growth rate is reduced to about 0.4 mm / min or less, the OSF ring aggregates and disappears at the center of the wafer, and the entire surface becomes an I-rich region (FIG. 4C).
[0008]
In addition, there is a region outside of the OSF ring between the V-rich region and the I-rich region, which is called the N region, where neither FPD, LSTD, COP due to vacancy nor LSEPD, LFPD due to dislocation loop exists. Has been discovered (see JP-A-8-330316). This region is outside the OSF ring, and when the oxygen precipitation heat treatment is performed and the contrast of the precipitation is confirmed by X-ray observation or the like, there is almost no oxygen precipitation and is so rich that LSEPD and LFPD are formed. It is reported that it is not the I-rich region side (see FIG. 3A).
[0009]
In the conventional CZ puller, the N region, which is present only in a very small portion of the wafer, is improved in the furnace temperature distribution of the puller and the pulling speed is adjusted to obtain an F / G value (single crystal pulling speed is F [Mm / min], where the average value of the temperature gradient in the crystal in the pulling axis direction between the melting point of silicon and 1300 ° C. is G [° C./mm], the ratio expressed by F / G) is 0.20. ~ 0.22mm²  It has been proposed that the N region can be spread over the entire surface of the wafer by pulling the crystal under the control of / ° C. · min (see FIG. 3B).
[0010]
[Problems to be solved by the invention]
However, if such an extremely low defect region is extended to the entire crystal and manufactured, this region is limited to only the N region on the I-rich region side. Regardless of the machine, precise control is difficult with a production machine, and it is actually impossible to obtain a low-defect crystal with the entire crystal bar, only by manufacturing a part of the single crystal bar. Therefore, productivity and yield are extremely low, which is a big obstacle to industrialization.
Furthermore, the defect distribution chart disclosed in the present invention is significantly different from the data obtained through experiments and investigations by the inventors and the defect distribution chart created based on the data (see FIG. 1). There was found.
[0011]
The present invention has been made in view of such a problem, and has a wide control range and is easy to control over the entire crystal surface where neither the V-rich region nor the I-rich region exists. An object of the present invention is to manufacture a silicon single crystal wafer by the CZ method, which has a very low defect density, with the entire single crystal rod, while maintaining high productivity and high yield.
[0012]
[Means for Solving the Problems]
The present invention has been made in order to achieve the above-mentioned object.IsWhen a silicon single crystal is grown by the Czochralski method, the pulling rate is F [mm / min], and the average value of the temperature gradient in the crystal in the pulling axis direction between the melting point of silicon and 1400 ° C. is G [° C. / Mm], the horizontal axis is the distance D [mm] from the crystal center to the crystal periphery, and F / G [mm² / ° C./min] in the defect distribution diagram showing the defect distribution with the vertical axis as the vertical axis, the crystal is pulled up within the range of the OSF region and the N-region outside the OSF region. It is.
[0013]
Thus, based on the defect distribution diagram of FIG. 1 obtained by analyzing the results of the experiment / investigation, the OSF region (usually a ring shape, but if a FPD or the like disappears in the center, it is formed in a circular shape). If the crystal is pulled within the range of the N-region outside the silicon single crystal wafer, the control range is widened and the FPD and L / D are not present in the entire wafer surface. . The OSF region existing in the central portion has an extremely small area with respect to the entire area of the wafer, and the influence on the device yield is small.
[0014]
That is, the silicon single crystal pulled according to the present invention includes a region where OSF can be generated during thermal oxidation, but is pulled up to maximize the N region outside the OSF ring. And the temperature gradient within the crystal are widened, the manufacturing conditions can be easily set even in a general production machine, and a wafer having a large N region can be easily produced.
[0015]
In this case, more specific conditions are as follows:PullThe average value G [° C./mm] of the temperature gradient in the crystal in the raising axis direction is set to 3.0 [° C./mm] or less, and the crystal is pulled up.,The average value G [° C./mm] of the temperature gradient in the crystal in the pulling axis direction is the difference Δ between the temperature gradient Gc [° C./mm] in the center portion of the crystal and the temperature gradient Ge [° C./mm] in the peripheral portion of the crystal. When represented by G = (Ge−Gc), ΔG is within 1 ° C./mm so that the crystal is pulled up.
[0016]
By adopting such a pulling condition, it is possible to grow a silicon single crystal that has an OSF region in the center but does not have FPD or L / D in the entire surface of the wafer.
[0017]
Next, the present inventionIsWhen growing a silicon single crystal by the Czochralski method, the pulling speed F [mm / min] is controlled within ± 0.02 [mm / min] with respect to the critical speed at which the OSF disappears at the crystal bulk center. However, it is a method for producing a silicon single crystal characterized by pulling up the crystal.
[0018]
In this way, if the pulling rate F [mm / min] is controlled within ± 0.02 [mm / min] with respect to the critical rate at which the OSF disappears at the center of the crystal bulk, the crystal is pulled, It is possible to grow a silicon single crystal that does not include FPD or L / D in the entire surface of the wafer with the N region outside the OSF expanded to the maximum while still including a region that can generate OSF during thermal oxidation. . In addition, since only the pulling speed is controlled with high accuracy, it can be adequately handled in general production machines.
[0019]
AndHWhen growing a silicon single crystal by the Czochralski method, the average value of the pulling rate F [mm / min] is ± 0.01 [mm / min] with respect to the average value of the critical velocity at which the OSF disappears at the crystal bulk center. If the crystal is pulled up while being controlled within the range, a single crystal crystal in which the N region outside the OSF is enlarged as much as possible in the entire crystal rod and the FPD and L / D are not present in the entire wafer surface is grown. can do.
[0020]
In the present invention,,It is desirable to pull up the crystal while applying a magnetic field to the silicon melt during pulling.
By applying a magnetic field, convection in the silicon melt is suppressed,The present inventionThis is because it becomes easy to control the pulling conditions.
[0021]
In particular,markThe applied magnetic field is a horizontal magnetic field,markThe strength of the applied magnetic field is preferably 2000 G or more.
This is because a horizontal magnetic field is preferable in order to reduce the temperature gradient G in the crystal and the temperature gradient difference ΔG in the plane and widen the N region in the crystal, and the magnetic field application effect is less than 2000 G. .
[0022]
And aboveShiA silicon single crystal manufactured by the method for manufacturing a recon single crystal is one in which OSF is generated when the center of the crystal bulk is subjected to thermal oxidation treatment, or an OSF nucleus is present, and FPD and L / D can be obtained that does not exist in the crystal.
Therefore, a silicon single crystal wafer obtained by slicing such a silicon single crystal isCWhen thermal oxidation is performed on the center of the wafer, OSF is generated, or a silicon single crystal wafer in which OSF nuclei exist and FPD and L / D do not exist in the entire wafer surface.
[0023]
That is, in the silicon single crystal wafer of the present invention, when the wafer is thermally oxidized, OSF is generated at the center of the wafer or the core of the OSF is latent, but FPD and L / D (LSEPD, (LFPD) is a wafer that does not exist in the entire wafer surface, and as shown in FIG. 2B, there is no V-rich region or I-rich region on the entire wafer surface, and the area of the neutral N region. Is very big. In such a silicon single crystal wafer of the present invention having a large N region, OSF nuclei are latent, and when the wafer is thermally oxidized, there exists an OSF region where OSF can be generated in the center. The wafer has a novel defect structure in which the area is suppressed to the maximum at the center of the wafer while the N region outside the OSF is expanded to the maximum.
[0024]
In the silicon single crystal wafer thus obtained, for example, the OSF region at the center of the wafer is 5% or less of the wafer area.,Alternatively, the OSF region at the center of the wafer can have a diameter of 20 mm or less..
Therefore, since the ratio of the OSF region to the total area of the wafer is small and the area of the N region is large, the silicon single crystal wafer can improve the device yield.
[0025]
AndBookIn the silicon single crystal wafer of the invention, the OSF density existing in the center of the wafer is 100 / cm.² And in particular,If the oxygen concentration on the entire wafer surface is 24 ppma (ASTM'79 value) or less, there are latent nuclei of OSF due to the oxygen precipitation heat treatment, but no OSF is generated when the OSF thermal oxidation treatment is performed, and FPD and A silicon single crystal wafer in which L / D does not exist in the entire wafer surface can be obtained.
[0026]
Thus, if the oxygen concentration in the growth crystal is suppressed to 24 ppma or less, the growth of OSF nuclei can be inhibited, and even if OSF or OSF latent nuclei exist in the wafer, the device is affected. In the end, when the wafer is subjected to OSF thermal oxidation treatment, the core of OSF is latent, but OSF is not generated, and FPD and L / D (LSEPD, LFPD) are also on the entire surface of the wafer. It is possible to obtain a wafer with an extremely low defect density that can be used on the entire surface, in which the so-called entire wafer surface does not exist in the V-rich region, the I-rich region, and no harmful OSF exists. In addition, in this case, as described above, the F / G control can also be made in a wide control range, and the wafer can be easily manufactured industrially.
[0027]
Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto. Prior to explanation, each term is explained beforehand.
1) FPD (Flow Pattern Defect) is a method in which a wafer is cut out from a grown silicon single crystal rod, and a strained layer on the surface is removed by etching with a mixed solution of hydrofluoric acid and nitric acid.₂  Cr₂  O₇  Etching the surface (Secco etching) with a mixed solution of hydrogen, hydrofluoric acid and water produces pits and ripples. This ripple pattern is referred to as FPD, and the higher the FPD density in the wafer surface, the higher the breakdown voltage of the oxide film (see Japanese Patent Laid-Open No. 4-192345).
[0028]
2) With SEPD (Secco Etch Pit Defect), when the same Secco etching as FPD is performed, a pattern with a flow pattern is called FPD, and a pattern without a flow pattern is called SEPD. Among these, a large SEPD (LSEPD) of 10 μm or more is considered to be caused by a dislocation cluster. When a dislocation cluster exists in a device, a current leaks through the dislocation and does not function as a PN junction.
[0029]
3) In LSTD (Laser Scattering Tomography Defect), a wafer is cut out from a grown silicon single crystal rod, a strained layer on the surface is removed by etching with a mixed solution of hydrofluoric acid and nitric acid, and then the wafer is cleaved. Infrared light is incident from the cleavage plane and light emitted from the wafer surface is detected, so that scattered light due to defects existing in the wafer can be detected. The scatterers observed here have already been reported by academic societies and the like, and are regarded as oxygen precipitates (see JJAP Vol.32, P3679, 1993). In addition, recent studies have reported that it is an octahedral void.
[0030]
4) COP (Crystal Originated Particle) is a defect that causes the oxide film breakdown voltage at the center of the wafer to deteriorate, and the defect that becomes FPD in Secco etch is ammonia hydrogen peroxide cleaning (NH₄  OH: H₂  O₂  : H₂  In the cleaning with a mixed solution of O = 1: 1 to 2: 5 to 7), it works as a selective etching solution and becomes a COP. The diameter of the pit is 1 μm or less and is examined by a light scattering method.
[0031]
5) L / D (Large Dislocation: abbreviation for interstitial dislocation loop) includes LSEPD, LFPD, and the like, which are defects caused by the dislocation loop. As described above, LSEPD refers to a large SEPD having a size of 10 μm or more. The LFPD refers to a large pit having a tip pit size of 10 μm or more among the above FPDs, which is also considered to be caused by a dislocation loop.
[0032]
As previously proposed in Japanese Patent Application No. 9-199415, the present inventors investigated in detail the vicinity of the boundary between the V region and the I region with respect to the silicon single crystal growth by the CZ method. It was discovered that there is a neutral region where the number of FPDs, LSTDs, and COPs is extremely small and LSEPD is not present in a very narrow region.
[0033]
Therefore, I thought that if this neutral region could be extended to the entire wafer surface, point defects could be greatly reduced. In the relationship between the growth rate (pulling rate) and the temperature gradient, the pulling rate is almost constant in the crystal wafer plane, so the main factor that determines the concentration distribution of point defects in the plane is the temperature gradient. It is. In other words, there is a problem that there is a difference in the temperature gradient in the axial direction within the wafer surface, and if this difference can be reduced, it will be found that the concentration difference of point defects in the wafer surface can also be reduced. If the temperature inside the furnace is controlled so that the difference between the temperature gradient Gc and the temperature gradient Ge in the peripheral portion of the crystal is ΔG = (Ge−Gc) ≦ 0.5 ° C./mm, In this way, a defect-free wafer consisting of N regions can be obtained.
[0034]
In the present invention, as a result of investigating the crystal plane by changing the pulling rate using the crystal pulling apparatus by the CZ method having a small temperature gradient difference ΔG as described above, a new defect distribution diagram as shown in FIG. Could get.
The N region existing between the V-rich region and the I-rich region was conventionally considered only outside the OSF ring (nucleus), but it was confirmed that the N region exists also inside the OSF ring. (See FIG. 2 (a)). That is, in the case of the above-mentioned Japanese Patent Application No. 9-199415, the OSF ring is a boundary region between the V-rich region and the N region (see FIG. 3A). all right. This was not found when the experiment was conducted with a conventional crystal pulling apparatus with a large ΔG, but was discovered as a result of investigating crystals using the crystal pulling apparatus with a small ΔG.
[0035]
However, if the crystal is pulled only in the N region outside the OSF ring or only in the N region inside the OSF ring, the control range is narrow, and it is difficult to make the entire single crystal rod into the N region. A problem similar to that of the above-described prior art, which is low in productivity and unfavorable for industrial production, arises.
[0036]
Therefore, as a result of investigation based on FIG. 1, the present inventors considered mass productivity by the CZ method, distributed OSF in the bulk central portion of the crystal rod as a quality that can be produced by the entire crystal rod, The present invention has been completed with the idea of suppressing the size of the region as much as possible and using the rest as the N region outside the OSF ring to pull up the crystal.
That is, in the defect distribution diagram of FIG. 1, the crystal is pulled within the range of the OSF region and the outer N-region.
[0037]
As described above, if the crystal is pulled up within the range of the OSF region and the N-region outside thereof based on the defect distribution diagram of FIG. Thus, a silicon single crystal and a wafer in which FPD and L / D are not present in the entire surface of the wafer can be easily manufactured. The OSF region existing in the central portion has an extremely small area with respect to the entire wafer area, and the influence on the device yield is small.
[0038]
In this case, it is conceivable that the crystal is pulled up by the OSF ring and the N region inside the OSF ring. However, a wafer that can be formed is not preferable because the inside becomes the N region and the outside becomes the OSF region, and the OSF region becomes relatively wide.
[0039]
And the furnace temperature of the pulling apparatus in which there is an OSF region at the center of the crystal according to the present invention and the outside is the N region, the total heat transfer analysis software FEMAG (F. Dupret, P. Nicodeme, Y. Ryckmans, P. Waters, and MJ Crochet, Int. J. Heat Mass Transfer, 33, 1849 (1990)).
[0040]
As a result, it was found that the average value G [° C./mm] of the temperature gradient in the crystal in the pulling axis direction should be 3.0 [° C./mm] or less to pull the crystal. In addition, the average value G [° C./mm] of the temperature gradient in the crystal in the pulling axis direction is calculated from the temperature gradient Gc [° C./mm] in the crystal central portion and the temperature gradient Ge [° C./mm] in the crystal peripheral portion. Regarding the difference ΔG = (Ge−Gc), it was found that ΔG should be within 1 ° C./mm so that the crystal is pulled up.
This value is much easier to control and mass-productive than the previously proposed condition for ΔN = (Ge−Gc) ≦ 0.5 ° C./mm, which is the condition for making the entire crystal surface an N region. It is.
[0041]
By growing a single crystal under such pulling conditions, OSF is generated when thermal oxidation treatment is performed at the center of the crystal, or there is an OSF nucleus, but FPD and L / D are present in the crystal. A silicon single crystal can be obtained.
Therefore, in the silicon single crystal wafer obtained by slicing such a silicon single crystal, OSF is generated when the center of the wafer is subjected to thermal oxidation treatment, or OSF nuclei exist, A silicon single crystal wafer in which FPD and L / D do not exist in the entire wafer surface is obtained.
[0042]
That is, in the silicon single crystal wafer of the present invention, when the wafer is thermally oxidized, OSF is generated at the center of the wafer or the core of the OSF is latent, but FPD and L / D (LSEPD, (LFPD) is a wafer that does not exist in the entire wafer surface, and as shown in FIG. 2B, the V-rich region and the I-rich region do not exist on the entire wafer surface, and the area of the neutral N region. Is very big. In such a silicon single crystal wafer of the present invention having a large N region, OSF nuclei are latent, and when the wafer is thermally oxidized, there exists an OSF region where OSF can be generated in the center. The wafer has a novel defect structure in which the area is suppressed to the maximum at the center of the wafer while the N region outside the OSF is expanded to the maximum.
[0043]
In this case, an I-rich region should originally be formed in the outer region of the OSF, and L / D should be generated in that region. However, in the single crystal manufacturing method of the present invention, as described above, The average value G [° C./mm] of the temperature gradient in the crystal in the pulling axis direction is set to 3.0 [° C./mm] or less, and the average value G [° C./mm] of the temperature gradient in the crystal in the pulling axis direction. As for the difference ΔG = (Ge−Gc) between the temperature gradient Gc [° C./mm] in the crystal central portion and the temperature gradient Ge [° C./mm] in the crystal peripheral portion, ΔG is 1 ° C./mm. Since the crystal is pulled up within the N region, the N region outside the OSF ring expands, and the I-rich region is not formed.
[0044]
Then, when the silicon single crystal is grown, the OSF region is grown near the critical speed at which the OSF disappears in the center portion of the crystal, and the size of the OSF region in the center portion is made as small as possible. Can be, for example, 5% or less of the wafer area, or the OSF region at the center of the wafer can be 20 mm or less in diameter.
Therefore, since the ratio of the OSF region to the total area of the wafer is small, there is no FPD or L / D, and the area of the N region is large, the silicon single crystal wafer can improve the device yield.
[0045]
As described above, the OSF region in the central portion is also grown near the critical velocity at which the OSF disappears in the central portion of the crystal as described above, so that the size of the OSF region in the central portion is made as small as possible. For example, the OSF density at the center of the wafer is 100 / cm.²  It was possible to be as follows, and it might be substantially zero. Therefore, the influence on the yield in the device process can be made not so great.
[0046]
On the other hand, with regard to the OSF ring, when the oxygen concentration is low in the entire surface of the wafer from recent research, the OSF ring is not generated by the thermal oxidation treatment even if the core of the OSF ring exists, and the device is affected. It turns out that there is no.
This oxygen concentration limit is determined by performing thermal oxidation of the wafer if the oxygen concentration in the entire wafer surface is 24 ppma or less as a result of pulling up crystals of several oxygen concentration levels using the same crystal pulling apparatus. It has been confirmed that no OSF ring occurs when
[0047]
That is, FIG. 5 shows that when an oxygen concentration is gradually lowered while pulling up a single crystal, OSF nuclei exist over the entire length of the crystal, but the OSF ring is observed when the wafer is thermally oxidized. It is shown that up to 24 ppma and OSF ring nuclei are present at 24 ppma or less, but no OSF ring is generated by thermal oxidation treatment.
[0048]
Incidentally, in order to reduce the oxygen concentration in the grown crystal to 24 ppma or less, it may be performed by a conventionally used method. For example, the rotational speed of the crucible or the temperature distribution in the melt, the atmospheric pressure, the gas flow rate, etc. are adjusted. This can be easily done by means of
[0049]
Therefore, in the present invention, if the oxygen concentration on the entire surface of the wafer is 24 ppma (ASTM'79 value) or less, the growth of OSF nuclei existing in the central portion can be inhibited. Even if the wafer is present in the wafer, the device is not affected. Therefore, when the wafer is subjected to the OSF thermal oxidation treatment, the core of the OSF is latent, but the OSF is not generated. L / D (LSEPD, LFPD) is not present in the entire wafer surface, so-called the entire wafer surface is V-rich region, I-rich region, and there is no harmful OSF. You can get a wafer.
[0050]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
First, a configuration example of a single crystal pulling apparatus using the CZ method used in the present invention will be described with reference to FIG. As shown in FIG. 6, the single crystal pulling apparatus 30 includes a pulling chamber 31, a crucible 32 provided in the pulling chamber 31, a heater 34 disposed around the crucible 32, and a crucible that rotates the crucible 32. Holding shaft 33 and its rotation mechanism (not shown), seed chuck 6 holding single crystal silicon seed crystal 5, wire 7 pulling up seed chuck 6, and winding mechanism for rotating or winding wire 7 ( (Not shown). The crucible 32 is provided with a quartz crucible on the inner side containing the silicon melt (hot water) 2 and on the outer side with a graphite crucible. A heat insulating material 35 is disposed around the outside of the heater 34.
[0051]
In order to satisfy the manufacturing conditions such as the temperature gradient in the crystal related to the manufacturing method of the present invention, an annular solid-liquid interface heat insulating material 8 is provided on the outer periphery of the solid-liquid interface of the crystal, and the upper surrounding heat insulating material 9 is provided thereon. Is arranged. This solid-liquid interface heat insulating material 8 is installed with a gap 10 of 3 to 5 cm between its lower end and the molten metal surface of the silicon melt 2. The upper surrounding heat insulating material 9 may not be used depending on conditions. Further, a cylindrical cooling device 36 for cooling the single crystal by blowing cooling gas or blocking radiant heat is provided.
In the present embodiment, a magnet 37 made of, for example, a superconducting coil is installed outside the pulling chamber 31 in the horizontal direction, and a magnetic field in the horizontal direction is applied to the silicon melt 2 to thereby convect the melt. The so-called MCZ method, which suppresses and achieves stable growth of single crystals, is used.
[0052]
In this case, what is particularly important for satisfying the conditions of the present invention is the crystal growth interface (solid-liquid interface 4) in the single crystal rod 1 on the molten metal surface of the pulling chamber 31, as shown in FIG. In the outer peripheral space, the annular solid-liquid interface heat insulating material 8 was provided in the temperature range of the crystal near the molten metal surface from 1420 ° C. to 1400 ° C., and the upper surrounding heat insulating material 9 was disposed thereon, In addition, the magnet 37 is disposed outside the pulling chamber 31. Thereby, the average value G of the temperature gradient in the crystal can be set to 3.0 [° C./mm] or less, the temperature gradient Gc [° C./mm] in the center portion of the crystal and the temperature gradient Ge [ It is possible to pull up the crystal with a difference ΔG = (Ge−Gc) within 1 ° C./mm within the range of [° C./mm], and to stabilize the pulling speed to enable high precision control. .
Furthermore, if necessary, a device for cooling the crystal, for example, a cooling device 36, is provided on the top of the heat insulating material, and the crystal can be cooled by blowing a cooling gas from above, and a radiant heat reflector is provided at the bottom of the tube. An attached structure may be used.
[0053]
Thus, by providing a heat insulating material with a predetermined gap at a position immediately above the liquid surface and further providing a device for cooling the crystal above the heat insulating material, near the crystal growth interface, it is caused by radiant heat. A heat retention effect is obtained, and radiant heat from a heater or the like can be cut above the crystal, so that the production conditions of the present invention can be satisfied.
As a cooling device for the crystal, a desired temperature gradient may be secured by providing an air cooling duct, a water-cooled serpentine, etc. surrounding the periphery of the crystal, in addition to the cylindrical cooling device 36.
[0054]
Next, a single crystal growth method using the single crystal pulling apparatus 30 will be described. First, a high-purity polycrystalline silicon raw material of silicon is heated to a melting point (about 1420 ° C.) or higher in the crucible 32 and melted. Next, the tip of the seed crystal 5 is brought into contact with or immersed in the substantially central portion of the surface of the melt 2 by unwinding the wire 7. Thereafter, the crucible holding shaft 33 is rotated in an appropriate direction, and the winding seed crystal 5 is pulled up while rotating the wire 7, thereby starting single crystal growth. Thereafter, a substantially cylindrical single crystal rod 1 can be obtained by appropriately adjusting the pulling speed and temperature.
[0055]
During the growth of the single crystal rod, the diameter needs to be controlled to a desired value. Therefore, during the pulling of the crystal, the diameter of the crystal rod is measured from a window provided in the pulling chamber 31, for example, using a CCD camera or the like. The diameter is measured by observing the vicinity of the crystal growth interface with the CCD camera or the like, and detecting a bright part called a fusion ring existing at the boundary between the silicon melt and the crystal from the light amount signal and specifying the position. Is done.
[0056]
The obtained diameter data is input to a CPU of a computer attached to the pulling device, calculates an error from the target diameter, and corrects it to the temperature controller that controls the heater 34 and the pulling speed adjusting mechanism of the wire 7. Feedback control such as sending a voltage signal corresponding to the amount is automatically performed. That is, the temperature of the silicon melt and the crystal pulling speed are controlled by controlling the output of the heater 34 and the rotational speed of the motor that winds the wire 7. In this diameter control, in order to reduce the error, the correction amount of the temperature and the pulling speed is calculated by a PID calculation method or the like. Thus, one single crystal rod is grown while the diameter is controlled.
[0057]
In the present invention, the crystal pulling speed F [mm / min] is controlled so as to pull up near the critical speed at which the OSF disappears at the center of the crystal bulk. This prevents the formation of a V region in which FPD or the like is generated at the center of the crystal and makes the OSF region as small as possible.
What is important here is to accurately control the crystal pulling speed within a certain range with respect to the critical speed.
[0058]
That is, as in the present invention, the defect distribution map has an OSF region when the crystal is pulled up in the range of the OSF region and the N-region outside the OSF region, and is thermally oxidized at the center of the wafer. In order to obtain FPD and L / D that do not exist in the entire wafer surface, it is necessary to pull the crystal while controlling the pulling speed of the crystal within ± 0.02 [mm / min] with respect to the critical speed. is necessary.
[0059]
Therefore, in the present invention, the accuracy of pulling speed control is increased.
The pulling speed can be increased in accuracy by any method, but here, it has been dealt with by increasing the feedback control response in the diameter control.
[0060]
That is, the feedback control is a mechanism that repeats the control of averaging the diameter data detected within a certain period of time, transmitting this to the CPU, calculating the deviation from the set diameter, and outputting the correction amount. However, the time to detect and average the diameter data was shortened (for example, 60 seconds was set to 30 seconds), the feedback cycle was accelerated, and the responsiveness was improved. In particular, the responsiveness to the temperature control system is increased, and the fluctuation of the crystal growth rate (pulling rate) is suppressed to the maximum.
Moreover, according to such a method, since only one set value of the feedback control is changed, it is possible to cope with even a general production machine, which is simple.
[0061]
If the control as described above is performed when growing the silicon single crystal by the Czochralski method, the portion of the crystal rod where the control is performed has a desired quality. In order to improve the yield as having the quality of the present invention, the average value of the pulling rate F [mm / min] is set to ± 0.00% relative to the average value of the critical rate at which the OSF disappears at the crystal bulk center. It is necessary to pull up the crystal while controlling it within 01 [mm / min].
[0062]
In this case, in the defect distribution map with high accuracy, the OSF region and the outside N-region are within the range, and the crystal pulling speed is within ± 0.02 [mm / min] with respect to the critical speed. In order to control or average the pulling speed within ± 0.01 [mm / min] with respect to the average critical speed at which the OSF disappears at the crystal bulk center, the responsiveness of the above feedback control is required. In addition to this improvement, it is desirable to pull up the crystal while applying a magnetic field to the silicon melt during pulling.
This is because by applying a magnetic field, convection in the silicon melt is suppressed and it becomes easier to control to the above pulling condition, so that the entire crystal rod is easily made to have a desired quality.
[0063]
In particular, the applied magnetic field is a horizontal magnetic field, and the strength of the applied magnetic field is preferably 2000 G or more, more preferably 3000 G or more.
In order to suppress the convection of the silicon melt and stabilize the pulling speed, a so-called longitudinal magnetic field or cusp magnetic field may be applied. However, the difference ΔG between the in-crystal temperature gradient G and the in-plane temperature gradient ΔG. In order to reduce the width and expand the N region in the crystal, a horizontal magnetic field in which the magnetic field acts horizontally on the crystal growth interface is preferred.
Further, the stronger the magnetic field strength is, the stronger the convection suppressing effect is, but 8000 G is sufficient. On the contrary, if it is less than 2000 G, the magnetic field application effect is reduced and the pulling speed stabilization effect is reduced.
[0064]
In this way, for example, a magnetic field of 4000 G or more is applied, the crystal pulling speed is increased, and the critical speed is controlled within ± 0.02 [mm / min]. If the average pulling rate is within ± 0.01 [mm / min] with respect to the average value of the critical velocity disappearing at the center of the crystal bulk, the OSF at the center of the single crystal becomes very low density if the pulling rate is extremely stabilized. In some cases, it hardly occurs.
[0065]
【Example】
Hereinafter, specific embodiments of the present invention will be described by way of examples, but the present invention is not limited to these examples.
A pulling device capable of applying a horizontal magnetic field shown in FIG. 6 is charged with 100 kg of raw material polycrystalline silicon in a 25-inch quartz crucible, a silicon single crystal rod having a diameter of 8 inches, an orientation <100>, and a length of a straight body portion of about 1 m. Raised.
The silicon melt has a hot water temperature of about 1420 ° C., a space of 4 cm from the molten metal surface to the lower end of the annular solid-liquid interface heat insulating material, and a 10 cm high annular solid-liquid interface heat insulating material, and a 30 cm high The upper Go insulation was deployed.
[0066]
Under this condition, the average pulling speed was changed from 0.8 to 0.3 mm / min, the crystal was pulled, and the critical speed at which the OSF disappeared at the center of the crystal bulk was investigated. / Min and 0.45 mm / min at the end of the straight body. Therefore, it was decided to pull up the crystal using this critical pulling speed as the target pulling speed.
[0067]
The obtained single crystal rod was divided vertically in the crystal growth direction, two samples having a thickness of 2 mm were cut out, and the surface thereof was mirror-finished. One of them was subjected to Secco etching for 30 minutes, and then observed for a microscope-in defect such as FPD and L / D by microscopic observation. The remaining one sheet was subjected to thermal oxidation treatment at 1200 ° C./100 minutes in a (water vapor + oxygen) atmosphere and observed with an X-ray topograph to confirm the state of occurrence of an OSF ring or the like.
[0068]
Example 1
The applied magnetic field strength is set to 0, the feedback cycle of diameter control is changed from the conventional 60 seconds to 30 seconds, the response is improved, the fluctuation of the crystal growth rate (pulling rate) is suppressed to the maximum, the crystal pulling rate The crystal was pulled while being controlled to be within ± 0.02 [mm / min] with respect to the critical speed at which OSF disappears at the center of the crystal bulk.
[0069]
FIG. 7 shows the results of controlling the crystal growth rate (pulling rate) of the resulting crystal rod and the state of defect occurrence in the crystal rod. 7A is a result diagram of the growth rate, and FIG. 7B is a result diagram of the crystal defect.
[0070]
As can be seen from the results, the portion where the crystal pulling speed is controlled to be within ± 0.02 [mm / min] with respect to the critical speed (A region in the figure) is that of the present invention. It can be seen that the crystal of the desired quality, that is, the OSF region at the center of the crystal, and FPD and L / D are not present in the crystal. On the other hand, in the portion where the pulling speed condition of the present invention is deviated upward, an FPD region is formed in the center of the crystal (B region in the figure). Conversely, in the portion where the pulling speed condition of the present invention is deviated downward, An L / D region is formed (C region in the figure). Between the OSF region and the L / D region, an N region which is a defect-free region is formed by a part of the single crystal rod.
Thus, in Example 1, the quality of the present invention or the crystal of only the N region could be obtained at about 40 to 50% of the single crystal rod.
[0071]
(Example 2)
The applied magnetic field strength is set to 4000G, the feedback cycle of diameter control is changed from the conventional 60 seconds to 30 seconds, the response is improved, and the fluctuation of the crystal growth rate (pulling rate) is suppressed to the maximum, the crystal pulling rate The crystal was pulled while controlling the average value so that it was within ± 0.02 [mm / min] with respect to the critical speed at which OSF disappeared at the center of the crystal bulk.
[0072]
FIG. 8 shows the result of controlling the crystal growth rate (pulling rate) of the resulting crystal rod and the state of defect occurrence in the crystal rod. FIG. 8A is a result diagram of the growth rate, and FIG. 8B is a result diagram of the crystal defect.
[0073]
From this result, the pulling speed is stabilized by applying a magnetic field, and the pulling speed of the crystal is controlled to be within ± 0.02 [mm / min] with respect to the critical speed at most sites. You can see that The crystal of the desired quality of the present invention, that is, the portion where the FPD and L / D are not present in the crystal (the A region in the figure) is about 80% of the single crystal rod while having the OSF region in the center of the crystal. It was possible to obtain at the site.
[0074]
On the other hand, in some parts, there is a part that does not have the quality of the present invention, and FPD is formed in the center of the crystal (B region in the figure). Examining this part, the pulling speed can be controlled within approximately ± 0.02 [mm / min], but the average value of the pulling speed is generally higher than the critical speed. You can see that
[0075]
(Example 3)
Therefore, the average value of the pulling speed was also controlled so that it was within ± 0.01 [mm / min] with respect to the average value of the critical speed at which the OSF disappeared at the crystal bulk center.
That is, the applied magnetic field strength is 4000 G, the feedback cycle of diameter control is changed from 60 seconds to 30 seconds in the conventional manner, the response is improved, and the fluctuation of the crystal growth rate (pulling rate) is suppressed to the maximum, The pulling speed is within ± 0.02 [mm / min] with respect to the critical speed at which the OSF disappears at the crystal bulk center, and the average value of the crystal pulling speed is changed to the average value of the critical speed at which the OSF disappears at the crystal bulk center. On the other hand, the crystal was pulled up while controlling to be within ± 0.01 [mm / min].
[0076]
FIG. 9 shows the result of controlling the crystal growth rate (pulling rate) of the resulting crystal rod and the state of defect occurrence in the crystal rod. FIG. 9A shows the result of the growth rate, and FIG. 9B shows the result of the crystal defect.
[0077]
Looking at this result, the pulling rate is stabilized by applying a magnetic field, and the average value of the pulling rate of the crystal is within ± 0.01 [mm / min] with respect to the critical rate for the entire crystal rod. It can be seen that control is performed. Therefore, the crystal of the desired quality of the present invention, that is, the portion where the FPD and L / D are not present in the crystal (the A region in the figure) is one single crystal. I was able to get it with the whole stick.
[0078]
Example 4
Next, a half-moon type wafer is cut out from a portion having the quality of the present invention among the remaining kamaboko-type single crystal rods vertically divided in the above embodiment, and this is mirror-finished to give a half-moon type silicon single piece. Crystal mirror wafers were fabricated and grown-in defects were measured. Further, thermal oxidation treatment was performed to confirm the presence or absence of OSF generation. Furthermore, the oxide film breakdown voltage characteristics were also examined.
[0079]
As a result, an OSF region having a diameter of about 20 mm or less exists in the central portion of the wafer, but the outer portion of the OSF region is a defect-free region in which no grow-in defect exists, and the extremely low defect in which the N region is expanded to the maximum. I got a wafer. The area of the OSF region is about 1% or less of the area of the 8-inch diameter wafer, and the influence as a factor of decreasing the device yield can be substantially reduced. A similar pulling test was performed on single crystals other than 8 inches in diameter, and it was confirmed that the area of the OSF region could be suppressed to 5% or less of the wafer area.
[0080]
In particular, in a wafer having an in-plane oxygen concentration of 24 ppma or less, OSF nuclei are present in the central OSF region, but OSF is not generated even by thermal oxidation, and the entire wafer surface has a good device yield. It was.
[0081]
The oxide film withstand voltage characteristics of this wafer were 97% to 100% C-mode good products.
The C-mode measurement conditions are as follows.
1) Oxide film thickness: 25 nm, 2) Measuring electrode: phosphorus-doped polysilicon,
3) Electrode area: 8mm²  4) Determination current: 1 mA / cm²  ,
5) Non-defective product judgment: A product having a dielectric breakdown electric field of 8 MV / cm or more was judged as a good product.
[0082]
The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.
[0083]
For example, in the above embodiment, an example has been described in which a silicon single crystal having a diameter of 8 inches is grown. However, the present invention is not limited to this, and the diameter is 6 inches or less, 10 to 16 inches or more. Needless to say, the present invention can also be applied to single crystal silicon.
[0084]
【The invention's effect】
As described above, according to the present invention, the control range of the single crystal growth condition is widened, and the wafer having the OSF region in the central portion but having the N region outside the OSF region expanded to the maximum is easily manufactured. be able to. And since it can produce with the whole single-crystal stick | rod, it can manufacture, maintaining high productivity and a high yield.
In addition, the area of the OSF region can be reduced, and if oxygen reduction is also used, OSF is not generated and a silicon single crystal wafer having substantially no defect can be manufactured.
[Brief description of the drawings]
BRIEF DESCRIPTION OF DRAWINGS FIG. 1 is a distribution diagram of defects when a horizontal axis represents a radial position of a silicon single crystal and a vertical axis represents an F / G value.
FIG. 2 is an explanatory diagram showing a distribution of defects in a crystal plane of a wafer of the present invention quality.
(A) When pulled up under normal pulling conditions, (b) When pulled up under the pulling conditions of the present invention.
FIG. 3 is an explanatory diagram showing a distribution of defects in a crystal plane in a conventional pulling method.
(A) When pulled up under normal pulling conditions, (b) When pulled up with precise control of pulling speed and temperature gradient in crystal.
FIG. 4 is an explanatory diagram showing the relationship between the pulling rate and the in-plane defect distribution in the conventional pulling method.
(A) For high-speed pulling, (b) For medium-speed pulling, (c) For low-speed pulling.
FIG. 5 is an explanatory diagram showing that the boundary position between the OSF ring generation region and the OSF nucleus existence region when the wafer is subjected to the thermal oxidation treatment is influenced by the oxygen concentration in the crystal.
(A) A graph showing the relationship between the position in the length direction of the crystal rod and the oxygen concentration, and (b) an explanatory diagram showing the boundary position between the OSF ring generation region and the OSF nucleus latent region in the crystal longitudinal section.
FIG. 6 is a schematic explanatory diagram of a single crystal pulling apparatus using a CZ method used in the present invention.
7 is a result diagram of Example 1. FIG.
(A) Growth rate results,
(B) Result of crystal defects.
8 is a result diagram of Example 2. FIG.
(A) Growth rate results,
(B) Result of crystal defects.
FIG. 9
It is a result figure of Example 3.
(A) Growth rate results,
(B) Result of crystal defects.
[Explanation of symbols]
1 ... Growing single crystal rod,
2 ... silicon melt,
3 ... hot water,
4 ... Solid-liquid interface,
5 ... Seed crystal,
6 ... Seed chuck,
7 ... Wire,
8 ... Solid-liquid interface heat insulating material,
9 ... Upper Go insulation,
10: A gap between the hot water surface and the lower end of the solid-liquid interface heat insulating material,
30 ... Single crystal pulling device,
31 ... Pulling room,
32 ... Crucible,
33 ... crucible holding shaft,
34 ... heater,
35 ... heat insulation,
36 ... cooling device,
37 ... Magnet.
V: V-rich region,
N ... N-region,
I: I-rich region,
OR: OSF region.

Claims (7)

When a silicon single crystal is grown by the Czochralski method, the pulling rate is F [mm / min], and the average value of the temperature gradient in the crystal in the pulling axis direction between the melting point of silicon and 1400 ° C. is G [° C. / In the defect distribution diagram, the distance D [mm] from the crystal center to the crystal periphery is represented on the horizontal axis and the value of F / G [mm ² / ° C./min] is represented on the vertical axis. The V-rich region and the I-rich region do not exist , the crystal is pulled within the range of the OSF region and the outer N-region , and the average value G [° C / mm] is 3.0 [° C./mm] or less, and the average value G [° C./mm] of the temperature gradient in the crystal in the pulling axis direction is defined as the temperature gradient Gc [° C./mm] of the crystal center portion. Difference with temperature gradient Ge [° C./mm] around the crystal ΔG = ( When expressed in e-Gc), a method of manufacturing a silicon single crystal which is △ G, characterized in that within 1 ° C. / mm. When growing a silicon single crystal by the Czochralski method, the pulling speed F [mm / min] is controlled within ± 0.02 [mm / min] with respect to the critical speed at which the OSF disappears at the crystal bulk center. The method for producing a silicon single crystal according to claim 1, wherein the crystal is pulled up. When a silicon single crystal is grown by the Czochralski method, the average value of the pulling rate F [mm / min] is ± 0.01 [mm / min with respect to the average value of the critical rate at which the OSF disappears at the crystal bulk center. The method for producing a silicon single crystal according to claim 2 , wherein the crystal is pulled while being controlled within a range of [min]. In the method for manufacturing a silicon single crystal according to any one of claims 1 to 3, a method for manufacturing a silicon single crystal, characterized in that pulling the crystal while applying a magnetic field pulling the silicon melt. 5. The method for producing a silicon single crystal according to claim 4 , wherein the applied magnetic field is a horizontal magnetic field. In the method for manufacturing a silicon single crystal according to claim 4 or claim 5, a method for manufacturing a silicon single crystal, characterized in that the intensity of the magnetic field and more 2000G applied. The method for producing a silicon single crystal according to any one of claims 1 to 6, wherein the oxygen concentration in the crystal is 24 ppma or less.

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