JP3595974B2 - Cassette information monitoring device - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a cassette information monitoring device suitable for use in a printer, a facsimile, a copier, or the like having a plurality of cassette stages.
[0002]
[Prior art]
Conventionally, as this type of cassette information monitoring device, there is a monitoring device whose main part is shown in FIG. This monitoring device is used, for example, in a printer. In the figure, 1 is a master CPU, 2 is a slave CPU, 3 is a common memory (common RAM) provided between the master CPU 1 and the slave CPU 2, 4 is a memory attached to the master CPU 1, and 5 is a slave CPU 2. An attached memory, 6 is a single cassette control circuit, 7 (7-1 to 7-n) is a cassette stage, and 8 (8-1 to 8-n) is a cassette set to be able to be inserted into and removed from the cassette stage 7. is there. In this monitoring device, the master CPU 1 and the slave CPU 2 exchange commands and data using the common memory 3 exclusively. The cassette control circuit 6 is a multiplex circuit.
[0003]
FIG. 5 is a flowchart showing a process of updating the cassette information in cooperation with the master CPU 1 and the slave CPU 2.
In response to a cassette information acquisition command from the master CPU 1 (step 501), the slave CPU 2 uses the cassette control circuit 6 to determine whether or not the cassette 8-1 is set for the cassette stage 7-1, and is set to the cassette 8-1. The presence / absence of paper, the type of paper, and the width of paper are checked (step 502).
[0004]
In this case, various sensors are attached to the cassette stage 7-1, and the above check is performed based on detection outputs from these sensors via the cassette control circuit 6. For example, the presence or absence of the setting of the cassette 8-1 is checked by using the cassette control circuit 6 and taking in a detection output from a cassette presence / absence sensor (not shown) set in the cassette stage 7-1. The width of the sheet is controlled by using the cassette control circuit 6 to control the motor for detecting the sheet width, and taking in and checking the detection result obtained thereby.
[0005]
The slave CPU 2 notifies the master CPU 1 of this check result as the current cassette information for the cassette stage 7-1. The master CPU 1 compares the current cassette information for the cassette stage 7-1 with the previous cassette information in the memory 4 and updates the cassette information in the memory 4 if a state change has occurred (YES in step 503). After that (step 504), the process returns to step 501. If no state change has occurred (NO in step 503), the process returns to step 501 without updating the cassette information.
[0006]
In step 501, the master CPU 1 gives a cassette information acquisition command for the next cassette stage 7-2 to the slave CPU 2. Thus, the slave CPU 2 uses the cassette control circuit 6 to acquire the cassette information (check information) for the cassette stage 7-2 and notifies the master CPU 1 of the information.
The master CPU 1 compares the current cassette information for the cassette stage 7-2 with the previous cassette information in the memory 4 and updates the cassette information in the memory 4 if a state change has occurred (YES in step 503). After that (step 504), the process returns to step 501. If no state change has occurred (NO in step 503), the process returns to step 501 without updating the cassette information.
[0007]
By this repetition, while using only the cassette control circuit 6 in a time-division manner, the presence / absence of the cassette 8 in the cassette stage 7, the presence / absence of paper set in the cassette 8, the type of paper, and the width of paper are checked. Then, cassette information for the cassette stages 7-1 to 7-n is created in real time in the memory 4 of the master CPU 1 (see FIG. 2A).
[0008]
On the other hand, the slave CPU 2 temporarily stops monitoring the cassette information for the cassette stages 7-1 to 7-n in response to the sheet feeding instruction specifying the sheet, and creates the memory 4 of the master CPU 1 created at this time. With reference to the cassette information in the cassette stage, the cassette stage 7 in which the designated sheet is set is selected, and the sheet is fed from the cassette 8 in the cassette stage 7.
[0009]
For example, when receiving a paper feed instruction specifying "A4" as the paper, the monitoring of the cassette information for the cassette stages 7-1 to 7-n is temporarily suspended, and the memory of the master CPU 1 created at this time is created. With reference to the cassette information in FIG. 4 (FIG. 2 (a)), the cassette stage 7-1 is selected as the cassette stage in which the designated "A4" paper is set, and the cassette stage 7-1 of this cassette stage 7-1 is selected. The paper feeding from 8-1 is executed using the cassette control circuit 6.
[0010]
Further, when a paper feed instruction is received by designating “B5” as the paper type, the monitoring of the cassette information for the cassette stages 7-1 to 7-n is temporarily suspended, and the master CPU 1 created at this time is Referring to the cassette information (FIG. 2A) in the memory 4, the cassette stage 7-2 is selected as the cassette stage in which the designated "B5" paper is set, and the cassette stage 7-2 is selected. The paper supply from the cassette 8-2 is executed by using the cassette control circuit 6.
[0011]
In this monitoring device, by using only the cassette control circuit 6 in a time-division manner to acquire and feed the cassette information, the circuit scale and power consumption may increase even if the number of cassette stages 8 increases. Instead, circuit consolidation and low power consumption are realized.
[0012]
[Problems to be solved by the invention]
However, in this monitoring apparatus, since the acquisition and feeding of the cassette information are executed by using only the cassette control circuit 6 in a time-division manner, for example, the cassette control circuit 6 is used for the cassette stage 7-1. When the cassette information is being obtained or the sheet is being fed, the cassette information cannot be obtained for the other cassette stages 7-2 to 7-n. For this reason, even if cassette exchange is performed in any of the cassette stages 7-2 to 7-n, the cassette information created in the memory 4 of the master CPU 1 is not updated.
[0013]
For example, it is assumed that the cassette 8-2 in which the sheet of "B5" is set is replaced by the cassette 8-2 'in which the sheet of "A3" is set in the cassette stage 7-2. In this case, since the slave CPU 2 uses the cassette control circuit 6 to acquire the cassette information and feed the cassette stage 7-1, the slave CPU 2 can acquire the cassette information for the cassette stage 7-2. Can not. For this reason, even if the cassette 8-2 of the cassette stage 7-2 is replaced with 8-2 ', the cassette information (FIG. 2A) in the memory 4 of the master CPU 1 is not updated, and the cassette stage 7- The paper type in the cassette information for No. 2 remains "B5".
[0014]
Here, upon receiving a paper feed instruction specifying "B5", the slave CPU 2 refers to the cassette information (FIG. 2A) in the memory 4 at this time and sets the paper of "B5". The cassette stage 7-2 is selected as the cassette stage that has been set, and the feeding of the cassette stage 7-2 from the cassette 8-2 'is performed using the cassette control circuit 6. In this case, since the sheet of “A3” is set in the cassette stage 8-2 ′ instead of “B5”, the sheet of “A3” is erroneously recognized as the sheet of “B5” and the sheet is fed. You. In this case, since the conveyance path and the like are controlled for the “B5” sheet, a problem such as occurrence of a jam occurs.
[0015]
The present invention has been made to solve such a problem, and an object of the present invention is to obtain cassette information and supply media using a single cassette control circuit, and to provide a cassette control circuit. An object of the present invention is to provide a cassette information monitoring device which does not cause a problem such as a jam even if a cassette is exchanged while acquiring cassette information or supplying a medium using the same.
[0016]
[Means for Solving the Problems]
In order to achieve such an object, the present invention monitors cassette information of the first to n-th (n ≧ 2) cassette stages in cooperation with a master device (master CPU) and a slave device (slave CPU). In the cassette information monitoring device, a slave for checking the presence / absence of a cassette set in the first to n-th cassette stages and a medium set in the cassette by using a single cassette control circuit in a time-division manner. A check means provided in the apparatus, a cassette information creating means provided in a master apparatus for acquiring check information from the check means and creating cassette information for the first to nth cassette stages, In accordance with the above instructions, referring to the cassette information for the first to nth cassette stages created at this time, A medium supply means provided in a slave device for executing a medium supply from a cassette of a set cassette stage in a time-division manner using a cassette control circuit; The presence / absence of the cassette is monitored, and for the cassette stage that has changed from "with cassette" to "without cassette", the cassette information is updated to information that a cassette is not set, and from "without cassette" to "with cassette". The changed cassette stage is provided with a cassette presence / absence monitoring means provided in the master device for prompting a check using a cassette control circuit by the checking means.
[0017]
According to the present invention, in the master device, the presence / absence of cassettes set in the first to nth cassette stages is monitored, and for a cassette stage changed from “with cassette” to “without cassette”, the cassette The information is updated to information that the cassette is not set. Regarding the cassette stage changed from “no cassette” to “with cassette”, the master device checks the presence / absence of cassette setting using the cassette control circuit and the medium (the presence / absence of medium, Type, medium width, etc.) is prompted, and the cassette control circuit can be used to compensate for the inability to detect cassette insertion / removal during medium supply and medium supply.
[0018]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, the present invention will be described in detail based on embodiments. FIG. 1 is a block diagram showing a main part of a cassette information monitoring device according to an embodiment of the present invention. This monitoring device is used, for example, in a printer. 4, the same reference numerals as those in FIG. 4 denote the same or equivalent components, and a description thereof will be omitted.
[0019]
In this embodiment, the master CPU 1 checks the detection output from the cassette presence / absence sensors set in the cassette stages 7-1 to 7-n by a timer interrupt of a fixed period without passing through the cassette control circuit 6. Like that. That is, the master CPU 1 monitors the presence or absence of the setting of the cassette 8 in the cassette stages 7-1 to 7-n at regular intervals.
[0020]
Further, in the master CPU 1, based on the monitoring information on the presence / absence of the setting of the cassettes 8 in the cassette stages 7-1 to 7-n, the memory of the cassette stage 7 which has changed from “with cassette” to “without cassette” is stored. 4 is updated to information indicating that no cassette is set (“no cassette”), and for the cassette stage 7 that has changed from “no cassette” to “with cassette”, the cassette control circuit 6 by the slave CPU 2 The system prompts the user to acquire the used cassette information.
[0021]
Also, at the time of initial startup at the time of power-on, the processing of the flowchart shown in FIG. 5 is performed by cooperation of the master CPU 1 and the slave CPU 2 to create cassette information in the memory 4 of the master CPU 1. That is, in the related art, the processing of the flowchart illustrated in FIG. 5 is repeatedly executed, but in the present embodiment, the processing of the flowchart illustrated in FIG. 5 is performed only at the time of initial startup when the power is turned on.
[0022]
Next, the operation of the cassette information monitoring device will be described.
(At power-on)
When the power is turned on, the master CPU 1 and the slave CPU 2 execute the processing of the flowchart shown in FIG. 5 in cooperation with each other to create cassette information in the memory 4 of the master CPU 1. That is, while the only cassette control circuit 6 is used in a time-division manner, the presence or absence of the cassette 8 in the cassette stage 7, the presence or absence of paper set in the cassette 8, the type of paper, and the width of paper are checked. Based on the check result, cassette information for the cassette stages 7-1 to 7-n is created in the memory 4 of the master CPU 1. (See FIG. 2 (a))
[0023]
[After power-on]
The master CPU 1 executes the monitoring processing shown in FIG. In this monitoring process, in step 301, the detection output from the cassette presence / absence sensors set in the cassette stages 7-1 to 7-n is checked, and cassette presence / absence information is obtained.
[0024]
Then, with reference to the cassette information in the memory 4, for the cassette stage “cassette present” in the cassette information, it is determined whether there is information “cassette absent” in the cassette presence information obtained from the cassette stage. Is checked (step 302). That is, it is checked whether there is a cassette stage that has changed from “with cassette” to “without cassette”, and if there is a cassette stage that has changed from “with cassette” to “without cassette”, in step 303, The cassette information in the memory 4 is set to "no cassette". In this case, the check time is shortened by checking only the cassette stage indicated as “cassette present” in the cassette information in the memory 4.
[0025]
In step 302, if there is no cassette stage that has changed from “with cassette” to “without cassette”, the cassette information in the memory 4 is referred to, and for the cassette stage with “no cassette” in the cassette information, the cassette It is checked whether or not there is information indicating "cassette present" in the cassette presence / absence information obtained from the stage (step 304). That is, it is checked whether there is a cassette stage that has changed from “no cassette” to “with cassette”, and if there is a cassette stage that has changed from “without cassette” to “with cassette”, the cassette information for that cassette stage is changed. A cassette information acquisition command is sent to the slave CPU 2 so as to acquire it (step 305). In this case , the check time is shortened by checking only the cassette stage in which the cassette information is “no cassette” in the cassette information in the memory 4.
[0026]
Receiving the cassette information acquisition command from the master CPU 1, the slave CPU 2 uses the cassette control circuit 6 for the cassette stage changed from "no cassette" to "with cassette" to acquire the cassette information in the cassette stage. Send to master CPU1. When the master CPU 1 acquires the cassette information from the slave CPU 2 (step 306), the master CPU 1 converts the cassette information into the cassette information in the memory 4 as the latest cassette information of the cassette stage changed from "no cassette" to "with cassette". Is updated (step 307).
[0027]
Here, for example, when the slave CPU 2 is executing the sheet feeding from the cassette 8-1 of the cassette stage 7-1 using the cassette control circuit 6, the cassette exchange is performed in the cassette stage 7-2. I do. For example, in the cassette stage 7-2, it is assumed that the cassette 8-2 in which the sheet of "B5" is set is replaced with the cassette 8-2 'in which the sheet of "A3" is set.
[0028]
[When the cassette 8-2 is removed]
The master CPU 1 checks the detection output from the cassette presence / absence sensors set in the cassette stages 7-1 to 7-n and acquires the cassette presence / absence information by a timer interrupt at a fixed period (step 301). Then, with reference to the cassette information (FIG. 2A) in the memory 4, for the cassette stage that is determined to have "cassette" in the cassette information, "cassette not available" is included in the cassette presence / absence information acquired from the cassette stage. Is checked (step 302).
[0029]
In this case, since the cassette 8-2 has been extracted, the cassette presence / absence information from the cassette stage 7-2 is acquired as "no cassette". As a result, the master CPU 1 recognizes that the cassette stage 7-2 has changed from “with cassette” to “without cassette”. The master CPU 1 sets the cassette information in the memory 4 of the cassette stage 7-2 changed from "with cassette" to "without cassette" to "without cassette" (step 303: see FIG. 2B).
[0030]
[When cassette 8-2 'is inserted]
The master CPU 1 checks the detection output from the cassette presence / absence sensors set in the cassette stages 7-1 to 7-n and acquires the cassette presence / absence information by a timer interrupt at a fixed period (step 301). Then, with reference to the cassette information (FIG. 2B) in the memory 4, for the cassette stage indicated as "cassette present" in the cassette information, "cassette not available" is included in the cassette presence / absence information acquired from the cassette stage. Is checked (step 302). In this case, since there is no cassette presence information of “no cassette”, the process proceeds to step 304 in response to NO in step 302.
[0031]
In step 304, the master CPU 1 refers to the cassette information (FIG. 2 (b)) created in the memory 4 and obtains from the cassette stage the cassette stage in which there is no cassette in the cassette information. It is checked whether or not the cassette presence / absence information includes the information “cassette present”.
In this case, since the cassette 8-2 'is inserted into the cassette stage 7-2, the cassette presence / absence information from the cassette stage 7-2 is set to "cassette present", and the cassette stage 7-2 is set to "no cassette". It is recognized that the cassette stage has changed to “with cassette”.
[0032]
As a result, the master CPU 1 sends a cassette information acquisition command to the slave CPU 2 so as to acquire cassette information for the cassette stage 7-2 (step 305). At this time, the slave CPU 2 temporarily suspends the sheet feeding from the cassette stage 7-1 using the cassette control circuit 6, and receives a cassette information acquisition command from the master CPU 1. The slave CPU 2 receives the cassette information acquisition command from the master CPU 1 and uses the cassette control circuit 6 for the cassette stage 7-2 changed from “no cassette” to “with cassette”. The cassette information is acquired and sent to the master CPU 1.
[0033]
Upon acquiring the cassette information from the slave CPU 2 (step 306), the master CPU 1 updates the cassette information in the memory 4 using this cassette information as the latest cassette information of the cassette stage 7-2 (step 307: FIG. 2). (C)).
[0034]
[When a paper feed instruction is issued by designating "B5" instead of "A3" when cassette 8-2 is removed]
When the slave CPU 2 receives the sheet feeding instruction by designating “B5” instead of “A4”, it stops the sheet feeding from the cassette 8-1 of the cassette stage 7-1. Then, referring to the cassette information (FIG. 2B) in the memory 4 of the master CPU 1, it is determined from which cassette stage the sheet is to be fed. In this case, the sheet type is “B5” in the cassette information of the cassette stage 7-2, but is “no cassette”, so that the slave CPU 2 does not feed paper from the cassette stage 7-2.
[0035]
[When a paper feed instruction is issued by designating "B5" instead of "A4" after cassette 8-2 'is inserted]
When the slave CPU 2 receives the sheet feeding instruction by designating “B5” instead of “A4”, it stops the sheet feeding from the cassette 8-1 of the cassette stage 7-1. After the interruption of the sheet feeding from the cassette 8-1 in the cassette stage 7-1, the slave CPU 2 designates "B5" with reference to the cassette information (FIG. 2C) in the memory 4 on the master CPU 1 side. It is determined from which cassette stage paper feeding is to be performed in response to all the paper feeding instructions. In this case, the cassette information for the cassette stage 7-2 indicates that "the cassette is present", but the paper type is not "B5" but "A3". Therefore, the slave CPU 2 does not execute the sheet feeding from the cassette 8-2 'set in the cassette stage 7-2, so that the conventional jam does not occur.
[0036]
When the slave CPU 2 obtains the cassette information in the cassette stage 7-2 using the cassette control circuit 6, for example, when the cassette is exchanged in the cassette stage 7-n, the same operation as described above is performed. As a result, the cassette information in the memory 4 is updated to the latest cassette information, and the sheet feeding from the cassette stage 7-n is not executed in response to the sheet feeding instruction specifying "B4", so that a jam or the like occurs. Does not occur.
[0037]
Further, in the above description, the sheet feeding instruction is given to the slave CPU 2, but it is actually given as a printing instruction. Therefore, when the slave CPU 2 is executing the sheet feeding using the cassette control circuit 6, the conveyance path control such as suction / discharge and the printing operation are also performed in parallel with this, and the insertion and removal of the cassette during this time is performed. The master CPU 1 monitors. The master CPU 1 compensates for the inability of the slave CPU 2 to detect cassette insertion / removal via the cassette control circuit 6 and prevents jamming due to cassette exchange during this time. Further, since the master CPU 1 monitors cassette insertion / removal by a timer interrupt, it is possible to detect cassette insertion / removal while the master CPU 1 is performing FD operation or the like.
[0038]
【The invention's effect】
As is apparent from the above description, according to the present invention, the presence / absence of the cassette set in the first to nth cassette stages is monitored in the master device, and the "cassette present" is changed to "no cassette" in the master device. For the changed cassette stage, the cassette information is updated to information that no cassette is set, and for the cassette stage that has changed from "no cassette" to "with cassette", the master device sends the cassette device to the slave device. The user is prompted to check the presence / absence of a cassette using the cassette control circuit and the medium (such as the presence / absence of the medium, the type of the medium, and the width of the medium). This makes it possible to compensate for the inability to detect cassette insertion / removal when performing It is possible to stop.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a main part of a cassette information monitoring device according to an embodiment of the present invention.
FIG. 2 is a diagram exemplifying cassette information created in a memory on a master CPU side in the cassette information monitoring device.
FIG. 3 is a flowchart showing a monitoring process executed by a master CPU in the cassette information monitoring device.
FIG. 4 is a block diagram showing a main part of a conventional cassette information monitoring device.
FIG. 5 is a flowchart showing a cassette information updating process in cooperation with a master CPU and a slave CPU in the cassette information monitoring device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Master CPU, 2 ... Slave CPU, 3 ... Common memory, 4, 5 ... Memory, 6 ... Cassette control circuit, 7 (7-1 to 7-n) ... Cassette stage, 8 (8-1 to 8-n) )…cassette.

Claims (1)

In a cassette information monitoring device for monitoring cassette information of first to n-th (n ≧ 2) cassette stages in cooperation with a master device and a slave device,
Provided in the slave device to check by using a time division the first to n existence and only the cassette control circuit medium set in the cassette for cassette stage set of cassette into the cassette stage and check means was,
Cassette information creation means provided in the master device for acquiring check information from the check means and creating cassette information for the first to nth cassette stages;
In accordance with the instruction for designating the medium, referring to the cassette information for the first to nth cassette stages created at this time, the medium supply from the cassette of the cassette stage in which the designated medium is set is performed. Medium supply means provided in the slave device that executes using the cassette control circuit in a time-division manner,
The presence / absence of the cassette set in the first to nth cassette stages is monitored, and for the cassette stage that has changed from “with cassette” to “without cassette”, the cassette information indicating that the cassette is not set is displayed. For the cassette stage which has been updated to the information and changed from "no cassette" to "cassette present", a cassette presence / absence monitoring means provided in the master device for urging a check using the cassette control circuit by the checking means is provided. A cassette information monitoring device comprising:

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