JP3518138B2 - Voltage detection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [0001] The present invention relates to a voltage detection circuit.
In particular, it detects the power supply voltage and generates a system reset signal.
The invention relates to a voltage detection circuit to be formed. [0002] 2. Description of the Related Art A microcomputer or the like has a power supply voltage at a predetermined level.
It is designed to operate when the above
Below the predetermined level, malfunction occurs. Because of this, the power supply
When the voltage is below the specified level, reset is applied and malfunction occurs.
Not configured. For this reason, the power supply voltage is monitored and the power supply voltage is monitored.
Generates a system reset signal and supplies it to the microcomputer
A voltage detection circuit is provided. Fig. 5 shows a conventional example
FIG. The conventional voltage detection circuit 1 includes a power supply
Pressure V_CCDetection voltage generation circuit 2 for generating a detection voltage from
The system is controlled according to the detection voltage generated by the detection voltage generation circuit 2.
Consisting of a differential amplifier circuit 3 for generating a system reset signal
Is done. The detection voltage generating circuit 2 is connected to a diode.
PNP transistor Q1 and voltage detection and generation resistor R
1, R2, R3, NPN transistor Q2, resistor R4
R5 and a constant current source 4 connected in series.
Voltage V_CCPower supply terminal T to which_VCCAnd ground terminal T_GND
Connected between [0005] The detection voltage generation circuit 2 supplies the power supply voltage V_CCAccording to
Offset voltage ΔV_BEAt both ends of the resistor R2.
Offset voltage ΔV generated in detection voltage generation circuit 2_BE
Is supplied to the differential amplifier circuit 3. The differential amplifier circuit 3
Constant current source 5, differential input PNP transistors Q3, Q
4. NPN transistor constituting a current mirror circuit
Q6 and Q7 and resistors R6 and R7. [0006] The detection voltage generation circuit 2 generates a voltage at both ends of the resistor R2.
Generated offset voltage ΔV_BEIs the PNP transformer for differential input
It is supplied to the bases of the transistors Q3 and Q4. P for differential input
The NP transistors Q3 and Q4 have an offset voltage ΔV_BETo
The collector current is controlled accordingly, and the NPN transistor Q
5, Q6. Here, the detection voltage V_SIs     V_S= {(R4 / R5) +2} × V_BE                   + {(R1 + R2 + R3) / R2} × ΔV_BE... (1) Usually I_C3= I_C5Sometimes switches,     ΔV_BE= V_BE4-V_BE3           = ｛(KT / q) ln (I_C4/ I_S)｝                   − ｛(KT / q) ln (I_C3/ NI_S)｝                   = (KT / q) ln ｛n × (I_C4/ I_C3)｝ ・ ・ ・ (2) (K: Boltzmann constant, T: absolute temperature, q: unit of electron
Charge, I_SSaturation current, I_C3; This is the transistor Q3
Current, I_C4A collector current of the transistor Q4;
n: Emi of transistor Q3 with respect to transistor Q4
Area ratio) Here, the curr constituted by the transistors Q5 and Q6
About the mirror circuit I_C4= I_C6+ I_B6+ I_B5 Where I_B6= I_B5, I_C6= H_FE× I_B6So I_C4= ｛1+ (2 / h_FE)｝ × I_C6 It becomes. At the time of switching,     I_C3= I_C5= I_C6Than     I_C3= I_C4/ ｛1+ (2 / h_FE)｝ ・ ・ ・ (3) Here, in Expression (3), h_FEIf is large enough, I_C3≒ I_C4 And the expression (2) (I_C4/ I_C3) = 1 And this term can be ignored. In the equation (3), h_FEBecomes smaller, I_C3≠ I_C4 And (I) in equation (2)_C4/ I_C3) Is the detection voltage V
_SWill appear. That is, the detection voltage V of the equation (1)_S
Is the current amplification factor h of the transistor Q6._FEHave dependencies
become. [0010] However, the conventional voltage
In the detection circuit, the transformer
The current amplification factor h of the transistor Q6_FEIs extremely small
Voltage V_SIs the current amplification factor h _FEFluctuated under the influence of
There is a problem that accurate voltage detection cannot be performed. The present invention has been made in view of the above points.
Therefore, the detection voltage V is always accurate regardless of the variation in the manufacturing process.
_STo provide a voltage detection circuit that can monitor voltage
Aim. [0012] SUMMARY OF THE INVENTION The present invention provides an offset power supply.
A first transistor having one of its voltages supplied to a base;
The other of the offset voltages supplied to the base
And a collector to the collector of the first transistor
Is connected and the emitter isConnected to ground potential through a resistor
WasThe third transistor and the second transistor
And the base of the third transistorCollector and
And baseIs connected and the emitter isBase potential through resistance
Connected toA voltage detection circuit having a fourth transistor
A first transistor and a second transistor
The collector is connected to the emitter of the
The emitter is connected to the base of the
Transistor whose base is connected to the collector of the fifth transistor
And the base of the third transistor and the fifth transistor
And the base of the fourth transistor
And the base potential of the fourth transistor is
Characterized by having a resistance to decrease. [0013]The present inventionAccording to the second transistor,
The base of the third and fourth transistors depends on the collector current.
By providing a fifth transistor for controlling the current,
From the second transistor to the third and fourth transistors.
The current supplied as the base current of the
1 / (hFE + 1) according to the current amplification factor hFE of the
Makes it less susceptible to the current amplification factor hFE.
Therefore, the power of the transistor due to the semiconductor manufacturing process
The detection voltage fluctuation due to the fluctuation of the current amplification factor hFE
Becomes possible. [0014]According to the present invention,Connect the resistance to the fourth tiger
The fourth transistor is connected to the base of the transistor.
The base current of the transistor is the base current of the third transistor.
The fourth transistor
Can be corrected for the base current of
The dependency of the current amplification factor hFE can be reduced,
The voltage level can be reduced. [0015] FIG. 1 shows a circuit according to a first embodiment of the present invention.
FIG. This embodiment corresponds to the first embodiment.
You. The voltage detection circuit 11 of the present invention includes a detection voltage generation circuit 1
2 and a differential amplifier circuit 13. The detection voltage generation circuit 12 includes a PNP transistor
A resistor Q11, resistors R11 to R13, and a constant voltage source 15.
Is done. PNP transistor Q11 is connected to base and collector
Are connected to each other, forming a so-called diode.
ing. Diode-connected PNP transistor Q1
1 is the anode for the emitter and the cathode for the collector and base
It is said. A PNP transistor Q11 serving as an anode
Is the power supply voltage V_CCPower supply terminal T to which_VCC
And a PNP transistor Q11 serving as a cathode
Is connected to one end of the resistor R11.
The other end of the resistor R11 is connected to one end of the resistor R12.
The connection point between the anti-R11 and the resistor R12 has an offset voltage ΔV
_BESupplied to the differential amplifier circuit 13 as a high level voltage of
It is. The other end of the resistor R12 is connected to one end of the resistor R13.
The connection point between the resistors R12 and R13 is offset
Pressure ΔV_BETo the differential amplifier circuit 13 as the low level side voltage of
Supplied. The other end of the resistor R13 is connected to one end of the resistor R14.
And the collector of the NPN transistor Q12.
The other end of the resistor R14 is connected to one end of the resistor R15 and the NPN transformer.
It is connected to the base of the transistor Q12. Of the resistor R15
The other end and the emitter of the NPN transistor Q12 are grounded.
Child T_GNDConnected to. Resistors R14, R15 and NPN
A constant voltage source 15 is constituted by the transistor Q12,
Voltage V_CCCurrent from the resistors R11, R12, R1
Supply 3 Power supply voltage V_CCOccurs in the resistor R12
Voltage level changes, and the differential amplifier circuit 13 detects this.
Put out. The differential amplifier circuit 13 is a constant current source 14.
PNP transistor corresponding to the first transistor inside
Q13, PN corresponding to the second transistor in the claims
P-transistor Q14, third transistor in claim
The NPN transistor Q15 corresponding to
NPN transistor Q16 corresponding to the transistor of
NPN transistor corresponding to the fifth transistor in claims.
It comprises a resistor Q17 and resistors R16 and R17. The PNP transistor Q13 is a PNP transistor.
Designed to have N times the current amplification factor of transistor Q14
Have been. Thereby, a large current can be obtained. Constant current
The source 14 is a power terminal T_VCCAnd the power supply voltage V
_CCTo generate a constant current. The constant generated by the constant current source 14
The current flows through the PNP transistor Q13 and the PNP transistor.
It is supplied to the emitter of the star Q14. The base of the PNP transistor Q13 is detected.
The voltage generating circuit 12 is constituted, and the offset voltage ΔV_BEHigh
The connection between the resistor R11 and the resistor R12 where the level side voltage is generated
Connected to the connection point and the emitter is an NPN transistor Q15
Connected to the collector. PNP transistor Q14
The base forms the detection voltage generation circuit 12, and the offset voltage
Pressure ΔV_BER12 and the resistor which generate the low level side voltage of
R13 is connected to the connection point with
The collector of the transistor Q16 and the NPN transistor Q17
Connected to the base. NPN transistor Q15 and NPN transistor
The base of the transistor Q16 is connected to each other.
N transistor Q15 and NPN transistor Q16
The base is connected to the emitter of NPN transistor Q17.
Have been. The collector of the NPN transistor Q17
Is supplied with a constant current from a constant current source 14. As described above, the NPN transistor Q15 and the
The base current of the NPN transistor Q16 is
Is controlled via the transistor Q17 and the PNP
Collector current I of transistor Q14_C14NPN tiger
Base of transistor Q15 and NPN transistor Q16
The supply to the current can be reduced. That is, the current is supplied by the transistor Q17.
Because it is amplified, the collector of the PNP transistor Q14
Current I_C14From the NPN transistor Q15 and the NPN transistor
The base current (I_B15+ I_B16) (I_B15+ I_B16) / (H_FE+1) It becomes. Therefore, the current amplification factor h_FEDetected power due to drop
Pressure fluctuations can be reduced. Therefore, this embodiment
According to the current amplification factor h_FERegardless of the detection voltage V_SWhere
Can be set exactly to a certain level. According to this embodiment, the inspection
Output voltage V_SIs the current amplification factor h_FERegardless of
Since it can be constant, an accurate detection voltage V_SReset with
Can be applied. FIG. 2 is a circuit diagram of a second embodiment of the present invention.
Show. In the figure, the same components as those in FIG.
The description is omitted. This embodiment is an embodiment of claim 2.
Is equivalent to The voltage detection circuit 21 of the present embodiment is
The base of the transistor Q15 and the NPN transistor Q17
Of the NPN transistor Q16
A resistor R18 is provided between the base and the base. Resistance 18
The resistance of the NPN transistor Q16
Source current. According to this embodiment, NP is set by the resistor R18.
The base current of the N transistor Q16 is suppressed,
Transistor Q16 can have an offset
Therefore, by setting the resistor R18 to an appropriate value,
Collector current I of NPN transistor Q16_C16Decrease
Thus, the correction for the base current can be performed. Thus, the current amplification factor h_FEFurther influence of
Can be reduced. FIG. 3 shows a third embodiment of the present invention.
FIG. In the figure, the same components as those in FIG. 1 are the same.
The reference numerals are used, and the description is omitted. This embodiment is the first embodiment.
Corresponds to the embodiment of the present invention. The voltage detection circuit 31 according to the present embodiment uses the voltage of FIG.
Transistor pole of differential amplifier circuit 13 of detection circuit 11
It is the reverse of the nature. Differential amplifier circuit of the present embodiment
32 is a constant current source 33, the first transistor in claim
, An NPN transistor Q33 corresponding to
NPN transistor Q34 corresponding to the transistor of
A PNP transistor corresponding to the third transistor in the claims.
The transistor Q35 corresponds to a fourth transistor in the claims.
PNP transistor Q36, a fifth transistor in claim
PNP transistor Q37 corresponding to a resistor, resistor R3
6, R37. The constant current source 33 has a ground terminal T_GNDConnected with
And the power supply voltage V_CCDraws constant current from Constant current source
NPN transistor by constant current drawn by 33
To the emitters of the transistor Q33 and the NPN transistor Q34.
A stream is provided. The base of the NPN transistor Q33 is
The detection voltage generation circuit 12 is constituted, and the offset voltage ΔV_BE
Resistors R11 and R12 that generate a high-level side voltage of
And the emitter is a PNP transistor Q
Connected to 35 collectors. The base of the NPN transistor Q34 is detected.
The voltage generating circuit 12 is constituted, and the offset voltage ΔV_BELow
The connection between the resistor R12 and the resistor R13 where the level side voltage is generated
Connected to the connection point, and the emitter is a PNP transistor Q36.
And the base of the PNP transistor Q37.
Continued. The PNP transistor Q35 and the PNP transistor
The transistor Q36 has a base connected to each other,
Of the P transistor Q35 and the PNP transistor Q36
The base is connected to the emitter of PNP transistor Q37.
Have been. The collector of the PNP transistor Q37
A constant current is drawn from the constant current source 33. As described above, the PNP transistor Q35 and the
And the base current of the PNP transistor Q36 is
Is controlled via the transistor Q37.
Collector current I of transistor Q34_C34PNP tiger
Base of transistor Q35 and PNP transistor Q36
The supply to the current can be reduced. For this reason,
According to the present embodiment, similarly to the first embodiment, the current amplification factor h_FE
Regardless of the detection voltage V_SCan be precisely set to a given level
Wear. FIG. 4 is a circuit diagram of a fourth embodiment of the present invention.
Show. In the figure, the same components as those in FIG.
The description is omitted. This embodiment is an embodiment of claim 2.
Is equivalent to The voltage detection circuit 41 of this embodiment is a PNP transistor.
Base of transistor Q35 and PNP transistor Q37
Of the PNP transistor Q36
A resistor R48 is provided between the base and the base. Resistance 48
The resistance of the PNP transistor Q36
Source current. According to the present embodiment, similar to the second embodiment, a resistor is provided.
Base current of PNP transistor Q36 due to anti-R48
Is suppressed, and an offset is added to the PNP transistor Q36.
Resistor R48 to an appropriate value.
Setting, the collector of the PNP transistor Q36
Current I_C36And corrects the base current.
You. Thus, the current amplification factor h_FEFurther influence of
Can be reduced. [0037] As described above, the present inventionClearlyAccording to the second
The third and fourth transistors depend on the collector current of the transistor.
A fifth transistor for controlling the base current of the transistor is provided.
The third and fourth transistors from the second transistor.
The current supplied as the base current of the transistor
1 / (hFE +
1) to reduce the effect of the current amplification factor hFE.
Hardly to detect and stabilize the detection voltage
Features such as [0038]In addition, the present inventionAccording to the above, the resistance is changed to the fourth transformer.
The fourth transistor is connected to the base of the transistor.
The base current of the transistor is the base current of the third transistor.
The fourth transistor
Can be corrected for the base current of
The dependency of the current amplification factor hFE can be reduced,
It has features such as being able to keep the voltage level constant.

[Brief description of the drawings] FIG. 1 is a circuit configuration diagram of a first embodiment of the present invention. FIG. 2 is a circuit configuration diagram of a second embodiment of the present invention. FIG. 3 is a circuit configuration diagram of a third embodiment of the present invention. FIG. 4 is a circuit diagram of a fourth embodiment of the present invention. FIG. 5 is a circuit configuration diagram of a conventional example. [Explanation of symbols] 11, 21, 31, 41 Voltage detection circuit 12 Detection voltage generation circuit 13, 22, 32, 42 differential amplifier circuit 14, 33 constant current source Q13, Q14 PNP transistor Q15, Q16, Q17 NPN transistor R18 resistance

──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-48-100046 (JP, A) JP-A-5-175792 (JP, A) JP-A-50-117348 (JP, A) JP-A 57-107 11525 (JP, A) JP-A-56-87919 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G01R 19/165 H03K 5/08 H02H 3/06 H02H 3/24

Claims (1)

(57) [Claim 1] A first transistor whose one of the offset voltages is supplied to a base, a second transistor whose other of the offset voltages is supplied to a base, and the first transistor A third transistor having a collector connected to the collector of the third transistor and an emitter connected to the base potential via a resistor, and a collector and a base connected to the collector of the second transistor and the base of the third transistor, respectively. And a fourth emitter whose emitter is connected to the ground potential via a resistor .
Wherein the collector is connected to the emitters of the first transistor and the second transistor, the emitter is connected to the base of the third transistor, and the collector of the fourth transistor is connected to the collector of the fourth transistor. A fifth transistor having a base connected thereto; a connection point between a base of the third transistor and an emitter of the fifth transistor; and a base connected to the fourth transistor; And a resistor for lowering a base potential of the transistor.