JP3487581B2 - Power supply circuit and display device and electronic equipment using the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention aims at improving voltage conversion efficiency and reducing power consumption, and at the same time, a charge pump type power supply circuit capable of arbitrarily setting an output voltage, and a display using the same. The present invention relates to devices and electronic devices.

[0002]

2. Description of the Related Art In recent years, office automation equipment such as word processors and personal computers
2. Description of the Related Art Liquid crystal display devices are widely used as display devices for devices, AV devices that handle images, and information display devices for personal digital assistants. This is because the liquid crystal display device has features such as thinness, light weight, and low power consumption as compared with other display devices.

In particular, further reduction in power consumption is required for display devices mounted on electronic equipment which supplies electric power by batteries such as portable information terminals and mobile phones. In these electronic devices, most of the power consumption in the standby state in which the CPU is stopped and only information display is performed is due to the display device.
That is, this determines the usage time of the electronic device.

Most of these electronic devices use a battery as a power supply source, and a voltage of about +3 V, for example, is applied as a power source for a display device. Here, taking a liquid crystal display device as an example, a voltage of about +20 V is required to drive the liquid crystal display device, and therefore it is necessary to boost the voltage from +3 V to +20 V by the internal power supply circuit of the liquid crystal display device. As the power supply circuit, conventionally, a booster circuit using a transformer or a charge pump type booster circuit using a capacitor is used.

However, when a booster circuit using a transformer is used, only a maximum conversion efficiency of about 60% can be obtained, and particularly in a liquid crystal display device for a portable information terminal, etc., where conversion efficiency is low under a low current load. Since it is used, there is a problem that the applicable range is limited.

For this reason, a charge pump type booster circuit which has a high voltage conversion efficiency with a small load current has recently attracted attention. For example, WO96 / 21880 discloses a power supply circuit of a liquid crystal display device adopting a charge pump system (conventional example 1).

Generally, in a charge pump type booster circuit, the output voltage is fixed to an integral multiple of the input voltage because the boosting is performed by the method of accumulating the charges charged in the capacitor. Therefore, for example, when the voltage after boosting is made variable in order to adjust the display contrast of the liquid crystal display device, a method of adjusting the voltage with a variable resistor using a regulator or the like is adopted.

Here, a conventional power supply circuit adopting the charge pump system will be specifically described with reference to FIG.

In this power supply circuit 81, as shown in FIG. 8, a charge pump type booster 82 receives a boosting clock signal CLK8 from a boosting clock signal input terminal 85 and an input voltage from an external power supply terminal 84. Vin
Is input, and the boosted voltage Vsh is output. This booster 8
The boosted voltage Vsh from 2 is input, the control voltage Vcon is input from the control voltage terminal 86, and the desired output voltage Vout stepped down by the voltage control unit 83 is output.

More specifically, the voltage controller 83 can have the circuit configuration shown in FIG. 9, for example, and the control voltage Vcon
Is input to the control voltage terminal 86 and the boost voltage Vsh from the booster 82 is input to the boost voltage terminal 88 by resistors R91 and R92. It is output as the output voltage Vout using the voltage follower by OP (conventional example 2).

[0011]

However, in the case of the method of the above-mentioned conventional example 2, since the potential once boosted by the charge pump type booster circuit is used after being stepped down, it is necessary to raise the voltage more than the required voltage. Therefore, power loss will occur. Specifically, in the case of the circuit configuration shown in FIG. 9, the boost voltage terminal 88 to the control voltage terminal 86.
Electric power due to i _sh flowing toward {(Vsh-Vco
n) × i _sh }, the power for reducing Vsh to the output voltage Vout {(Vsh−Vout) × i _out }, and the self-power consumption (Vsh × i _op ) of the operational amplifier as the loss of the power supply circuit. It will occur extra.

Generally, elements such as a field effect transistor are used for switching a capacitor in a charge pump type booster circuit, but most of power loss is caused by a through current at the time of switching of the field effect transistor. ing.

When a charge pump type booster circuit is used as a power supply, it is necessary to consider so that the output voltage drop falls within an allowable range even when the load is maximum. As a method in this case, there is a method of increasing the capacity of the capacitor used or increasing the frequency of the boosting switching clock signal.

However, when the method of increasing the capacity of the capacitor is used, it is difficult to secure a component mounting area in a portable information terminal or the like which requires low power consumption and size reduction, and it is difficult to increase the capacity of the capacitor. Is.

Further, in the case of using the method of increasing the frequency of the boosting switching clock signal, the loss during switching increases and the voltage conversion efficiency decreases. Furthermore, since the boosting operation of the charge pump is similarly performed not only under heavy load but also under light load close to no load, there is a problem that constant power loss occurs due to the boosting operation.

The present invention is to solve the problems of the prior art, and to improve the voltage conversion efficiency and reduce the power consumption, the charge pump system of the output voltage can be set arbitrarily. An object of the present invention is to provide a power supply circuit, and a display device and electronic equipment using the same.

[0017]

Means for Solving the Problems A power supply circuit of the present invention, input
A multi-stage booster circuit that boosts each applied voltage
Has an input voltage from the power source operation clock signal and the step-up clock signal is input, the animal action clock signal
Each booster circuit except the booster circuit at the final stage is based on the input voltage
Is output to the booster circuit of the next stage and the final
Input to the step-up booster circuit based on the boosting clock signal
A boosting unit that boosts and outputs a voltage, a comparing unit that compares the output voltage of the final boosting circuit in the boosting unit with a control voltage input from the outside, and the operating clock.
The lock and the output of the comparison unit are input, and the comparison
Generated by the operation clock based on the output of the unit
Supply of the boosting clock to the boosting circuit at the final stage
And a step-up control unit for controlling the stop, which achieves the above object.

A voltage divider circuit for resistance-dividing the output voltage of the final stage booster circuit in the booster unit may be provided, and the comparator unit may compare the divided voltage generated by the voltage divider circuit with the control voltage. Good.

The control voltage is controlled by the comparison unit.
When it is detected that the divided voltage is exceeded, the boost control unit starts supplying a boosting clock signal to the boost unit, and the comparison unit controls the divided voltage by the boost voltage.
When it is detected that the voltage is exceeded, the boost control unit may stop supplying the boost clock signal to the boost unit.

By the comparison unit, the divided voltage
When it is detected that the control voltage is exceeded, the boost control unit starts supplying a boosting clock signal to the boost unit, and the comparison unit divides the control voltage.
When it is detected that the voltage is exceeded, the boost control unit may stop supplying the boost clock signal to the boost unit.

The display device of the present invention may use the power supply circuit.

Another display device of the present invention may use, as the operation clock signal, a shift clock signal of a scanning line of line-sequential driving or a clock signal generated by dividing the shift clock signal.

The electronic device of the present invention may use a power supply circuit.

The operation of the present invention will be described below.

According to the above configuration, the comparator compares the output voltage of the booster with the control voltage input from the outside, outputs the result as a signal, and the booster controller operates according to the operation clock signal, A boosting clock signal based on the output signal from the comparison unit is supplied to the boosting unit, and the boosting unit boosts the input voltage from the power supply to a predetermined output voltage based on the boosting clock signal. Therefore, the output voltage can be arbitrarily set by the control voltage while using the charge pump method. Further, since the boost control unit controls the operation of the boost unit based on the output signal from the comparison unit and does not boost more than necessary, it is possible to perform the optimum boost operation corresponding to the load characteristics. Therefore, it is possible to improve the voltage conversion efficiency of the entire power supply circuit and reduce the power consumption.

Further, when the voltage dividing circuit for resistance-dividing the output voltage of the boosting section is provided and the dividing voltage generated by this voltage dividing circuit and the control voltage are compared by the comparing section, the operation of the boosting section is low. It becomes possible to control by the control voltage, and it becomes possible to further reduce the power consumption in the power supply circuit.

Further, by using the above power supply circuit for the display device and the electronic equipment, the power consumption of the display device and the electronic equipment can be reduced, the battery life can be extended and the usable time can be extended. Become.

In addition, as the operation clock signal,
When the shift clock signal of the scanning line of line-sequential driving or the clock signal generated by dividing the frequency is used, there is no need to newly provide a clock signal generation circuit,
The power consumption can be reduced accordingly.

[0029]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be specifically described below with reference to the drawings.

(Embodiment 1) Power supply circuit 1 according to the present invention
Is, for example, for driving a liquid crystal display device, and as shown in FIG. 1, an input voltage Vin is input from an external power supply input terminal 11 and a boosting clock signal CL is input.
KA is input, and the input voltage Vin is set to the predetermined output voltage Vo.
and a voltage booster 2 for boosting to ut and an output voltage V of the voltage booster 2.
A voltage division circuit 5 that divides out by resistance, a division voltage Vm generated by the voltage division circuit 5, and a control voltage Vcon from the control voltage input terminal 13 are compared, and the result is output as an output signal Vc. And the output signal Vc and the operation clock signal CLK1 from the comparison unit 4.
Is input and the boosting control section 3 supplies the boosting clock signal CLKA to the boosting section 2.

Before describing the details of the power supply circuit 1, a boosting method by a charge pump type booster circuit will be described with reference to FIGS. 2 and 3.

FIG. 2A shows the switch section 20 used in the booster circuit in a simplified manner.
Thus, by switching the switch 21 to the H-side terminal or the L-side terminal, the high-voltage side potential V _H or the low-voltage side potential V _L is generated at the input / output terminal V _{I / O.} More specifically, the switch unit 20 can have the circuit configuration shown in FIG. 2B, for example, C1 and C2 are coupling capacitors, D1 and D2 are diodes, R1 and R2 are resistors, and Q1 and Q2 are electric fields. It is an effect transistor. In the switch section 20, when the signal input to the CLK2 terminal becomes "High", the field effect transistor Q1 is turned on, and the high-voltage side potential V _H is generated at the input / output terminal V _{I / O.} At this time, the field effect transistor Q2
Is OFF. On the other hand, when the signal input to the CLK2 terminal becomes "Low", the field effect transistor Q2 is turned on, and the low-voltage side potential V _L is generated at the input / output terminal V _{I / O.}
At this time, the field effect transistor Q1 is OFF.

FIG. 3 shows the configuration of the booster circuit 30 using the switch section 20. The input voltage Vin is input from the voltage input terminal 31 and the booster clock signal is input from the booster clock signal input terminal 32. The high-voltage side switch unit 34 and the low-voltage side switch unit 35 that receive the CLK3 and perform the switching operation, and the switch units 34, 35.
Has a boosting flying capacitor 36 and an output capacitor 37 that are switched by the switching operation of the input voltage Vin, and boosts the input voltage Vin using these capacitors 36 and 37 to output a predetermined output voltage Vou to the output terminal 33.
Output t.

More specifically, first, when the input voltage Vin is input to the voltage input terminal 31 and the "Low" CLK3 signal is input to the boosting clock signal input terminal 32, the high voltage side switch unit 34 and the low voltage side switch are input. The portion 35 is connected to the L-side terminal by the switching operation. Therefore, the input voltage Vin is applied to the boosting flying capacitor 36 and electric charges are stored. Next, when the CLK3 signal of “High” is input to the boosting clock signal input terminal 32, the high voltage side switch unit 34 and the low voltage side switch unit 35.
Is connected to the H-side terminal by the switching operation. At this time, the boosting flying capacitor 36 and the output capacitor 37 are electrically connected, and the charges charged in the boosting flying capacitor 36 in the previous operation are sent to the output capacitor 37. By repeating this operation, the boosting operation is performed, and the proper boosting clock signal CLK3
When the boosting operation is repeated at 2, a voltage that is twice the input voltage Vin is generated as the output voltage Vout at the output terminal 33.

Next, the specific configuration of the power supply circuit 1 of the present invention shown in FIG. 1 will be described in detail with reference to FIGS.

As shown in FIG. 4, the charge pump type step-up unit 2 combines the same three step-up circuits 41, 42 and 43 as the step-up circuit 30 of FIG.
It is designed so that the voltage can be boosted up to 8 times as much as in.
This is because the input voltage Vin is generally +3 in a mobile information terminal.
This is because the drive voltage of the liquid crystal display device used in the portable information terminal requires about +20 V, while the drive voltage is about V. The boost controller 3 is composed of an AND gate 61 as shown in FIG. 6, and the comparator 4 is composed of a comparator 51 as shown in FIG. The resistors Rc and Rs shown in FIG. 1 are dividing resistors for creating a reference voltage for driving a liquid crystal by using the output voltage from the booster 2. Here, the resistance ratio is Rc: Rs = 15: 1. did.

First, the operation of the booster 2 will be described. The boosting operation is similar to that of the boosting circuit 30 shown in FIG.
Specifically, as shown in FIG. 4, the first-stage booster circuit 41 is supplied with the input voltage Vin from the voltage input terminal 44 and the boosting clock signal CLKA from the boosting clock signal input terminal 45. The high voltage side switch unit S1
Charges are transferred from the boosting flying capacitor CF1 to the output capacitor CC1 by the switching operations of the _H and low voltage side switch units S1 _L. Here, when the boosting operation is repeated by the appropriate boosting clock signal CLKA, the voltage V _A of 2 × Vin is generated at the point A shown in FIG.

Next, in the second stage booster circuit 42, the booster clock signal CLK is input from the booster clock signal input terminal 45.
A is input, and the voltage generated at the point A is appropriately switched by the switching operation of the high voltage side switch unit S2 _H and the low voltage side switch unit S2 _L , so that the charge is transferred from the boosting flying capacitor CF2 to the output capacitor CC2. To be done. Here, an appropriate boosting clock signal CLKA
Therefore, when the boosting operation is repeated, the voltage V _B of 4 × Vin is generated at the point B shown in FIG.

Next, in the third stage booster circuit 43, the booster clock signal CLK is input from the booster clock signal input terminal 45.
A is input, and the voltage generated at the point B is appropriately switched by the switching operation of the high voltage side switch unit S3 _H and the low voltage side switch unit S3 _L , so that the charge is transferred from the boosting flying capacitor CF3 to the output capacitor CC3. To be done. Here, an appropriate boosting clock signal CLKA
Thus, when the boosting operation is repeated, a voltage of 8 × Vin is generated as the output voltage Vout at the voltage output terminal 46 shown in FIG. In this way, the output voltage V obtained by boosting the input voltage Vin eight times by the booster 2 shown in FIG.
out is obtained.

Next, the operation of the comparison section 4 will be described. The comparison unit 4 is composed of, for example, the circuit shown in FIG. 5A, and outputs the output voltage Vout boosted by the boosting unit 2 to the resistor R.
a division voltage Vm obtained by resistance division with c and Rs,
The control voltage Vcon is input, the comparator 51 compares the two, and the result is output as a signal Vc. As shown in the table of FIG. 5B, the operation of the comparator 51 is such that the output signal Vc is “High” when Vcon> Vm.
Therefore, when Vcon <Vm, the output signal Vc is "Lo.
In this case, the peripheral circuit is omitted, but actually, in order to suppress the fluctuation of the output Vc,
As indicated by Vw in FIG. 7D, the comparator 51 has some hysteresis.

Next, the operation of the boost controller 3 will be described. The boost control unit 3 is composed of an AND gate 61 as shown in FIG. 6, for example, and has an operation clock signal CLK1.
And the output signal Vc of the comparator 4 are ANDed to output the boosting clock signal CLKA. Although the AND gate is taken as an example here, depending on the polarity of the input signal,
Elements such as NAND, OR, NOR may be used.

Here, the operation of the entire power supply circuit 1 will be described in order from the time of power-on according to the operation of each section described above. First, it is assumed that the power supply circuit 1 shown in FIG. 1 is input with the input voltage Vin (for example, + 3V), the operation clock signal CLK1 (see FIG. 7A), and the control voltage Vcon (for example, + 1V). At this time, since the booster 2 is not operating, the output voltage Vout is 0V. Therefore, the division voltage Vm is also 0V
Is. Therefore, the comparison unit 4 compares the control voltage Vcon with the divided voltage Vm, and since Vcon> Vm, outputs the “High” signal as the output signal Vc. As a result, the operation clock signal CLK1 passes through the boost controller 3 and is input to the booster 2. As a result, the booster 2 starts boosting operation, and the output voltage Vout rises. Therefore, the division voltage Vm also rises. The division voltage Vm is the control voltage Vc
The rise is continued until it exceeds the on potential (for example, + 1V). Since the divided voltage Vm is 1/16 of the output voltage Vout, the output voltage Vout continues to increase until it exceeds + 16V.

Next, when Vcon <Vm, the output signal Vc of the comparison section 4 changes to a "Low" signal (FIG. 7).
(See (b)). Then, the operation clock signal CLK1 is cut by the boost control unit 3 and the operation of the boost unit 2 is stopped. As a result, the rise of the output voltage Vout is stopped, and the booster 2
The output voltage Vout gradually decreases due to the discharge characteristics of the capacitor CC3 and the load shown in FIG.
The output voltage Vout decreases until the divided voltage Vm falls below the value of the control voltage Vcon. By repeating these operations, the divided voltage Vm becomes the value of the control voltage Vcon and the width of the hysteresis ± (1 /
2) Operates to fit within Vw. This voltage V
w was set so as not to affect the liquid crystal display. Further, as shown in FIG. 7C, the boosting clock signal CLKA is stopped during the period indicated by the reference sign S and the reference sign T, and the boosting operation is not performed. Therefore, power loss due to switching does not occur.

Even when the value of the control voltage Vcon is changed, the divided voltage Vm becomes the control voltage Vcon in the same manner as above.
And the width of hysteresis ± (1/2) Vw. Therefore, the relationship of the following expression (1) is always established, and the output voltage Vout is about 16 times the control voltage Vcon.

Vcon = Vm = (1/16) Vout ... (1) That is, the output voltage Vout of the charge pump circuit can be made variable. Further, even when the load is increased due to a change in the display pattern of the liquid crystal, or conversely when the load is decreased, the relationship of the above formula (1) is maintained by the same operation, and the load at that time is maintained. Since the corresponding boosting operation is performed, the power loss is reduced.

Further, since the comparator 51 of the comparing section 4 has a self-consumption current of the order of several μA and the input voltage Vin of, for example, + 3V is used as the power source of the comparator, the power loss in this load circuit is the whole. It is 1% or less of power consumption.

(Second Embodiment) In the first embodiment, the booster clocks CLKA are used to simultaneously control the booster circuits in the respective stages. However, the present invention can be implemented by controlling a part of the booster circuit.

The power supply circuit 15 according to the second embodiment will be described below.
0 will be described with reference to FIG.

FIG. 10 shows the power supply circuit 1 according to the second embodiment.
It is a figure which shows the block of 50. The power supply circuit 150 includes a booster 106, a booster controller 107, and a comparator 108. In the second embodiment, the operation clock signal CL
The difference from the first embodiment is that K1 is input to the booster 106 as well as the booster controller 107.

FIG. 11 is a diagram showing details of the booster 106.

The booster 106 includes a first stage booster circuit 111.
A second stage booster circuit 112 and a third stage booster circuit 113.

In the boosting unit 2 of the first embodiment, the boosting clock signal CLKA is input to all the boosting stages, but in the boosting unit 106 of the second embodiment, the boosting clock signal CLKA is input to the third boosting circuit. It is inputted only to 113, and the operation clock signal CLK1 is inputted to the first stage booster circuit 111 and the second stage booster circuit 112.

FIG. 12 is a diagram showing the operation clock signal CLK1 and the boosting clock signal CLKA.

As shown in FIG. 12, the operating clock signal CLK1 is a signal that does not stop while the power supply circuit 150 is operating. Therefore, in the circuit configuration of the second embodiment, the first-stage booster circuit 111 and the second-stage booster circuit 112 are always operating, and the voltage of 2 × Vin appears at the point A shown in FIG. 4 × Vin appears at the point B shown.

Further, the boosting clock CLKA is input to the third stage booster circuit 113 as in the first embodiment, and the intermittent boosting operation is performed only by this third stage booster circuit.

With the circuits shown in FIGS. 10 and 11, the variable range of the output voltage Vout is "0V" in the first embodiment.
There is a demerit that it becomes narrower from "~ 24V" to "12V-24V", but since only the final boosting stage performs the intermittent operation, it is accompanied by the boosting operation as compared with the case where all the boosting stages perform the intermittent operation. There is an advantage that the generation of ripple voltage is suppressed (the output voltage is stable).

The driving voltage of the liquid crystal display element is usually 12
As long as it is V or more, the above disadvantage does not practically pose a problem.

By suppressing the generation of the ripple voltage due to the boosting operation, the ripple voltage of the Vm potential shown in FIG. 10 can also be suppressed. Therefore, in the first embodiment, the comparison section 4 has the hysteresis characteristic. It is possible to use a comparison section that does not have the hysteresis characteristic shown in.

As described above, FIG. 12 is a diagram showing operation waveforms of signals of the power supply circuit 150 of the second embodiment.

The difference from the first embodiment is that the timing of supplying or stopping the boosting clock CLKA is performed when the potentials of Vcon and Vm are inverted.

However, since the boosting operation is performed for a while immediately after Vcon <Vm due to the influence of the delay time t due to the comparator used as the comparing unit 108 and the switching element of the boosting unit 106, the potential of Vm is boosted. It rises until the clock CLKA stops, and then falls.

Similarly, since the boosting operation is not performed for a while immediately after Vcon> Vm, the boosting clock CL
It descends until KA is input and then rises.

With respect to these operations, in the first embodiment, the output voltage is more likely to generate a ripple voltage due to the boosting operation than in the present embodiment. This is because all boosting stages operate or stop at the same time. For this reason, it is desirable to limit the upper limit and the lower limit of the ripple voltage by the comparator having hysteresis. However, by intermittently operating only the final boosting stage as in the configuration of the present embodiment, it is possible to suppress the generation of ripple voltage due to the boosting operation that affects the output voltage, and the configuration of the comparison unit 108 has a hysteresis as shown in FIG. A stable output voltage can be obtained even if one without is used.

From the viewpoint of power consumption, the first embodiment
Then, while all the boost stages are operating intermittently,
In the present embodiment, only the third boosting stage performs the intermittent operation,
Since the other boosting stages are always operating, this embodiment seems to be disadvantageous in terms of power consumption. However, up to the second boosting stage, the boosted voltage is equal to or lower than the voltage required for liquid crystal display (driving the liquid crystal), and the second boosting stage is always operating, so The stop time of the intermittent operation of the boosting stage of the stage becomes long. Therefore, when viewed from the entire booster circuit, there is no significant difference in power consumption between the present embodiment and the first embodiment.

Here, for convenience, the potential difference between Vcon and Vm and the peripheral circuit operation have been described with reference to the configuration of the accompanying drawings. Therefore, the boosting operation starts when Vcon <Vm, and stops when Vcon> Vm. However, there is no problem even if the configurations are reversed depending on the logical configurations of the comparison unit and the boost control unit.

[0066]

As described above, according to the power supply circuit of the present invention, the comparing section compares the output voltage of the boosting section with the control voltage input from the outside, outputs the result as a signal, and boosts the voltage. The control unit operates according to the operation clock signal, supplies the boosting clock signal based on the output signal from the comparison unit to the boosting unit, and the boosting unit determines the input voltage from the power supply based on the boosting clock signal. Boost to the output voltage of.
Therefore, the output voltage can be arbitrarily set by the control voltage while using the charge pump method. Further, since the boost control unit controls the operation of the boost unit based on the output signal from the comparison unit and does not boost more than necessary, it is possible to perform the optimum boost operation corresponding to the load characteristics. Therefore,
It is possible to improve the voltage conversion efficiency of the entire power supply circuit and reduce the power consumption.

Further, when the voltage dividing circuit for resistance-dividing the output voltage of the boosting unit is provided and the dividing voltage generated by this voltage dividing circuit and the control voltage are compared by the comparing unit, the operation of the boosting unit is low. It can be controlled by the control voltage, and power consumption in the power supply circuit can be further reduced.

Further, by using the power supply circuit for the display device and the electronic equipment, the power consumption of the display device and the electronic equipment can be reduced, the battery life can be extended, and the usable time can be extended.

In addition, as the operation clock signal,
When the shift clock signal of the scanning line of line-sequential driving or the clock signal generated by dividing the frequency is used, there is no need to newly provide a clock signal generation circuit,
The power consumption can be reduced accordingly.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a power supply circuit of the present invention.

2A and 2B are diagrams showing a switch unit used in the power supply circuit of the present invention, in which FIG. 2A is a schematic diagram and FIG. 2B is a circuit diagram.

FIG. 3 is a diagram illustrating an example of a charge pump type booster circuit.

FIG. 4 is a diagram showing a circuit example of a boosting unit in the power supply circuit of the present invention.

5A and 5B are diagrams showing a comparison unit in the power supply circuit of the present invention, where FIG. 5A is a circuit diagram and FIG. 5B is a table showing operating states.

FIG. 6 is a diagram showing a circuit example of a boost controller in the power supply circuit of the present invention.

FIG. 7 is a time chart showing the operation of the power supply circuit of the present invention.

FIG. 8 is a block diagram showing a configuration of a conventional power supply circuit.

FIG. 9 is a diagram showing a circuit example of a voltage control unit in a conventional power supply circuit.

FIG. 10 is a diagram showing a block of a power supply circuit 150 according to the second embodiment.

11 is a diagram showing details of the booster 106. FIG.

FIG. 12 is a diagram showing operation waveforms of signals of the power supply circuit 150 according to the second embodiment.

[Explanation of symbols]

1 Power Supply Circuit 2 Boosting Section 3 Boosting Control Section 4 Comparing Section 5 Voltage Dividing Circuit 20 Switching Section 30 Boosting Circuit 34, S1 _H , S2 _H , S3 _H High Voltage Side Switching Section 35, S1 _L , S2 _L , S3 _L Low Voltage Side Switch Part 36, CF1, CF2, CF3 Flying capacitor 37, CC1, CC2, CC3 Output capacitor 41 First stage booster circuit 42 Second stage booster circuit 43 Third stage booster circuit 51 Comparator 61 AND gate circuit Vin Input voltage Vout Output voltage Vcon Control voltage Vm Divided voltage Vc Output signal CLK1 of comparison unit CLK1 Operation clock signals CLKA, CLK3 Boosting clock signal

─────────────────────────────────────────────────── ─── Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H02M 3/07 G02F 1/133 G09G 3/20 G09G 3/36

Claims (7)

(57) [Claims] 1. A device for boosting an input voltage, respectively.
It has a booster circuit with several stages, and the input voltage from the power supply and operating clock
Lock signal and the step-up clock signal is input, said operating
Based on the clock signal for
The voltage circuit boosts the input voltage and outputs it to the next stage booster circuit.
At the same time, the booster circuit at the final stage is
Comparing the output voltage of the booster unit that boosts and outputs the input voltage based on the signal, and the output voltage of the booster circuit at the final stage in the booster unit and the control voltage input from the outside. Section, the operation clock and the output of the comparison section are input.
The operation clock based on the output of the comparator.
Boosting of the final stage of the boosting clock generated by
A power supply circuit that includes a boost control unit that controls supply and stop to the circuit. 2. A configuration in which a voltage division circuit for resistively dividing an output voltage of a final stage booster circuit in the booster unit is provided, and the divided voltage generated by the voltage divider circuit and the control voltage are compared by the comparison unit. The power supply circuit according to claim 1. 3. The control unit controls the control voltage to
When it is detected that the divided voltage is exceeded, the boost control unit starts supplying the boost clock signal to the boost unit, and the comparison unit causes the divided voltage to exceed the control voltage.
If it is detected that the boosting control unit stops supplying the boosting clock signal to the boosting unit,
The power supply circuit according to claim 2. 4. The division voltage is controlled by the comparison unit to
When it is detected that the control voltage is exceeded, the boost control unit starts supplying the boost clock signal to the boost unit, and the comparison unit causes the control voltage to exceed the division voltage.
If it is detected that the boosting control unit stops supplying the boosting clock signal to the boosting unit,
The power supply circuit according to claim 2. 5. A display device using the power supply circuit according to claim 1. Description: 6. The power supply circuit according to claim 1, wherein a shift clock signal of a scanning line of line-sequential driving or a clock signal generated by dividing the shift clock signal is used as the operation clock signal. Display device using. 7. An electronic device using the power supply circuit according to claim 1. Description: