JP3402280B2 - Connection method - Google Patents
Connection methodInfo
- Publication number
- JP3402280B2 JP3402280B2 JP26631199A JP26631199A JP3402280B2 JP 3402280 B2 JP3402280 B2 JP 3402280B2 JP 26631199 A JP26631199 A JP 26631199A JP 26631199 A JP26631199 A JP 26631199A JP 3402280 B2 JP3402280 B2 JP 3402280B2
- Authority
- JP
- Japan
- Prior art keywords
- epoxy
- connecting material
- semiconductor chip
- connection
- curing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 17
- 239000004593 Epoxy Substances 0.000 claims description 49
- 239000000463 material Substances 0.000 claims description 49
- 239000004065 semiconductor Substances 0.000 claims description 42
- 238000012360 testing method Methods 0.000 claims description 30
- 239000003822 epoxy resin Substances 0.000 claims description 21
- 229920000647 polyepoxide Polymers 0.000 claims description 21
- 238000006243 chemical reaction Methods 0.000 claims description 19
- 239000002245 particle Substances 0.000 claims description 13
- 238000010438 heat treatment Methods 0.000 claims description 7
- 238000003825 pressing Methods 0.000 claims description 3
- 239000011256 inorganic filler Substances 0.000 claims description 2
- 229910003475 inorganic filler Inorganic materials 0.000 claims description 2
- 239000007788 liquid Substances 0.000 claims 1
- 239000000853 adhesive Substances 0.000 description 13
- 230000001070 adhesive effect Effects 0.000 description 13
- 230000000052 comparative effect Effects 0.000 description 7
- 230000002950 deficient Effects 0.000 description 6
- RAXXELZNTBOGNW-UHFFFAOYSA-N imidazole Natural products C1=CNC=N1 RAXXELZNTBOGNW-UHFFFAOYSA-N 0.000 description 6
- 238000011156 evaluation Methods 0.000 description 3
- 239000013034 phenoxy resin Substances 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- VTYYLEPIZMXCLO-UHFFFAOYSA-L Calcium carbonate Chemical compound [Ca+2].[O-]C([O-])=O VTYYLEPIZMXCLO-UHFFFAOYSA-L 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 229920006287 phenoxy resin Polymers 0.000 description 2
- 239000004848 polyfunctional curative Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- 238000005033 Fourier transform infrared spectroscopy Methods 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 239000006087 Silane Coupling Agent Substances 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- WNROFYMDJYEPJX-UHFFFAOYSA-K aluminium hydroxide Chemical compound [OH-].[OH-].[OH-].[Al+3] WNROFYMDJYEPJX-UHFFFAOYSA-K 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910000019 calcium carbonate Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000011246 composite particle Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 239000007822 coupling agent Substances 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 239000012948 isocyanate Substances 0.000 description 1
- 150000002513 isocyanates Chemical class 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
- 238000009281 ultraviolet germicidal irradiation Methods 0.000 description 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、ＬＳＩ等の半導体
チップを接着剤で直接回路基板に実装する場合、特に、
マルチチップモジュール（ＭＣＭ）のように、多数の半
導体チップを回路基板にフリップチップ実装する場合に
有用な半導体チップの接続方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to mounting a semiconductor chip such as an LSI directly on a circuit board with an adhesive,
The present invention relates to a semiconductor chip connection method useful when flip-chip mounting a large number of semiconductor chips on a circuit board, such as a multi-chip module (MCM).
【０００２】[0002]
【従来の技術】多数の半導体チップを回路基板に実装し
たＭＣＭにおいては、実装した半導体チップのうちに一
つでも不良品があるとＭＣＭ全体が不良品となり、製品
の歩留まりが著しく低下する。一方、半導体チップを回
路基板に実装する前に、個々の半導体チップの良否を予
め調べておくことは困難である。そのため、ＭＣＭの製
造に際しては、半導体チップを回路基板に実装した後、
半導体チップの良否を試験し、不良品と判明されたもの
はリペアするという作業が必要となっている。2. Description of the Related Art In an MCM in which a large number of semiconductor chips are mounted on a circuit board, if even one of the mounted semiconductor chips is defective, the entire MCM becomes defective and the product yield is significantly reduced. On the other hand, before mounting a semiconductor chip on a circuit board, it is difficult to check the quality of each semiconductor chip in advance. Therefore, when manufacturing the MCM, after mounting the semiconductor chip on the circuit board,
It is necessary to test whether the semiconductor chips are good or bad, and to repair those found to be defective.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、接着剤
を用いて半導体チップを回路基板に接続する場合に、接
着剤として、接続後に十分な接続信頼性を有するものを
使用するとリペアをすることが困難となる。反対に、リ
ペアが可能な接着剤を使用すると、接続後に十分な接続
信頼性を得ることができない。However, when connecting a semiconductor chip to a circuit board using an adhesive, it is difficult to carry out repair if an adhesive having sufficient connection reliability after connection is used. Becomes On the contrary, when a repairable adhesive is used, sufficient connection reliability cannot be obtained after connection.
【０００４】本発明はこのような問題に対し、半導体チ
ップと回路基板を接着剤で接続する場合に、リペアを可
能とし、かつ十分な接続信頼性も得られるようにするこ
とを目的とする。To solve the above problems, it is an object of the present invention to make repair possible and sufficient connection reliability when connecting a semiconductor chip and a circuit board with an adhesive.
【０００５】[0005]
【課題を解決するための手段】本発明者は、半導体チッ
プと回路基板を接着剤で接続する場合に、接着剤として
エポキシ系接続材料を使用し、かつその接続を、エポキ
シ反応率が特定の範囲の半硬化状態にする第１の硬化工
程と、接着剤の硬化を更にすすめる第２の硬化工程の２
段階で行うと、第１の硬化工程後に半導体チップの良否
を試験することができ、さらに必要時にはリペアも容易
にでき、また、第２の硬化工程では接着剤を完全硬化さ
せることができるので高い接続信頼性を得られることを
見出し、本発明を完成させた。The inventors of the present invention have used an epoxy-based connecting material as an adhesive when connecting a semiconductor chip and a circuit board with an adhesive, and the connection has a specific epoxy reaction rate. 2 of the first curing step for further promoting the curing of the adhesive and the first curing step for bringing the range into a semi-cured state
If performed in stages, the quality of the semiconductor chip can be tested after the first curing step, and repair can be easily performed when necessary, and the adhesive can be completely cured in the second curing step, which is high. The inventors have found that connection reliability can be obtained and completed the present invention.
【０００６】即ち、本発明は、エポキシ系接続材料を用
いて半導体チップを回路基板に接続する方法であって、
該エポキシ系接続材料として、未硬化時のエポキシ系接
続材料の有機物成分全体に対するエポキシ当量が２００
〜４５０ｇ／ｅｑであるものを使用し、
(a)半導体チップの電極を回路基板の配線パターンと相
対峙させ、エポキシ系接続材料におけるエポキシ樹脂の
反応率が２０〜７０％となるようにエポキシ系接続材料
を硬化させる第１の硬化工程、
(b)半導体チップの電気的接続の良否を試験する接続試
験工程、及び
(c)接続試験工程において電気的接続が良好であった半
導体チップについて、エポキシ系接続材料を更に硬化さ
せる第２の硬化工程、からなることを特徴とする接続方
法を提供する。That is, the present invention is a method of connecting a semiconductor chip to a circuit board using an epoxy-based connecting material,
As the epoxy-based connecting material, an epoxy-based contact when uncured
The epoxy equivalent to the total organic component of the following material is 200.
˜450 g / eq, (a) Epoxy resin so that the electrode of the semiconductor chip faces the wiring pattern of the circuit board and the reaction rate of the epoxy resin in the epoxy connection material is 20 to 70%. The first curing step of curing the connection material, (b) the connection test step of testing the quality of the electrical connection of the semiconductor chip, and (c) the semiconductor chip with good electrical connection in the connection test step, the epoxy A second hardening step of further hardening the system connecting material is provided.
【０００７】[0007]
【発明の実施の形態】以下、本発明を詳細に説明する。BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in detail below.
【０００８】本発明においては、半導体チップと回路基
板との接続にエポキシ系接続材料を使用する。このエポ
キシ系接続材料としては、公知の熱硬化型接着剤の成膜
成分として用いられているものを好ましく使用すること
ができるが、第１の硬化工程後の接着剤の半硬化状態に
おいて導通検査を精確に行い、またリペア性を確実にす
るため、未硬化時のエポキシ系接続材料の有機物成分全
体に対するエポキシ当量が２００〜４５０ｇ／ｅｑであ
るものが好ましく、エポキシ当量が２５０〜４００ｇ／
ｅｑのものがより好ましい。In the present invention, an epoxy-based connecting material is used for connecting the semiconductor chip and the circuit board. As the epoxy-based connecting material, the one used as a film forming component of a known thermosetting adhesive can be preferably used, but a continuity test is performed in a semi-cured state of the adhesive after the first curing step. In order to ensure accurate repairability and repairability, it is preferable that the epoxy equivalent to the whole organic component of the uncured epoxy-based connecting material is 200 to 450 g / eq, and the epoxy equivalent is 250 to 400 g / eq.
More preferred is eq.
【０００９】エポキシ系接続材料のエポキシ当量を所望
の値に調整する方法としては、例えば、エポキシ当量が
上述の範囲より高いエポキシ樹脂と上述の範囲より低い
エポキシ樹脂、あるいは上述の範囲内のエポキシ樹脂を
適宜配合すればよい。As a method of adjusting the epoxy equivalent of the epoxy-based connecting material to a desired value, for example, an epoxy resin having an epoxy equivalent higher than the above range and an epoxy resin having an epoxy equivalent lower than the above range, or an epoxy resin within the above range is used. May be blended appropriately.
【００１０】また、エポキシ系接続材料には、接着フィ
ルム等に配合されている公知の添加剤、例えば、イミダ
ゾール系、イソシアネート系等の硬化剤、エポキシシラ
ン化合物等のカップリング剤、エポキシ変性シリコーン
樹脂、あるいはフェノキシ樹脂等の熱硬化性又は熱可塑
性の絶縁性樹脂を適宜配合することができる。In addition, the epoxy-based connecting material may be a known additive such as an imidazole-based or isocyanate-based curing agent, a coupling agent such as an epoxysilane compound, or an epoxy-modified silicone resin. Alternatively, a thermosetting or thermoplastic insulating resin such as a phenoxy resin can be appropriately mixed.
【００１１】さらに、本発明のエポキシ系接続材料には
導電粒子を含有させてもよい。これにより、半導体チッ
プと回路基板との異方導電性接続をすることが可能とな
る。ここで、導電粒子としては、公知の異方導電性接着
剤において用いられているもの（例えば、半田粒子、ニ
ッケル粒子等の金属粒子や、表面にメッキ被膜が形成さ
れた樹脂粒子等の複合粒子等）を配合することができ
る。また、この導電粒子の平均粒径は、１〜１０μｍと
することが好ましい。Further, the epoxy-based connecting material of the present invention may contain conductive particles. This enables anisotropic conductive connection between the semiconductor chip and the circuit board. Here, as the conductive particles, those used in a known anisotropic conductive adhesive (for example, metal particles such as solder particles and nickel particles, or composite particles such as resin particles having a plated coating formed on the surface thereof) are used. Etc.) can be blended. The average particle size of the conductive particles is preferably 1 to 10 μm.
【００１２】エポキシ系接続材料には、シリカ、アルミ
ナ、窒化アルミ、窒化ケイ素、炭酸カルシウム、水酸化
アルミニウム等からなる平均粒径０．１〜２０μｍ程度
の無機系フィラーを含有させてもよい。これにより、エ
ポキシ系接続材料を所定の硬化度合いにするために必要
な反応率を低くすることができ、また、接続信頼性を向
上させることができる。The epoxy connecting material may contain an inorganic filler made of silica, alumina, aluminum nitride, silicon nitride, calcium carbonate, aluminum hydroxide or the like and having an average particle size of about 0.1 to 20 μm. This makes it possible to reduce the reaction rate required to bring the epoxy-based connecting material to a predetermined degree of curing, and to improve the connection reliability.
【００１３】本発明においては、上述のエポキシ系接続
材料を用いて半導体チップと回路基板とを接続するにあ
たり、(a)半導体チップの電極を回路基板の配線パター
ンと相対峙させ、エポキシ系接続材料におけるエポキシ
樹脂の反応率が２０〜７０％となるようにエポキシ系接
続材料を硬化させる第１の硬化工程、(b)半導体チップ
の電気的接続の良否を試験する接続試験工程、及び(c)
接続試験工程において電気的接続が良好であった半導体
チップについて、エポキシ系接続材料を更に硬化させる
第２の硬化工程、を順次行う。In the present invention, when connecting the semiconductor chip and the circuit board using the above-mentioned epoxy-based connecting material, (a) the electrodes of the semiconductor chip are made to face the wiring pattern of the circuit board, and the epoxy-based connecting material is used. The first curing step of curing the epoxy-based connecting material so that the reaction rate of the epoxy resin in 20 is 70 to 70%, (b) a connection test step of testing the quality of electrical connection of the semiconductor chip, and (c)
A second curing step of further curing the epoxy-based connection material is sequentially performed on the semiconductor chip that has been electrically connected well in the connection test step.
【００１４】(a)の第１の硬化工程においてエポキシ樹
脂の反応率が低すぎると、次の接続試験工程において半
導体チップの電気的接続の良否を確実に試験することが
できず、反対に反応率が高すぎると、接続試験工程で不
良と判定された半導体チップを第２の硬化工程前にリペ
アすることが困難となる。If the reaction rate of the epoxy resin in the first curing step (a) is too low, the quality of the electrical connection of the semiconductor chip cannot be reliably tested in the next connection test step, and the reaction will be reversed. If the rate is too high, it becomes difficult to repair the semiconductor chip determined to be defective in the connection test step before the second curing step.
【００１５】第１の硬化工程において、エポキシ樹脂の
反応率が２０〜７０％となるようにエポキシ系接続材料
を硬化させる方法としては、例えば、加熱、加熱加圧、
ＵＶ照射、電子線照射等をあげることができる。As a method of curing the epoxy-based connecting material in the first curing step so that the reaction rate of the epoxy resin becomes 20 to 70%, for example, heating, heating and pressing,
UV irradiation, electron beam irradiation, etc. can be mentioned.
【００１６】エポキシ樹脂の反応率を確認する方法とし
ては、例えば、ＤＳＣ、ＦＴ−ＩＲ等をあげることがで
きる。As a method of confirming the reaction rate of the epoxy resin, for example, DSC, FT-IR and the like can be mentioned.
【００１７】(b)の接続試験工程において、半導体チッ
プの電気的接続の良否を調べる試験方法そのものは公知
の方法を適用することができる。In the connection test step (b), a known method can be applied as the test method itself for checking the quality of the electrical connection of the semiconductor chip.
【００１８】接続試験工程により不良と判定された半導
体チップはリペアし、良品と判定された半導体チップの
みを次の第２の接続工程で回路基板に強固に接続する。
リペアの具体的方法は、当該エポキシ系接続材料の構成
成分等にもよるが、例えば、温度２０〜１２０℃程度に
加熱しつつ半導体チップにシェアをかければよい。The semiconductor chip determined to be defective in the connection test step is repaired, and only the semiconductor chip determined to be non-defective is firmly connected to the circuit board in the next second connection step.
The specific method of repairing depends on the constituent components of the epoxy-based connecting material and the like, but may be applied to the semiconductor chip while heating at a temperature of about 20 to 120 ° C., for example.
【００１９】(c)の第２の硬化工程では、エポキシ系接
続材料が完全硬化するように硬化を進めることが好まし
い。この場合の具体的手法としては、第１の硬化工程と
同様の手法を用いることができるが、例えば、加圧を伴
わず、加熱だけで硬化を進めると大量のバッチ処理を容
易に行うことができるので好ましい。一方、加熱加圧に
より硬化を進めるとより安定した接続抵抗値が得られる
ので好ましい。In the second curing step (c), it is preferable to proceed with the curing so that the epoxy-based connecting material is completely cured. As a specific method in this case, the same method as the first curing step can be used, but for example, if curing is advanced only by heating without pressurization, a large amount of batch processing can be easily performed. It is preferable because it is possible. On the other hand, it is preferable to proceed with the curing by heating and pressing, because a more stable connection resistance value can be obtained.
【００２０】[0020]
【実施例】以下、本発明を実施例に基づいて具体的に説
明する。EXAMPLES The present invention will be specifically described below based on examples.
【００２１】実施例１、２及び比較例１〜３
表２の配合のフィルム状エポキシ系接続材料Ｂ（総エポ
キシ当量２１９）を調製した。なお、エポキシ当量は、
ＪＩＳ Ｋ ７２３６にのっとり実測により求めた。Examples 1 and 2 and Comparative Examples 1 to 3 A film-shaped epoxy-based connecting material B (total epoxy equivalent 219) having the composition shown in Table 2 was prepared. The epoxy equivalent is
It was determined by actual measurement according to JIS K 7236.
【００２２】このフィルム状エポキシ系接続材料Ｂを、
回路基板（ＦＲ５、Line／Space＝１００／５０）に貼
り付け、この貼付面に半導体チップ（６ｍｍ□）を重
ね、第１の硬化工程又は第２の硬化工程の接続条件を表
１のように変えることにより半導体チップを回路基板に
接続した。なお、比較例１は、従来の一般的な接続条件
である。This film-shaped epoxy-based connecting material B is
It is attached to a circuit board (FR5, Line / Space = 100/50), a semiconductor chip (6 mm □) is placed on this attachment surface, and the connection conditions for the first curing step or the second curing step are as shown in Table 1. By changing, the semiconductor chip was connected to the circuit board. Comparative example 1 is a conventional general connection condition.
【００２３】それぞれの条件で接続した後、(1)エポキ
シ系接続材料のエポキシ樹脂の反応率を求め、また、
(2)半導体チップの導通検査、(3)リペア性、(4)導通信
頼性、を次のように評価した。After connecting under the respective conditions, (1) the reaction rate of the epoxy resin of the epoxy-based connecting material is obtained, and
(2) Continuity test of semiconductor chip, (3) Repairability, and (4) Continuity reliability were evaluated as follows.
【００２４】(1)エポキシ系接続材料のエポキシ樹脂の
反応率
エポキシ系接続材料の未反応時の発熱量（Ｘ）と、接続
工程を経て反応した後の発熱量（Ｙ）とをＤＳＣ（温度
範囲：５０〜２５０℃、昇温スピード：１０℃／ｍｉ
ｎ）で測定し、次式により反応率を求めた。(1) Reaction Rate of Epoxy Resin of Epoxy-Based Connecting Material The calorific value (X) of the epoxy-based connecting material when not reacted and the calorific value (Y) after reacting through the connecting step are DSC (temperature). Range: 50 to 250 ° C, temperature rising speed: 10 ° C / mi
The reaction rate was calculated by the following equation.
【００２５】[0025]
【数１】反応率（％）＝［１−（Ｙ／Ｘ）］×１００## EQU1 ## Reaction rate (%) = [1- (Y / X)] × 100
【００２６】(2)半導体チップの導通検査
全接続ポイントを内部配線によりつないだディジーチェ
ーン形テスト用回路基板を用いて圧着後の接続抵抗を検
査し、次の判定基準で評価した。
○：抵抗が正常値を示す
△：抵抗が高めの値を示す
×：抵抗がとれずＯＰＥＮ状態となる(2) Conduction test of semiconductor chip The connection resistance after crimping was inspected using a daisy chain type test circuit board in which all connection points were connected by internal wiring, and evaluated according to the following criteria. ◯: The resistance shows a normal value Δ: The resistance shows a high value x: The resistance cannot be removed and the OPEN state is set.
【００２７】(3)リペア性
次の評価項目〜について、それぞれ以下の判定基準
で評価した。(3) Repairability The following evaluation items were evaluated according to the following criteria.
【００２８】回路基板を８０℃に加熱し、Ｄａｇｅ社
２４００型 ダイシェア及びピール強度テスターで０．
１〜５０Ｋｇｆのシェアをかけた場合に、回路基板から
半導体チップを剥がすことができること
○：チップが剥がせる
△：チップが割れるが剥がせる
×：チップを剥がすことができないThe circuit board was heated to 80 ° C., and a Dage Company Model 2400 die shear and peel strength tester was used to measure
When a share of 1 to 50 kgf is applied, the semiconductor chip can be peeled off from the circuit board. ○: Chip can be peeled off Δ: Chip is cracked but can be peeled off ×: Chip cannot be peeled off
【００２９】溶剤としてアセトンを用いた場合に、回
路基板からエポキシ系接続材料を除去できること
○：除去できる
△：ほとんど除去できるが、少し残る
×：ほとんど除去できないWhen acetone is used as the solvent, the epoxy-based connecting material can be removed from the circuit board. ◯: It can be removed. Δ: It can be removed, but it remains a little. ×: It is hardly removed.
【００３０】回路基板に再度半導体チップを熱圧着
（２００℃、１０ｋｇ／ｃｍ2、１０秒）して実装した
後、(2)と同様に導通検査を行った場合に導通がとれる
こと
○：抵抗が正常値を示す
△：抵抗が高めの状態を示す
×：抵抗がとれずＯＰＥＮ状態となるAfter the semiconductor chip is mounted again on the circuit board by thermocompression bonding (200 ° C., 10 kg / cm 2 , 10 seconds), the continuity can be obtained when the continuity test is conducted in the same manner as (2). ○: Resistance Indicates a normal value Δ: High resistance is indicated ×: Resistance cannot be removed and the OPEN state is set
【００３１】(4)導通信頼性
耐湿試験としてＰＣＴ（１２１℃、２ａｔｍ、２００時
間）を行い、かつ熱衝撃試験としてヒートサイクル試験
（−５５℃、１５分と１２５℃、１５分との繰り返しを
１０００サイクル）を行った後、(2)と同様に導通検査
を行い、次の判定基準で評価した。
○：ＰＣＴ２００時間、ヒートサイクル試験１０００サ
イクルの後に、サイクル抵抗の変化が１００％未満であ
るもの
△：ＰＣＴ１００時間以上２００未満又はヒートサイク
ル試験５００以上１０００サイクル未満で抵抗変化が１
００％以上になるもの
×：ＰＣＴ１００時間未満又はヒートサイクル試験５０
０サイクル未満で抵抗変化が１００％以上になるもの(4) Conduction reliability PCT (121 ° C, 2 atm, 200 hours) was conducted as a moisture resistance test, and a heat cycle test (-55 ° C, 15 minutes and 125 ° C, 15 minutes was repeated as a thermal shock test. After 1000 cycles), the continuity test was conducted in the same manner as (2), and the evaluation was made according to the following criteria. ◯: Change in cycle resistance is less than 100% after 200 hours of PCT and 1000 cycles of heat cycle test. Δ: Resistance change of 1 or more in PCT 100 hours or more and less than 200 or heat cycle test of 500 or more and less than 1000 cycles.
00% or more x: PCT less than 100 hours or heat cycle test 50
Resistance change of 100% or more in less than 0 cycles
【００３２】結果を表１に示す。表１から、第１の硬化
工程後における反応率が本発明の範囲にある実施例１、
２においては、第１の硬化工程後に半導体チップを良好
にリペアすることができ、さらにその後の第２の硬化工
程により信頼性も向上しているが、硬化工程を１段階で
行う従来の接続方法（比較例１）によるとリペア性が劣
ることがわかる。また、硬化工程を１段階で行う場合に
おいてリペア性が得られる程度に反応率を低下させると
導通がとれず（比較例２）、反対に反応率を高めて導通
がとれるようにするとリペア性が劣ることがわかる（比
較例３）。The results are shown in Table 1. From Table 1, Example 1 in which the reaction rate after the first curing step is within the range of the present invention,
In No. 2, the semiconductor chip can be satisfactorily repaired after the first curing step, and the reliability is improved by the subsequent second curing step. However, the conventional connection method in which the curing step is performed in one step According to (Comparative Example 1), the repairability is inferior. Further, in the case where the curing process is performed in one step, if the reaction rate is lowered to such an extent that repairability is obtained, conduction cannot be obtained (Comparative Example 2), and conversely, if the reaction rate is increased to obtain conduction, repairability is improved. It turns out that it is inferior (Comparative Example 3).
【００３３】[0033]
【表１】 (1)反応率 (2)導通検査 (3)リヘ゜ア性 (4)信頼性 実施例１ 第1の硬化:150℃,10秒,10kg/cm2 30% ○ ○ ○ ○ 第2の硬化:220℃,10秒,10kg/cm2 90% − − − − ○実施例２ 第1の硬化:150℃,10秒,10kg/cm2 30% ○ ○ ○ ○ 第2の硬化:180℃,2分(オーフ゛ン硬化) 95% − − − − ○比較例１ 第1の硬化:200℃,20秒,10kg/cm2 90% ○ × × × ○比較例２ 第1の硬化:140℃,10秒,10kg/cm2 15% × ○ ○ ○ −比較例３ 第1の硬化:180℃,10秒,10kg/cm2 75% ○ △ △ × −[Table 1] (1) Reaction rate (2) Continuity test (3) Reliability (4) Reliability Example 1 First curing: 150 ℃, 10 seconds, 10kg / cm2 30% ○ ○ ○ ○ Second curing: 220 ℃, 10 seconds, 10kg / cm2 90% − − − − ○Example 2 First curing: 150 ℃, 10 seconds, 10kg / cm2 30% ○ ○ ○ ○ Second curing: 180 ° C, 2 minutes (open curing) 95% − − − − ○Comparative Example 1 First curing: 200 ℃, 20 seconds, 10kg / cm2 90% ○ × × × ○Comparative example 2 First curing: 140 ℃, 10 seconds, 10kg / cm2 15% × ○ ○ ○ −Comparative Example 3 First curing: 180 ℃, 10 seconds, 10kg / cm2 75% ○ △ △ × −
【００３４】[0034]
【表２】 （配合量：重量
部）
接続材料 配合成分 エホ゜キシ当量(g/eq) Ａ Ｂ Ｂ' Ｃ Ｄ フェノキシ
樹脂(*1) 0 ０ ２０ ２０ ０ ０エホ゜キシ
樹脂(*2) 141 ３０ ３０ ３０ ０ ０エホ゜キシ
樹脂(*3) 2900 ０ ０ ０ ４０ ５５エホ゜キシ
樹脂(*4) 110 ３０ １０ １０ ０ ０エホ゜キシ
樹脂(*5) 170 ３０ ２７ ２７ ４０ ３０
硬化剤(*6) 0 １５ １３.5 １３.5 ２０ １５カッフ゜リンク゛
剤(*7) 0 １ １ １ １ １ 導電粒子(*8) 0 ０ ０ ５ ０ ０
総量 １０６ １０１.5 １０６.5 １０１ １０１ 総エホ゜キシ当量 １６０ ２１９ ２１９ ４０５ ５１７
(*1)フェノキシ樹脂：東都化成社、ＹＰ５０
(*2)エポキシ樹脂：大日本インキ化学工業社、ＨＰ４０３２Ｄ
(*3)エポキシ樹脂：油化シェルエポキシ社、ＥＰ１００９
(*4)エポキシ樹脂：日本化薬社、ＧＯＴ
(*5)エポキシ樹脂：東都化成社、ＹＤＦ１７０
(*6)イミダゾール系硬化剤：四国化成社、２Ｅ４ＭＺ
(*7)シラン系カップリング剤：日本ユニカー社、Ａ１８７
(*8)導電粒子：日本化学工業社 ２０ＧＮＲ[Table 2](Amount: weight
Part)
Connection material Ingredients Epoxy equivalent (g / eq) A B B'C DPhenoxy
Resin (* 1) 0 20 20 20 00 epoxy
Resin (* 2) 141 30 30 30 0 0 Epoxy
Resin (* 3) 2900 0 0 40 55 55 epoxy
Resin (* 4) 110 30 10 10 00 epoxy
Resin (* 5) 170 30 27 27 27 40 30
Hardener (* 6) 0 15 13.5 13.5 20 15 CUP link
Agent (* 7) 0 1 1 1 1 1 1Conductive particles (* 8) 0 0 0 5 0 0
Total 106 101.5 106.5 101 101 101Total epoxy equivalent 160 219 219 405 517
(* 1) Phenoxy resin: Tohto Kasei Co., YP50
(* 2) Epoxy resin: Dainippon Ink and Chemicals, HP4032D
(* 3) Epoxy resin: Yuka Shell Epoxy Co., EP1009
(* 4) Epoxy resin: Nippon Kayaku, GOT
(* 5) Epoxy resin: Toto Kasei, YDF170
(* 6) Imidazole type hardener: Shikoku Kasei Co., 2E4MZ
(* 7) Silane coupling agent: Nippon Unicar Co., A187
(* 8) Conductive particles: Nippon Chemical Industry Co., Ltd. 20GNR
【００３５】実施例３〜６
エポキシ系接続材料として、表２の接続材料Ａ、Ｃ、Ｄ
あるいは前述の接続材料Ｂに導電粒子を配合した接続材
料Ｂ' を調製し、その総エポキシ当量を求めた。Examples 3 to 6 As the epoxy type connecting material, the connecting materials A, C and D shown in Table 2 are used.
Alternatively, a connecting material B ′ prepared by mixing the above connecting material B with conductive particles was prepared, and the total epoxy equivalent thereof was determined.
【００３６】これらの接続材料を用いて実施例１と同様
の接続条件で半導体チップを回路基板に接続し、第１の
硬化工程後の(1)反応率、(2)導通検査、(3)リペア性、
第２の硬化工程後の(4)導通信頼性を評価した。結果を
表３に示す。なお、表３には、参考のため接続材料Ｂを
用いた実施例１の結果も合わせて示す。Using these connecting materials, the semiconductor chip was connected to the circuit board under the same connection conditions as in Example 1, and (1) reaction rate after the first curing step, (2) continuity test, (3) Repairability,
(4) Conduction reliability after the second curing step was evaluated. The results are shown in Table 3. Table 3 also shows the results of Example 1 using the connecting material B for reference.
【００３７】[0037]
【表３】 実施例 (1)第1の硬化後 (2)導通検査 (3)リヘ゜ア性 (4)信頼性 総エホ゜キシ当量(g/eq) 反応率 ３ 接続材料Ａ (160) 32％ ○ ○ ○ △ ○ １ 接続材料Ｂ (219) 30％ ○ ○ ○ ○ ○ ４ 接続材料Ｂ' (219) 30％ ○ ○ ○ ○ ○ ５ 接続材料Ｃ (405) 35％ ○ ○ ○ ○ ○ ６ 接続材料Ｄ (517) 32％ △ ○ ○ ○ ○ [Table 3] Example (1) After the first curing (2) Continuity test (3) Liability (4) Reliability Total epoxy equivalent (g / eq) Reaction rate 3 Connection material A (160) 32% ○ ○ ○ △ ○ 1 Connection material B (219) 30% ○ ○ ○ ○ ○ 4 Connection material B '(219) 30% ○ ○ ○ ○ ○ 5 Connection material C (405) 35% ○ ○ ○ ○ ○ 6 Connection material D (517) 32 % △ ○○○○
【００３８】表３から、接続材料の未硬化時の総エポキ
シ当量が、ほぼ２００〜４５０ｇ／ｅｑの場合は全ての
評価項目で良好な結果が得られるが、未硬化時の総エポ
キシ当量が低いとリペア性がやや劣り（実施例３）、反
対に高いと導通検査がややしにくくなることがわかる
（実施例６）。From Table 3, when the total uncured epoxy equivalent of the connecting material is approximately 200 to 450 g / eq, good results are obtained for all evaluation items, but the total uncured epoxy equivalent is low. Shows that repairability is slightly inferior (Example 3), and conversely, if it is high, the continuity test becomes slightly difficult (Example 6).
【００３９】[0039]
【発明の効果】本発明によれば、半導体チップと回路基
板を接着剤で接続する場合に、リペアが可能となり、か
つ接続信頼性も向上したものとなる。According to the present invention, when a semiconductor chip and a circuit board are connected with an adhesive, repair is possible and connection reliability is improved.
Claims (5)
料を用いて半導体チップを回路基板に接続する方法であ
って、該エポキシ系接続材料として、未硬化時のエポキ
シ系接続材料の有機物成分全体に対するエポキシ当量が
２００〜４５０ｇ／ｅｑであるものを使用し、 (a)半導体チップの電極を回路基板の配線パターンと相
対峙させ、エポキシ系接続材料におけるエポキシ樹脂の
反応率が２０〜７０％となるようにエポキシ系接続材料
を硬化させる第１の硬化工程、 (b)半導体チップの電気的接続の良否を試験する接続試
験工程、及び (c)接続試験工程において電気的接続が良好であった半
導体チップについて、エポキシ系接続材料を更に硬化さ
せる第２の硬化工程、 からなることを特徴とする接続方法。1. A method for connecting a semiconductor chip to a circuit board using a liquid or film-shaped epoxy-based connecting material, wherein the epoxy-based connecting material is an uncured epoxy resin.
Epoxy equivalent to the whole organic component of the system-based connecting material
200 to 450 g / eq is used, and (a) the electrode of the semiconductor chip is made to face the wiring pattern of the circuit board so that the reaction rate of the epoxy resin in the epoxy-based connecting material is 20 to 70%. The first curing step of curing the system connecting material, (b) the connection test step of testing the quality of the electrical connection of the semiconductor chip, and (c) the semiconductor chip with good electrical connection in the connection test step, A second curing step of further curing the epoxy-based connecting material.
１記載の接続方法。2. The connection method according to claim 1, wherein the second curing step is performed by heating.
求項１記載の接続方法。3. The connection method according to claim 1, wherein the second curing step is performed by heating and pressing.
μｍの導電粒子を含有する請求項１〜３のいずれかに記
載の接続方法。4. The epoxy-based connecting material has an average particle size of 1 to 10.
Connection method according to any one of claims 1 to 3 containing conductive particles [mu] m.
有する請求項１〜４のいずれかに記載の接続方法。5. A connecting method according to any one of claims 1 to 4, an epoxy-based connecting material contains an inorganic filler.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26631199A JP3402280B2 (en) | 1999-09-20 | 1999-09-20 | Connection method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26631199A JP3402280B2 (en) | 1999-09-20 | 1999-09-20 | Connection method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001093939A JP2001093939A (en) | 2001-04-06 |
| JP3402280B2 true JP3402280B2 (en) | 2003-05-06 |
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ID=17429174
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26631199A Expired - Fee Related JP3402280B2 (en) | 1999-09-20 | 1999-09-20 | Connection method |
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| Country | Link |
|---|---|
| JP (1) | JP3402280B2 (en) |
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| JP3750606B2 (en) * | 2002-01-11 | 2006-03-01 | ソニーケミカル株式会社 | Manufacturing method of semiconductor device |
| JP5274744B2 (en) * | 2002-09-30 | 2013-08-28 | 日立化成株式会社 | Film adhesive and semiconductor device using the same |
| JP4905338B2 (en) * | 2007-12-10 | 2012-03-28 | パナソニック株式会社 | Manufacturing method of printed circuit board with built-in components |
| JP4905339B2 (en) * | 2007-12-10 | 2012-03-28 | パナソニック株式会社 | Manufacturing method of electronic component mounting board |
| JP5626179B2 (en) * | 2011-10-24 | 2014-11-19 | 日立化成株式会社 | Film adhesive and semiconductor device using the same |
| JP6402127B2 (en) * | 2016-03-09 | 2018-10-10 | 株式会社タムラ製作所 | Bonding method of electronic parts |
| JP6691998B1 (en) * | 2019-12-24 | 2020-05-13 | 株式会社鈴木 | Semiconductor device manufacturing method and semiconductor device manufacturing apparatus |
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