JP3356192B2 - Temperature compensation device for circuit elements - Google Patents
Temperature compensation device for circuit elementsInfo
- Publication number
- JP3356192B2 JP3356192B2 JP28401994A JP28401994A JP3356192B2 JP 3356192 B2 JP3356192 B2 JP 3356192B2 JP 28401994 A JP28401994 A JP 28401994A JP 28401994 A JP28401994 A JP 28401994A JP 3356192 B2 JP3356192 B2 JP 3356192B2
- Authority
- JP
- Japan
- Prior art keywords
- thermistor
- temperature
- mounting substrate
- circuit element
- temperature compensation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Thermistors And Varistors (AREA)
- Measuring Temperature Or Quantity Of Heat (AREA)
Description
【０００１】[0001]
【産業上の利用分野】この発明は，サ−ミスタを用いた
トランジスタやＩＣチップ等の温度補償装置に関するも
のである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a temperature compensator for a transistor or an IC chip using a thermistor.
【０００２】[0002]
【従来の技術】一般に，温度を電気量に変換して電気信
号として取り出すように構成された感温半導体がある
が，この感温半導体のひとつにサ−ミスタがある。この
サ−ミスタは，温度上昇に伴って半導体中からの導電キ
ャリアが増大し，その結果，電気抵抗が減少する性質の
ものや，結晶転移にともない電気抵抗が大きく変化する
性質を用いたものがある。金属酸化物焼結型サ−ミス
タ，ガラスサ−ミスタ，薄膜サ−ミスタ等は前者に属
し，Ｖ2 Ｏ5 系の臨界温度サ−ミスタ，正特性サ−ミス
タ等は後者に属している。そして，一般にサ−ミスタと
いえば負特性サ−ミスタを意味しており，この負特性サ
−ミスタはトランジスタやＩＣチップ等の温度補償用と
してよく利用されている。2. Description of the Related Art In general, there is a temperature-sensitive semiconductor configured to convert a temperature into an electric quantity and to take out as an electric signal. One of the temperature-sensitive semiconductors is a thermistor. This thermistor has a property in which the number of conductive carriers in a semiconductor increases as the temperature rises, resulting in a decrease in electrical resistance and a property using a property in which the electrical resistance changes significantly with the crystal transition. is there. Metal oxide sintered thermistors, glass thermistors, thin film thermistors, etc. belong to the former, and V 2 O 5 -based critical temperature thermistors, positive temperature thermistors, etc. belong to the latter. Generally, a thermistor means a negative characteristic thermistor, and this negative characteristic thermistor is often used for temperature compensation of a transistor, an IC chip or the like.
【０００３】このサ−ミスタ１の代表的な構造は，図３
に示すように，動作部分を構成する材料（素体）２，動
作部分を支持する基体（図示せず），電極３およびリ−
ド線４，パッケ−ジ５等で構成されており，そして，動
作部分の形状は，ビ−ト状，ディスク状，棒状，薄膜状
等がある。A typical structure of the thermistor 1 is shown in FIG.
As shown in (1), a material (element body) constituting an operating portion, a base (not shown) for supporting the operating portion, an electrode 3, and a lead
The operating portion has a shape such as a beat, a disk, a bar, a thin film and the like.
【０００４】この内，コイル，トランジスタやＩＣチッ
プ等の回路素子の温度補償用としては，主として２〜１
０ｍｍ程度のディスク型の負特性サ−ミスタが使用され
ている。[0004] Among them, for temperature compensation of circuit elements such as coils, transistors and IC chips, 2 to 1
A disk-type negative characteristic thermistor of about 0 mm is used.
【０００５】このディスク型のサ−ミスタ１は，原料と
してＭｎ，Ｃｏ，Ｎｉ，Ｃｕ，Ｆｅ等の金属酸化物粉末
を組成に応じて配合し，これらを充分混合した後，乾燥
させる。次いで，本焼成温度より１００〜２００°Ｃ低
い温度１０００〜１２００°Ｃで仮焼される。この仮焼
で原料粉体間の固相化学反応を行わせて，サ−ミスタ１
の材料となる複合酸化物半導体としての素体２が形成さ
れる。The disk-type thermistor 1 is prepared by mixing metal oxide powders such as Mn, Co, Ni, Cu, and Fe as raw materials in accordance with the composition, thoroughly mixing these, and then drying. Next, it is calcined at 1000 to 1200 ° C, which is 100 to 200 ° C lower than the main firing temperature. In this calcination, a solid phase chemical reaction between the raw material powders is carried out.
The element body 2 as a composite oxide semiconductor to be a material of the above is formed.
【０００６】素体２を成形した後，空気中で１１００〜
１３００°Ｃで本焼成した後，電極３を形成するととも
に，この電極３にリ−ド線４が接続される。次いで，劣
化防止を目的として樹脂モ−ルドあるいはガラス，セラ
ミック，金属などの封止が施されてパッケ−ジ５が形成
される。[0006] After the body 2 is formed, it is heated to 1100
After main firing at 1300 ° C., an electrode 3 is formed, and a lead wire 4 is connected to the electrode 3. Next, a package is formed by sealing with resin mold, glass, ceramic, metal, or the like for the purpose of preventing deterioration.
【０００７】[0007]
【発明が解決しようとする問題点】このようにして形成
されたサ−ミスタ１は，トランジスタやＩＣチップ等の
温度補償用として回路内に組み込まれ，一定温度に保持
されるように温度制御されている。しかしながら，この
ようなサ−ミスタを用いた温度補償回路の場合，サ−ミ
スタは，トランジスタなどから離れた位置に配置されて
おり，正確にトランジスタ等の温度変化を検出すること
が出来なかった。そのため，温度制御するための応答時
間が遅れる傾向にあるという問題があった。The thermistor 1 thus formed is incorporated in a circuit for temperature compensation of a transistor, an IC chip or the like, and the temperature is controlled so as to be maintained at a constant temperature. ing. However, in the case of such a temperature compensating circuit using a thermistor, the thermistor is arranged at a position distant from the transistor or the like, and it is not possible to accurately detect a temperature change of the transistor or the like. Therefore, there is a problem that the response time for controlling the temperature tends to be delayed.
【０００８】さらに，トランジスタ等自身の温度を検出
して温度制御するものはなく，マウント用基板自体から
の自然放熱により略一定の温度に保持されるように構成
されている。そこで，サ−ミスタは，本来，細かい温度
変化や温度差，温度分布の測定に適しているため，この
性質を最大限に利用して温度制御する方法はないかとの
要望があった。Further, there is no device such as a transistor for detecting the temperature of the transistor itself to control the temperature, and the temperature is maintained at a substantially constant temperature by natural heat radiation from the mounting substrate itself. Therefore, thermistors are originally suitable for measuring small temperature changes, temperature differences, and temperature distributions. Therefore, there has been a demand for a method of controlling the temperature by making the most of this property.
【０００９】[0009]
【問題点を解決するための手段】この発明は、サ−ミス
タを平板状に形成してこのサ−ミスタを配線基板に非導
電性接着剤により固着するとともに、このサ−ミスタの
両電極を配線基板の温度補償回路の入力端に接続し、サ
−ミスタの上面に、非導電性接着剤を介して直接マウン
ト用基板を密着し、このマウント用基板に、直接回路素
子を密着し、この回路素子の温度上昇を、マウント用基
板を介してサ−ミスタで直接検出して、回路素子の温度
制御をするようにしたものである。According to the present invention, a thermistor is formed in a flat plate shape, the thermistor is fixed to a wiring board by a non-conductive adhesive, and both electrodes of the thermistor are connected. It is connected to the input end of the temperature compensation circuit of the wiring board, and the mounting substrate is directly adhered to the upper surface of the thermistor via a non-conductive adhesive, and the circuit element is directly adhered to this mounting substrate. The temperature rise of the circuit element is directly detected by a thermistor via the mounting substrate to control the temperature of the circuit element.
【００１０】[0010]
【作用】回路素子１０で発生した熱は、マウント用基板
１２を介して直接サ−ミスタ１５に伝わり、サ−ミスタ
１５自身の温度が上昇する。そのため、半導体中の導電
キャリアが増加し、その結果、抵抗値が減少する。この
抵抗値の減少に伴って、温度補償回路の電流を調整し
て、抵抗値を増加することにより回路素子１０の温度補
償がなされる。The heat generated by the circuit element 10 is transmitted directly to the thermistor 15 via the mounting substrate 12, and the temperature of the thermistor 15 itself rises. Therefore, the number of conductive carriers in the semiconductor increases, and as a result, the resistance value decreases. As the resistance decreases, the current of the temperature compensation circuit is adjusted, and the resistance of the circuit element 10 is compensated by increasing the resistance.
【００１１】[0011]
【発明の実施例１】この発明の実施例を，図１〜図２に
基づいて詳細に説明する。図１は要部断面図，図２は要
部斜視図である。なお，従来例と同様のものは，同一名
称，同一番号を付し，その説明を省略する。Embodiment 1 An embodiment of the present invention will be described in detail with reference to FIGS. FIG. 1 is a sectional view of a main part, and FIG. 2 is a perspective view of a main part. The same components as those in the conventional example have the same names and the same numbers, and the description thereof will be omitted.
【００１２】図１〜図２において，１０はトランジスタ
等で，Ａｕパラジウムペ−スト等の導電性接着剤１１を
介してマウント用基板１２に接着されているとともに，
リ−ド線１３によりマウント用基板１２の配線部分１４
と接続されている。この実施例では，マウント用基板１
２は，セラミック等の部材で，２ｍｍ角程度の矩形に形
成されている。1 and 2, reference numeral 10 denotes a transistor and the like, which is bonded to a mounting substrate 12 via a conductive adhesive 11 such as Au palladium paste.
The wiring portion 14 of the mounting substrate 12 is formed by the lead wire 13.
Is connected to In this embodiment, the mounting substrate 1
Reference numeral 2 denotes a member made of ceramic or the like, which is formed in a rectangular shape of about 2 mm square.
【００１３】１５はサ−ミスタで，この実施例では，負
特性サ−ミスタが使用されている。サ−ミスタ１５の形
状は，例えば１０ｍｍ角程度の平板状に形成されてお
り，上面に載置されるマウント用基板１２の形状とほぼ
等しいかあるいはこれより大きく形成されている。サ−
ミスタ１５は，配線基板１６にエポキシ樹脂等の非導電
性接着剤１７により固着されているとともに，上面には
非導電性接着剤１８を介してマウント用基板１２が固着
されている。Reference numeral 15 denotes a thermistor. In this embodiment, a thermistor having a negative characteristic is used. The shape of the thermistor 15 is, for example, a flat plate having a size of about 10 mm square, and is substantially equal to or larger than the shape of the mounting substrate 12 mounted on the upper surface. Server
The mister 15 is fixed to the wiring board 16 with a non-conductive adhesive 17 such as an epoxy resin, and the mounting substrate 12 is fixed to the upper surface via a non-conductive adhesive 18.
【００１４】サ−ミスタ１５の両端に形成されている電
極１９には，リ−ド線２０が接続されており，このリ−
ド線２０は配線基板１６の温度補償回路に接続されてい
る。トランジスタ等１０からの熱は，マウント用基板１
２を介して直接サ−ミスタ１５に伝達されてサ−ミスタ
１５の温度が上昇するように構成されている。A lead wire 20 is connected to electrodes 19 formed at both ends of the thermistor 15, and the leads 19 are connected to the electrodes 19.
The wiring 20 is connected to the temperature compensation circuit of the wiring board 16. The heat from the transistor 10 is transferred to the mounting substrate 1
The temperature of the thermistor 15 is directly transmitted to the thermistor 15 via the second line 2 so that the temperature of the thermistor 15 rises.
【００１５】サ−ミスタ１５とマウント用基板１２とを
接着している非導電性接着剤１８は，熱伝導率のよい接
着剤が用いられており，トランジスタ等１０の温度上昇
が直ちにサ−ミスタ１５に伝達される。As the non-conductive adhesive 18 for bonding the thermistor 15 and the mounting substrate 12, an adhesive having good thermal conductivity is used. 15 is transmitted.
【００１６】このように構成されているので，トランジ
スタ等１０で発生した熱が，マウント用基板１２を介し
て直接サ−ミスタ１５に伝わると，サ−ミスタ１５自身
の温度が上昇する。そのため，半導体中の導電キャリア
が増加し，その結果，抵抗値が減少する。この抵抗値の
減少に伴って，温度補償回路の電流を調整して，抵抗値
を増加することによりトランジスタ等１０の温度補償が
なされている。With this configuration, when the heat generated by the transistor 10 and the like is directly transmitted to the thermistor 15 via the mounting substrate 12, the temperature of the thermistor 15 itself increases. Therefore, the number of conductive carriers in the semiconductor increases, and as a result, the resistance value decreases. With the decrease in the resistance value, the current of the temperature compensation circuit is adjusted, and the resistance value is increased so that the temperature of the transistor 10 is compensated.
【００１７】[0017]
【発明の効果】この発明は、サ−ミスタを平板状に形成
してこのサ−ミスタを配線基板に非導電性接着剤により
固着するとともに、このサ−ミスタの両電極を配線基板
の温度補償回路の入力端に接続し、サ−ミスタの上面
に、非導電性接着剤を介して直接マウント用基板を密着
し、このマウント用基板に、直接回路素子を密着し、こ
の回路素子の温度上昇を、マウント用基板を介してサ−
ミスタに直接伝達するようにしたので、回路素子の温度
上昇をサ−ミスタで直接感知して温度補償することがで
きるから、応答速度の早い温度補償装置が得られる。さ
らに、サ−ミスタは平板状に形成されているとともに、
少なくとも回路素子の形状より大きく形成されているか
ら、サ−ミスタ自体の放熱効果が良好となるとともに、
マウント用基板とサ−ミスタとの接合性がよく、それだ
け、温度補償効果が良くなる。According to the present invention, a thermistor is formed in a flat plate shape, and the thermistor is fixed to a wiring substrate with a non-conductive adhesive, and both electrodes of the thermistor are compensated for the temperature of the wiring substrate. Connected to the input end of the circuit, the mounting substrate is directly adhered to the upper surface of the thermistor via a non-conductive adhesive, and the circuit element is directly adhered to this mounting substrate, and the temperature of this circuit element rises. Through the mounting substrate
Since the temperature is directly transmitted to the mister, the temperature rise of the circuit element can be directly sensed by the thermistor to compensate for the temperature, so that a temperature compensating device having a high response speed can be obtained. Further, the thermistor is formed in a flat plate shape,
Since it is formed at least larger than the shape of the circuit element, the heat dissipation effect of the thermistor itself becomes good, and
The bonding property between the mounting substrate and the thermistor is good, and the temperature compensation effect is accordingly improved.
【図１】この発明の実施例を示す要部断面図である。FIG. 1 is a sectional view of a main part showing an embodiment of the present invention.
【図２】この発明の実施例を示す要部斜視図である。FIG. 2 is a perspective view of a main part showing an embodiment of the present invention.
【図３】従来例を示すサ−ミスタの断面図である。FIG. 3 is a sectional view of a thermistor showing a conventional example.
【図４】従来例を示すサ−ミスタの側面図である。FIG. 4 is a side view of a thermistor showing a conventional example.
１０・・・・・トランジスタ等 １１・・・・・導電性接着剤 １２・・・・・マウント用基板 １５・・・・・サ−ミスタ １６・・・・・配線基板 １７，１８・・非導電性接着剤 10: Transistor etc. 11: Conductive adhesive 12: Mounting substrate 15: Thermistor 16: Wiring board 17, 18, Non- Conductive adhesive
Claims (2)
ミスタを配線基板に非導電性接着剤により固着するとと
もに、このサ−ミスタの両電極を前記配線基板の温度補
償回路に接続し、 前記サ−ミスタの上面に、熱伝導率の良好な非導電性接
着剤を介してマウント用基板を密着し、 このマウント用基板に、直接回路素子を密着して接続
し、 この回路素子の温度上昇を、前記マウント用基板を介し
て前記サ−ミスタで直接検出して前記回路素子の温度制
御をすることを特徴とする回路素子の温度補償装置。1. A thermistor is formed in a flat plate shape.
The mister is fixed to the wiring board with a non-conductive adhesive, and both electrodes of the thermistor are connected to a temperature compensation circuit of the wiring board. The non-conductive material having good thermal conductivity is provided on the upper surface of the thermistor. A mounting substrate is closely adhered through a conductive adhesive, a circuit element is directly adhered to and connected to the mounting substrate, and a temperature rise of the circuit element is directly increased by the thermistor through the mounting substrate. A temperature compensating device for a circuit element, wherein the temperature of the circuit element is detected and detected.
り大きいかあるいは少なくとも同一形状に形成したこと
を特徴とする請求項１に記載の回路素子の温度補償装
置。2. The temperature compensation device for a circuit element according to claim 1, wherein the thermistor is larger than or at least identical in shape to the mounting substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28401994A JP3356192B2 (en) | 1994-10-25 | 1994-10-25 | Temperature compensation device for circuit elements |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28401994A JP3356192B2 (en) | 1994-10-25 | 1994-10-25 | Temperature compensation device for circuit elements |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08125108A JPH08125108A (en) | 1996-05-17 |
| JP3356192B2 true JP3356192B2 (en) | 2002-12-09 |
Family
ID=17673255
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28401994A Expired - Fee Related JP3356192B2 (en) | 1994-10-25 | 1994-10-25 | Temperature compensation device for circuit elements |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3356192B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100632865B1 (en) * | 2006-06-28 | 2006-10-16 | 김종련 | Marine incinerator |
-
1994
- 1994-10-25 JP JP28401994A patent/JP3356192B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08125108A (en) | 1996-05-17 |
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