JP3295725B2 - Photoelectric conversion element - Google Patents
Photoelectric conversion elementInfo
- Publication number
- JP3295725B2 JP3295725B2 JP13199198A JP13199198A JP3295725B2 JP 3295725 B2 JP3295725 B2 JP 3295725B2 JP 13199198 A JP13199198 A JP 13199198A JP 13199198 A JP13199198 A JP 13199198A JP 3295725 B2 JP3295725 B2 JP 3295725B2
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- amorphous silicon
- photoelectric conversion
- conversion element
- based thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000006243 chemical reaction Methods 0.000 title claims description 20
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 46
- 239000010409 thin film Substances 0.000 claims description 45
- 239000004065 semiconductor Substances 0.000 claims description 44
- 239000013078 crystal Substances 0.000 claims description 23
- 239000010408 film Substances 0.000 claims description 14
- 238000009825 accumulation Methods 0.000 claims description 8
- 238000003860 storage Methods 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims 2
- 239000010410 layer Substances 0.000 description 36
- 238000000034 method Methods 0.000 description 14
- 239000000969 carrier Substances 0.000 description 11
- 230000001939 inductive effect Effects 0.000 description 9
- 230000035945 sensitivity Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 229910021419 crystalline silicon Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910017875 a-SiN Inorganic materials 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 125000005842 heteroatom Chemical group 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000013081 microcrystal Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000001846 repelling effect Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Photovoltaic Devices (AREA)
Description
【０００１】[0001]
【産業上の利用分野】本発明は、光電変換素子の構成方
法に関し、特に結晶半導体表面にアモルファスシリコン
系薄膜が積層された構造を有する光電変換素子の構成方
法に関する。本発明において、結晶半導体とはＳｉ，Ｇ
ｅ等の単原子結晶、またはIIIV族化合物、IIVI族化合物
等の化合物半導体を言い、アモルファスシリコン系薄膜
とは、ａ−Ｓｉ：Ｈ、ａ−Ｓｉ：Ｈ：Ｆ、ａ−ＳｉXＧ
ｅ1-X：Ｈ、ａ−ＳｉXＣ1-X：Ｈ、ａ−ＳｉＮY：Ｈなど
のＳｉを含んだアモルファス（マイクロクリスタルも含
む）薄膜を言う。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a photoelectric conversion element, and more particularly to a method for forming a photoelectric conversion element having a structure in which an amorphous silicon thin film is laminated on a surface of a crystalline semiconductor. In the present invention, the crystalline semiconductor is Si, G
e, or a compound semiconductor such as a group IIIV compound or a group IIVI compound. An amorphous silicon-based thin film refers to a-Si: H, a-Si: H: F, a-Si X G
e 1-x : H, a-Si x C 1-x : H, a-SiN y : H means an amorphous (including microcrystal) thin film containing Si.
【０００２】[0002]
【従来の技術】従来、光電変換素子の光入射面側にｎ型
アモルファスシリコン系薄膜をｐ型結晶シリコン基板上
に積層しキャリア収集接合を構成し、光電変換素子等を
形成することは行われていたが、アモルファスシリコン
の堆積層が１００ＭΩ／ロ以上のシート抵抗を有するた
め、電流取出しの層には使えないと思われており、アモ
ルファスシリコン全面に透明導電膜を更に積層して素子
を構成していた。この素子の構成方法は、結晶に不純物
を導入するための高温プロセスが不要であり、しかも不
純物導入による結晶欠陥の発生もないので、高性能な素
子が実現されるポテンシャルを有していた。2. Description of the Related Art Conventionally, an n-type amorphous silicon-based thin film is laminated on a p-type crystalline silicon substrate on a light incident surface side of a photoelectric conversion element to form a carrier collection junction, thereby forming a photoelectric conversion element and the like. However, since the deposited layer of amorphous silicon has a sheet resistance of 100 MΩ / b or more, it is thought that it cannot be used as a layer for extracting current, and a transparent conductive film is further laminated on the entire surface of the amorphous silicon to constitute an element. Was. This method of constructing an element does not require a high-temperature process for introducing impurities into the crystal, and has no potential to generate crystal defects due to the introduction of impurities, and thus has a potential for realizing a high-performance element.
【０００３】[0003]
【発明が解決しようとする課題】しかし、従来技術では
光発生したキャリアをキャリア収集接合のある表面と対
向した表面で追い返し、光電流の長波長側での収集効率
を改善し、あるいは出力電圧を改善するために、結晶半
導体の該対向面に結晶半導体と同一導電形の高濃度不純
物を導入する技術が知られていたが、これには高温プロ
セス（８００℃以上）が必要とされていた。更に結晶半
導体の該対向面にオーム性接触を有する導電電極を設け
る必要があるが、該導電電極と結晶半導体との間にオー
ム性接触を実現するためにも高温プロセス（５００℃以
上）を必要としていた。すなわち、光電変換素子を全体
として低温から高効率に作ることは難しかった。However, in the prior art, the photo-generated carriers are repelled on the surface opposite to the surface having the carrier collection junction to improve the collection efficiency on the long wavelength side of the photocurrent or to reduce the output voltage. For the purpose of improvement, a technique of introducing a high-concentration impurity of the same conductivity type as the crystal semiconductor into the opposite surface of the crystal semiconductor has been known, but this requires a high-temperature process (800 ° C. or higher). Further, it is necessary to provide a conductive electrode having ohmic contact on the opposite surface of the crystal semiconductor, but a high-temperature process (500 ° C. or higher) is required to realize ohmic contact between the conductive electrode and the crystal semiconductor. And had That is, it was difficult to manufacture the photoelectric conversion element as a whole with high efficiency from a low temperature.
【０００４】[0004]
【課題を解決するための手段】本発明ではこの従来の素
子の構成の問題点を解決するために、アモルファスシリ
コン系薄膜と結晶半導体との積層構造の電気特性を詳細
に調べたところ、上記積層構造の界面の結晶半導体側に
キャリア誘起層を定常的に形成することができることを
見出した。According to the present invention, in order to solve the problems of the structure of the conventional device, the electrical characteristics of the laminated structure of an amorphous silicon thin film and a crystalline semiconductor were examined in detail. It has been found that a carrier-inducing layer can be constantly formed on the crystal semiconductor side at the interface of the structure.
【０００５】このキャリア誘起層は結晶半導体とアモル
ファスシリコン系薄膜が同一導電形であれば蓄積層とな
り、結晶半導体とアモルファスシリコン系薄膜が相異な
る導電形であれば反転層となることが多いが、結晶半導
体とアモルファスシリコン系薄膜の仕事関数差によって
は、同一導電形でも反転層、逆導電形でも蓄積層とな
る。このキャリア誘起層を用いて光電変換素子の動作を
構成することにより、従来の問題点を解決し、また従来
得られなかった新しい効果を生み出すことを見出した。The carrier inducing layer often becomes an accumulation layer if the crystalline semiconductor and the amorphous silicon-based thin film are of the same conductivity type, and becomes an inversion layer if the crystal semiconductor and the amorphous silicon-based thin film are of different conductivity types. Depending on the work function difference between the crystalline semiconductor and the amorphous silicon-based thin film, even if they are of the same conductivity type, they become inversion layers, and even if they are of the opposite conductivity type, they become accumulation layers. By configuring the operation of the photoelectric conversion element using this carrier inducing layer, it has been found that the conventional problems can be solved and a new effect that has not been obtained conventionally can be produced.
【０００６】本発明において、上記キャリア誘起層はア
モルファスシリコン系薄膜の１万分の１以下のシート抵
抗を有しているので、この層を通して電流を流すことに
よって、効率的に電流を取り出すことができる。キャリ
ア誘起層が蓄積層である場合は、蓄積層の存在に伴っ
て、アモルファスシリコン系薄膜との積層面から少数キ
ャリアを追い返す電界が結晶半導体表面に存在している
ことになり、これを用いて光電変換素子等のキャリア閉
じ込めによる出力電圧の向上及びキャリア収集効率の向
上を実現することができる。In the present invention, since the carrier-inducing layer has a sheet resistance of 1 / 10,000 or less of that of the amorphous silicon-based thin film, current can be efficiently extracted by flowing current through this layer. . If the carrier-inducing layer is a storage layer, an electric field that repels minority carriers from the lamination surface with the amorphous silicon-based thin film exists on the crystal semiconductor surface due to the presence of the storage layer. It is possible to realize an improvement in output voltage and an improvement in carrier collection efficiency due to carrier confinement of a photoelectric conversion element or the like.
【０００７】一方、アモルファスシリコン系薄膜はバン
ド内にテイル準位、ギャップ準位が多量に存在し、ギャ
ップ内伝導が行われる。従って、キャリア誘起層のキャ
リアをアモルファスシリコン系薄膜を通して取出すこと
ができる。このような動作方法を用いると、アモルファ
スシリコン系薄膜に電極を付着することにより、キャリ
ア誘起層とのオーム性接触が可能となる。On the other hand, the amorphous silicon-based thin film has a large number of tail levels and gap levels in the band, and conducts in the gap. Therefore, carriers in the carrier inducing layer can be extracted through the amorphous silicon-based thin film. When such an operation method is used, ohmic contact with the carrier induction layer becomes possible by attaching an electrode to the amorphous silicon-based thin film.
【０００８】以上の手段及び作用をまとめて、本発明の
光電変換素子の構成方法の要旨をまとめると以下のよう
になる。結晶半導体表面にアモルファスシリコン系薄膜
が積層された構造において； (1)結晶半導体側に形成されたキャリア誘起層の電気伝
導を用いること。 (2)結晶半導体側に形成されたキャリア誘起層の電界
を、少数キャリアを積層面から追い返す電界として用い
ること。 (3)結晶半導体側に形成されたキャリア誘起層と導電電
極が該アモルファスシリコン系薄膜を介してオーム性接
触を可能とすること。The summary of the method of constructing the photoelectric conversion element of the present invention by summarizing the above means and functions is as follows. In a structure in which an amorphous silicon-based thin film is laminated on the surface of a crystalline semiconductor; (1) To use the electric conduction of a carrier-induced layer formed on the crystalline semiconductor side. (2) The electric field of the carrier-inducing layer formed on the crystal semiconductor side is used as an electric field for repelling minority carriers from the stacked surface. (3) The ohmic contact between the carrier inducing layer formed on the crystal semiconductor side and the conductive electrode can be made via the amorphous silicon-based thin film.
【０００９】上記構成方法において、結晶半導体とアモ
ルファスシリコン系薄膜の間に結晶半導体の酸化膜、窒
化膜など第三の薄膜が介在する場合も、キャリア誘起層
が存在する場合は本発明の特徴を生かした半導体デバイ
スの構成が可能となる。本発明では特に上記(1)〜(3)い
ずれかの手段、および作用を用いて、長波長感度ないし
は出力電圧の改善された光電変換素子の構成方法を提供
する。In the above-described method, the present invention is characterized in that a third thin film such as an oxide film and a nitride film of a crystalline semiconductor is interposed between a crystalline semiconductor and an amorphous silicon-based thin film, and that a carrier inducing layer is present. A configuration of a semiconductor device utilizing the present invention can be utilized. The present invention particularly provides a method for forming a photoelectric conversion element having improved long-wavelength sensitivity or output voltage by using any one of the above-mentioned means (1) to (3) and action.
【００１０】[0010]
【実施の形態】本発明では、キャリア収集接合は前述の
アモルファス・結晶半導体接合でも、その他のヘテロ接
合でも、ｐｎ接合でも、反転層と結晶との接合でもよい
が、以下に示す実施の形態では、キャリア収集接合はア
モルファスシリコン系薄膜によって結晶半導体表面に誘
起された反転層とその結晶半導体との接合を用いた場合
を示す。DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, the carrier collection junction may be the above-mentioned amorphous / crystalline semiconductor junction, another hetero junction, a pn junction, or a junction between an inversion layer and a crystal. The carrier collection junction shows the case where the junction between the inversion layer induced on the surface of the crystal semiconductor by the amorphous silicon-based thin film and the crystal semiconductor is used.
【００１１】第１図は本発明を光電変換素子に適用した
第１の実施の形態で、１０は第１の導電形の結晶半導体
（薄膜、厚膜、バルク状の結晶Ｓｉ、ＩｎＰ等）、２０
は結晶半導体１０の第１の表面に積層された第１の逆導
電形のアモルファスシリコン系薄膜、１２はアモルファ
スシリコン系薄膜２０によって結晶半導体１０の第１の
表面に定常的に誘起された反転層、２１はアモルファス
シリコン系薄膜２０に接着された第１の導電電極、２２
は窒化シリコン膜等から構成される保護層、３０は結晶
半導体１０の第２の表面に積層された第２のアモルファ
スシリコン系薄膜、１３は第２のアモルファスシリコン
系薄膜３０によって結晶半導体１０の第２の表面に定常
的に誘起された蓄積層、３１は結晶半導体１０の第２の
表面に接着された導電電極である。前記第２のアモルフ
ァスシリコン系薄膜３０は結晶半導体１０と同一の導電
形であっても逆導電形でも仕事関数が結晶半導体１０の
フェルミレベルより更に第１の導電形を強調する方向に
あれば、蓄積層を誘起することができる。FIG. 1 shows a first embodiment in which the present invention is applied to a photoelectric conversion element. Reference numeral 10 denotes a crystalline semiconductor of a first conductivity type (thin film, thick film, bulk crystalline Si, InP, etc.), 20
Is an amorphous silicon-based thin film of the first opposite conductivity type laminated on the first surface of the crystalline semiconductor 10; 12 is an inversion layer constantly induced on the first surface of the crystalline semiconductor 10 by the amorphous silicon-based thin film 20 , 21 are first conductive electrodes adhered to the amorphous silicon-based thin film 20;
Is a protective layer composed of a silicon nitride film or the like, 30 is a second amorphous silicon-based thin film laminated on the second surface of the crystal semiconductor 10, and 13 is a second amorphous silicon-based thin film 30 formed by the second amorphous silicon-based thin film 30. The accumulation layer steadily induced on the surface of No. 2 is a conductive electrode adhered to the second surface of the crystalline semiconductor. The second amorphous silicon-based thin film 30 may be of the same conductivity type as the crystal semiconductor 10 or of the opposite conductivity type, provided that the work function is in a direction that emphasizes the first conductivity type more than the Fermi level of the crystal semiconductor 10. An accumulation layer can be induced.
【００１２】本発明の実施の形態としては、第一の表面
側の構成と第２の表面側の構成が同一の半導体デバイス
中で同時に実現されていればそれだけ発明の効果は大き
いが、必ずしも同時に実現されている必要はなく、どち
らかの表面が従来の構成方法で構成されていても本発明
の実施の形態となり得る。According to an embodiment of the present invention, the effect of the present invention is great if the structure on the first surface side and the structure on the second surface side are simultaneously realized in the same semiconductor device. It does not need to be realized, and even if either surface is configured by a conventional configuration method, it can be an embodiment of the present invention.
【００１３】すなわち、第一の表面側の構成は従来公知
のものであっても第２の表面側の構成が本発明の構成と
なっていれば、本発明の目的、効果は達成される。さ
て、第１図の実施の形態では光は矢印Ｌで示されたよう
に、第１の表面から入射する場合を仮定する（勿論、第
２の表面から入射した場合も光電変換素子として動作す
る）。入射した光によって発生した少数キャリアは、第
２の表面近傍で発生したものについては蓄積層の電界に
よって矢印Ｃ1で示されるように、第１の表面側に押し
戻される。That is, even if the configuration on the first surface side is conventionally known, if the configuration on the second surface side is the configuration of the present invention, the objects and effects of the present invention are achieved. Now, in the embodiment of FIG. 1, it is assumed that light is incident from the first surface, as indicated by an arrow L (of course, it also operates as a photoelectric conversion element when incident from the second surface). ). Minority carriers generated by the incident light, for those generated by the second near the surface as indicated by arrows C 1 by the electric field of the storage layer, are pushed back to the first surface side.
【００１４】押し戻された少数キャリアは第１の表面近
傍で発生した少数キャリアと共に反転層１２に入り、矢
印Ｃ2で示されるように第１の表面に平行な方向に反転
層１２を電気伝導し、第１のアモルファスシリコン系薄
膜２０を通って第１の導電電極２１に集められる。一
方、光によって発生した多数キャリアによる電流は矢印
Ｃ3で示されるように第２の表面近傍に到達し、一部は
蓄積層１３を通って、第２の表面に平行に伝導し、第２
の導電電極に集められる。この発明の第１の実施の形態
では出力電圧を減少させることなく第１のアモルファス
シリコン系薄膜２０の膜厚を従来例よりも薄く構成する
ことができるので、短波長光の感度が改善され、更に第
１の結晶半導体の表面の電子状態が良好である（界面準
位密度が小さい）ので、短波長感度及び出力電圧に優れ
ている。第２の導電電極３１は、この実施の形態では結
晶半導体１０に接着しているが、これは第２のアモルフ
ァスシリコン系薄膜３０の厚み方向の抵抗がデバイス特
性を阻害する程大きいか、または結晶半導体１０と第２
のアモルファスシリコン系薄膜３０の間に第三の絶縁性
の薄膜が介在している場合に必要であり、この第２の導
電電極３１は結晶半導体１０とオーム性接触状態にあ
る。The repelled minority carriers enter the inversion layer 12 together with the minority carriers generated near the first surface, and conduct electricity through the inversion layer 12 in a direction parallel to the first surface as shown by an arrow C 2. Are collected on the first conductive electrode 21 through the first amorphous silicon-based thin film 20. On the other hand, the current due to the majority carriers generated by light reaches the second near the surface as indicated by arrow C 3, a portion passes through the accumulation layer 13, parallel to and conducted to the second surface, the second
Collected on the conductive electrodes. In the first embodiment of the present invention, the thickness of the first amorphous silicon-based thin film 20 can be made thinner than in the conventional example without reducing the output voltage, so that the sensitivity to short-wavelength light is improved, Furthermore, since the electronic state of the surface of the first crystal semiconductor is good (the interface state density is low), the short wavelength sensitivity and the output voltage are excellent. In this embodiment, the second conductive electrode 31 is adhered to the crystal semiconductor 10. The second conductive electrode 31 is so large that the resistance in the thickness direction of the second amorphous silicon-based thin film 30 is so large as to impair the device characteristics, or Semiconductor 10 and second
This is necessary when a third insulating thin film is interposed between the amorphous silicon-based thin films 30, and the second conductive electrode 31 is in ohmic contact with the crystalline semiconductor 10.
【００１５】第２のアモルファスシリコン系薄膜３０の
厚み方向の抵抗が小さい場合は第２の導電電極３１を第
２のアモルファスシリコン系薄膜３０に直接接着するこ
とができる。When the resistance in the thickness direction of the second amorphous silicon-based thin film 30 is small, the second conductive electrode 31 can be directly bonded to the second amorphous silicon-based thin film 30.
【００１６】第２図は本発明の第２の実施の形態を示
し、第１図と異なる点は第１のアモルファスシリコン系
薄膜２０に第１の導電電極２１を直接接着させた時に第
１のアモルファスシリコン系薄膜２０の膜厚方向の抵抗
が大きいか、または第三の絶縁性薄膜の介在のため、反
転層１２と電極間の抵抗が大きい場合にとられる構成を
示す。領域１４は第１の導電形を有する結晶半導体１０
の第１の表面に形成された逆導電形のキャリア収集領域
で、反転層のキャリアはまずこの領域に集められ、次い
でこのキャリア収集領域１４に接着された第１の導電電
極２１Ｃによって取り出される。結晶半導体１０の第２
の表面で少数キャリアが押し戻され、反転層１２を伝導
して取り出される動作は第１図の実施の形態と同様であ
る。なお、第１の導電電極２１Ｃが結晶半導体１０の第
１の表面とバリアを形成する場合は、キャリア収集領域
１４を設けなくても電流を取り出すことができる。第２
の実施の形態の結晶半導体１０の第２の表面には蓄積層
１３を定常的に誘起するような（例えば同一導電形）第
２のアモルファスシリコン系薄膜３０が積層されてい
る。更に、第２のアモルファスシリコン系薄膜３０の表
面には透明導電膜３２、導電電極３１ｂが順次積層され
ている。この構造は第２のアモルファスシリコン系薄膜
３０の膜厚方向の抵抗が小さい場合に有効で、第１の表
面から矢印Ｌ1に示されるように入射した光は第２の表
面の積層構造で有効に反射され、再度結晶半導体１０中
に戻り有効に吸収される。FIG. 2 shows a second embodiment of the present invention. The difference from FIG. 1 is that when a first conductive electrode 21 is directly adhered to a first amorphous silicon thin film 20, the first A configuration taken when the resistance in the thickness direction of the amorphous silicon-based thin film 20 is large or the resistance between the inversion layer 12 and the electrode is large due to the interposition of the third insulating thin film is shown. Region 14 is crystalline semiconductor 10 having the first conductivity type.
In the carrier collection region of the opposite conductivity type formed on the first surface of the first layer, the carriers of the inversion layer are first collected in this region, and then extracted by the first conductive electrode 21C adhered to the carrier collection region 14. Second of crystal semiconductor 10
The operation in which minority carriers are pushed back on the surface of the substrate and are taken out through the inversion layer 12 is the same as in the embodiment shown in FIG. Note that when the first conductive electrode 21C forms a barrier with the first surface of the crystal semiconductor 10, current can be extracted without providing the carrier collection region 14. Second
On the second surface of the crystalline semiconductor 10 according to the embodiment, a second amorphous silicon-based thin film 30 that steadily induces the accumulation layer 13 (for example, of the same conductivity type) is laminated. Further, on the surface of the second amorphous silicon-based thin film 30, a transparent conductive film 32 and a conductive electrode 31b are sequentially laminated. This structure is effective when the resistance in the thickness direction of the second amorphous silicon thin film 30 is small, light incident from the first surface, as indicated by the arrow L 1 is effective in the laminated structure of the second surface And is returned to the crystalline semiconductor 10 again and effectively absorbed.
【００１７】反射される光は長波長光であるので、光の
吸収は少ないためアモルファスシリコン系薄膜３０の膜
厚は厚くてもよく、全面に導電膜を積層しても光特性の
劣化は少ない。この構成により第１図の実施の形態同様
に長波長感度の改善が行われる。また、光発生した少数
キャリアが第二の表面から追い返されるという機構のた
めに、光だけでなく、低温プロセスによるキャリアの閉
じ込め機構が実現でき、出力電圧の改善も行うことがで
きる。Since the reflected light is long-wavelength light, the absorption of light is small, so that the amorphous silicon-based thin film 30 may have a large thickness. Even if a conductive film is laminated on the entire surface, deterioration of optical characteristics is small. . With this configuration, the long-wavelength sensitivity is improved as in the embodiment of FIG. Further, because of the mechanism in which light-generated minority carriers are repelled from the second surface, not only light but also a carrier confinement mechanism by a low-temperature process can be realized, and output voltage can be improved.
【００１８】[0018]
【発明の効果】以上述べたように、本発明の光電変換素
子の構成方法によれば、短波長、長波長感度の優れた光
電変換素子、出力電圧の改善された光電変換素子を低温
で製造することができるという格別の効果を有する。As described above, according to the method for constructing a photoelectric conversion device of the present invention, a photoelectric conversion device having excellent short-wavelength and long-wavelength sensitivity and a photoelectric conversion device having an improved output voltage can be manufactured at a low temperature. It has a special effect that it can be done.
【図１】本発明の第一の実施の形態の構成図である。FIG. 1 is a configuration diagram of a first embodiment of the present invention.
【図２】本発明の第二の実施の形態の構成図である。FIG. 2 is a configuration diagram of a second embodiment of the present invention.
１０ 第１の導電形の結晶半導体 １２ 第１の表面に定常的に誘起された反転層 １３ 第２の表面に定常的に誘起された蓄積層 １４ 第１の表面に形成された逆導電形のキャリア収集
領域 ２０ 第１の逆導電形のアモルファスシリコン系薄膜 ２１、２１Ｃ 第１の導電電極 ２２ 保護層 ３０ 第２のアモルファスシリコン系薄膜 ３１、３１ｂ 導電電極 ３２ 透明導電膜Reference Signs List 10 crystal semiconductor of first conductivity type 12 inversion layer constantly induced on first surface 13 accumulation layer constantly induced on second surface 14 of opposite conductivity type formed on first surface Carrier collection region 20 Amorphous silicon-based thin film of first reverse conductivity type 21, 21C First conductive electrode 22 Protective layer 30 Second amorphous silicon-based thin film 31, 31b Conductive electrode 32 Transparent conductive film
Claims (4)
面を有する第一の導電形を有する結晶半導体の、該第一
の表面にキャリア収集接合を設け、 該第二の表面にアモルファスシリコン系薄膜と導電膜が
順次積層された光電変換素子において、 該結晶半導体の該第二の表面に定常的なキャリア蓄積層
を該アモルファスシリコン系薄膜により形成するととも
に、 前記導電膜と前記キャリア蓄積層がオーム性接続するこ
とを特徴とする光電変換素子 。1. A carrier collecting junction is provided on a first surface of a crystalline semiconductor having a first conductivity type having a first surface and a second surface facing the surface, wherein a carrier collection junction is provided on the second surface. in order stacked photoelectric conversion element is an amorphous silicon-based thin film and a conductive film, when a steady carrier accumulation layer in the crystalline semiconductor of the second surface is formed by the amorphous silicon thin film together
The ohmic connection between the conductive film and the carrier storage layer
And a photoelectric conversion element .
は、透明導電膜であることを特徴とする請求項１に記載
の光電変換素子。2. The conductive film has a two-layer structure.
The photoelectric conversion element according to claim 1, wherein is a transparent conductive film .
導体と接触して、オーム性接触を有することを特徴とす
る請求項１に記載の光電変換素子。3. The photoelectric conversion element according to claim 1, wherein the conductive film contacts at least partially the crystal semiconductor and has ohmic contact.
上に第二のアモルファスシリコン系薄膜を積層して形成
し、さらに電極の一部として透明導電膜を順次積層して
形成したことを特徴とする請求項１に記載の光電変換素
子。4. The carrier collecting junction is formed by laminating a second amorphous silicon-based thin film on the first surface and further laminating a transparent conductive film as part of an electrode. The photoelectric conversion element according to claim 1,
Child .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13199198A JP3295725B2 (en) | 1998-05-14 | 1998-05-14 | Photoelectric conversion element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13199198A JP3295725B2 (en) | 1998-05-14 | 1998-05-14 | Photoelectric conversion element |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1116999A Division JP2813712B2 (en) | 1989-05-10 | 1989-05-10 | Photoelectric conversion element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH118400A JPH118400A (en) | 1999-01-12 |
| JP3295725B2 true JP3295725B2 (en) | 2002-06-24 |
Family
ID=15071009
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13199198A Expired - Lifetime JP3295725B2 (en) | 1998-05-14 | 1998-05-14 | Photoelectric conversion element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3295725B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101918737B1 (en) * | 2012-03-19 | 2019-02-08 | 엘지전자 주식회사 | Solar cell |
-
1998
- 1998-05-14 JP JP13199198A patent/JP3295725B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH118400A (en) | 1999-01-12 |
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