JP3238074B2 - Tape carrier for semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tape carrier used as a connection medium when connecting a semiconductor element to an external substrate or the like, and more particularly to a tape carrier for a semiconductor device used for a BGA type package.

[0002]

2. Description of the Related Art A semiconductor device using a BGA (Ball Grid Array) type package is suitable for high pin count and high density mounting. In particular, using a tape carrier, a conductor pattern is formed on one surface of the conductor pattern, and an end of the conductor pattern is connected to an electrode of the semiconductor element. On the other hand, a solder ball is provided at a predetermined position of the conductor pattern, and the 2. Description of the Related Art A semiconductor device configured to be connected to an electrode pad on a printed circuit board has been receiving attention because it can be made thinner and smaller.

FIG. 4 is a plan view showing a configuration example of a conventional tape carrier for a semiconductor device, and FIG. 5 is a rear view of the tape carrier of FIG. FIG. 6 is a sectional view taken along line AA of the tape carrier of FIG. As shown in FIG. 4, in the tape carrier 200, a square opening is provided in the center of the square insulating film 201, and the opening forms a device hole 202. Insulating film 201
Are provided with circular lands 203 at regular intervals.

[0004] In each side of the device hole 202,
Inner leads 204 are provided in parallel at regular intervals toward the opposite side so as to straddle the inner edge. The inner leads 204 and some of the lands 203 correspond one to one, and both are connected by a Cu (copper) conductor pattern 205. The tip of the inner lead 204 has a predetermined length extending into the device hole 202 and is connected to an electrode pad of a semiconductor element (not shown) to be mounted.

[0005] The solder balls (not shown) are
Is provided on the back surface (the surface in FIG. 5). For this reason, as shown in FIG.
Is provided with a circular opening 206 at a part thereof to form a solder ball forming land 207. Solder balls (or solder paste) are formed on the solder ball forming lands 207 by printing and reflow.

The land 203 and the inner lead 20
4. The Cu conductor pattern 205, the solder ball forming land 207, and the like are plated with Au (gold), Sn (tin), solder, or the like.

[0007]

However, according to the conventional tape carrier for a semiconductor device, the diameter of the opening 206 is made larger than the thickness of the insulating film 201 (the depth of the opening 206) in order to achieve a fine pitch. When relatively small,
It becomes difficult for the solder ball (or the solder paste) to come into contact with the solder ball forming land 207. As a result, poor solder wetting occurs, voids occur in the opening 206,
The solder may not be joined to the solder ball forming land 207 in some cases.

As a means for solving this problem, the diameter of the opening 206 is made larger than before. However, to meet the demand for fine pitch, the aperture 206
Must be reduced, and this method cannot solve the problem. Accordingly, the present invention provides a tape carrier for a semiconductor device that can reliably mount a solder ball or perform solder bonding in solder paste printing / reflow even if the opening provided in the insulating film is small in diameter. It is an object.

[0009]

In order to achieve the above object, the present invention provides an insulating film provided with a device hole for mounting a semiconductor chip at a predetermined position;
A semiconductor device tape carrier comprising: a solder ball forming land formed on at least one surface of the insulating film and exposed to the other surface of the insulating film through an opening provided in the insulating film. It was exposed to the depth of the opening by providing a conductive layer to a predetermined thickness in a portion of the small, thereby reducing the diameter of the opening
Even if the solder balls or solder
Solder bonding to the land with paste
Tape carrier for semiconductor devices, characterized in that
You provide.

According to this structure, the conductor layer provided on the land reduces the depth of the land portion (in the opening) of the insulating film. Therefore, even if the diameter of the opening of the land portion is reduced for fine pitching, the mounting of the solder ball or the solder joining in the solder paste printing / reflow can be reliably performed. The conductor layer,
Cu plating, Ni plating, or solder plating can be used.

According to this structure, the plating technique conventionally used in the semiconductor manufacturing process can be used as it is, and the thickness can be arbitrarily formed. As a result, while the manufacturing process is simple and easy, the mounting of the solder ball or the solder joining in the solder paste printing / reflow can be performed reliably. When the radius of the solder ball is r, the radius of the land is R, and the depth of the opening is D, the required thickness T of the conductor layer is T ≧ D−
It can be determined by [r- (r ² -R ^{2) 1/2].}

According to this configuration, the thickness of the conductor layer can be optimally determined according to the conditions of the solder ball, the land diameter, and the depth of the opening.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a rear view showing a tape carrier for a semiconductor device according to the present invention, and FIG. 2 is a sectional view taken along line BB of the tape carrier of FIG. As shown in FIG. 1, a tape carrier 100 according to the present invention is made using an insulating film 101 made of polyimide or the like, and its outer shape is a square, and a square opening for mounting a semiconductor chip is provided at the center thereof. Thus, a device hole 102 is formed.
The opening 101a is made smaller in diameter than the conventional opening 206 in order to achieve a fine pitch.

On the back surface (mounting surface on a substrate or the like) of the insulating film 101, a right circular solder ball forming land 10 is provided.
3 are provided at regular intervals. In order to expose the solder ball formation land 103 to the back surface of the insulating film 101, a portion facing the solder ball formation land 103 is provided with a right circular opening 101a.
The opposite surface of the solder ball forming land 103 is exposed on the surface of the insulating film 101, and some of them are connected to a Cu conductor pattern (not shown) formed as shown in FIG. . The ends of the Cu conductor pattern are exposed to a certain length in a state where they are arranged in the device hole 102 at a certain interval, thereby forming an inner lead 104. This inner lead 104 is connected to an electrode pad of a semiconductor element (not shown) to be mounted.

Further, as shown in FIG. 2, a conductor layer 105 is provided only on a portion of the land 103 for forming a solder ball, which is exposed from the opening 101a. This conductor layer 1
05 is Cu, Ni (nickel) plating, or Sn-
Plating with Pb (tin-lead) solder can be used. The solder ball forming land 103 and the inner lead 104 are made of Au, S
n, plated with solder or the like.

As described above, according to the tape carrier of the present invention, the solder ball forming land 103 is
5, if the insulating film 101 has the same thickness as the conventional one, the depth of the opening 101 a becomes shallow, and even if the diameter of the opening 101 a is reduced, mounting of solder balls, printing of solder paste, and reflow Can be performed reliably.

Next, the relationship between the diameter of the opening 101a and the thickness of the conductor layer 105 will be described with reference to FIG. Here, if the radius of the solder ball 106 is defined as r, the radius of the land 103 for forming the solder ball is defined as R, and the depth of the land hole is defined as D, the required thickness T of the conductor layer 105 is expressed by the following equation. You.

T ≧ D− [r− (r ² −R ² ) ^1/2 ] By satisfying such a relationship, poor wetting and void formation during reflow due to poor contact of the solder ball or solder paste can be prevented. Can be prevented. In the above description, the conductor pattern is provided only on one surface of the insulating film 101. However, a configuration in which the conductor pattern is provided on both surfaces of the insulating film 101 may be adopted.

[0019]

As described above, according to the present invention, the conductor layer having a predetermined thickness is provided only on the exposed portions of the lands for forming the solder balls. Even if the diameter of the opening in the land portion is reduced for fine pitch, it is possible to prevent poor wetting and void formation during reflow due to poor contact of the solder ball or solder paste.

[Brief description of the drawings]

FIG. 1 is a rear view showing a tape carrier for a semiconductor device according to the present invention.

FIG. 2 is a sectional view taken along line BB of the tape carrier of FIG.

FIG. 3 is an explanatory diagram showing a relationship between an opening diameter of a land portion and a thickness of a conductor layer provided on the land in the tape carrier of the present invention.

FIG. 4 is a plan view showing a configuration example of a conventional tape carrier for a semiconductor device.

FIG. 5 is a back view of the tape carrier of FIG. 4;

FIG. 6 is a sectional view taken along line AA of the tape carrier of FIG. 4;

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 tape carrier 101 insulating film 102 device hole 103 land for forming solder ball 104 inner lead 105 conductor layer

──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Norio Okabe 3550 Kida Yomachi, Tsuchiura City, Ibaraki Prefecture Inside Hitachi, Ltd.System Materials Laboratory (72) Inventor Yasuharu Kameyama 3550 Kida Yomachi, Tsuchiura City Ibaraki Hitachi (72) Inventor: Mamoru Mita 3-1-1, Sukekawa-cho, Hitachi, Ibaraki Pref. Inside the electric wire plant of Hitachi Cable Co., Ltd. (72) Inventor: Ichiro Yasui 5-20-1, Hitachi, Ltd. Semiconductor Division (56) References JP-A-8-111433 (JP, A) JP-A-4-3233893 (JP, A) (58) Fields surveyed (Int.Cl) . ^7, DB name) H01L 21/60 H05K 3/40

Claims (3)

(57) [Claims] An insulating film provided with a device hole for mounting a semiconductor chip at a predetermined position; and an insulating film formed on at least one surface of the insulating film and passing through an opening provided in the insulating film. A tape carrier for a semiconductor device having a solder ball forming land exposed on the other surface of the film, wherein a conductor layer is provided in a predetermined thickness on an exposed portion of the land to reduce the depth of the opening , The diameter of the opening
Even if it is small, solder balls or via the conductor layer
Solder bonding to the land with solder paste
A tape carrier for a semiconductor device, wherein 2. The method according to claim 1, wherein the conductor layer is formed of Cu plating, Ni plating,
2. The tape carrier for a semiconductor device according to claim 1, wherein the tape carrier is solder plating. Wherein the conductive layer, the radius of the solder balls r, the radius of the land R, when the depth of the aperture is D, the thickness T required, T ≧ D-[r- ( 3. The tape carrier for a semiconductor device according to claim 1, wherein r ² −R ² ) ^1/2 ].