JP3196931B2 - Partitioning method and device, and emulation method and device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a partitioning method and device, and an emulation method and device.

[0002]

2. Description of the Related Art Emulation is disclosed in
A technique disclosed in Japanese Patent Publication No. -50453 is known.
The emulation device performs logic verification of an LSI. The emulation apparatus maps the logic (Logic) of the LSI to be verified to a programmable device such as a field programmable gate array (FPGA) and performs LS on the programmable device.
The logic verification of I is performed.

An emulation apparatus includes a plurality of emulation boards (hereinafter, simply referred to as boards) on which a plurality of the programmable devices are mounted. Data (circuit data) indicating an LSI circuit (logic) to be verified in the emulation device is divided into a plurality of data blocks (circuit blocks), and each data block is assigned to each of the plurality of boards. This assignment is called partitioning. Here, the data indicating the circuit (logic) of the LSI corresponds to what is generally called a netlist.

There is a certain limit to the amount of data (the circuit block) that can be mounted on one board (this is called the maximum number of mounted gates). Therefore, the partitioning is performed by the data amount (circuit size, number of gates) of the circuit block allocated to each of the plurality of boards.
Must be performed so as not to exceed the limit.

The electrical connection between the circuit blocks allocated to each of the plurality of boards is performed by signal lines (wirings) connected between the plurality of boards. In this case, there is a certain restriction on the number of signal lines (number of signals) that can be connected to one board. This is a restriction on the physical configuration of the emulation device and is determined by the specifications of the emulation device. Therefore, at the time of the partitioning, when the circuit block is allocated to the one board, the number of signal lines drawn from the circuit block does not exceed the number of constraints (maximum number of signals between boards). Need to be done.

After the partitioning is performed, a compile process is performed on each of the plurality of boards. After that, the whole circuit data is compiled. Here, the compiling process in the emulation device means that circuit data described as connecting a logic gate (described later), which is a basic unit of a circuit designed by a user, can be mapped on an FPGA of the emulation device. Means to convert the data into simple circuit data. In general, a set of variations of the logic gate corresponds to what is called a primitive library.

Hereinafter, a partitioning system for performing the partitioning will be described with reference to FIG.

The conventional partitioning system includes an input unit 5, a data processing unit 6, a data storage unit 7, and an output unit 8.

The input unit 5 is, for example, a keyboard operated by an operator. The data processing unit 6 includes a gate number detection unit 51, a hierarchy development unit 52, a signal detection unit 53,
And a partition generation unit 54.

The data storage unit 7 includes a circuit data storage unit 71
, A gate number conversion library storage section 72, a module gate number storage section 73, a signal number storage section 74, and a partition data storage section 75. The output unit 8
The result of the partitioning process by the data processing unit 6 is output.

Next, the circuit data to be subjected to the partitioning process will be described with reference to FIG.

As shown in FIG. 3, the circuit data includes a plurality of modules M1, M2, M3, M11, M12,.
It is composed of The plurality of modules M1, M
2, M3, M11, M12,... Often form one or more layers A, B, C, D. As shown in FIG. 3, a plurality of modules M1,
In M2, M3, M11, M12,..., Modules M30, M31, M32,
, M12Y are described at the gate level.

Here, "gate" means a two-input or three-input logic gate such as an AND gate or an OR gate. Here, the “gate level” refers to the logic gate (AND gate or OR gate) serving as the basic unit.
Gates, etc.) are connected to each other. A “module” is a unit that realizes one function, and is composed of a plurality of primitive blocks. One module may include a plurality of modules.

"Primitive block" has the same meaning as the gate. The primitive library is prepared as a set of variations of the primitive block (= the gate). The lowest hierarchy C, D
The functional block (lowest hierarchical block) corresponding to
Alternatively, it is a minimum functional unit that includes two or more of the gates and can be mapped on the FPGA. That is, when the configuration of the circuit data is arranged, from the upper level to the lower level of the hierarchy, there is a relation of an upper hierarchical block---the lowermost hierarchical block-the gate (= the primitive block). The minimum unit that can be mapped to the board is the lowest hierarchical block, and the gate (= primitive block) is a component of the lowest hierarchical block. Hereinafter, the gate (= primitive block) is referred to as a basic unit. It is referred to as a minimum unit for mapping the lowest hierarchical block to the FPGA. Functionally described (HDL description) (the above functional block) is logically synthesized and gate-described,
It is converted to the primitive block (= the gate).

In FIG. 9, the circuit data storage 71
In advance, a plurality of circuit data of an LSI to be subjected to logic verification are stored. The circuit data is stored in the circuit data storage unit 71 with the minimum unit as the functional block of the lowest hierarchy (the lowest hierarchical block). The function description (HDL description) (the function block) is logically synthesized and the gate description is stored in the circuit data storage unit 71 as the circuit data.

The gate number conversion library storage section 72 previously stores data indicating the gate size of each of the plurality of primitive blocks. As described above, the primitive block means the gate, but the gate size here means, for example, that the gate of a two-input NAND becomes one gate, and
The gates of the input NAND indicate the scale (the number of gates) of each gate, such as two gates.

Next, the operation of the partitioning system shown in FIG. 9 will be described.

First, a control command is output from the input unit 5 to the data processing unit 6. This control command indicates that the circuit data to be subjected to logic verification is specified from among the plurality of circuit data stored in the circuit data storage unit 71.

The operation of the gate number detecting section 51 will be described.

The gate number detecting section 51 receives the control command and reads circuit data specified by the input control command from the circuit data storage section 71.

The gate number detecting section 51 refers to the data stored in the gate number conversion library storage section 72. The gate number detection unit 51 calculates the total number of gates (the number of gates of all modules constituting the circuit data) included in the read circuit data based on the referenced data. To detect.

At this time, the gate number detector 51 detects the number of gates included in each of the plurality of modules constituting the circuit data. In this case, the number-of-gates detection unit 51 determines, for each of the modules included in each of the plurality of modules forming the hierarchical structure, in order from the module included in the lowest hierarchy to the higher hierarchy. The number of the gates included is detected.

The number-of-gates detecting section 51 detects the number of gates in the above-described order (bottom-up), and thereby, in addition to the number of gates included in each of the plurality of modules, the number of gates of the plurality of layers. It is possible to detect the number of gates of all the modules included therein and the number of gates included in the entire circuit data.

The gate number detecting section 51 stores data indicating the detected gate number in the module gate number storing section 73. In this case, the gate number detector 5
The data indicating the number of gates detected by 1 is stored in the module gate number storage 73 with the number of gates included in each of the plurality of modules being known.

Next, the operation of the hierarchy expanding section 52 will be described.

The hierarchy expanding section 52 reads out from the module gate number storing section 73 data indicating the number of gates included in each of the plurality of modules constituting the circuit data.

The hierarchy expanding section 52 determines whether or not the number of gates included in each of the plurality of modules is larger than the maximum number of mounted gates per board. If the number of gates of the module is larger than the maximum number of mounted gates as a result of the determination, the hierarchy expanding unit 52 expands the hierarchy for the module.

The determination by the hierarchical expansion unit 52 and the hierarchical expansion based on the determination result are performed from a module included in an upper hierarchy to a lower hierarchy among the plurality of modules constituting the circuit data. It is done in order (top down).

In the above, “expanding the hierarchy” means
For example, when it is determined that the number of gates included in the module M3 in the hierarchy A is larger than the maximum number of mounted gates, a hierarchy C is provided below the module M3, and a plurality of gates included in the module M3 are classified into the hierarchy. C is divided into a plurality of modules M30, 31, 32, and 33. Then, each of the modules M30, M3
Partitioning described later is performed in units of 1, 32, and 33. On the other hand, for example, when it is determined that the number of gates included in the module M1 is equal to or smaller than the maximum number of mounted gates, the module M1 is not expanded in a hierarchy, and the module M1 is divided into the unit in partitioning. And

Next, the operation of the signal detector 53 will be described.

When the hierarchical development of the module by the hierarchical development unit 52 is completed, the signal detection unit 53 detects the number of external signals of each of the plurality of modules. The signal detector 53 stores data indicating the detection result in the signal number storage 74.

Here, the "number of external signals of a module" is the number of terminals (connection portions) required for connecting the module to another module.

Next, the operation of the partition generator 54 will be described.

The partition generation unit 54 allocates a part of the circuit data (the circuit block) to each of the plurality of boards included in the emulation device. In this case, a specific operation of the partition generation unit 54 is as follows.

The partition generation unit 54 first
Each of the plurality of modules is mounted on the first board of the plurality of boards until immediately before the maximum number of mounted gates is exceeded. At this time, since each of the plurality of modules has been processed by the hierarchy expanding unit 52, the number of gates of each module is equal to or less than the maximum number of mounted gates.

When the module is mounted on the first board up to just before the maximum number of mounted gates, the partition generation unit 54 finishes the assignment to the first board, and Is on the second board,
The module is mounted until immediately before exceeding the maximum number of mounted gates. The same applies to the third and subsequent boards, and this operation is performed until all of the plurality of modules constituting the circuit data are mounted on the board.

As described above, the partition generation unit 54 operates in order from the first board of the board so as to reduce the number of used boards until the board becomes immediately before the maximum number of mounted gates. Will be installed. Therefore, when a circuit having a small number of gates (small circuit size) is to be subjected to logic verification, not all the boards included in the emulation device are used.

In the partition generator 54, the number of signals between the boards (between partitions) is minimized based on the data indicating the number of external signals for each module detected by the signal detector 53. The partitioning is performed as described above. Here, "the number of connection signals between the boards" refers to a signal line serving as an interface for electrically connecting the circuit blocks mounted on each of the boards between the boards. Indicates a number. As described above, the number of connection signals between the boards is subject to physical restrictions as in the case of the maximum number of mounted gates.

[0039]

As described above, in the partitioning system, as described above, the plurality of boards included in the emulation apparatus are sequentially arranged from the first one until the number exceeds the maximum number of mounted gates. Each of the modules is mounted as a unit.

Here, since the hierarchical expansion of the modules is based on the maximum number of mounted gates, the hierarchically expanded number of gates for each module treated as a unit of partitioning is large. Is different. As described above, since the modules having significantly different numbers of mounted gates are mounted on the boards, the difference in the number of mounted gates between the boards at the end of the partitioning is large.

In addition, each of the plurality of modules constituting the circuit data is allocated in order from the first board of the plurality of boards until immediately before exceeding the maximum number of mounted gates. On the eye board,
In some cases, only gates that are significantly less than the maximum number of mounted gates (gates that have not been mounted up to the “final one-to-one” board) may be mounted.

As described above, as a result of the partitioning, the number of gates mounted on each of the plurality of boards is almost 100% of the maximum number of mounted gates.
From 1% to less than 1%.

The processing time of the compilation is affected by the number of gates mounted on the board. The compiling process is performed in parallel (in parallel) for each of the plurality of boards. As described above, since the number of mounted gates of each of the plurality of boards is significantly different, the execution time of the compile process is also significantly different for each of the plurality of boards (for example, from several seconds only to several hours). It is very different from what you need)
There are cases.

In a general emulation device, as described above, after the compile process for each of the plurality of boards is completed, the compile process for the entire circuit data is performed. Therefore, a large difference in the compile processing time (the number of mounted gates) of each of the plurality of boards leads to an increase in the overall processing time.

In addition to the above-mentioned problem of the compile processing time, there is a problem of a compile error. That is,
Conventionally, the number of gates near the maximum number of mounted gates may be mounted on each of the plurality of boards, so that there is a problem that the compilation error is highly likely to occur accordingly. . Generally, when the circuit data is mapped to the FPGA of the emulation device, the total number of connection signals between the plurality of primitive blocks (the gates) increases as the number of mounted gates (scale of mounted gates) increases. ,
The resources consumed by the FPGA for realizing the connection increase, and the possibility of the compile error increases.

The present invention has been made in view of the above circumstances, and can shorten the entire processing time and minimize the possibility of occurrence of an error in a process such as compiling. Partitioning method and apparatus,
And an emulation method and apparatus.

[0047]

According to a partitioning method of the present invention, data to be inspected (circuit data) is divided into a plurality of pieces to generate a plurality of data blocks (circuit blocks, one partition) as a result of the division. Processing unit data (module M3) including at least one element data (gate).
0, M31, M32, and M33) as data to be inspected (M3); and a plurality of processing unit data (M30) constituting the inspected data (M3). , M31, M32,
M33) detecting the number of element data included in each of the plurality of processing unit data (M30, M31, M32) constituting the inspection object data (M3) based on the detection result. , M33) to select a plurality of processing unit data (M33, M30) and select the plurality of processing unit data (M33, M3).
0) to the candidate block (new modules M33, M3
(B2, B3) and a step (B4) of comparing the number of the element data included in the generated candidate blocks (M33, M30) with a set value.
And the candidate block (M3
(B4, B7) for determining whether or not (3, M30) is the data block.

In the partitioning method of the present invention, each of the plurality of data blocks as a result of the division is allocated to a board, and the step (B4) of performing the comparison includes all the blocks included in the data to be inspected. The number set based on the average number of mounted element data corresponding to the number obtained by dividing the number of the element data by the number of all the boards for allocating each of the plurality of data blocks is the set value.

In the partitioning method of the present invention, the step of providing the data as the data to be inspected (M3) includes the steps of: detecting the number of the element data included in the input data; Comparing the number of element data included in the data with a predetermined value (A3); and generating the processing unit data based on the result of the comparison (A3).
5, A8).

In the partitioning method of the present invention, each of the plurality of data blocks as a result of the division is assigned to a board, and the step (A3) of performing the comparison and review includes all of the data included in the data to be inspected. The number set based on the average number of mounted element data corresponding to the number obtained by dividing the number of the element data by the number of all the boards for allocating each of the plurality of data blocks is the predetermined value. Things.

In the partitioning method according to the present invention, the step (A3) of performing the comparison and examination includes automatically determining the value of the predetermined value when it is determined that the division of the data to be inspected cannot be performed. Is to be updated.

In the partitioning method of the present invention, the step (B4) of performing the comparison includes automatically changing the value of the set value when it is determined that the division of the data to be inspected cannot be performed. To be updated.

In the partitioning method of the present invention, if the candidate block (M33, M30) is determined not to be the data block as a result of the determining step, the inspection target is determined based on the detection result. Among the plurality of processing unit data (M30, M31, M32, M33) constituting the target data (M3), the plurality of processing unit data (M33, M30) included in the candidate block (M33, M30) The processing unit data (M31) that replaces at least one of the processing unit data (M30) is selected, and a second candidate block (M3) is selected based on the selected processing unit data (M31).
(B4-N, B10)
-N, B3), and the step of performing the comparison includes comparing the number of the element data included in the generated second candidate block (M31, M33) with the set value and determining the value. The step determines whether or not the second candidate block (M31, M33) is the data block based on the comparison result.

In the partitioning method of the present invention, when the candidate block (M33, M30) is determined as the data block as a result of the determining step, the inspection object data (M3) is formed. The plurality of processing unit data (M30, M31, M3
2, M33), a plurality of processing unit data (M31, M32) are selected from a plurality of processing unit data (M31, M32) other than the candidate block (M33, M30) determined as the data block. (B8, B1, B2, B3) of generating a third candidate block (new modules M31, M32) from the selected plurality of processing unit data (M31, M32).
The step of performing the comparison includes comparing the number of the element data included in the generated third candidate block (M31, M32) with the set value, and the step of determining based on the result of the comparison Then, it is determined whether or not the third candidate block (M31, M32) is to be the data block.

In the partitioning method of the present invention, each of the plurality of data blocks as a result of the division is assigned to a board, and further, the data blocks of the element data included in the generated candidate blocks (M33, M30) are further assigned. (B5) comparing the number with the maximum number of mounted element data indicating the maximum number of element data that can be allocated to the board, and the step of determining (B)
4, B5, B7) make the determination based on the comparison result and the comparison result.

In the partitioning method of the present invention, each of the plurality of data blocks as a result of the division is assigned to a board, and the plurality of other data blocks in the generated candidate block (M33, M30) are further assigned. Detecting the number of external signals for making an electrical connection with each of the blocks; the number of the external signals of the detected candidate blocks (M33, M30); (B6) comparing with the maximum number of inter-board signals indicating the maximum number of external signals, and determining (B4, B6,
B7) performs the determination based on the comparison result and the comparison result.

In the partitioning method of the present invention, it is further determined that the number of the external signals of the detected candidate blocks (M33, M30) exceeds the maximum number of signals between boards as a result of the comparison. (B6
-N) includes the plurality of processing unit data (M30, M31, M32, M) constituting the inspection object data (M3).
33), the candidate blocks (M33, M30)
The plurality of processing unit data (M33, M3
0) of the processing unit data (M3
0) the processing unit data (M31) instead of
Generating a fourth candidate block (M31, M33) based on the selected processing unit data (M31) (B6-N, B9-N, B3); The fourth candidate block (M
31, M33) and comparing the set value with the number of the element data included in the fourth candidate block (M31, M33) based on the comparison result.
M33) is determined as the data block.

According to the partitioning method of the present invention, the data to be inspected (circuit data) is divided into a plurality of data blocks and a plurality of data blocks (circuit blocks,
A partitioning method for generating one partition), comprising processing unit data (modules M1, M2, M3, M) having at least one element data (gate).
30, M31, M32, M33); and providing the plurality of processing unit data (M1, M
2, M3, M30, M31, M32, M33) into a plurality of groups (hierarchies A, C) and the plurality of processing unit data (M1, M2, M) as a result of the classification.
3, M30, M31, M32, M33) as the data to be inspected, and the plurality of processes belonging to a first group (layer C) of the plurality of groups (layers A, C). Unit data (M30, M31,
M32, M33), and detecting the number of element data included in each of the plurality of processing unit data (M30, M30, M30) belonging to the first group (layer C) based on the detection result. M31, M32, M3
3) From the plurality of processing unit data (M33, M30)
(B2, B3) generating a candidate block (new modules M33, M30) from the selected plurality of processing unit data (M33, M30)
(B4) comparing the number of the element data included in the generated candidate block (M33, M30) with a set value, and the candidate block (M33, M30) based on the comparison result. (B4, B7) for determining whether or not is a data block.

In the partitioning method of the present invention, further, if it is determined that the candidate block (M33, M30) is not to be the data block as a result of the determining step (B4-N), based on the detection result. The plurality of processing unit data (M30, M31, M32, M33) belonging to the first group (layer C)
From among the plurality of processing unit data (M33, M30) included in the candidate block (M33, M30), the processing unit data (M31) that replaces at least one of the processing unit data (M30) is selected. Generating a second candidate block (M31, M33) from the selected processing unit data (M31) (B)
The step of performing the comparison includes the step of comparing the number of the element data included in the generated second candidate blocks (M31, M33) with the set value and performing the determination. , Based on the comparison result, it is determined whether or not the second candidate block (M31, M33) is to be the data block.

In the partitioning method of the present invention, if the candidate block (M33, M30) is determined not to be the data block as a result of the determining step (B4-N), the first group The plurality of processing unit data (M3
0, M31, M32, M33), when it is not possible to generate a second candidate block in place of the candidate block (M33, M30) (B10-Y), the above-mentioned belonging to the first group (layer C) Multiple processing unit data (M3
0, M31, M32, and M33) in a step (B12) of assigning at least a part of the processing unit data to a second group (layer A) of the plurality of groups.

In the partitioning method of the present invention, each of the plurality of data blocks as a result of the division is assigned to a board, and furthermore, the data blocks of the element data included in the generated candidate blocks (M33, M30) are further assigned. (B5) comparing the number with the maximum number of mounted element data indicating the maximum number of element data that can be allocated to the board, and as a result of the comparison, the number included in the candidate block (M33, M30) If it is determined that the number of element data exceeds the maximum number of mounted element data (B5-N), the candidate block (M33, M3
0) contained in the plurality of processing unit data (M33, M
30) at least one of the processing unit data (M
33) belonging to a second group (layer A) of the plurality of groups.

[0062] In the partitioning method of the present invention, each of the plurality of data blocks resulting from the division is allocated to a board, and the plurality of other data blocks in the generated candidate block (M33, M30) are further allocated. Detecting the number of external signals for making an electrical connection with each of the blocks; the number of the external signals of the detected candidate blocks (M33, M30); (B6) comparing with the maximum number of inter-board signals indicating the maximum number of the external signals, and as a result of the comparison, the number of the external signals of the detected candidate blocks (M33, M30) is determined by the When it is determined that the maximum number of signals between boards has been exceeded (B
6-N), the plurality of processing unit data (M30, M31, M32, M3) belonging to the first group (layer C).
M33) using the candidate blocks (M33, M30)
Cannot generate the second candidate block in place of (B9
-Y), a step (B14) of assigning at least one of the processing unit data (M33) of the candidate blocks (M33, M30) to a second group (layer A) of the plurality of groups. It is a thing.

In the partitioning method according to the present invention, the step (B12, B14) of forming the plurality of groups (layers A and C) into a layer and assigning the group to the second group (layer A) includes the step (B12, B14). As a second group (layer A), a group higher in the hierarchy than the first group (layer C) is selected.

In the partitioning method of the present invention, a step (B1) of determining whether the first group (layer C) is at the top of the hierarchy (B1).
1, B13), and when it is determined that the first group (layer C) is at the highest level,
A step (B15) of notifying that the division of the data to be inspected cannot be performed instead of the step (B12) of belonging to the second group (layer A).
It is provided with.

After dividing the data to be inspected (circuit data) into a plurality of data blocks and generating a plurality of data blocks (circuit blocks, one partition) as a result of the division,
An emulation method for emulating the data to be inspected, comprising: processing unit data (module M3) including at least one element data (gate)
0, M31, M32, and M33) as data to be inspected (M3); and a plurality of processing unit data (M30) constituting the inspected data (M3). , M31, M32,
M33) detecting the number of element data included in each of the plurality of processing unit data (M30, M31, M32) constituting the inspection object data (M3) based on the detection result. , M33) to select a plurality of processing unit data (M33, M30) and select the plurality of processing unit data (M33, M3).
0) to the candidate block (new modules M33, M3
(B2, B3) and a step (B4) of comparing the number of the element data included in the generated candidate blocks (M33, M30) with a set value.
And the candidate block (M3
3, M30) as the data block (B4, B7), and a step of performing data processing on each of the plurality of determined data blocks in parallel. is there.

A partitioning method according to the present invention is a partitioning apparatus which divides data to be inspected into a plurality of pieces and generates a plurality of data blocks as a result of the above-mentioned division, wherein the processing includes at least one piece of element data. The data composed of a plurality of unit data (M30, M31, M32, M33) is referred to as the inspection object data (M
3), and the data to be inspected (M
3) The plurality of processing unit data (M30, M
(M1, M32, M33) and a plurality of processing unit data (M30) constituting the inspection object data (M3) based on the detection result. , M31, M32, M3
3) From the plurality of processing unit data (M33, M30)
To select a plurality of processing unit data (M3
3, M30) and the candidate block (new module M3)
(B2, B3) and means (B4) for comparing the number of the element data included in the generated candidate blocks (M33, M30) with a set value.
And the candidate block (M3
(B4, B7) for determining whether or not (3, M30) is the data block.

In the partitioning apparatus according to the present invention, each of the plurality of data blocks as a result of the division is allocated to a board, and the means (B4) for performing the comparison includes all the data blocks included in the data to be inspected. The set value is a number set based on an average mounted element data number corresponding to a number obtained by dividing the number of the element data by the number of all the boards for allocating each of the plurality of data blocks. It is.

In the partitioning device of the present invention, the means for providing the data as the data to be inspected (M3) includes: means for detecting the number of the element data included in the input data; A means (A3) for comparing and examining the number of element data included in the data with a predetermined value, and means (A5, A8) for generating the processing unit data based on the result of the comparison and examination It is.

In the partitioning apparatus of the present invention, each of the plurality of data blocks as a result of the division is assigned to a board, and the means (A3) for performing the comparison and examination includes all of the data included in the data to be inspected. The number set based on the average number of mounted element data corresponding to the number obtained by dividing the number of the element data by the number of all the boards for allocating each of the plurality of data blocks is the predetermined value. Things.

In the partitioning device according to the present invention, the means (A3) for performing the comparison and examination automatically changes the value of the predetermined value when it is determined that the division of the data to be inspected cannot be performed. Is to be updated.

In the partitioning device of the present invention, the comparing means (B4) automatically changes the value of the set value when it is determined that the division of the data to be inspected cannot be performed. To be updated.

In the partitioning apparatus of the present invention, when the candidate block (M33, M30) is determined not to be the data block as a result of the determining means, the inspection target is determined based on the detection result. Among the plurality of processing unit data (M30, M31, M32, M33) constituting the target data (M3), the plurality of processing unit data (M33, M30) included in the candidate block (M33, M30) The processing unit data (M31) that replaces at least one of the processing unit data (M30) is selected, and a second candidate block (M3) is selected based on the selected processing unit data (M31).
1, M33) (B4-N, B10-N,
B3), wherein the means for comparing compares the number of the element data included in the generated second candidate blocks (M31, M33) with the set value, and the means for determining comprises: Based on the comparison result, it is determined whether or not the second candidate block (M31, M33) is to be the data block.

In the partitioning apparatus according to the present invention, when the candidate block (M33, M30) is determined as the data block as a result of the determining means, the inspection object data (M3) is formed. The plurality of processing unit data (M30, M31, M32,
M33), a plurality of processing unit data (M31, M32) are selected from a plurality of processing unit data (M31, M32) other than the candidate block (M33, M30) determined as the data block. Based on the selected plurality of processing unit data (M31, M32),
(B8, B1, B2, B3) for generating candidate blocks (new modules M31, M32), and the means for performing the comparison includes the third candidate block (M
31, M32), and compares the set value with the number of the element data included in the third candidate block (M31, M3) based on the comparison result.
It is determined whether or not 2) is the data block.

In the partitioning device of the present invention, each of the plurality of data blocks as a result of the division is allocated to a board, and further, the data blocks of the element data included in the generated candidate blocks (M33, M30) are further assigned. Means (B5) for comparing the number with the maximum number of mounted element data indicating the maximum number of element data that can be allocated to the board, and the determining means (B4, B
5, B7) makes the determination based on the comparison result and the comparison result.

In the partitioning apparatus of the present invention, each of the plurality of data blocks as a result of the division is assigned to a board, and the plurality of other data blocks in the generated candidate block (M33, M30) are further assigned. Means for detecting the number of external signals for making an electrical connection with each of the blocks; the number of the external signals of the detected candidate blocks (M33, M30); Means for comparing with the maximum number of inter-board signals indicating the maximum number of the external signals (B6)
And the determining means (B4, B6, B7) performs the determination based on the comparison result and the comparison result.

In the partitioning apparatus according to the present invention, it is further determined that the number of the external signals of the detected candidate blocks (M33, M30) exceeds the maximum number of signals between boards as a result of the comparison. (B6
-N) includes the plurality of processing unit data (M30, M31, M32, M) constituting the inspection object data (M3).
33), the candidate blocks (M33, M30)
The plurality of processing unit data (M33, M3
0) of the processing unit data (M3
0) the processing unit data (M31) instead of
Means (B6-N, B9-N, B3) for generating a fourth candidate block (M31, M33) based on the selected processing unit data (M31), and the means for performing the comparison includes: The fourth candidate block (M31,
M33) compares the number of the element data included in M33) with the set value, and the determining unit sets the fourth candidate block (M31, M33) as the data block based on the comparison result. It is to determine whether or not.

The partitioning device according to the present invention divides the data to be inspected (circuit data) into a plurality of data blocks (circuit blocks, circuit blocks,
A partitioning device that generates one partition), and includes processing unit data (modules M1, M2, M3, M) including at least one element data (gate).
30, M31, M32, M33), and the provided plurality of processing unit data (M1, M3).
2, M3, M30, M31, M32, M33) into a plurality of groups (hierarchies A, C) and the plurality of processing unit data (M1, M2, M) as a result of the classification.
3, M30, M31, M32, M33) as the data to be inspected, and the plurality of processes belonging to a first group (layer C) of the plurality of groups (layers A, C). Unit data (M30, M31, M
32, M33), a means (B1) for detecting the number of the element data included in each of the element data,
A plurality of processing unit data (M33, M30) is selected from the plurality of processing unit data (M30, M31, M32, M33) belonging to the first group (layer C), and the selected plurality of processing unit data (M33, M30) is selected. Processing unit data (M33,
M30), the candidate block (new module M33, M
30), a means (B4) for comparing the number of the element data included in the generated candidate blocks (M33, M30) with a set value, and (B4) Based on the candidate block (M33, M
30) means (B4, B7) for deciding whether or not 30) is to be the data block.

In the partitioning device of the present invention, when the candidate block (M33, M30) is determined not to be the data block as a result of the determining means (B4-N), based on the detection result, hand,
Among the plurality of processing unit data (M30, M31, M32, M33) belonging to the first group (layer C), the plurality of processing unit data (M33) included in the candidate block (M33, M30) , M30) is selected as the processing unit data (M31) in place of at least one of the processing unit data (M30), and a second candidate block (M31, M33) is selected based on the selected processing unit data (M31). ), And the comparing means compares the number of the element data included in the generated second candidate blocks (M31, M33) with the set value, The determining means determines whether or not the second candidate block (M31, M33) is to be the data block based on the comparison result. .

In the partitioning apparatus of the present invention, when the candidate block (M33, M30) is determined not to be the data block as a result of the determining means (B4-N), the first group (M30, M)
31, M32, M33) and the candidate block (M
33, M30) when the second candidate block cannot be generated (B10-Y), the plurality of processing unit data (M30, M30) belonging to the first group (layer C).
(M12, M32, M33) belonging to a second group (layer A) of the plurality of groups.

In the partitioning device of the present invention, each of the plurality of data blocks as a result of the division is allocated to a board, and further, the data blocks of the element data included in the generated candidate blocks (M33, M30) are further allocated. Means (B5) for comparing the number with the maximum number of mounted element data indicating the maximum number of element data that can be allocated to the board; and the result of the comparison, the means included in the candidate block (M33, M30) If it is determined that the number of element data exceeds the maximum number of mounted element data (B5-N), the candidate block (M33, M3
0) contained in the plurality of processing unit data (M33, M
30) at least one of the processing unit data (M
33), means (B14) for belonging to the second group (layer A) of the plurality of groups.

In the partitioning apparatus of the present invention, each of the plurality of data blocks resulting from the division is allocated to a board, and further, the other plurality of data blocks in the generated candidate block (M33, M30) Means for detecting the number of external signals for making an electrical connection with each of the blocks; the number of the external signals of the detected candidate blocks (M33, M30); Means for comparing with the maximum number of inter-board signals indicating the maximum number of the external signals (B6)
When it is determined that the number of the external signals of the detected candidate blocks (M33, M30) exceeds the maximum number of inter-board signals (B6-N).
The plurality of processing unit data (M30, M31, M32, M33) belonging to the first group (layer C)
When a second candidate block that replaces the candidate block (M33, M30) cannot be generated using (B9-Y)
Means (B14) for assigning at least one of the processing unit data (M33) of the candidate blocks (M33, M30) to a second group (layer A) of the plurality of groups. is there.

In the partitioning apparatus of the present invention, the plurality of groups (layers A and C) form a layer, and the means (B12, B14) for belonging to the second group (layer A) include the second group (layer A). Group 2 (Tier A)
And selecting a group higher in the hierarchy than the first group (hierarchy C).

In the partitioning apparatus according to the present invention, means (B11, B) for judging whether or not the first group (hierarchy C) is at the top of the hierarchy.
13) and when the result of the determination is that the first group (layer C) is at the top, the unit (B12) for belonging to the second group (layer A) is replaced with the unit (B12). Means (B15) for notifying that the division of the data to be inspected cannot be performed.

The partitioning apparatus of the present invention divides the data to be inspected (circuit data) into a plurality of data blocks (circuit blocks,
An emulation device for emulating the data to be inspected after generating one partition), the processing unit data (modules M30, M31, M3) including at least one element data (gate)
2, M33) and a plurality of processing unit data (M30, M31, M32) constituting the inspection target data (M3). , M33), means (B1) for detecting the number of the element data respectively included in
Based on the detection result, the inspection object data (M
3) The plurality of processing unit data (M30, M
Means for selecting a plurality of the processing unit data (M33, M30) from the plurality of processing unit data (M33, M30) and generating a candidate block (new modules M33, M30) based on the selected plurality of processing unit data (M33, M30). (B
2, B3) and the generated candidate block (M33,
A means (B4) for comparing the number of the element data included in M30) with a set value, and determining whether or not the candidate block (M33, M30) is to be the data block based on the comparison result. (B4, B7) and means for performing data processing on each of the plurality of determined data blocks in parallel.

[0085]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a first embodiment of a partitioning method according to the present invention will be described with reference to the drawings.

The definitions of the terms used hereinafter are the same as those defined in the above-mentioned prior art.

The partitioning method according to the present embodiment can be applied to the emulation device. Here, the emulation device is an LSI
Circuit data (test target data) such as FPGA
(Field Programmable Gate Array) to perform logic verification of the circuit data on the FPGA.

The emulation device includes a plurality of emulation boards (hereinafter, referred to as boards) and a plurality of FPGAs mounted on each of the plurality of boards.

The partitioning method of this embodiment is as follows.
In the emulation apparatus, in order to equalize the circuit scale (the number of gates, the gate scale) of the circuit data mapped to each board, in consideration of the number of connection signals between the plurality of boards, as compared with the related art. belongs to.

That is, in the partitioning system of the present embodiment, when the circuit data is mapped to each of the plurality of boards (a part of the circuit data is assigned to each of the plurality of boards as the circuit block). The number of gates (number of mounted gates) mapped to one board satisfies the maximum number of mounted gates per board and the maximum number of signals between boards, and a preset number of mounting reference gates The partitioning is performed so that the number is close to (set value).

In the present embodiment, the number close to the mounting reference gate number indicates a number slightly exceeding the mounting reference gate number. Regardless of the above, in the present invention, the number close to the mounting reference gate number means that C takes as small a value as possible in the mounting reference gate number ± C.

In this way, the number of the gates (element data) mounted on each of the plurality of boards (the number of mounted gates) can be gathered near a fixed value (the number of mounted reference gates). Therefore, the difference between the maximum value and the minimum value of the number of mounted gates of each of the plurality of boards is reduced. Thereby, the maximum value of the number of mounted gates can be made as small as possible. Therefore,
The processing time of compiling (data processing) performed in parallel for each of the plurality of boards is made uniform as compared with the conventional case, and the overall processing time can be reduced.

Referring to FIG. 1, the configuration of the present embodiment will be described.

The partitioning system according to the present embodiment comprises an input unit 1 for inputting data from outside such as a keyboard, and a data processing unit 2 which operates under program control.
And a data storage unit 3 for storing data, and an output unit 4 for outputting data to the outside.

The data processing unit 2 includes a gate number detection unit 2
1, an average mounted gate calculation unit 22, and a hierarchy development unit 23
, A signal detection unit 24 and a partition generation unit 25.

The data storage unit 3 includes a circuit data storage unit 31, a gate number conversion library storage unit 32, a module gate number storage unit 33, a partition parameter storage unit 34, a hierarchical data storage unit 35, A storage unit 36 and a partition data storage unit 37 are provided.

A plurality of circuit data (data to be inspected) to be subjected to logic verification by the emulation device are stored in the circuit data storage 31 in advance. The circuit data stored in the circuit data storage unit 31 is:
The primitive block (the gate) is described as the basic unit. Further, the circuit data is formed by a plurality of modules (processing unit data) forming a hierarchical structure.

The gate number conversion library storage section 32 stores a gate number conversion library. The gate number conversion library stores data indicating the gate scale (the number of gates and the number of element data) of each of the primitive blocks (the gates).

In the module gate number storage section 33,
Data indicating the number of gates included in each of the plurality of modules configuring the circuit data, data indicating the number of gates included in each of the layers configuring the circuit data, and all the numbers included in the circuit data Data indicating the number of gates is stored.

The partition parameter storage unit 34
Contains the data necessary for the partitioning,
Data indicating the number of boards provided in the emulation device, data indicating the maximum number of mounted gates per board, data indicating the maximum number of signals between boards, and an average mounted gate number (average mounted element data number) described later. Data is stored.

The hierarchy data storage unit 35 stores data indicating the hierarchy after the hierarchy expansion process by the hierarchy expansion unit 23.

The signal data storage unit 36 stores data indicating the number of external signals of the hierarchically expanded module unit detected by the signal detection unit 24.

The partition data storage unit 37 stores the partition data generated by the partition generation unit 25.

Next, the operation of this embodiment will be described with reference to FIGS.

First, a control command is output from the input unit 1 to the data processing unit 2. The control command indicates that the circuit data to be subjected to logic verification is specified from among the plurality of circuit data stored in the circuit data storage unit 31.

The gate number detecting section 21 will be described.

The gate number detection section 21 receives the control command and reads out the circuit data specified by the input control command from the circuit data storage section 31.

The gate number detector 21 refers to the data stored in the gate number conversion library storage 32. The gate number detection unit 21 calculates the total number of gates included in the read circuit data on a module basis (for each module included in the circuit data) based on the referenced data. To)
To detect.

The gate number detector 21 calculates the number of gates in each of the layers (groups) of the circuit data and the number of gates in the entire circuit data based on the number of gates in the module unit.

In this case, the number-of-gates detecting section 21 detects the number of gates for each of the modules in the bottom-up manner, so that the number of gates included in each of the plurality of modules and the plurality of layers The number of gates of all modules included in each of the above and the number of gates included in the entire circuit data can be detected.

The gate number detector 21 calculates the number of gates in each module (each module), the number of gates in the hierarchy, and the number of gates in the entire circuit data. Data indicating the number is stored in the module gate number storage unit 33.

Next, the average mounted gate number calculator 22 will be described.

The average number-of-mounted-gates calculating unit 22 calculates data indicating the number of boards stored in the partition parameter storing unit 34 and all the circuit data included in the circuit data stored in the module gate number storing unit 33. An average number of mounted gates per board (average mounted element data number) is calculated based on data indicating the number of gates (the number of gates in the entire circuit data).

The average mounted gate number calculation unit 22 stores data indicating the calculated average mounted gate number in the partition parameter storage unit 34.

Here, the formula for calculating the average number of mounted gates is as follows. Average number of mounted gates = (number of gates in entire circuit data) / (number of boards used)

In the above formula, the number of boards used is the total number of boards provided in the emulation device, and is always the same value as long as the same emulation device is used. In other words, even when the number of all the gates included in the circuit data is small, the partitioning is performed using all of the boards included in the emulation device.

Next, the hierarchy expanding section 23 will be described.

The hierarchy expanding section 23 expands a hierarchy for a module having a gate number larger than the expansion reference gate number (predetermined value) set via the input section 1 from the outside. In this case, the hierarchy developing unit 23 indicates the data indicating the number of gates of each of the modules stored in the module gate number storage unit 33, and indicates the average mounted gate number stored in the partition parameter storage unit 34. The hierarchical expansion is performed based on data, data indicating the maximum number of mounted gates, and data indicating the expansion reference gate number.

The hierarchical expansion of the module by the hierarchical expansion unit 23 is performed in the order from the highest hierarchy to the lower hierarchy (top down) among a plurality of modules forming the hierarchy of the circuit data.

The data indicating the hierarchy after the hierarchical development by the hierarchical development unit 23 is stored in the hierarchical data storage unit 35.

The operation of the hierarchy expanding section 23 will be described with reference to the flowchart of FIG.

The hierarchy expanding section 23 stores data indicating the number of gates of each of the modules stored in the module gate number storing section 33 and data indicating the expansion reference gate number set from the input section 1. Is input (step A1).

When the set number of expansion reference gates is larger than the average number of mounted gates stored in the partition parameter storage unit 34 (step A2-
N) notifies the setting error of the expansion reference gate number via the output unit 4 (step A2a).

The reason for the setting error is as follows. In the present embodiment, as will be described later, in order to generate a new module having the number of gates close to the number of mounted reference gates (the average number of mounted gates ≤) by combining a plurality of the modules equal to or less than the number of expanded reference gates. If the module (one of the elements constituting the new module) after the hierarchical expansion is already equal to or more than the average number of mounted gates, the number exceeds the mounting reference gate number without making the combination. There may be cases. In that case, the flowcharts of FIGS. 4 and 5 described later become invalid, and the purpose of the present embodiment (collecting the number of mounted gates of each of the plurality of boards near the number of mounted reference gates) is realized. Because they can no longer do so.

When the number of mounted modules alone is equal to or larger than the average number of mounted gates, the number of the mounted reference gates may greatly exceed the number of mounted reference gates when combined (even if the method of combination is devised). This is because the aim of the present embodiment cannot be realized.

As the number of reference gates for development, a value smaller than the maximum number of mounted gates is set. Otherwise, when the result of step A3 is No-step A8, a case may occur in which the number of mounted gates of the module is larger than the maximum number of mounted gates.

On the other hand, when the number of expansion reference gates is equal to or less than the average number of mounted gates (step A2-Y), the number of gates and the number of expansion reference gates of the module input in step A1 are determined. Compare (Step A3).

When it is determined that the number of gates of the module is larger than the number of reference gates for development (step A3-
Y) determines whether the hierarchy including the module is not the lowest hierarchy (step A4).

When it is determined that the hierarchy including the module is not the lowest hierarchy (step A).
4-Y) expands the module hierarchically (step A
5) storing the expanded hierarchical data in the hierarchical data storage unit 35;
(Step A9).

For example, in the example shown in FIG. 3, it is determined that the number of gates included in the module M1 is larger than the number of expansion reference gates (step A3-Y), and the module M1 is included. It is determined that the hierarchy A is not the lowest hierarchy (step A4-Y).
Therefore, the module M1 is hierarchically expanded (step A5) and divided into modules M11 and M12. The data indicating the hierarchy of the module M1 expanded in the hierarchy is stored in the hierarchy data storage unit 35 (step A9).

Next, it is determined whether or not all the hierarchical data included in the circuit data has been stored in the hierarchical data storage unit 35 (step A10). Since the hierarchical expansion of the module is performed from the top down, it is determined at this time that not all the hierarchical data is stored in the hierarchical data storage unit 35 (step A10-N). ), Returning to step A1
Move to the second flow. In this second flow, the module M12 is hierarchically expanded (step A5) and divided into the modules M121... M12Y. afterwards,
Data indicating the hierarchy of the module M12 is stored in the hierarchy data storage unit 35.

As a result of the determination in step A3, when it is determined that the number of gates of the module is equal to or smaller than the number of expansion reference gates (step A3-N), the hierarchical expansion of the module is not performed (step A8). Is stored in the hierarchical data storage unit 35 (step A9).

Here, the reason why the hierarchical development is not performed is as follows. When the hierarchical expansion is further performed on the module having the number of gates equal to or less than the number of expansion reference gates, a large number of the modules having the small number of gates can be formed. This is because the number of module combinations becomes enormous, and the partitioning process hardly converges. The module whose number of gates is smaller than the number of expansion reference gates does not perform the hierarchical expansion (does not perform unnecessary expansion), thereby minimizing the number of elements when performing the combination.

As a result of the determination in step A4, if it is determined that the module is included in the lowest hierarchical level (step A4-N), the module is stored in the partition parameter storage unit 34 with the number of gates of the module. The calculated maximum number of mounted gates is compared (step A6).

If it is determined in step A6 that the number of gates of the module is larger than the maximum number of mounted gates (step A6-Y),
An error notification that the module has exceeded the maximum number of mounted gates is made via the output unit 4 (step A7).

In step A7, the error is set for the following reason. The module is included in the lowest hierarchy (step A4-N) and, as described above, is the minimum unit that can be mapped on the FPGA, so that it cannot be further expanded and divided. Nevertheless, the maximum number of mounted gates is exceeded (step A6-Y), and even if that module is assigned to the board with only one module, the scale cannot be handled by this emulation device. .

In this case, the module is designed in a hierarchical manner so that the module can be further expanded in a hierarchy (hierarchical so as to have a lower hierarchy), or the number of gates included in the module is equal to the maximum mounting number. It is necessary to redesign so that the number is less than the number of gates.

If it is determined in step A6 that the number of gates of the module is smaller than the maximum number of mounted gates (step A6-N), the hierarchy of the module is not expanded (step A6).
8). The module is the lowest layer (step A
4-N), the hierarchy cannot be further expanded, and the number of gates of the module is smaller than the maximum number of mounted gates, and there is no problem in that point.

As described above, each time the module is subjected to the processing (steps A5 and A8) in which the hierarchy is expanded or not performed in the top down, data indicating the hierarchy (hierarchical data) ) Are stored in the hierarchical data storage unit 35.

When it is determined that all the hierarchical data included in the circuit data have been stored in the hierarchical data storage unit 35 (step A10-Y), the processing in FIG. 2 ends.

According to the flowchart shown in FIG.
A predetermined hierarchy is expanded by the hierarchy expansion unit 23. FIG. 3 shows an example of the hierarchical development.

Next, the signal detecting section 24 will be described.

The signal detecting section 24 is provided with the hierarchical developing section 2
3, the number of external signals of each of the modules (single modules) after hierarchical expansion is detected. The signal detection unit 24 detects the number of external signals of a new module described later. At this time, the signal detection unit 24 stores the circuit data stored in the circuit data storage unit 31, the data stored in the gate number conversion library storage unit 32, and the data stored in the hierarchical data storage unit 35. The number of external signals is detected based on the data. The signal detector 24 stores data indicating the detected number of external signals in the signal data storage 36.

Next, the partition generator 25 will be described.

The partition generation unit 25 lowers the order so that the maximum number of mounted gates and the maximum number of inter-board signals are satisfied and the number of gates close to the mounted reference gate number is mounted on one board. Perform partitioning from the hierarchy (bottom up).

The partition generation section 25 stores data indicating the result of the partitioning in the partition data storage section 37.

[0147] The partition generation unit 25 stores data indicating the number of mounting reference gates per board, which is set externally via the input unit 1, and the module stored in the module gate number storage unit 33. Indicating the number of gates, data necessary for partitioning stored in the partition parameter storage unit 34, data indicating the number of external signals of the module stored in the signal data storage unit 36, and the hierarchical data storage unit 35 The partitioning is performed on the basis of the data indicating the hierarchy stored in.

In the partition generation section 25, sequentially from the lowest layer (layer C or layer D in the example of FIG. 3),
Partition processing as described below is performed in the same hierarchy.

Each of the modules (processing unit data) M30... M33, M12 of the lowest hierarchical levels C and D
1... M12Y are described at the level of the gate (element data).

Referring to FIG. 3, layer C, which is one of the lowest layers, will be described with reference to the flowcharts of FIGS.

In the flowcharts of FIGS. 4 and 5, when a module is handled, the module is handled (bottom-up) in the order from the lower hierarchy to the upper hierarchy in the hierarchical structure of the module shown in FIG.

In the hierarchy C of FIG. 3, the modules in the same hierarchy are M30, M31, M32, and M33, and the number of gates of each module is g30, g31, g
32 and g33, and the relationship between the numbers of gates is g30 <g31 <g32 <g33.

First, the modules are set as target modules in descending order of the number of gates in the same hierarchy (step B1).
For example, in the hierarchy C, initially, the module M33 is the target module.

Next, within the same hierarchy, the total number of gates of all combinations when two or more modules other than the target module are combined is calculated, and the calculated value is used as the combination gate sum ( Step B
2).

In the hierarchy C, there are the following four combinations of two or more combinations of modules other than the module M33, which is the target module, and the combination gate sums of the respective combinations are as follows.

(1) Combination (M30, M31) Combination gate sum = g30 + g31 (2) Combination (M30, M32) Combination gate sum = g30 + g32 (3) Combination (M31, M32) Combination gate sum = g31 + g32 (4) Combination ( M30, M31, M32) Combination gate sum = g30 + g31 + g32

In other words, in a hierarchy including N modules, the number of combinations is N-1C2 + N-1C3 + N. -1C4 + ... + N-1CN
−2 + 1.

Next, the number of gates of a single module excluding the target module M33 and the number of combination gate sums are arranged in ascending order, and as a result of arrangement, the smallest one is combined with the target module M33 to form a new module. (Candidate block) (step B3).

In the example of the hierarchical level C, the number of gates of each module alone and the magnitude relation of the combination gate sum are as follows. g30 <g31 <g30 + g31 <g32 <g30 + g
32 <g31 + g32 <g30 + g31 + g32

In the example of the layer C, the module M3
Since 0 is the smallest number of gates (g30), (M33, M30), which is a combination of the module M30 and the module M33 as the target module, is defined as the new module.

The number of gates (g33 + g3) of the new module (M33, M30) which is the output of step B3
0) is compared with the mounting reference gate number set by the input unit 1 (step B4).

The number of mounting reference gates set here must be equal to or greater than the number of development reference gates described above. Since the number of gates of each module after hierarchical expansion by the hierarchical expansion unit 23 is smaller than the number of expansion reference gates (see steps A3-Y and A5 in FIG. 2), these modules are combined. The mounting reference gate number, which is a criterion for determining the number of gates of the new module,
This is because it is meaningless to make the number smaller than the number of expansion reference gates.

It is necessary that the number of mounting reference gates is equal to or larger than the average number of mounting gates. In the first place, since the average number of mounted gates is calculated by the above equation, if the number of mounted reference gates is smaller than the average number of mounted gates, the plurality of circuit data included in the emulation device may be used. (See step B7 described later). That is, there is a relation of the number of deployment reference gates ≦ the average number of mounted gates ≦ the number of mounted reference gates.

As a result of the determination in step B4, the number of gates (g) of the new modules (M33, M30)
33 + g30) is determined to be greater than or equal to the mounting reference gate number (step B4-Y), the process proceeds to step B5.

In step B5, the gate number (g33 + g30) of the new module (M33, M30)
And the maximum number of mounted gates stored in the partition parameter storage unit 34.

As a result of the determination in step B5, the number of gates (g) of the new modules (M33, M30) is determined.
33 + g30) is determined to be equal to or less than the maximum number of mounted gates (step B5-Y), the process proceeds to step B6.

In step B6, the number of external signals of the new module (M33, M30) is compared with the maximum number of inter-board signals stored in the partition parameter storage unit.

Here, the “number of external signals” corresponds to the number of wirings for connecting to another module. Data indicating the number of external signals for each module is stored in the signal data storage unit 36. Therefore, based on the data stored in the signal data storage unit 36, the partition generation unit 25
Then, the number of external signals of the new modules (M33, M30) is detected.

As a result of the determination in step B6, when it is determined that the number of external signals of the new module (M33, M30) is less than the maximum number of signals between boards (step B6-Y), the new module (M33, M30) M33, M
30) is determined as one partition (data block) (step B7). Here, the one partition corresponds to the number of gates (the circuit block) assigned to one of the plurality of boards.

In this case, the new module (M33, M
Modules M33 and M30 included in 30) are deleted from the hierarchy (hierarchy C in this example) (step B8).

In the new module (M33, M30) determined as the one partition, the module M33 and the module M3 are compared with the module M33 and the module M30 before they are combined.
The number of the external signals can be reduced by an amount corresponding to an interface between 0 and 0.

As described above, the partition generation unit 2
5, the number of the external signals of each module changes, so that the signal data storage unit 3
6 is updated to the unusual data.

After step B8, the module having the next largest number of gates is set as the target module (step B1). In the example of the layer C, as a result of deleting the modules M33 and M30 included in the new modules (M33 and M30) in the step B8, the remaining modules in the layer C become M31 and M32, of which gates are M31 and M32. The module M32 with the larger number becomes the target module (step B1). The module M3
The description of each step after 2 is set as the target module will be omitted.

On the other hand, if it is determined in step B4 that the gate number (g33 + g30) of the new module (M33, M30) is smaller than the mounting reference gate number (step B4-N), the process proceeds to step B4.
Go to 10.

In the step B10, it is determined whether or not the combination of all the modules M30 to M33 has been completed in the same layer (layer C in this example). here,
“The combination of all modules M30... M33 in the same hierarchy is completed” means that all other modules in the same hierarchy have been considered as the new module, and other modules to be combined Means that there are no remaining.

As a result of the determination in step B10,
If it is determined that the combination of all the modules M30 to M33 has been completed (step B10-Y),
It is determined whether or not the current layer (layer C in this example) is not the highest layer (step B11).

As a result of the determination in step B11,
If it is determined that the hierarchy is not the highest hierarchy (step B11-Y), all the remaining modules M31 and M32 in the hierarchy C are raised to the next higher hierarchy (the hierarchy A in this example) (step B11-Y). B12).

All remaining modules M3 in the hierarchy C
This is because a combination of each of the modules 1 and 32 and each of the modules M1, M2, and M3 included in the higher hierarchy A is to be examined later.

On the other hand, if it is determined in step B10 that the combination of all the modules M30 to M33 has not been completed in the hierarchy (hierarchy C in this example) (step B10-N), It returns to step B3.

In step B3, the combination module having the next smallest combination gate sum is combined with the target module M33 to obtain the new module. In the example of the layer C, the new module is (M33, M31) in combination with the module M31 having the second smallest number of gates.

As described above, as long as other modules that can be combined remain in the same hierarchy C (step B1).
0-N), a loop (steps B3, B4-N, B) for searching for an optimal combination of the new modules until the number of gates of the new module exceeds the reference number of mounting gates.
10-N) are repeated. This is for generating the new module whose gate number is close to the mounting reference gate number.

On the other hand, as a result of the determination in the step B11, when the hierarchy is determined to be the highest hierarchy (step B11-N), a partitioning error is notified via the output unit 4 (step B15).

Here, the reason why the partitioning error is notified is as follows. Step B11
Is determined to be the highest hierarchy (step B11-N) means that two or more modules M33 and M3
The new module (M33, M30) combining 0
Is smaller than the mounting reference gate number (step B4-
N) and all modules M30 ... M33 in the same hierarchy
Has been completed (step B10-Y),
In addition, since it is the highest hierarchy (step B11-N), and as described above, the number of mounting reference gates ≧ the average number of mounting gates, the number of gates smaller than the number of mounting reference gates and other combinations may be smaller. This is because, if the partition is determined without it, the circuit data may not be able to be mounted on the plurality of boards. That is, it is determined that the partitioning intended to be realized by the present embodiment cannot be performed with the current setting of the mounting reference gate number and the deployment reference gate number.

On the other hand, if it is determined in step B5 that the number of gates (g33 + g30) of the new module (M33, M30) is larger than the maximum number of mounted gates (step B5-N), step B1 is executed.
Proceed to 3.

At step B13, it is determined whether or not the current hierarchy C including the new modules (M33, M30) is not the highest hierarchy.

As a result of the judgment in the step B13,
Layer C including the new modules (M33, M30)
Is not the highest hierarchy (step B1).
In step 3-Y), the process proceeds to step B14.

In step B14, the target module is moved up one level. Thereafter, the target module is deleted from the hierarchy (step B16), and the process returns to step B1.

In step B1, the module having the next largest number of gates is set as the target module.

In the example of the hierarchy C, the target module M33 is raised to the hierarchy A which is the upper hierarchy (step B1).
4) The module M33 is deleted from the current layer C (step B16), and the next largest module M32 is set as the target module (step B1).

The reason that the target module M33 is raised to the higher hierarchical level A is that there is no possibility that one partition is generated in combination with the module in the hierarchical level C (see steps B3 and B5-N). ), In order to leave a possibility that one partition will be generated in combination with the module in the hierarchy A.

Further, as described above, by changing the target module from the module M33 to the module 32 (steps B16 and B1), in step B5, the number of gates of the new module is larger than the maximum number of mounted gates. Is also smaller (step B5-Y).
Possibilities are born.

On the other hand, as a result of the determination in step B13, when it is determined that the hierarchy C including the new modules (M33, M30) is the highest hierarchy (step B13-N), a partitioning error is output. 4 (step B15).

Here, the reason why the partitioning error is notified is as follows. The number of gates of the new module (M33, M30) (g33 + g30)
Exceeds the maximum number of mounted gates (step B5).
-N), since the new module (M33, M30) is combined with the target module M33 in ascending order of the number of gates, a new module formed by combining the remaining candidate modules (modules M31 and M32 other than the module M30) All exceed the maximum number of mounted gates. In addition, since the new modules (M33, M30) are the highest hierarchy (step B13-N), in the flow in which the modules are handled in the bottom-up,
There are no other modules to be combined.
Further, the number of gates of the module M33 alone is equal to or less than the number of reference gates for development (step A3).
It is smaller than the average number of mounted gates (step A2).
In this case, if the partition is created by a single module such as the module M33, the circuit data may not be able to be mounted on the plurality of boards. Therefore, it is determined that partitioning is impossible with the current setting of the number of mounting reference gates and the number of deployment reference gates.

On the other hand, if it is determined in step B6 that the number of external signals of the new module (M33, M30) exceeds the maximum number of inter-board signals (step B6-N), the process proceeds to step B9.

In step B9, it is determined whether all combinations in the same layer C have been completed.

If it is determined in step B9 that all combinations have been completed in the same layer C (step B9-Y), the aforementioned step B13
Is performed.

On the other hand, as a result of the judgment in the step B9, when it is judged that all the combinations are not completed in the same hierarchy C (step B9-N), the process returns to the step B3.

In step B3, the module M3 which is the combination having the next smallest combination gate sum
1 is combined with the target module M33 to form a new module (M31, M33).

Thus, the new module (M31,
M33) has more gates than the new modules (M30, M33) (step B3). However, the number of gates and the number of external signals are generally unrelated (an independent relationship in which one does not depend at all on the other). Therefore, in step B6, there is a possibility that the number of external signals of the new module (M31, M33) is determined to be smaller than the maximum number of signals between boards (step B6-Y).

As described above, in the partition generation unit 25, in order from the module M having the largest number of gates in the same hierarchy C (step B1), it is combined with the remaining small module M or the combination of the small modules M (step B1). B2, B3), a new module is generated, and the combination is repeated until the number of gates of the generated new module exceeds the number of mounted reference gates (Step B4-N → Step B10-N → Step B-3 → Step B4).

When the number of gates of the new module exceeds the number of reference gates for mounting (step B4-Y), for the new module, the limitation of the maximum number of mounted gates and the maximum number of board related signals is determined (step B4-Y). B5, B
6) If the result of the determination is that there is no problem, the new module is determined as a partition (step B7).
Therefore, in this embodiment, the partition is easily determined by the number of gates close to the number of mounting reference gates.

In this case, if the number of mounted reference gates is set to a value close to the average number of mounted gates, the number of gates mounted on each board can be further equalized. In this case, if the number of mounted reference gates greatly exceeds the average number of mounted gates, there is a possibility that the number of gates mounted on each board varies by an amount farther from the average number of mounted gates.

Next, a second embodiment will be described with reference to FIGS.

First, the configuration of the second embodiment will be described.

In the example of FIG. 6, a partition condition setting unit 26 is added to the configuration of FIG. 1, and the other configuration is the same as that of FIG.

[0206] The input unit 1 sets in the partition condition setting unit 26, as the partitioning condition, an adjustment width number α for the expansion reference gate number and an adjustment width number β for the mounting reference gate number. Is done. The meaning of these adjustment width numbers α and β will be described later.

The partition condition setting unit 26 inputs the number of expansion reference gates input to the hierarchy expansion unit 23 and the number of expansion reference gates input to the partition generation unit 25 based on the set adjustment width numbers α and β, respectively. The number of the mounted reference gates is automatically updated.

In FIGS. 7 and 8, instead of the partition error notifying process of step B15 in FIGS. 4 and 5, a new step B17 is provided.
It includes a partition condition review processing step.
Other flows are the same as those in FIG. 4 and FIG.

Next, the operation of the second embodiment will be described.

The partition condition setting unit 26 sets the initial values of the number of deployment reference gates (predetermined value) and the number of installation reference gates (set value) as follows: Set. The partition condition setting unit 26 inputs data indicating the average number of mounted gates from the partition parameter storage unit 34.

After the initial values of the number of expansion reference gates and the number of mounting reference gates are set as described above, the processing of each of the hierarchical expansion unit 23 and the signal detection unit 24 is performed in the same manner as in the first embodiment. Is performed.

Next, the partition generation unit 25
The processing is performed according to the flowcharts of FIGS.
7 and 8, steps other than step B17 are the same as the steps in FIGS. 4 and 5 described above.

In each of Steps B11 and B13, when it is determined that the hierarchical level is the highest level (Steps B11-N and B13-N), the change of the partitioning condition is notified to the partition condition setting unit 26. (Step B17).

In the partition condition setting section 26 having received the notification of the step B17, the partitioning reference gate number and the mounting reference gate number are respectively developed based on the set adjustment width numbers α and β. Reference gate number = previous deployment reference gate number−α Mounting reference gate number = previous mounting reference gate number + β is reset (not shown in FIGS. 7 and 8).

As described above, the processing is again executed from the processing of the hierarchical developing section 23 based on the reset number of the developing reference gates and the number of the mounting reference gates. In addition, the values of the initial setting and the reset number of the deployment reference gates and the mounting reference gates are output to the output unit 4.

In the partition condition setting section 26,
As described above, the above-mentioned partitioning condition is repeatedly reviewed, and if the number of deployment reference gates ≦ 0 or the number of mounting reference gates ≧ the maximum number of mounting gates, a partitioning error is output to the output unit 4.
(Not shown in FIGS. 7 and 8).

In response to this partitioning error, the user resets each of the adjustment width number α of the expansion reference gate number and the adjustment width number β of the mounting reference gate number to a smaller value, or It is necessary to take measures to redesign the number of gates of the above-mentioned module to be smaller.

In the second embodiment, in addition to the configuration of the first embodiment, by providing the partition condition setting section 26, the number of expansion reference gates and the number of mounting reference gates are automatically set. Under the condition that the partition generation unit 25 cannot generate the partition, the setting of the number of deployment reference gates and the number of mounting reference gates can be automatically updated.

Since the operation speed of the FPGA used in the emulation device in the first and second embodiments is low, the signal transmission delay due to the difference in the wiring length of each of the primitive blocks mapped on the FPGA is particularly large. There is no problem. That is, the emulation device according to the present embodiment performs logic verification, and does not determine the quality of the layout. Therefore, in the present embodiment, there is no problem even if each of the primitive blocks mapped on the FPGA is different from the actual layout, and the modules are hierarchically expanded and the partitioning is arbitrarily performed as in the present embodiment. You can do it.

[0220]

According to the partitioning method of the present invention, there is provided a partitioning method for dividing data to be inspected into a plurality of data blocks and generating a plurality of data blocks as a result of the division. Providing the data to be inspected as data to be inspected, comprising a plurality of processing unit data comprising: the number of the element data respectively included in the plurality of processing unit data constituting the inspected data Detecting, based on the detection result, selecting a plurality of the processing unit data from the plurality of processing unit data constituting the inspection target data, and selecting a candidate block based on the selected plurality of processing unit data. Generating and comparing the set value with the number of element data included in the generated candidate block And a step of determining whether or not the candidate block is to be the data block based on the comparison result, so that the overall processing time can be reduced, and processing such as compiling can be performed. Can minimize the possibility of an error.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an apparatus that performs a partitioning method according to a first embodiment of the present invention.

FIG. 2 is a flowchart illustrating a process of a hierarchy expanding unit in the partitioning method according to the first embodiment of the present invention.

FIG. 3 is a block diagram illustrating an example of a configuration of circuit data after hierarchical expansion is performed by the partitioning method according to the first embodiment of the present invention.

FIG. 4 is a flowchart showing a part of the processing of the partition generation unit in the partitioning method according to the first embodiment of the present invention.

FIG. 5 is a flowchart showing a part of the processing of the partition generation unit in the partitioning method according to the first embodiment of the present invention.

FIG. 6 is a block diagram illustrating a configuration of an apparatus that performs a partitioning method according to a second embodiment of the present invention.

FIG. 7 is a flowchart showing a part of the processing of the partition generation unit in the partitioning method according to the second embodiment of the present invention.

FIG. 8 is a flowchart showing a part of the processing of the partition generation unit in the partitioning method according to the second embodiment of the present invention.

FIG. 9 is a block diagram showing a configuration of a conventional partitioning device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Input part 2 Data processing part 3 Data storage part 4 Output part 5 Input part 6 Data processing part 7 Data storage part 8 Output part 21 Gate number detection part 22 Average mounted gate number calculation part 23 Hierarchical development part 24 Signal detection part 25 Partition Generation unit 31 Circuit data storage unit 32 Gate number conversion library storage unit 33 Module gate number storage unit 34 Partition parameter storage unit 35 Hierarchical data storage unit 36 Signal data storage unit 37 Partition data storage unit 51 Gate number detection unit 52 Hierarchical development unit 53 Signal detection unit 54 Partition generation unit 71 Circuit data storage unit 72 Gate number conversion library storage unit 73 Module gate number storage unit 74 Signal number storage unit 75 Partition data storage unit A layer B layer C layer D layer M1 module M2 module M3 Module M11 module M12 module M30 module M31 module M32 module M33 module M121 module M12Y module g30 number of gates g31 number of gates g32 number of gates g33 number of gates

Continuation of the front page (56) References JP-A-11-134385 (JP, A) JP-A-11-73440 (JP, A) JP-A-4-502985 (JP, A) Behrens, D. "Hierarchical party ioning", Computer-Aided Design, 1996. ICC AD-96. Digest of Technical Papers. , 1996 IEEE / ACM International Conference on, 1996, p. 470-477 Ober, U, and two others, "Hiera physical partitioning in a rapid prototyping environment", Rapid System Prototyping, 1996, Proceedings. , Seventh International Workshop on IEEE, 1996, p. 30-35 Vi Chi Chan, one outsider, "Hierarchical partitioning for field-programmable systems. Digest of Technical Papers. , 1997 IEEE / ACM International Conference, 1997, p. 428-435 Sanchis, L .; A. , "Multiple-way network partitioning", Computers, IEEE Transactions on Volume: 381, 1989, p. 62-81 Riess, B.S. M. "Architecture driven k-way partitioning for multichip modules", European Design and Test Conference, 1995. ED & TC 1995, Proceedings. 1995, p. 71-76 (58) Fields surveyed (Int. Cl. ⁷ , DB name) G06F 17/50 664 JICST file (JOIS)

Claims (38)

(57) [Claims] 1. An object to be inspectedCircuitSplit the data into multiple
To generate a plurality of data blocks as a result of the division
A partitioning method, wherein the processing unit data including at least one element data is
A plurality of data to be inspectedCircuitDe
Providing the data to be inspected,CircuitThe plurality of processes constituting data
Check the number of the element data included in each unit data.
Issuing the object to be inspected based on the detection result.Circuitdata
A plurality of processing units from the plurality of processing unit data constituting
A plurality of processing units selected by selecting logical unit data
Generating a candidate block from data; and the element data included in the generated candidate block.
Comparing the number of data with a set value;ofresult, The number of the element data is equal to or more than the set value
When, The candidate block as the data block
WhendecideWith steps, Each of a plurality of data blocks as a result of said division
Is assigned to the board, The step of performing the comparison includes the circuit data of the inspection object.
The number of all of the element data included in the
All of the above for assigning each of the data blocks
Average mounted element data corresponding to the number divided by the number of boards
The number set based on the number is the set value. Pate
The method of positioning. 2. The partitioning method according to claim 1, wherein the step of providing the data as the circuit data to be inspected includes a processing unit corresponding to the processing unit data candidate at the time of input.
Detecting the number of element data included in the candidate data; comparing the number of element data included in the detected processing unit candidate data with a predetermined value; and a result of the comparison Is included in the processing unit candidate data.
When the number of element data exceeds a pre-Symbol predetermined value that, before
Dividing the element data included in the processing unit candidate data,
Generating the processing unit data as a result of the division ;
As a result of the comparison and examination, it is included in the processing unit candidate data.
When the number of element data does not exceed the predetermined value,
The processing unit candidate data is directly used as the processing unit data.
And a partitioning method. 3. The partitioning method according to claim 2 , wherein each of the plurality of data blocks as a result of the division is assigned to a board, and the step of performing the comparing and reviewing includes the circuit to be inspected. The number is set based on the average number of mounted element data corresponding to the number obtained by dividing the number of all the element data included in the data by the number of all the boards for allocating each of the plurality of data blocks. A partitioning method in which the number is set to the predetermined value. 4. A partitioning method according to claim 2 or 3, the step of performing the comparison, the inspection target times
A partitioning method for automatically updating the predetermined value when it is determined that the division of the road data cannot be performed. 5. A partitioning method according to any one of claims 1 to 4, the step of performing said comparing, determining that it is impossible to perform the division of the circuit data <br/> data of the object to be inspected A partitioning method for automatically updating the value of the set value when the setting is performed. 6. A partitioning method according to any one of claims 1 to 5, further result in said determining step, if the candidate block is determined as not the data block, based on the detection result Out of the plurality of processing unit data constituting the circuit data to be inspected, the processing unit data replacing at least one of the plurality of processing unit data included in the candidate block. And generating a second candidate block based on the selected processing unit data. The step of performing the comparison comprises: determining the number of the element data included in the generated second candidate block; Performing a comparison with the set value, and the determining step includes, as a result of the comparison , the second
The number of element data included in the candidate block is equal to or less than the set value.
When it is above, a partitioning method for determining the second candidate block as the data block. 7. A partitioning method according to any one of claims 1 to 6, further result of said determining step, said candidate when the block is determined as the data block, the circuit of the object to be inspected The plurality of processing unit data selected from the plurality of processing unit data other than the candidate block determined as the data block among the plurality of processing unit data constituting the data, and the selected plurality of processing units are selected. Generating a third candidate block based on data, wherein the step of comparing compares the number of the element data included in the generated third candidate block with the set value, and Performing the third step as a result of the comparison .
The number of element data included in the candidate block is equal to or less than the set value.
A partitioning method for determining the third candidate block as the data block when the above condition is satisfied; 8. From claim 17The par described in any of
In the method of tearing,Furthermore,  The element data included in the generated candidate block
Of the element data that can be assigned to the board
Step to compare with the maximum number of mounted element data indicating the maximum number
Wherein the determining comprises comparingofresult, The element
Data is greater than or equal to the set value, andContrastofConclusion
FruitThe number of element data is equal to or less than the maximum number of mounted element data.
When the candidate block is in the data block,
To decidePartitioning method. 9. From claim 17The par described in any of
In the method of tearing,Furthermore,  The other plurality of data in the generated candidate block
To make electrical connections between each of the data blocks
Detecting the number of external signals of the candidate block; and detecting the number of external signals of the detected candidate block.
Indicates the maximum number of external signals that can be connected to the board.
Comparing with the maximum number of signals between boards.ofresult, The element
Data is greater than or equal to the set value, andContrastofConclusion
FruitThe number of external signals is less than the maximum number of signals between boards
At some point, the candidate block is referred to as the data block.
decidePartitioning method. 10. The partitioning method according to claim 9 , further comprising, as a result of the comparison, determining that the number of the external signals of the detected candidate block exceeds the maximum number of inter-board signals. In the case, the processing unit replacing the processing unit data of at least one of the plurality of processing unit data included in the candidate block from among the plurality of processing unit data configuring the circuit data to be inspected. Selecting data and generating a fourth candidate block based on the selected processing unit data; and performing the comparison, the number of the element data included in the generated fourth candidate block and makes a comparison with the set value, said determining step includes the comparison result, the fourth
The number of the element data included in the candidate block is set according to the setting.
A partitioning method for determining the fourth candidate block as the data block when the value is equal to or greater than the value ; 11. An object to be inspectedCircuitSplit data into multiple
To generate a plurality of data blocks as a result of the division.
A partitioning method for generating processing unit data including at least one element data.
Providing a plurality of the plurality of processing unit data provided by a plurality of groups;
The plurality of processes as a result of the classification
Unit data to be inspectedCircuitProvide as data
Belonging to a first group of the plurality of groups
The element included in each of the plurality of processing unit data
Detecting the number of data; and belonging to the first group based on the detection result.
From the plurality of processing unit data
Data for the selected plurality of processing unit data.
Generating a candidate block by using the data, and the element data included in the generated candidate block.
Comparing the number of data with a set value;ofresult, The number of the element data is equal to or more than the set value
When, The candidate block as the data block
WhendecideWith steps, Each of a plurality of data blocks as a result of said division
Is assigned to the board, The step of performing the comparison includes the circuit data of the inspection object.
The number of all of the element data included in the
All of the above for assigning each of the data blocks
Average mounted element data corresponding to the number divided by the number of boards
The number set based on the number is the set value. Pate
The method of positioning. 12. The partitioning method according to claim 11 , further comprising: determining that the candidate block is not to be the data block as a result of the determining step, based on the detection result. From among the plurality of processing unit data belonging to a group, the processing unit data that replaces at least one of the plurality of processing unit data included in the candidate block is selected, and the selected processing unit data is replaced with the selected processing unit data. Generating a second candidate block based on the processing unit data; and performing the comparison, comparing the number of the element data included in the generated second candidate block with the set value. Making the determination, the result of the comparison , the second
The number of the element data included in the candidate block
A partitioning method for determining the second candidate block as the data block when the value is equal to or more than a predetermined value ; 13. A partitioning method according to claim 11 or 12, further result in said determining step, if the candidate block is determined as not the data block, belonging to the first group When a second candidate block that replaces the candidate block cannot be generated using the plurality of processing unit data, at least a part of the plurality of processing unit data belonging to the first group is replaced with the plurality of processing unit data. Partitioning method comprising the step of belonging to a second of the groups. Claim 1411From13Described in any of
In the partitioning method ofFurthermore,  The element data included in the generated candidate block
Of the element data that can be assigned to the board
Step to compare with the maximum number of mounted element data indicating the maximum number
And the element included in the candidate block as a result of the comparison.
When the number of data exceeds the maximum mounted element data number
If it is determined, the duplicate included in the candidate block is determined.
At least one of the plurality of processing unit data.
Position data in a second group of the plurality of groups.
Partitioning method with steps to attribute
Law. Claim 1511From13Described in any of
In the partitioning method ofFurthermore,  The other plurality of data in the generated candidate block
To make electrical connections between each of the data blocks
Detecting the number of external signals of the candidate block; and detecting the number of external signals of the detected candidate block.
Indicates the maximum number of external signals that can be connected to the board.
Comparing with the maximum number of inter-board signals; and, as a result of the comparison, before the detected candidate block.
The number of external signals exceeds the maximum number of signals between boards.
Before belonging to the first group
The candidate block is substituted by using a plurality of processing unit data.
When the second candidate block cannot be generated.
At least one of the processing unit data of a complementary block is
Belonging to the second group of the plurality of groups
Partitioning method with steps. 16. A partitioning method according to any of claims 13 to 15, wherein the plurality of groups form a hierarchy, steps be assigned to the second group, the second
A partitioning method for selecting a group that is higher in the hierarchy than the first group as the group. 17. The partitioning method according to claim 16 , further comprising: determining whether or not the first group is at the top of the hierarchy; and determining that the first group is A party having a step of notifying that the division of the circuit data to be inspected cannot be performed in place of the step of belonging to the second group when it is determined that the circuit data is at the highest level. Shoning method. 18. An object to be inspectedCircuitSplit data into multiple
To generate a plurality of data blocks as a result of the division.
After the inspection,CircuitEmulate data
An emulation method for performing processing, wherein processing unit data including at least one element data is
A plurality of data to be inspectedCircuitDe
Providing the data to be inspected,CircuitThe plurality of processes constituting data
Check the number of the element data included in each unit data.
Issuing the object to be inspected based on the detection result.Circuitdata
A plurality of processing units from the plurality of processing unit data constituting
A plurality of processing units selected by selecting logical unit data
Generating a candidate block from data; and the element data included in the generated candidate block.
Comparing the number of data with a set value;ofresult, The number of the element data is equal to or more than the set value
When, The candidate block as the data block
WhendecideStep; for each of said plurality of said determined data blocks
Performing data processing in parallel, Each of a plurality of data blocks as a result of said division
Is assigned to the board, The step of performing the comparison includes the circuit data of the inspection object.
The number of all of the element data included in the
All of the above for assigning each of the data blocks
Average mounted element data corresponding to the number divided by the number of boards
The number set based on the number is the set value. Emu
Method. 19. The circuit data to be inspected is divided into a plurality.
To generate a plurality of circuit blocks as a result of the division
Partitioning method, Multiple modules with at least one gate
Circuit data composed of the circuit data to be inspected.
Providing the steps as The plurality of modules constituting the circuit data to be inspected;
For detecting the number of gates included in each
Tep, Based on the detection result, the circuit data of the inspection object
A plurality of the modules from the plurality of modules constituting
Select the rule and select the module
Generating a new module; Number of the gates included in the generated new module
Comparing with the reference gate number and As a result of the comparison, the number of the gates is
If the number is greater than or equal to
And a step of determining Each of the plurality of circuit blocks as a result of the division
Is assigned to the emulation board, The step of performing the comparison includes the circuit data of the inspection object.
The number of all the gates included in the plurality of circuit blocks.
All the above emulations for assigning each of the locks
Average board size corresponding to the number divided by the number of
The number of ports equal to or greater than the number of
The method of positioning. 20. Object to be inspectedCircuitSplit data into multiple
To generate a plurality of data blocks as a result of the division.
A partitioning device for generating processing unit data including at least one element data.
A plurality of data to be inspectedCircuitDe
Means to be provided as data, and the object to be inspectedCircuitThe plurality of processes constituting data
Check the number of the element data included in each unit data.
Output means; and the inspection target based on the detection result.Circuitdata
A plurality of processing units from the plurality of processing unit data constituting
A plurality of processing units selected by selecting logical unit data
Means for generating a candidate block from data; and the element data included in the generated candidate block
Means for comparing the number of data with a set value;ofresult, The number of the element data is equal to or more than the set value
When, The candidate block as the data block
WhendecideWith means, Each of a plurality of data blocks as a result of said division
Is assigned to the board, The means for performing the comparison is based on the circuit data of the inspection target.
The number of all the element data included is
All said boards for assigning each of the blocks
The average number of mounted element data corresponding to the number divided by the number of
The number set based on the above is the set value Partition
Device. 21. The partitioning apparatus according to claim 20, wherein the means for providing the data as the circuit data to be inspected corresponds to the candidate for the processing unit data at the time of input .
Means for detecting the number of element data included in the processing unit candidate data to be processed ; means for comparing and examining the number of element data included in the detected processing unit candidate data with a predetermined value; As a result of the examination , it is included in the processing unit candidate data.
When the number of element data exceeds the predetermined value,
Dividing the element data included in the processing unit candidate data,
Generating the processing unit data as a result of the division ;
As a result of the comparison and examination, it is included in the processing unit candidate data.
When the number of element data does not exceed the predetermined value,
The processing unit candidate data is directly used as the processing unit data.
And a partitioning device. 22. The partitioning apparatus according to claim 21 , wherein each of the plurality of data blocks as a result of the division is allocated to a board, and the means for performing the comparison and examination includes the circuit data to be inspected. The number of all of the element data included in the data block is divided by the number of all of the boards for allocating each of the plurality of data blocks. The partitioning device, wherein the predetermined number is the predetermined value. 23. A partitioning system according to claim 21 or 22, means for performing said comparison, it is determined that it can not to perform the division of the circuit de <br/> over data of the object to be inspected A partitioning device that automatically updates the value of the predetermined value when the error occurs. 24. A partitioning system according to any one of claims 20 to 23, means for performing said comparison, when the it is determined that it is not possible to perform the division of the circuit data to be inspected,
A partitioning device that automatically updates the value of the set value. 25. A partitioning system according to any one of claims 20 24, further result in said means for determining, when the candidate block decides not to said data blocks, based on the detection result Out of the plurality of processing unit data constituting the circuit data to be inspected, the processing unit data replacing at least one of the plurality of processing unit data included in the candidate block. And a means for generating a second candidate block based on the selected processing unit data, wherein the means for performing the comparison includes: a number of the element data included in the generated second candidate block; Performing a comparison with the set value, wherein the determining unit determines the second candidate as a result of the comparison.
The number of elements data contained in the block the set value or more
At one time, a partitioning device that determines the second candidate block as the data block. In partitioning apparatus according to any one of claims 26] according to claim 20 to 25, further means for the determination result, when the candidate block is determined as the data block, wherein the inspection object
The plurality of processing unit data selected from the plurality of processing unit data other than the candidate block determined as the data block among the plurality of processing unit data constituting the circuit data and the selected plurality of processings are performed. Means for generating a third candidate block based on unit data, wherein the means for comparing compares the number of the element data included in the generated third candidate block with the set value; The means for determining includes the third candidate as a result of the comparison.
If the number of element data included in the block is greater than the set value
At one time, a partitioning device that determines the third candidate block as the data block. 27. From claim 2026Described in any of
In the partitioning equipment ofFurthermore,  The element data included in the generated candidate block
Of the element data that can be assigned to the board
Means to compare with the maximum number of mounted element data indicating the maximum number
Wherein said means for determining comprises said comparingofresult, The element data
Is greater than or equal to the set value, andContrastofresult,Previous
The number of element data is less than the maximum
The candidate block as the data block.
SpecifyPartitioning equipment. 28. From claim 2026Described in any of
In the partitioning equipment ofFurthermore,  The other plurality of data in the generated candidate block
To make electrical connections between each of the data blocks
Means for detecting the number of external signals of the candidate block; and the number of the external signals of the detected candidate block.
Indicates the maximum number of external signals that can be connected to the board.
Means for making a comparison with the maximum number of signals between boards, wherein the means for deciding comprises:ofresult, The element data
Is greater than or equal to the set value, andContrastofresult,Previous
When the number of external signals is equal to or less than the maximum number of signals between boards.
The candidate block is determined as the data block.
ToPartitioning equipment. 29. The partitioning device according to claim 28 , further comprising, as a result of the comparison, determining that the number of the external signals of the detected candidate block exceeds the maximum number of inter-board signals. In the case, the processing unit replacing the processing unit data of at least one of the plurality of processing unit data included in the candidate block from among the plurality of processing unit data configuring the circuit data to be inspected. Means for selecting data and generating a fourth candidate block based on the selected processing unit data, wherein the means for performing the comparison includes the number of the element data included in the generated fourth candidate block. And the set value, and the determining means determines the fourth candidate as a result of the comparison.
The number of the element data included in the block is equal to or less than the set value.
A partitioning device that determines the fourth candidate block as the data block when the above is the case; 30. Object to be inspectedCircuitSplit data into multiple
To generate a plurality of data blocks as a result of the division.
A partitioning device for generating processing unit data including at least one element data.
A plurality of means for providing, a plurality of groups of the provided plurality of processing unit data
The plurality of processes as a result of the classification
Unit data to be inspectedCircuitProvide as data
Means belonging to a first group of the plurality of groups
The element included in each of the plurality of processing unit data
Means for detecting the number of data; and belonging to the first group based on the detection result.
From the plurality of processing unit data
Data for the selected plurality of processing unit data.
Means for generating a candidate block by using the data, and the element data included in the generated candidate block.
Means for comparing the number of data with a set value;ofresult, The number of the element data is equal to or more than the set value
When, The candidate block as the data block
WhendecideWith means, Each of a plurality of data blocks as a result of said division
Is assigned to the board, The means for performing the comparison is based on the circuit data of the inspection target.
The number of all the element data included is
All said boards for assigning each of the blocks
The average number of mounted element data corresponding to the number divided by the number of
The number set based on the above is the set value Partition
Device. 31. The partitioning device according to claim 30 , further comprising: when the determining unit determines that the candidate block is not to be the data block, based on the detection result. From among the plurality of processing unit data belonging to a group, the processing unit data that replaces at least one of the plurality of processing unit data included in the candidate block is selected, and the selected processing unit data is replaced with the selected processing unit data. Means for generating a second candidate block based on the processing unit data, wherein the means for comparing compares the number of the element data included in the generated second candidate block with the set value The means for making the determination comprises: as a result of the comparison , the second
The number of the element data included in the complementary block is the set value.
When the above is the case, the partitioning device that determines the second candidate block as the data block. 32. In partitioning device according to claim 30 or 31, further result in said means for determining, when the candidate block decides not to said data blocks, belonging to the first group When a second candidate block that replaces the candidate block cannot be generated using the plurality of processing unit data, at least a part of the plurality of processing unit data belonging to the first group is replaced with the plurality of processing unit data. A partitioning device comprising means for belonging to a second group of the groups. Claim 3330From32Described in any of
In the partitioning equipment ofFurthermore,  The element data included in the generated candidate block
Of the element data that can be assigned to the board
Means to compare with the maximum number of mounted element data indicating the maximum number
And the element included in the candidate block as a result of the comparison
When the number of data exceeds the maximum mounted element data number
If it is determined, the duplicate included in the candidate block is determined.
At least one of the plurality of processing unit data.
Position data in a second group of the plurality of groups.
Partitioning device with means to attribute to 34. A partitioning system according to any of claims 30 32, further, for electrically connecting between the respective other of said plurality of data blocks in the generated candidate blocks Means for detecting the number of external signals; means for comparing the detected number of external signals of the candidate block with the maximum number of inter-board signals indicating the maximum number of external signals connectable to the board And, as a result of the comparison, when it is determined that the number of the external signals of the detected candidate block exceeds the maximum number of inter-board signals, the plurality of processes belonging to the first group. When a second candidate block that replaces the candidate block cannot be generated using unit data, at least one of the processing unit data of the candidate block is Partitioning apparatus having means for belonging to a second group of the group of. 35. In partitioning device according to any of claims 32 34, wherein the plurality of groups form a hierarchy, means for belonging to the second group as the second group, A partitioning device that selects a group higher in the hierarchy than the first group. 36. The partitioning device according to claim 35 , further comprising: means for determining whether or not the first group is at the top of the hierarchy, and as a result of the determination, the first group is A party provided with means for notifying that the division of the circuit data to be inspected cannot be performed in place of the means for belonging to the second group when it is determined to be at the highest level. Shoning equipment. 37. An object to be inspectedCircuitSplit data into multiple
To generate a plurality of data blocks as a result of the division.
After the inspection,CircuitEmulate data
An emulation device that performs processing, and converts processing unit data including at least one element data.
A plurality of data to be inspectedCircuitDe
Means to be provided as data, and the object to be inspectedCircuitThe plurality of processes constituting data
Check the number of the element data included in each unit data.
Output means; and the inspection target based on the detection result.Circuitdata
A plurality of processing units from the plurality of processing unit data constituting
A plurality of processing units selected by selecting logical unit data
Means for generating a candidate block from data; and the element data included in the generated candidate block
Means for comparing the number of data with a set value;ofresult, The number of the element data is equal to or more than the set value
When, The candidate block as the data block
WhendecideMeans for each of said plurality of said determined data blocks
Means for performing data processing in parallel., Each of a plurality of data blocks as a result of said division
Is assigned to the board, The means for performing the comparison is based on the circuit data of the inspection target.
The number of all the element data included is
All said boards for assigning each of the blocks
The average number of mounted element data corresponding to the number divided by the number of
The number set based on the above is the set value Emulation
Device. 38. The circuit data to be inspected is divided into a plurality of pieces.
To generate a plurality of circuit blocks as a result of the division
Partitioning device, Multiple modules with at least one gate
Circuit data composed of the circuit data to be inspected.
Means to provide as The plurality of modules constituting the circuit data to be inspected;
For detecting the number of gates contained in each
Steps and Based on the detection result, the circuit data of the inspection object
A plurality of the modules from the plurality of modules constituting
Select the rule and select the module
Means for creating a new module; Number of the gates included in the generated new module
And the number of reference gates Means for comparing As a result of the comparison, the number of the gates is
If the number is greater than or equal to
And means for determining Each of the plurality of circuit blocks as a result of the division
Is assigned to the emulation board, The means for performing the comparison is based on the circuit data of the inspection target.
The number of all the gates included is
All the emulations for assigning each of the
Average mounted gates corresponding to the number divided by the number of application boards
The number of the above-mentioned reference gates
Device.