JP3196700B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

The present invention relates to a method for manufacturing a semiconductor device,
In particular, it relates to a method for forming an upper electrode of a memory cell.

[0002]

2. Description of the Related Art Super LSI after 256 Mbit DRAM
In a capacitor element portion of a memory device, the use of a capacitor insulating film having a high dielectric constant capable of increasing a capacitance value per unit area has been studied. Among such capacitive insulating films, many studies have been made on tantalum oxide films formed by chemical vapor deposition (CVD) because of their excellent step coverage.

Referring to FIG. 9, which is a cross-sectional view of a manufacturing process of a capacitive element of a DRAM cell, a conventional method of manufacturing a stacked type capacitive element of a DRAM using a tantalum oxide film as a capacitive insulating film is as follows. It has become.

First, as shown in FIG. 9A, a transistor is formed on the surface of a P-type silicon substrate, and this transistor is covered with an interlayer insulating film 47. Interlayer insulating film 47
Then, a contact hole 58 reaching one of the N-type source and drain regions of the transistor is formed. Contact hole 58
Then, a bit line 56 connected to the N-type source / drain region via the gate insulating film 47 is formed on the surface of the interlayer insulating film 47.
An interlayer insulating film 48 is formed to cover the surface of the interlayer insulating film 47 including the bit lines 56.

Under such a structure, first, a contact hole 57 penetrating through the interlayer insulating films 47 and 48 and reaching the other of the source and drain regions of the transistor is formed. A phosphorus-doped polycrystalline silicon film is formed on the entire surface of the substrate, and the polycrystalline silicon film is patterned to form a storage node electrode 2.

Next, an interlayer insulating film including the surface of the storage node electrode 2 is formed by a low-pressure vapor deposition method using pentaethoxy tantalum (Ta (OC ₂ H ₅ ) ₅ ) gas, which is an organic material, and oxygen. 48, a tantalum oxide film 11 is formed.

Next, as shown in FIG. 9B, a high-temperature heat treatment is performed in an oxygen atmosphere to improve the leak current characteristics of the tantalum oxide film 11, and the tantalum oxide film 11 becomes the tantalum oxide film 11B. . Subsequently, as shown in FIG. 9C, the capacitor upper electrode 3 is formed. This capacitor upper electrode 3
In order to obtain good step coverage, a laminated film of a titanium nitride (TiN) film or a tungsten nitride (WN) film + phosphorus-doped polycrystalline silicon film by a plasma chemical vapor deposition method is used.

In this method of forming a titanium nitride film by plasma enhanced chemical vapor deposition, titanium tetrachloride (TiCl
₄ ), using argon, hydrogen and nitrogen gas, or titanium tetrachloride and ammonia gas. In a method of forming a tungsten nitride film by plasma enhanced chemical vapor deposition, tungsten hexafluoride (W
F ₆ ), hydrogen and nitrogen gas, or tungsten hexafluoride and ammonia gas.

[0009]

First, when a titanium nitride film or a tungsten nitride film formed by the plasma chemical vapor deposition method described above is formed on a tantalum oxide film or a barium strontium titanate film which is a capacitance insulating film, There is a problem that the capacitance insulating film is etched by a halogen gas such as chlorine in titanium tetrachloride (TiCl ₄ ) gas or fluorine in tungsten hexafluoride (WF ₆ ) gas, and the leak current characteristic is significantly deteriorated.

[0010]

It is an object of the present invention to use a reactive gas
Titanium nitride or tungsten nitride thin film
When forming on the upper electrode,
Eliminates the problem that the capacitance film is etched and leaks
Provided is a method for manufacturing a semiconductor device with improved current characteristics.
It is in.

[0012]

To achieve the above object, according to an aspect of, Oite method of manufacturing a semiconductor device according to the present invention, flat
Film formation using a plasma-enhanced chemical vapor deposition system consisting of horizontal plates
The method of manufacturing a semiconductor device, titanium or data
Reaction chamber with shower electrode made of tungsten metal
Only ammonia gas or nitrogen gas
Along with the plasma generated in the reaction chamber.
Decomposes the gas to generate radicals,
Sputter the shower electrode with Zical
Titanium or tungsten metal generated in the plasma
Titanium nitride or tongue nitride
This is to form a stainless thin film.

In forming a capacitive element portion of a semiconductor device, a step of forming a plate electrode after forming a high dielectric constant film such as a tantalum oxide (Ta ₂ O ₅ ) film or a barium strontium titanate (BST) film. Then, the metal nitride thin film is used.

[0014]

In a method of manufacturing a semiconductor device according to the present invention, a step of forming a high dielectric constant capacity insulating film such as a tantalum oxide film or a barium strontium titanate film, and then forming a plate electrode in the plasma chemical vapor A step of forming a metal nitride thin film by nitridation plasma treatment of high-purity metal intended for a shower electrode plate of a growth apparatus using nitrogen, ammonia, or the like.

Further, in forming a contact portion of the semiconductor device, at least a step of forming an ultra-fine contact portion having a contact system of 0.5 μm or less and an aspect ratio of 2 or more, the step of forming a high-level electrode intended for a shower electrode plate. A step of forming a pure metal by a plasma treatment using an inert gas and a step of forming a metal nitride thin film by a nitridation plasma treatment using nitrogen, ammonia, or the like are performed.

[0017]

Next, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1) Prior to describing an embodiment of the present invention, first, a semiconductor device to which the embodiment of the present invention is applied will be described.

As shown in FIG. 1, a DRAM to which an embodiment of the present invention is applied has the following structure.

An N well 42 is formed on the surface of the P type silicon substrate 41, a first P well 43a is formed on the surface of the N well 42, and an N type isolation region 45 is formed on the peripheral surface of the N well 42. Is formed. A second P-well 43 is provided on the surface of the P-type silicon substrate 41 excluding the N-well 42.
b is formed. P well 43a and P well 43b
Is element-isolated by the N-type isolation region 45 and the field oxide film 46.

On the surface of the first P-well 43a, respective transistors 50 forming memory cells are formed in active regions separated by a field oxide film 46. FIG. 4 shows only a pair of memory cells. Each transistor 50 has a P-well 43a
N-type source / drain region 51 provided on the surface of
a, 51b, a gate insulating film 52 provided on the surface of the P well 43a, a polycrystalline silicon film 53 and a silicide film 54 provided on the surface of the P well 43a with the gate insulating film 52 interposed therebetween. And a gate electrode 55 composed of These transistors 50 have a first
Is covered with an interlayer insulating film 47. Interlayer insulating film 47
Is provided with a contact hole 58 reaching the (one) source / drain region 51a shared by a pair of transistors 50. The bit line 56 provided on the surface of the interlayer insulating film 47 is connected to the source / drain region 51a via the contact hole 58.

The bit line 56 is covered with a second interlayer insulating film 48. On the interlayer insulating film 48, a capacitance element portion 70 surrounded by a dotted line is provided. That is, the stack-type capacitance element according to the present embodiment includes the storage node electrode (capacitance lower electrode) 2A, the tantalum oxide film 11A as a capacitance insulating film, and the plate electrode (capacitor upper electrode) 3A. A contact hole 57 penetrating through the interlayer insulating films 47 and 48 and reaching the respective (other) N-type source / drain regions 51b of the pair of transistors 50
It is connected to the. Further, the plate electrode 3A is continuously formed in common with the respective capacitance elements of the pair of memory cells. The plate electrode 3A extends on the surface of the second interlayer insulating film 48 and is provided with a plate electrode 3A serving as an extraction portion for connecting to an upper layer wiring.

The capacitance element section 70 is formed of a third interlayer insulating film 49.
Covered by One aluminum electrode 71a of the plurality of aluminum electrodes 71 provided on the surface of interlayer insulating film 49 is connected to plate electrode 3A via contact hole 67 provided in interlayer insulating film 49. The aluminum electrode 71a is at a fixed potential such as a ground potential.

On the other hand, a transistor 60 constituting a peripheral circuit of the storage device is formed by an N-type transistor provided on the surface of the P-well 43b.
Source / drain regions 51, a gate insulating film 52 provided on the surface of the P well 43b, and a gate insulating film 5
2 and a gate electrode 55 formed by laminating a polycrystalline silicon film 53 and a silicide film 54 provided on the surface of the P well 43b. An aluminum electrode 71b is connected to one of the source / drain regions 51 via a contact hole 68 provided through interlayer insulating films 47, 48, and 49. Similarly to the contact hole 67, the side and bottom surfaces of the contact hole 68 are made of a titanium nitride film 72.
And is filled with a tungsten film 73.
Similarly, the gate electrode 55 of another transistor 60 in the peripheral circuit is grounded to the aluminum electrode 71c via a contact hole.

Next, Embodiment 1 of the present invention will be described.

FIG. 2 is a block diagram showing a chemical vapor deposition apparatus for forming a tantalum oxide film, FIG. 3 is a block diagram showing a plasma chemical vapor deposition apparatus for forming a plate electrode, and FIG. 4 is an embodiment of the present invention. FIG. 4 is a cross-sectional view showing a method for manufacturing the semiconductor device according to Step 1 in the order of steps; In FIG. 2, 12 is an oxygen gas introduction pipe, 13 is an argon gas introduction pipe, 14 is a heater, 15
Is a vaporization chamber, 16 is a heater, 17 is a substrate holder, 18 is a substrate wafer, 19 is a reaction furnace, 20 is a vacuum pump, 21 is an exhaust port, 22a, 22b, and 22c are valves, and 23 is a carrier gas argon introduction pipe. is there. In FIG. 3, 30
1,302,303,304,305,306,30
7, 308 are valves, 310 and 310B are shower electrodes, 311 and 311B are reaction chambers, 312 and 312B are high frequency power supplies, 313 is a semiconductor wafer, and 314 is a heater.

First, as shown in FIG. 4A, a second interlayer insulating film 48 is formed, and a contact hole 57 penetrating through the interlayer insulating films 47, 48 is formed. Thereafter, a polycrystalline silicon film is deposited by a chemical vapor deposition method, and after the polycrystalline silicon film is doped with phosphorus, patterning is performed to form a polycrystalline silicon film. Note that a material for filling the inside of the contact hole 57 may be a polycrystalline silicon film doped with phosphorus, an N-type polycrystalline silicon film separately formed in advance, a tungsten film, or the like.

Next, as shown in FIG. 4B, after the natural oxide film formed on the surface of the polycrystalline silicon film is removed by dilute hydrofluoric acid, rapid thermal nitridation (R) using lamp annealing is performed.
TN) treatment to nitride the surface of polycrystalline silicon, which is a storage node electrode, and to form a silicon nitride film (S
iNx) (not shown) is formed, and the storage node electrode 2 is converted to a storage node (lower capacitor) electrode 2A. As the RTN treatment, treatment in an ammonia (NH ₃ ) gas is preferable.
Suitably, it is carried out at 00 to 1100 ° C. Further, hydrofluoric anhydride may be used for removing the natural oxide film.

Next, as shown in FIG. 4C, a tantalum oxide film (not shown) is formed on the surface of the interlayer insulating film 48 including the surface of the storage node electrode (capacitor lower electrode) 2A by the CVD method. Is deposited. For this formation, a reduced pressure chemical vapor deposition apparatus shown in FIG. 2 is used. As raw material gas,
An organic tantalum raw material such as pentaethoxy tantalum (Ta (OC ₂ H ₅ ) ₅ ) gas and oxygen are used. The pentaethoxy tantalum gas is vaporized in the vaporization chamber 15 by the heater 14 in the vaporization chamber 15, and is supplied to the reaction furnace 19 through the valve 22 d by the argon gas as the carrier gas sent through the valve 22 c by the carrier gas argon introduction pipe 23. Introduced within. In the reaction furnace 19, a semiconductor wafer 18 is mounted on a substrate holder 17.

Simultaneously with the introduction of the gas, oxygen gas is supplied from the oxygen gas introduction pipe 12 to the reaction furnace 19 through the valve 22d.
Introduced within. The reaction furnace 19 is heated by the heater 16, and a chemical vapor reaction occurs between the introduced pentaethoxy tantalum gas and oxygen gas, and the semiconductor wafer 18 is heated.
A tantalum oxide film is deposited on the surface of the substrate. As growth conditions, the heating temperature of the vaporization chamber 15 is 30 to 220 ° C., and the flow rate of argon gas as a carrier gas is 10 to 5000 scc.
m, flow rate of oxygen gas is 0.1-20 SLM, pressure is 1 ×
It is suitable to carry out at 10 ² to 1 × 10 ⁴ Pa. Reactor 1
In addition to the introduction pipes 12 and 23, an introduction pipe 13 such as an argon gas or a nitrogen gas is connected to 9, and an argon gas or a nitrogen gas is introduced through a valve 22a.
Further, although the argon gas is used in the first embodiment as the carrier gas, a similar effect can be obtained by using an inert gas such as He or a nitrogen gas in addition to the argon gas.

Next, as shown in FIG. 4C, after the tantalum oxide film is deposited, the tantalum oxide film is densified to form a tantalum oxide film 11A. This treatment is performed in an oxygen atmosphere or a nitrous oxide (N ₂ O) atmosphere using at least one of heating by an electric furnace, rapid heating using lamp annealing, heating by plasma treatment, or heating by ultraviolet irradiation. is there.

Subsequently, as shown in FIG. 4D, a plate electrode (capacitor upper electrode) 3A is formed on the tantalum oxide film 11A.
Is formed using a plasma chemical vapor deposition apparatus including a shower electrode 310 made of high-purity titanium or high-purity tungsten metal. The plasma chemical vapor deposition apparatus shown in FIG. 3 is used for this formation. As a forming method, ammonia gas is supplied through the valve 306 to the reaction chamber 31.
After the pressure is stabilized in the reaction chamber 311, plasma is generated in the reaction chamber 311 by the high frequency power supply 312. As a reaction gas, an ammonia gas is supplied to the valve 306.
To the reaction chamber 311 and apply a high frequency power supply 312 to generate plasma to form a titanium nitride film or a tungsten nitride film. As the formation conditions, the heating temperature of the reaction chamber is from room temperature to 300 ° C., the flow rate of ammonia gas is from 10 to 5000 sccm, and the pressure is 1 × 10 5
^It is suitable to carry out at ² to 1 × 10 ⁴ Pa. In the first embodiment, ammonia gas is used, but the same effect can be obtained by using nitrogen gas in addition to ammonia gas.

In the first embodiment of the present invention, as a process of forming a titanium nitride or tungsten nitride film, ammonia gas is decomposed by the generation of plasma to generate a radical NH ⁺ group, and this radical NH ⁺ The high-purity titanium or high-purity tungsten metal as a shower electrode is sputtered by the base, high-purity titanium or tungsten is generated in the plasma, and a titanium nitride film or a tungsten nitride film is formed by a reaction with ammonia gas. The step coverage of the nitrogen metal thin film according to the first embodiment of the present invention is equivalent to that of the conventional metal nitride thin film formed by chemical vapor deposition using titanium tetrachloride gas or tungsten hexafluoride gas. Remarkably good results are obtained as compared with the case of a metal nitride thin film formed by reactive sputtering.

After that, the third interlayer insulating film 49 is deposited and reflowed, the contact holes 67 and 68 are formed, the contact phosphorus diffusion layer is formed, and the aluminum electrodes 71 and 71a are formed.
The formation of 71b, 71c and the like is performed, and the DRAM is completed. The high-temperature heat treatment after the formation of the capacitance element portion 70 includes reflow of the interlayer insulating film 49 and activation heat treatment for forming a contact phosphorus diffusion layer on the bottom surface of the contact hole 68, and is performed at 400 to 850 ° C. .

The capacitance value of the capacitor obtained in the first embodiment is about 2.5 nm in terms of a silicon oxide film equivalent film thickness.
(Cs = 14 fF / μm ² ), and by using a tantalum oxide film, an insulating film having a high capacitance value can be formed.

Referring to FIG. 6 showing the leakage current characteristics,
The leakage current characteristic of the capacitor obtained according to the first embodiment is as follows: a titanium nitride film formed by a plasma chemical vapor deposition method using titanium tetrachloride gas or a plasma chemical gas Significantly better results are obtained compared to the case where a tungsten nitride film formed by the phase method is used. This is because, when a titanium nitride film or a tungsten nitride film formed by a conventional plasma chemical vapor deposition method is formed on a tantalum oxide film as a capacitive insulating film, chlorine or tungsten hexafluoride in titanium tetrachloride gas is used. The tantalum oxide film is etched by the halogen gas such as fluorine in the gas, and the leak current characteristic is remarkably deteriorated. This is because a shower electrode having higher purity is used, so that a titanium nitride film or a tungsten nitride film, which is a high quality plate electrode, can be formed with good step coverage.

In the present embodiment, a tantalum oxide film is used as the capacitor insulating film. However, the present invention is not limited to this, and other high dielectric constant insulating films such as a barium strontium titanate film may be used. The same effect can be obtained in the case where there is.

(Embodiment 2) Next, Embodiment 2 of the present invention
Will be described.

First, as shown in FIG. 5A, similarly to the first embodiment, a second interlayer insulating film 48 is formed, and a contact hole 57 penetrating through the interlayer insulating films 47, 48 is formed. Thereafter, an amorphous silicon film 112 doped with phosphorus is formed by a CVD method. The contact hole 57
As a material for filling the inside, an amorphous silicon film doped with phosphorus formed for forming the amorphous silicon film 112 may be used, but an N-type polycrystalline silicon film or a tungsten A film or the like may be used.

Next, as shown in FIG. 5B, after the native oxide film on the surface of the amorphous silicon film 112 is removed with diluted hydrofluoric acid, the non-oxide film is irradiated with a molecular beam using silane (SiH ₄ ) gas. The surface of the crystalline silicon film 112 is converted into rough silicon (a surface having hemispherical silicon crystal grains (HSG)). Further, a polycrystalline silicon film 113 whose surface is nitrided is formed by RTN treatment by lamp annealing using ammonia gas.

Next, as shown in FIG.
Similarly to the above, the densified protein oxide film 11A is formed, and the plate electrode 3 is formed. The subsequent steps are the same as in the first embodiment.

The capacitance per cell according to the second embodiment can be about twice or more as high as that of the first embodiment. This is because the effective surface area of the capacitor lower electrode 2A was increased by adopting the rough silicon.

With regard to the leakage current characteristic of the capacitor obtained in the second embodiment, a result substantially equivalent to that in FIG. 6 described in the first embodiment is obtained. This is because when a titanium nitride film or a tungsten nitride film formed by a conventional plasma chemical vapor deposition method is formed on a tantalum oxide film which is a capacitive insulating film, chlorine or tungsten hexafluoride in titanium tetrachloride gas is used. By halogen gas such as fluorine in gas,
Although the tantalum oxide film is etched and the leak current characteristic is significantly deteriorated, in the case of using the present invention, a shower electrode having a purity higher than 3N is used without etching the tantalum oxide film by a halogen gas such as a chlorine-based gas. Therefore, a titanium nitride film or a tungsten nitride film, which is a high quality plate electrode, can be formed with good step coverage.

In the present embodiment, a tantalum oxide film is used as the capacitor insulating film. However, the present invention is not limited to this, and another high dielectric constant insulating film such as a barium strontium titanate film may be used. The same effect can be obtained even when there is. In the second embodiment and the first embodiment, an example in which silicon is used as the storage node has been described. However, the storage node is not limited to silicon, but may be a metal silicide such as WSi ₂ , a high melting point metal such as W, or a noble metal such as platinum. The same effect can be obtained even when a conductive material that does not deteriorate during the formation of the capacitor film, such as a metal or an oxide conductor, is used.

[0045]

Third Embodiment Next, a third embodiment of the present invention will be described.

First, as shown in FIG. 7A, a barrier metal layer having a low contact resistance of a contact hole 68 having a large aspect ratio is formed, and then, as shown in FIG. A thin titanium silicide film 72A is formed by plasma treatment in an inert gas using a shower electrode made of, as shown in FIG. 7 (c).
A thin titanium nitride film 72B is formed by nitridation plasma treatment using nitrogen, ammonia, or the like. Further, the contact hole 68 is filled with a tungsten film 73.

FIG. 8 shows the contact size dependence of the contact resistance of the p-type and n-type obtained by the present invention. Here, the applied contact depth is 1 μm. As shown in FIG. 8, in a contact having a diameter of 0.5 μm or less, a result of low contact resistance is obtained by applying the present invention, and a step of forming an ultrafine contact portion having a contact diameter of 0.5 μm or less and an aspect ratio of 2 or more Was confirmed to be effective. This is because, in the conventional technique of forming a titanium / titanium nitride film by plasma enhanced chemical vapor deposition, a large amount of chlorine gas in titanium tetrachloride gas remains in the titanium film, so that the contact resistance increases. This is because, by using the present invention, a high-quality titanium / titanium nitride film having no residual chlorine can be formed with good step coverage.

[0048]

As described above, according to the method of manufacturing a semiconductor device of the present invention, a reactive gas is produced in a DRAM.
A titanium nitride or tungsten nitride thin film
When forming on the upper electrode of the molycell, a halogen gas
Eliminates the problem that the capacitive film is etched by
And to improve the properties of the leakage current, it has a effect that can be formed the capacitor element portion having a sufficient capacitance with good leakage current
You.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing a DRAM device structure to which the present invention is applied.

FIG. 2 is a CVD apparatus for forming a tantalum oxide film used in Embodiment 1 of the present invention.

FIG. 3 is a plasma chemical vapor deposition apparatus for forming a metal thin film or a metal nitride thin film used in Embodiment 1 of the present invention.

FIG. 4 is a cross-sectional view illustrating a manufacturing process according to the first embodiment of the present invention, and is an enlarged cross-sectional view of a portion of the capacitive element unit 70 in FIG.

FIG. 5 is a cross-sectional view showing a step of manufacturing the capacitor element portion according to Embodiment 2 of the present invention.

FIG. 6 is a graph showing leakage current characteristics of a capacitor element according to the first and second embodiments of the present invention.

FIG. 7 is a cross-sectional view illustrating a manufacturing step of a contact portion according to Embodiment 3 of the present invention.

FIG. 8 is a diagram showing a result of contact size dependence of a contact resistance according to the third embodiment of the present invention.

FIG. 9 is a cross-sectional view illustrating a process for manufacturing a conventional capacitor element.

[Explanation of symbols]

 2A capacitance lower electrode 3A capacitance upper electrode 11A tantalum oxide film

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ identification code FI H01L 21/8242 H01L 27/04 C 27/04 (58) Investigated field (Int.Cl. ⁷ , DB name) H01L 27/108 C23C 16/50 H01L 21/205 H01L 21/285 H01L 21/31 H01L 21/822 H01L 21/8242 H01L 27/04

Claims (2)

(57) [Claims] 1. Plasma chemical vapor deposition comprising parallel plates
In the method of manufacturing a semiconductor device for forming a film using the apparatus, a shower electrode made of titanium or tungsten metal is used.
Ammonia gas or nitrogen gas in a reaction chamber having
While introducing only one of the gases,
Generates radicals by decomposing the gas with the plasma
The shower electrode by the generated radicals.
Titanium or tangs generated in the plasma
Ten metal reacts with nitrogen in the plasma to form titanium nitride
Or a method of manufacturing a semiconductor device, comprising forming a tungsten nitride thin film . 2. A method for forming a capacitor element portion of a semiconductor memory device, comprising forming a high dielectric constant film such as a tantalum oxide (Ta ₂ O ₅ ) film or a barium strontium titanate (BST) film, and then forming a plate electrode. 2. The method according to claim 1, wherein the metal nitride thin film is used in the step.