JP3185178B2 - Semiconductor package and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package, and more particularly, to a semiconductor device in which a chip is built in a body of a premold and molded to form a lead which is bent and deformed along an outer peripheral surface of the body of the premold. The main process is separated from the pre-mold body forming process, thereby enabling a dual process. The extended leads dissipate the heat, and the lead is soldered by the heat transferred from the chip. Fatigue phenomena (Solder
The present invention relates to a semiconductor package and a method of manufacturing the same, which can reduce an installation area and a height when stacking semiconductor packages while suppressing fatigue.

[0002]

2. Description of the Related Art FIG. 8 is a sectional view showing the structure of a conventional BLP type semiconductor package. In this semiconductor package, a lead 130 is fixed to the lower surface of a semiconductor chip 120 using an adhesive tape 140, and a bonding wire 15
0, the inner lead portion of the lead 130 is electrically connected to the input / output pad of the chip 120. The chip 120, the lead 130, the bonding wire 150, and the like, which are configured as described above, are internally provided, and epoxy resin is injected. Then, the molding unit 110 is formed.

The outer lead portion of the lead 130 is exposed on the bottom surface of the molding portion 110, and the bottom surface of the molding portion 110 and the exposed surface of the outer lead portion of the lead 130 form the same plane. The exposed leads 130 are soldered to a printed circuit board (not shown) to mount a BLP type semiconductor package 170.

FIG. 9 is a flowchart showing a process of manufacturing a conventional BLP type semiconductor package. This manufacturing process includes a wafer cutting process (step S10) for cutting and separating each chip from a wafer on which a large number of chips are formed, and a die bonding process for attaching the cut chips to a paddle of a lead frame. (Step S20) and a wire bonding step of connecting input / output pads of the chip and the leads with bonding wires to electrically connect the chip and the leads (Step S20).
30) and a molding step of forming a mutually bonded molding portion using epoxy resin on the wire-bonded chip and lead (step S40).
And a step of curing the molded body (Step S50), and a polishing step of removing the epoxy molding compound adhered during molding from the leads exposed to the outside (Step S6).
0) and a plating step (step S) for coating the lead exposed outside the molding part with a protective agent.
70), a marking step of giving a package identification factor to the surface of the molding section (step S80), and cutting unnecessary portions of the portions where the leads are exposed outside the molding section, and bending the leads into a prescribed shape. The lead trimming and the forming step (step S90), which are deformed by deformation, are sequentially performed.

On the other hand, as shown in FIGS. 10 (a) and 10 (b), various methods are used to stack a large number of semiconductor packages, depending on the form of the leads.
That is, as shown in FIG. 10A, in the case of a TSOP type semiconductor package, the semiconductor package 1 stacked on the upper side
The outer leads 190a of the semiconductor package 180b formed below are longer than the outer leads 190b of the semiconductor package 180b formed below and interconnected, or are stacked as shown in FIG.
The leads 190 of the stacked semiconductor packages 180 are connected to the connection bar 160 as shown in FIG.

[0006]

However, the conventional BLP
As shown in FIG. 8, an outer lead is inserted into the molding portion 110 of the semiconductor package 170, and heat from the chip 120 is transferred to the lead 130, as shown in FIG.
Not only is the solder formed on the exposed surface of the outer lead heated, causing a fatigue phenomenon, but also the distance between the lead 130 and the molding portion 110 in the step of cutting unnecessary portions of the lead 130. Is very short, and the shock generated at the time of cutting the lead is transmitted to the molding part 110 of the semiconductor package 170, so that a fine crack, that is, a micro gap is generated, and the durability of the semiconductor package 170 is reduced.

Further, in the conventional manufacturing process of a BLP type semiconductor package, as shown in FIG. 9, after one process is completed, the next process is sequentially performed. In addition, there is a problem that a lead polishing process (step S60) for removing an epoxy molding compound adhered to a lead during molding is added, thereby increasing the overall process.

Further, when stacking a conventional semiconductor package, as shown in FIG.
In this case, the contact portion where the a and 190b are connected to each other protrudes outward, or the connection bar 160 that connects the respective leads 190 to one is required. This naturally increases the installation area of the semiconductor package during mounting. However, there is a problem that the stacked contact portions of the respective leads 190 do not adhere to each other and the stacking height increases.

Therefore, an object of the present invention is to separately perform a step of forming a pre-molded body separated from a main step, thereby shortening the processing time by dualizing the steps and reducing the time along the outer peripheral edge of the body. The purpose of the present invention is to reduce the solder fatigue phenomenon due to the heat transmitted from the chip when mounting the component by bending the lead to secure a sufficient distance between the chip and the lead.

Another object of the present invention is to extend the leads over the lower surface and the upper surface of the semiconductor package to increase the coupling range, thereby stacking ordinary semiconductor packages having various types of leads. In this case, the stacking is performed to a minimum installation area and height, and the end of the lead mounted on the printed circuit board can be deformed into various forms depending on a connection part at the time of mounting to improve compatibility. .

[0011]

In order to achieve the above object, a semiconductor package according to the present invention comprises a chip having a number of input / output pads and a pre-molded part in which an internal space for mounting the chip is formed. A body including a filling portion for filling the internal space and sealing the chip, and one side in the body is electrically connected to the plurality of input / output pads, and the other side protrudes from a lower surface of the body and has an upper surface. Is extended and bent to reach the I-shaped part.
Or gull-wing shaped and bent outward
Or a plurality of leads formed in a J-shape and bent inward, and a fixing member for physically attaching the plurality of leads to the chip. . With such a configuration, the leads formed along the outer peripheral surface of the semiconductor package are extended from the lower surface to the upper surface of the semiconductor package, and the heat from the chips is effectively released by effectively releasing the heat from the chip. The durability of the semiconductor is improved by reducing fatigue phenomena and preventing the shock generated at the time of cutting the lead from being transmitted to the molding part of the package by increasing the distance between the lead and the molding part. In addition, when semiconductor packages having leads formed in various forms are stacked on each other, the semiconductor packages can be connected in multiple directions, thereby making stacking easier.

Further, in the method of manufacturing a semiconductor package according to the present invention, a step of forming a body by forming a pre-mold portion having an internal space, and mounting a chip having a plurality of input / output pads on the pre-mold portion. A step of attaching and fixing one side of a number of leads to the chip, a step of connecting an input / output pad of the chip and one side of the lead with a wire, and including one side of the lead. Molding a resin into the internal space of the pre-molded portion so as to surround the chip to form a filling portion, and bonding the chip and the lead to the body; and the other end of the lead is opposite to the lower surface portion. reach the upper surface portion of said body
Bend to form an I-shape or
Bent outward to form a J-shaped or J-shaped
And the step of bending inward so as to be formed is performed sequentially.

Further, another example of the semiconductor package according to the present invention is a chip having a plurality of input / output pads, a pre-molded portion in which an internal space for mounting the chip is formed, and a filling for filling the internal space. A body including a portion and sealing the chip, and one side in the body is electrically connected to the plurality of input / output pads, and the other side extends from the lower surface of the body to extend to the upper surface. Folding
Bent to form an I-shape or gull-wing shape
Formed and bent outward, or formed into a J-shape
A first unit package including a plurality of leads bent inward, a fixing member for physically attaching the plurality of leads to the chip, and a plurality of stacked units on the body of the first unit package And a plurality of leads of the second unit package are electrically connected to a plurality of leads of the first unit package.

The second unit package includes a chip having a number of input / output pads, a pre-molded part having an internal space in which the chip is mounted, and a filling part filling the internal space. A body for sealing the chip, and one side of the body is electrically connected to the plurality of input / output pads, and the other side is extended and bent so as to protrude from the lower surface of the body to reach the upper surface, and be bent. Type
Formed or gull-wing shaped outward
Bent or formed into a J shape and bent inward
And a fixing member for physically attaching the leads to the chip.

[0015]

Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a sectional view showing a structure of a BLP type semiconductor package according to the present invention. In this semiconductor package, as shown in FIG. 1, a resin material is injected into a molding die through a separate pre-molded body forming process separated from the main process, and then cured to form the body 210. Is formed. A chip 2 is provided on the bottom of the internal space of the body 210.
20 is inserted. On the lower surface of the chip 220, a large number of leads 230 are fixed with an adhesive tape 240, and each lead 230 and a large number of input / output pads of the chip 220 are electrically connected by wire bonding with bonding wires 250. You.

The interior space of the body 210 into which the chip 220 and the lead 230 are inserted as described above
60 is injected and sealed so that the outer portion of the lead 230 exposed to the outside of the body 210 extends from the lower surface of the body 210 to the upper surface via the side surface.
The BLP type semiconductor package 280 is formed by being extended and bent along the surface of the semiconductor device 10.

FIG. 2 is an explanatory view showing a state in which the BLP type semiconductor package 280 of the present invention is mounted on a printed circuit board 300. BLP type semiconductor package 2 of the present invention
80, the leads 230 are used as shown in FIG.
The surface molded by the epoxy resin 260 faces downward (hereinafter referred to as “reverse”), or the molded surface faces upward as shown in FIG. 2B (hereinafter “reverse”). ), And the respective leads 230 are mounted on a printed circuit board (hereinafter, referred to as “board”) 300.

Here, the BLP according to the present invention shown in FIG.
In the semiconductor package 280 of the type, the outer leads are extended and bent along the outer peripheral edge of the body 210 to form the leads 230 from the lower surface to the upper surface, so that the BLP type semiconductor package is formed as shown in FIG. The portion molded by the epoxy resin 260 of the semiconductor package 280 may be mounted on the substrate 300 in a state where the portion is turned downward, that is, the semiconductor package 280 may be mounted on the substrate 300 as shown in FIG. 2B. Even when the semiconductor device is mounted on the substrate 300 in an upward or frontal state, the leads of the semiconductor package formed in another form are in contact with the respective leads 230 and can be stacked.

At this time, when the BLP type semiconductor package 280 according to the present invention and the conventional semiconductor package 170 are stacked together, the side surfaces of the contact surfaces of the leads that are in contact with each other are vertical so as to minimize the space occupied by each lead. In addition, it is possible to minimize the total area when mounting by suppressing the occurrence of protrusions, and at the same time, to minimize the stacked height by contacting the mutual contact surfaces while forming a plane. .

Next, an embodiment of stacking the BLP type semiconductor package of the present invention having the body formed as described above will be described with reference to the use state diagrams shown in FIGS. First Embodiment FIG. 3A shows a first embodiment. In this embodiment, a normal B in which the lead 130 is formed only on the lower surface portion is used.
The LP semiconductor package 170 is positioned at the top as a second unit package, and the BLP semiconductor package 280 in which the body 210 is formed and the leads 230 are extended.
Is mounted on the substrate 300 in a state where the first unit package is reversed downward, and the leads 230 and 130 are stacked by being in contact with each other. At this time, the normal BLP type semiconductor package 170 located at the top has a short lead 130, but the BLP located at the bottom has a short length.
The leads 230 are extended to the upper surface of the semiconductor package 280. Accordingly, one surface of the lead 130 of the normal BLP type semiconductor package 170 and one surface of the lead 230 extended to the upper surface of the BLP type semiconductor package 280 of the present invention are brought into contact with each other and stacked. The spacing between semiconductor elements is minimized.

Second Embodiment FIG. 3B shows a second embodiment. In this embodiment, a BLP type semiconductor package 280 having a body 210 is located at a lower portion as a first unit package, mounted on a substrate 300 in a frontal state, and a normal BLP type semiconductor package is provided at an upper portion. By positioning the 170 as the second unit package, the leads 230 and 130 are stacked in contact with each other.

Third Embodiment FIG. 4A shows a third embodiment. In this embodiment, a BLP type semiconductor package 280 having a body 210 is vertically stacked as a first and a second unit package, respectively. Conversely, even if the outer leads are vertically stacked in a reversed state, the outer leads can be interconnected and stacked. At this time, the leads 230 extending from the front surface to the rear surface of the BLP-type semiconductor package 280 from the front surface to the rear surface come into contact with each other, and the connection portions come into close contact with each other.

On the other hand, FIGS. 4B to 6 show preferred embodiments in which the outer lead ends of a BLP type semiconductor package are deformed and laminated in various shapes. Fourth Embodiment FIG. 4B shows a fourth embodiment. In this embodiment, with the BLP type semiconductor package 280 having the body 210 formed thereon as a first unit package, the ends of the leads 230 are formed in a J shape, bent inward, and mounted on the substrate 300. , Such a BL
Normal BLP on top of P-type semiconductor package 280
The semiconductor package 170 of the BLP type as the second unit package.
The front surface of the lead 230 and the surface of the lead 130 of the normal BLP type semiconductor package 170 are brought into contact with each other, connected and stacked.

Fifth Embodiment FIG. 5A shows a fifth embodiment. In this embodiment, the ends of the leads 230 are formed in a gull-wing shape and bent outward to be mounted on the substrate 300 with the BLP type semiconductor package 280 on which the body 210 is formed as the first unit package. And FIG.
As in (b), the normal BLP type semiconductor package 170 is placed on the top surface of the BLP type semiconductor package 280 as the second.
Each lead 230 and 13 is positioned as a unit package.
The layers are stacked by mutually contacting the 0 planes.

Sixth Embodiment FIG. 5B shows a sixth embodiment. In this embodiment, with the BLP type semiconductor package 280 having the body 210 formed thereon as the first unit package, the ends of the leads 230 are formed into an I type, and the leads 230 reach the upper surface and are fixed on the substrate 300. 4B, a normal BLP is formed on the upper surface of the BLP type semiconductor package 280.
The LP type semiconductor package 170 is positioned as a second unit package, and the surfaces of the leads 230 and 130 are brought into contact with each other to be stacked.

Seventh Embodiment FIG. 6 shows a seventh embodiment. In this embodiment, the ends of the leads 230 are formed in an I-shape with the BLP type semiconductor package 280 having the body 210 formed on the front, and the substrate 30 is formed as a first unit package.
0. In this state, as shown in FIG. 6A, a state in which the BLP type semiconductor package 280 having the leads 230 extended along the outer peripheral edge of the body 210 on the upper side is fronted as the second unit package. The leads 230, 230 are brought into contact with each other and joined together, or as shown in FIG.
The leads 230 and 230 are brought into contact with each other in a state where the same BLP type semiconductor package 280 in which the end of 0 is formed as an I type is reversely used as a second unit package, and the semiconductor packages are stacked. .

Next, a method of manufacturing a semiconductor package according to the present invention will be described. FIG. 7 is a flowchart showing a manufacturing process of the BLP type semiconductor package of the present invention. In order to manufacture the BLP type semiconductor package of the present invention, a resin is injected into a molding die to form a body having an internal space into which a chip and a lead can be inserted (step S110); A curing step (step S120) of curing the pre-molded body is performed separately from the main step.

On the other hand, a wafer cutting step (step S130) of cutting the wafer to separate each chip from the wafer on which a large number of chips are formed,
A die bonding step (step S140) of attaching the cut chips to a paddle is sequentially performed. After the die bonding step (step S140), a wire bonding step (step S140) of connecting a plurality of input / output pads of the chip and a plurality of leads with bonding wires to electrically connect the leads to the chip. S150) is followed by a molding step of positioning the wire-bonded chip and lead in the interior space of the separately pre-molded body and injecting a filler to couple the chip and lead to the body (step) S160) is performed.

With the package molded as described above, a plating step (step S) for coating the outer leads exposed outside the body with a protective agent.
170), a marking step (step S180) of giving a package identification factor to the surface of the body, cutting unnecessary portions of the outer leads, bending the cut leads, and bringing the outer leads into close contact with the outer surface of the body. The forming process (step S190) is sequentially performed to complete the package. Note that this step
At S190, the other end of the lead is placed under the body.
Extend and bend to reach the upper surface opposite to the surface
Molded or as Gull Wing Mold
Fold outward or inward to form a J-shape
Bend and form.

[0030]

The present invention has been configured as described above.
According to the semiconductor package of the present invention, the leads formed along the outer peripheral surface of the body extend from the lower surface portion to the upper surface portion of the semiconductor package, and effectively release heat from the chip, so that the leads are formed. Solder fatigue phenomena can be reduced. In addition, since the distance between the lead and the molding portion is increased and the shock generated when the lead is cut is prevented from being transmitted to the molding portion of the package, the durability of the semiconductor can be improved. In addition, the other end of the lead projects from the lower surface of the body.
Bent to by Uni extend through to the upper surface portion Te form type I
Or formed in gull-wing shape and folded outward
Bent or formed into a J shape and bent inward
Therefore, the semiconductor package can be mounted on the substrate in various forms, and the semiconductor package can be connected in various directions at the time of mutual contact with each other, so that the lamination can be more easily performed. In addition, since a pre-molded portion in which an internal space for mounting a chip is formed is formed in the body in advance, the processes are dualized to reduce the work time in the entire process, and one of the processes performed sequentially and sequentially is performed. Time delay due to the process can be minimized.

Further, according to the method of manufacturing the semiconductor package according to claim 2, the pre-molding process of forming the body separately to form a premolded part having an internal space, the entire process is two yuan step The above operation time can be shortened, and the time delay caused by one successive process can be minimized.

Furthermore, according to the semiconductor package according to claim 3, the semiconductor package according to claim 1 as a first unit package, the other end of the lead is bent in a variety of forms
Can be mounted in various forms on the board.
Then , the second unit package can be stacked on the body of the first unit package such that the respective leads are electrically connected to each other.

Further, according to the semiconductor package of the fourth aspect , the second unit package is constituted by the semiconductor package of the first aspect, and the other ends of the leads have various shapes.
The second unit package may be stacked on the body of the first unit package, which is bent and mounted on the substrate in various shapes, such that the respective leads are in electrical contact with each other.

[Brief description of the drawings]

FIG. 1 is a sectional view showing the structure of a BLP type semiconductor package according to the present invention.

FIG. 2 shows a printed circuit board mounted on the BLP type semiconductor package.
It is explanatory drawing which shows the state mounted on a board.

FIG. 3 is a BLP type semiconductor having a body according to the present invention .
First and second embodiments showing a stacked state of a package
FIG.

FIG. 4 is a BLP type semiconductor package having the above-mentioned body formed therein.
Figures of the third embodiment and the fourth embodiment showing the stacked state of the cage
It is.

FIG. 5 is a BLP type semiconductor package formed with the above-mentioned body .
Figures of the fifth embodiment and the sixth embodiment showing the stacked state of the cage
It is.

FIG. 6 is a BLP type semiconductor package having the body formed thereon.
It is a figure of the 7th Example showing the lamination state of the cage.

FIG. 7 is a view showing a process for manufacturing a BLP type semiconductor package according to the present invention;
It is a flowchart which shows a process.

FIG. 8 shows a structure of a conventional BLP type semiconductor package.
FIG.

FIG. 9 is a manufacturing process of a conventional BLP type semiconductor package.
It is a flowchart which shows.

FIG. 10 shows a case where a large number of conventional semiconductor packages are stacked.
It is a use state figure which shows an Example.

[Explanation of symbols]

 110: Molding part 120, 220 ... Chip 130, 230 ... Lead 140, 240 ... Adhesive tape 150, 250 ... Bonding wire 160 ... Connecting bar 170, 280 ... BLP type semiconductor package 210 ... Body 260 ... Epoxy resin 300 ... Printed circuit Substrate 400 ... Solder

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI H01L 25/18 (56) References JP-A-8-8389 (JP, A) JP-A-4-85837 (JP, A) JP-A-5-13666 (JP, A) JP-A-8-148635 (JP, A) JP-A-62-182560 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21 / 56,23 / 28,23 / 50 H01L 25 / 10,25 / 11,25 / 18

Claims (4)

(57) [Claims] A chip having a plurality of input / output pads, a pre-molded part having an internal space in which the chip is mounted, and a body sealing the chip including a filling part filling the internal space; In this body, one side is electrically connected to the plurality of input / output pads, and the other side is extended and bent to extend from the lower surface of the body to the upper surface to form an I-shape.
Or gull-wing shaped and bent outward
A plurality of leads formed or bent inwardly and formed in a J-shape, and a fixing member for physically attaching the plurality of leads to the chip. Semiconductor package. 2. A step of forming a body by forming a pre-molded part having an internal space; a step of mounting a chip having a large number of input / output pads in the pre-molded part; A step of attaching and fixing one side of the chip; a step of connecting an input / output pad of the chip to one side of the lead with a wire; and a step of applying a resin to surround the chip including one side of the lead. Molding a filling portion by molding into an inner space of a mold portion and connecting the chip and the lead to the body; extending the other side of the lead so that an end reaches an upper surface portion of the body opposite to the lower surface portion; And bend to form I-shape
Or fold outward to form a gull-wing shape
And a step of bending inward so as to form a J-shape . 3. A chip having a number of input / output pads;
A body for sealing the chip including a pre-molded part in which an internal space in which the chip is mounted and a filling part for filling the internal space, and one side in the body electrically connected to the plurality of input / output pads; It is connected to, folding and extending to reach the upper surface portion other side projects from the lower surface portion of said body
Bend to form an I-shape or gull-wing shape
Formed and bent outward, or formed into a J-shape
A first unit package including a plurality of leads bent inwardly and a fixing member for physically attaching the plurality of leads to the chip; and a plurality of layers stacked on a body of the first unit package. A second unit package having a plurality of leads, wherein a plurality of leads of the second unit package are electrically connected to a plurality of leads of the first unit package. 4. The second unit package includes a chip having a number of input / output pads, a pre-molded part having an internal space in which the chip is mounted, and a filling part filling the internal space. A body for sealing the chip, and one side of the body is electrically connected to the plurality of input / output pads, and the other side is extended and bent so as to protrude from the lower surface of the body to reach the upper surface, and be bent. Formed into a mold
Or gull-wing shaped and bent outward
Or a plurality of leads formed in a J-shape and bent inward, and a fixing member for physically attaching the plurality of leads to the chip. Item 4. The semiconductor package according to Item 3 .