JP3130769B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having input / output terminals that do not interfere with each other, and more particularly to a semiconductor device having an electric operation test function of an internal circuit.

[0002]

2. Description of the Related Art At present, semiconductor devices, such as gate arrays, are becoming more sophisticated and highly integrated, the number of pads is increased, the area of the pads is reduced, and pads are arranged at a high density.

Usually, such a semiconductor device is provided with an internal circuit formed in a central portion, and a pad serving as an input / output terminal around the internal circuit. When the test is performed on a wafer, a probe card for ensuring electrical continuity is used.

FIG. 3 is a perspective view of a test state of a semiconductor device for explaining one example of the related art. As shown in FIG. 3, an operation test of the semiconductor chip 1 as a semiconductor device is performed using a probe card on a wafer. That is, the operation test is performed by bringing the probe tip 3 of the probe card into contact with all the pads 2 formed around the semiconductor chip 1.

[0005]

The above-described semiconductor device formed on a wafer requires the same wiring as that used by the user when conducting an electrical operation test, and the semiconductor device formed on the wafer is formed on the wafer. Since the needles of the probe card are brought into contact with all the pads, the number of the pads increases, the number of the pads increases, and the density of the needles increases.

All of these causes the miniaturization of probe card making technology, increase in cost, and difficulty in card maintenance. Further, at the time of testing a semiconductor device, there is a problem that the contact resistance becomes unstable due to variations in the needle pressure with each pad, and a stable test becomes impossible.

It is an object of the present invention to provide a semiconductor device capable of facilitating and simplifying the production of such a probe card and realizing a stable test at low cost.

[0008]

According to the present invention, there is provided a semiconductor device comprising:
A plurality of test pad common circuits connected in common to a plurality of pads formed on a wafer are provided, and the operation is performed by driving the test pad common circuit using a test selection signal during an operation test. while sharing some of the plurality of pads, when in normal use Ru is independently a plurality of pads, a plurality of test
The first test pad commonality among the pad commonality circuits
The circuit is connected to the first input terminal and the select terminal.
Connected to a first AND gate and the select terminal.
A first inverter, and the output and the output of the first inverter.
And a second AND gate connected to the second input terminal
And the outputs of the first and second AND gates are two inputs.
A first OR gate, and a second test pad
The common circuit includes the first input terminal and the select
A third AND gate connected to the terminal;
A second inverter connected to the terminal;
A fourth output terminal connected to the output of the inverter and a third input terminal;
AND gate and outputs of the third and fourth AND gates
And a second OR gate having two inputs.
The first and second input terminals according to a selection signal from the
Outputting a child signal to an output terminal of the first OR gate
On the other hand, the signal of the first and third input terminals is connected to the second O
It is configured to output to the output terminal of the R gate .

[0009]

[0010]

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a related art and an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram around a pad of a semiconductor device for explaining the related art of the present invention. As shown in FIG. 1, the semiconductor device according to the related art is a circuit added to an input portion of a semiconductor product, and the feature thereof is that the semiconductor device is connected to a plurality of pads X1, X2 and X3, X4 formed on a wafer in common. A plurality of test pad common circuits 1A and 1B having the same configuration are provided. . Each of these test pad common circuits 1A and 1B has a first input terminal X
1 or X3 and the first terminal connected to the select terminal S.
And an inverter 3 connected to the select terminal S, an output of the inverter 3 and a second AND gate 4 connected to the second input terminal X2 or X4, and these AND gates 2, 4 And an OR gate 5 having two inputs of the output. These first input terminals X1 and X3 are directly connected to the terminals Y1 and Y3 connected to the semiconductor internal circuit, respectively, and the output of the OR gate 5 of the test pad common circuit 1A and 1B is connected to the terminal Y2 connected to the semiconductor internal circuit. Alternatively, it is connected to Y4.

At the time of an operation test, the test pad common circuits 1A and 1B are driven using the test selection signal S, and the signals from the pads X1, X2 or X3, X4 are output to the terminals Y2 or Y4. That is, some of the pads are shared. On the other hand, during normal use, these pads X1 to X4 are made independent from each other, and are connected only to terminals Y1 to Y4, respectively.

A specific operation test using a probe card will be described below.

First, when an electrical operation test of a semiconductor device is performed on a wafer, an "H" signal is input to a terminal S,
The needle of the probe card is applied only to pads X1 and X3.
At this time, the signal of X1 is input to both Y1 and Y2,
Since the signal of X3 is input to both Y3 and Y4,
When a test of the internal circuit connected to Y1 or Y2 is performed, a signal is supplied to the pad X1 to judge a pass / fail from the output of each circuit, and a test of the internal circuit connected to Y3 or Y4 is performed. When the determination is made, a signal is supplied to the pad X3, and a pass / fail determination is made from the output of each circuit.

As described above, conventionally, a probe card for applying a needle to all four pads X1 to X4 was required, but in the present related art , a probe for applying a needle to only two pads X1 and X3 is used. A card will do just fine. That is, when a similar circuit is used for the pads X1 to Xn, the number of needles of the probe card applied to the pads can be reduced from n to n / 2. At this time, a signal is simultaneously input to Y1, Y2 or Y3, Y4, and there are two types of outputs. Accordingly, when each circuit is used, a program for masking the output of the other circuit is used. Will be needed.

Next, after each semiconductor chip is separated from the wafer, it is necessary to bond wiring to all the pads. Therefore, when a subsequent test or use by a user, an "L" signal is input to the terminal S. In this case, the signals of the pads X1 to X4 are directly output to the terminals Y1 to Y4, respectively.

In short, in the related art , Y
The internal circuits connected to Y1, Y2 and Y3, Y4 are independent circuits without interfering with each other, and the reduction in the number of pads is effective during a test.

Similarly, when the terminals Y1 to Y4 are output pads of a semiconductor product and the terminals X1 to X4 are output portions connected to an internal circuit, the number of needles of the probe card in contact with the pads is reduced. It is possible.

[0020] FIG. 2 is a circuit diagram of a peripheral pad of a semiconductor device for explaining an embodiment of the present invention. As shown in FIG. 2, the present embodiment is similar to the case of FIG.
Here, among the plurality of test pad common circuits 1A and 1B, the first test pad common circuit 1A includes a first AND gate 2 connected to a first input terminal X1 and a select terminal S, A first inverter 3A connected to the select terminal S, an output of the first inverter 3A and a second AND gate 4A connected to the second input terminal X2, and outputs of the AND gates 2A and 4A 2
The second test pad sharing circuit 1B comprises a first AND gate 5A as an input, and a third AND gate 2 connected to the first input terminal X1 and the select terminal S.
B and the second inverter 3 connected to the select terminal S
B, a fourth AND gate 4B connected to the output of the second inverter 3B and the third input terminal X3, and a second OR gate 5B having the outputs of the AND gates 2B and 4B as two inputs. It consists of: Thereby, the first and second signals are selected using the selection signal from the select terminal S.
Of the first and third input terminals X1 and X2 are output to the output terminal Y2 of the first OR gate 5A.
1 and X3 to the output terminal Y3 of the second OR gate 5B.
Can be output to

That is, as in the case of FIG. 1, when conducting an electrical operation test of a semiconductor device on a wafer, an "H" signal is inputted to the terminal S, and the needle of the probe card is applied only to the pad X1. At this time, the connection terminal Y to the internal circuit
Since the signal of the pad X1 is input to all of the terminals Y1, Y2 and Y3, when testing the internal circuit connected to the terminals Y1 to Y3, the signal is input to the pad X1 and the output of each circuit is Make a pass / fail decision. As a result, in the test, a probe card in which a needle is provided to three pads of the pads X1 to X3 in the related art is required, but a probe card in which a needle is provided to only one pad corresponding to 1/3 can be used. .

After bonding the wiring to all the pads, "L" is input to the select terminal S,
The signals of the pads X1 to X3 are directly output to the internal terminals Y1 to Y3, so that a normal test and use can be performed.

Note that the case of FIG. 2 can be realized not only on the input side but also on the output side.

[0024]

As described above, the semiconductor device of the present invention is provided with a plurality of test pad common circuits connected in common to a plurality of pads formed on a wafer.
By driving the circuit using the test selection signal, one terminal can be assigned to two or more only when necessary, so that the number of pads used for electrical operation tests of internal circuits and the like can be reduced. The number of needles of the probe card used at the time of measurement can be reduced, the size can be reduced, and the arrangement density of the needles can be reduced, so that the probe card can be manufactured at low cost.

Further, the semiconductor device of the present invention can reduce the number of needles of the probe card used for testing the internal circuit, so that the variation in needle pressure between each pad and the needle can be reduced, and stable probing can be performed. In addition, there is an effect that the test itself can be stabilized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram around a pad of a semiconductor device for explaining a related technique of the present invention.

2 is a circuit diagram of a peripheral pad of a semiconductor device for explaining an embodiment of the present invention.

FIG. 3 is a perspective view of a test state of a semiconductor device for explaining an example of the related art.

[Explanation of symbols]

 1A, 1B Test pad common circuit 2, 4 AND gate 3 Inverter 5 OR gate X1 to X4 Pads Y1 to Y4 Internal connection terminals

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int. Cl. ⁷ , DB name) H01L 27/04 G01R 31/28 G01R 31/3185 H01L 21/66 H01L 21/822

Claims (1)

(57) [Claims] A plurality of test pad common circuits connected in common to a plurality of pads formed on a wafer, wherein the test pad common circuit is operated by using a test selection signal during an operation test. while sharing some of the plurality of pads by driving, when in normal use Ru is independently a plurality of pads, the
A first test among a plurality of test pad sharing circuits;
Pad common circuit has a first input terminal and a select terminal.
A first AND gate connected to the terminal;
A first inverter connected to a terminal;
A second output terminal connected to the output of the inverter and a second input terminal;
AND gate and outputs of the first and second AND gates
, And a first OR gate having two inputs.
The test pad commoning circuit includes the first input terminal and the first input terminal.
A third AND gate connected to the select terminal;
A second inverter connected to the select terminal;
Connected to the output of the second inverter and the third input terminal
A fourth AND gate to be operated, and the third and fourth AND gates
Consists of a second OR gate with two gate outputs
The first and the first signals are selected by a selection signal from the select terminal.
A signal from a second input terminal is output to the output terminal of the first OR gate.
While outputting the signals from the first and third input terminals.
A semiconductor device for outputting to an output terminal of the second OR gate .