JP3030935B2 - Automatic wiring method for wiring equipment for surface mounting - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring device for surface mounting and, more particularly, to a wiring device for surface mounting which performs automatic wiring of a printed circuit board.

[0002]

2. Description of the Related Art Conventionally, when inspecting a printed circuit board on which surface mount components are mounted, a universal probe is applied to a component mounting pad to perform the inspection.

[0003]

In the above-described conventional wiring method for a printed circuit board on which surface-mounted components are mounted, when the pad pitch of the surface-mounted components becomes finer, the inspection device pushes the printed circuit board into the printed circuit board during the inspection of the printed circuit board. The disadvantage is that the universal probe to be applied can no longer be applied to the component mounting pads as it is, and it is necessary to create and inspect individual jigs for each printed circuit board, which is a large cost for the development of jigs Had.

An object of the present invention is to provide a method for inspecting printed circuit boards.
An object of the present invention is to provide a surface-mountable wiring device that does not require an individual inspection jig for each printed circuit board and can reduce costs.

[0005]

According to the present invention, there is provided an automatic wiring method for a surface-mountable wiring apparatus, the method comprising the steps of:
In kicking automatic wiring method, an information input procedure of inputting the component library defined logical connection information (A) Schematic and said surface mount component placement coordinates the position of the surface mounting component of the pads and lands, (B) pin pair determination procedure for determining the pin pair more to be wired with the pads and lands position of the surface mount component and the logical connection information, to a via hole for retracting the inner layer patterns drawn from Pas head of (C) the surface mount component (D) a probe abutment design grid point designating procedure for designating a design grid point to which a universal probe is abutted in the first array of grid points at the time of inspection, E) a step of taking out the pin pair to be wired and determining whether or not the pin is a pad of the surface mount component; F) forming a determination of the surface mounted component pads determination procedure
As a result, when the pin is a pad of the surface mount component
It is around said surface mount component pad, the surface real
A via generation area limiting procedure for setting an area in which a via for drawing a pattern drawn from a pad of an external component into a layer can be generated and limiting the via generation area; (G) limited by the via generation area limiting procedure Territory
Grid points of a multiple of the first array of grid points
Pull-out pattern from pad of surface mount component to inner layer
Designate the second array as a possible grid point of the via
The closest possible grid point of unused vias to the second
Search from the array of the above from the surface mount component pad
Wiring to possible grid points of vias
Pattern length from the ground to the possible grid point of the via
Determine whether the pattern length is shorter than the limit value,
When the pattern length is longer than the pattern length limit,
In front of possible grid point of unused and unused via closest to the pin
Searching from the second array to determine whether the pad is
Rewired to allow grid points Luo vias, when the pattern length is less than the limit value of the pattern length, via generation procedure for generating the vias allow grid points of the via, the pins at both ends of the (H) the pin pairs Investigate whether or not it has been treated, if not , the pad of the surface mount component
The first pin pair processing confirmation procedure Returns to the determination procedure, (I) wherein Once pin processing at both ends of the pin pair is completed, the normal routing processing procedure for normal routing processing for the through hole land and generated the via, (J Check if all pin pairs have been processed
If not, the pad judgment method of the surface mount component
Turn back that second pin pair processing confirmation procedure, (K) the wiring pattern wiring data output procedure wiring data output to an external file of all the wiring pattern includes a determination binding of the surface mounted component pads determination procedure
As a result, when the pin is not a pad of the surface mount component,
Following the pad determination procedure for the surface mount component is the first pin.
It is configured to proceed to a pair processing confirmation procedure .

[0006]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a flowchart showing an operation flow of an embodiment of a wiring device for surface mounting according to the present invention.

The wiring apparatus for surface mounting according to the present embodiment shown in FIG. 1 has an information input procedure 1 for inputting logical connection information of a circuit diagram, component arrangement coordinates, and a component library defining the positions of component pads and lands. A pin pair determination procedure 2 for determining a pin pair, which is a combination of component pins that are separated from the logical connection information, component pads and land positions and two locations to be wired more, and a pattern drawn from the component mounting pads of the surface mount component. Pattern length limit value designating step 3 for designating the pattern length limit value to the via hole to be drawn into the inner layer, probe abutment design lattice point designating step 4 for designating a design lattice point to which a universal probe is abutted during inspection, wiring should be performed Take out the pin pair and check whether the pin is a pad of the surface mount component. Via generation area limiting procedure 6 for setting a region where a via for drawing the pattern drawn from the pad into the layer can be generated and limiting the via generation area around the component pad, the pattern length is the pattern length limit value If shorter, a via generation procedure 7 for generating a via at a possible grid point of the via, a pin pair processing confirmation procedure (first pin pair processing confirmation procedure) 8 for checking whether or not the pins at both ends of the pin pair have been processed, and both ends of the pin pair Is completed, the normal wiring processing procedure 9 for performing normal wiring processing for through-hole lands and generated drop-in vias, a pin pair processing confirmation procedure for checking whether all pin pairs have been processed (second pin pair processing confirmation procedure)
10, a wiring pattern wiring data output procedure 11 for outputting wiring data of all wiring patterns to an external file.

Next, the operation will be described.

FIG. 2 is a flowchart showing the details of the operation of the surface-mountable wiring device of FIG. 1, and FIG. 3 is a flowchart showing the details of the operation of the surface-mountable wiring device of FIG. The following steps in parentheses indicate the steps in FIGS. 2 and 3 described above.

In FIG. 1, first, logical connection information of a circuit diagram is input in the form of a netlist in an information input procedure 1 (step 21), and then the arrangement coordinates of components mounted on a printed circuit board are input (step 21). 22). Further, a component library defining the positions of the pads and lands of each component is input, and the pads and lands are developed in the wiring area (step 23).

Next, a pin pair to be wired is determined from the logical connection information and the pad and land positions of the component by the pin pair determination procedure 2 (step 24).

Next, in the pattern length limit value specifying procedure 3, the limit value of the pattern length up to the via hole for drawing the pattern drawn from the component mounting pad of the surface mount component into the inner layer is specified as "r" ( Step 25).
When the universal probe of the inspection apparatus is used, it is difficult to apply all the universal probes to an arbitrary position, and in many cases, the universal probe is usually limited to 50 mil grid points or 100 mil grid points. r ". Next, a design lattice point to which the universal probe is to be struck is designated to the array A (Xi, Yi) by the probe abutment design lattice point designation procedure 4 (step 26). FIG. 4 shows an example of grid points at which the universal probe of the inspection device is abutted, and FIG.
An example of (Xi, Yi) is shown.

Next, a pin pair to be wired is taken out by the pad mounting procedure 5 of the surface mounting component, and it is checked whether or not the pin is a pad of the surface mounting component (step 27). If the pin is a pad of the surface mounting component. Then, in the via generation area limiting procedure 6, an area B where a via for drawing a pattern drawn from the pad into the inner layer is set around the pad of the surface mount component, and the via generation area is limited ( Step 28). Then, via generation procedure 7
In the area B, the grid points that are multiples of the array A (Xi, Yi) containing the universal probe abuttable points are converted into via-capable grid points that pull out the drawing pattern from the pad of the surface mount component into the inner layer. As array C
(Xi, Yi) (step 29). FIG. 6 shows an example of a grid point at which the universal probe in the area B can be abutted. Next, an unused via possible grid point d closest to the pin is searched from the array C (Xi, Yi) (step 30), and wiring is performed from the pin mounting pad to the via possible grid point d (step 31). ). Then, it is determined whether or not the pattern length is shorter than the allowable drawing pattern length "r" (step 32). If the pattern length is longer, the process returns to step 30, and the possible grid points of another via are arranged in the array C (Xi, Yi). ) Search and re-wire. When the pattern length is shorter than the allowable drawing pattern length "r", a via is generated at the possible grid point d of the via (step 33).

In step 27, if the pin of the pin pair is a through-hole land, the process proceeds to step 34. In step 34, it is checked whether or not the pins at both ends of the pin pair have been processed by the pin pair processing confirmation procedure 8. If not, the process returns to step 27 and the other pins are processed.

When the processing on the pins at both ends of the pin pair is completed, the normal wiring processing is then performed by the normal wiring processing procedure 9 using the through-hole land or the generated lead-in via as two target points to be wired in the pin pair ( Step 35). Next, according to the pin pair processing confirmation procedure 10,
It is checked whether the above process has been performed for all pin pairs (step 36). If not, the process returns to step 27 and the processes from step 27 onward are continued.

When the above processing is completed, the wiring data of all the wiring patterns is output to the external file by the wiring pattern wiring data output procedure 11 (step 37). FIG. 7 shows an example of a lead pattern via generated by the above processing.

[0018]

As described above, the wiring device for surface mounting according to the present invention provides a printed wiring by providing an inner layer drawing via of a pattern drawn from a surface mounting component pad at a position where a universal probe of an inspection device can be abutted. At the time of board inspection, there is no need to create an individual inspection jig for each printed board, which has the effect of reducing costs.

[Brief description of the drawings]

FIG. 1 is a flowchart showing an operation of an embodiment of a wiring device for surface mounting according to the present invention.

FIG. 2 is a flowchart showing details of the operation of the wiring device for surface mounting of FIG. 1;

3 is a flowchart showing details of the operation of the wiring device for surface mounting shown in FIG. 1 together with FIG. 2;

FIG. 4 is a diagram showing an example of grid points at which a universal probe of an inspection device is abutted.

FIG. 5 is a diagram showing an example of an array A (Xi, Yi).

FIG. 6 is a diagram illustrating an example of a grid point at which a universal probe can be brought into contact with a region B;

FIG. 7 is a diagram illustrating an example of a lead pattern via generated by the wiring device for surface mounting according to the embodiment;

[Explanation of symbols]

 1 Information input procedure 2 Pin pair determination procedure 3 Pattern length limit value specification procedure 4 Probe abutment design grid point specification procedure 5 Surface mounting component pad determination procedure 6 Via generation area limitation procedure 7 Via generation procedure 8 First pin pair processing confirmation procedure 9 Normal wiring processing procedure 10 Second pin pair processing confirmation procedure 11 Wiring pattern wiring data output procedure

Claims (1)

(57) [Claims] An automatic wiring method in a surface-mountable wiring apparatus for wiring a printed circuit board on which a surface-mounted component is mounted, comprising: (A) logical connection information of a circuit diagram, and arrangement coordinates of the surface-mounted component; An information input procedure for inputting a component library defining the positions of the pads and lands of the surface mount component; (B) a pin pair for determining a pin pair to be wired based on the logical connection information and the pad and land positions of the surface mount component decision procedure, (C) the surface mounting component of the path Tsu pattern length limiting value specified procedure the drawer patterns from de specifying the pattern length limit until the via hole for retracting the inner layer, the universal probe (D) during inspection probe abutment design grid points specified procedure to specify the design grid points in the first array of grid points butting, the pin pairs to be wired (E) Extraction, a surface mounted component pads determination procedures pin check whether the pad of the surface mount component, (F) forming a determination of the surface mounted component pads determination procedure
As a result, when the pin is a pad of the surface mount component
It is around said surface mount component pad, the surface real
A via generation area limiting procedure for setting an area in which a via for drawing a pattern drawn from a pad of an external component into a layer can be generated and limiting the via generation area; (G) limited by the via generation area limiting procedure Territory
Grid points of a multiple of the first array of grid points
Pull-out pattern from pad of surface mount component to inner layer
Designate the second array as a possible grid point of the via
The closest possible grid point of unused vias to the second
Search from the array of the above from the surface mount component pad
Wiring to possible grid points of vias
Pattern length from the ground to the possible grid point of the via
Determine whether the pattern length is shorter than the limit value,
When the pattern length is longer than the pattern length limit,
In front of possible grid point of unused and unused via closest to the pin
Searching from the second array to determine whether the pad is
Rewired to allow grid points Luo vias, when the pattern length is less than the limit value of the pattern length, via generation procedure for generating the vias allow grid points of the via, the pins at both ends of the (H) the pin pairs examine whether processed, the surface mounting component of the pad if Re cry treated
The first pin pair processing confirmation procedure Returns to the determination procedure, (I) wherein Once pin processing at both ends of the pin pair is completed, the normal routing processing procedure for normal routing processing for the through hole land and generated the via, (J Check if all pin pairs have been processed
If not, the pad judgment method of the surface mount component
Turn back that second pin pair processing confirmation procedure, (K) the wiring pattern wiring data output procedure wiring data output to an external file of all the wiring pattern includes a determination binding of the surface mounted component pads determination procedure
As a result, when the pin is not a pad of the surface mount component,
Following the pad determination procedure for the surface mount component is the first pin.
An automatic wiring method in a wiring device for surface mounting, characterized by proceeding to a pair processing confirmation procedure .