JP3018714B2 - CAD equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CAD apparatus, and more particularly, to a technique which enables effective and efficient reuse of a designed circuit in a printed circuit board designing CAD apparatus.

[0002]

2. Description of the Related Art In principle, when designing a printed circuit board using a CAD device, a net list (connection information description file) of a circuit diagram to be formed into a substrate is read into the CAD device, and this net list information is used. Perform (1 circuit diagram =
1 substrate). As another form, as shown in FIG.
In some cases, one designed circuit diagram is divided into a plurality of parts (n pieces), and n boards are created using a netlist of each part (one circuit diagram = a plurality of boards).

As shown in FIG. 9, as an application example of one circuit diagram = 1 substrate, one circuit diagram is divided into functional blocks, a net list of each block is extracted, and a pattern corresponding to each block is extracted. In some cases, a single printed circuit board is created by combining these by artwork. In both cases of FIGS. 8 and 9, when extracting a part from the original circuit diagram and extracting a partial netlist for a part of the area, first, unnecessary circuits existing around the target area are used. This is done by erasing all the figures and then extracting the netlist.

[0004]

In the case where a part of the original circuit diagram is used instead of the entire circuit diagram as shown in FIGS. 8 and 9, a circuit of another part other than a desired part is conventionally used. Since the method of erasing the figure data is employed, there is always a risk that erroneous erasure is performed when the desired portion is designated.

[0005] Therefore, there is a case where the connection relation in a desired portion is accurately cut out and a net list is not constructed. In addition, once a portion is cut out, another portion is already erased and the original portion is deleted. It is difficult to confirm the relative relationship (consistency) between the entire circuit diagram and the cut-out portion. Also, when synthesizing each part by the artwork work of FIG. 9, since each cut-out part has already lost the guarantee of its relative position with respect to the entire circuit diagram, it is necessary to join them together. There is no guarantee that a desired complete board pattern is obtained, and consistency with a circuit diagram is not guaranteed.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above problems, and an object of the present invention is to improve the reliability of board design using a part of a pre-designed circuit and to improve the efficiency and efficiency of a circuit diagram. The object of the present invention is to realize a CAD apparatus which enables efficient reuse.

[0007]

SUMMARY OF THE INVENTION The present invention relates to a CAD apparatus for supporting the production of a printed circuit board or the like, wherein a circuit pattern is designed by reusing at least a part of a circuit diagram of an already designed circuit. As means for realizing the partial use function of the figure, a cut-out portion specifying means for specifying a desired cut-out portion from a circuit diagram of the already designed circuit by enclosing it with a polygon, and a specified polygonal shape Circuit diagram cutting means for generating boundary data of the cutout portion, and, based on the circuit diagram data and the boundary data of the already designed circuit, determine an intersection between each side of the polygon and the wiring on the circuit diagram, At the intersection, virtual external terminal information used for connection between the blocks to be cut out or actual external terminal information such as a connector is generated, and the inner block or outer block surrounded by a polygon is generated. For at least one block of, characterized by comprising a connection information extracting means for extracting a circuit diagram connection information including the terminal information.

[0008]

According to the present invention, the connection information of the desired area surrounded by the polygon is extracted as it is without making any change to the original circuit diagram data such as erasing other parts. Moreover, when a block is cut out, a virtual external terminal (or an actual external terminal) is generated at the boundary between the inside and the outside of the polygon, and these terminal information is also extracted as a netlist. Is clearly maintained by the presence of the terminals on these boundaries.

[0009] Further, since the cut block itself is computerized, including the external connection terminals, the board can be formed only by cutting the block. For this reason, for example, it is also possible to extract data for the backboard that connects the respective boards.

[0010]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a configuration (and an outline of a processing procedure) of an embodiment of a CAD apparatus according to the present invention. In this embodiment, a circuit diagram input unit 1 and a cutout designating unit 2
And a circuit diagram extracting unit 4 and an information extracting unit 6. The information extraction means 6 includes a virtual external terminal generator 7, a real external terminal generator 8, a connection information extractor 9, and a rule table 10. In the figure, reference number 3
Is input circuit diagram data, reference numeral 5 is boundary data for clarifying a connection relationship with another portion of the cut-out block, and reference numeral 11 is extracted connection information data. It is.

Next, steps in a case where a part of a circuit diagram is cut out and connection information is extracted will be described step by step. (A) Input process of circuit diagram By the interactive input operation using the circuit diagram input means 1,
The circuit diagram is read, and circuit diagram data 3 is generated. The circuit diagram data 3 is stored on a recording medium such as a magnetic disk.

(B) Step of Inputting Cutout Portion (FIGS. 2 and 3) In the cutout of the circuit diagram, a necessary portion (area) in the circuit diagram is specified by a polygon using the cutout portion specifying means 2. This is done by: This is shown in FIG. 2, where the cut-out portion is surrounded by a polygon 50.
In this case, the data (CN1,
C1 and R1 connection information) are extracted. When the polygon 50 for specifying the cut-out portion is input, FIG.
As shown in FIG.
The vertex data is obtained, arranged and stored as shown in FIG. This becomes the cutout boundary data 5.

(C) Step of Generating Virtual External Terminal (FIGS. 4 and 5A) The virtual external terminal is a virtual terminal provided at the intersection of a polygonal side and a wiring on a circuit diagram. Are used for block connection when combining a plurality of cut out blocks (after connection between blocks, they are canceled and erased). When the cut-out as shown in FIG. 4A is designated, based on the wiring data (for example, line segment and arc) of the circuit and the polygon data as shown in FIG. The calculation is performed (executed by the virtual external terminal generation unit 7), and the generation position of the virtual external terminal is obtained. FIG. 5A shows a state where a virtual external terminal (named IMG001) is generated at the obtained intersection.

(D) Connection Information Extraction Step (FIG. 5 (A)) The connection information extraction unit 9 sets a portion surrounded by a polygon in the circuit diagram as a block A, and the other portions as a block B, respectively. The connection information of the block is extracted. In this case, the virtual external terminal (IMG001) is handled as a component belonging to both blocks. FIG. 5A shows a part of the extracted connection information.

In this way, a netlist can be extracted by cutting out a part of the circuit diagram. The virtual external terminal is used for inter-block connection when synthesizing the respective blocks as described above, and is canceled and erased after the inter-block connection.
Next, a description will be given of a process in a case where a part of the block is not simply cut out from the circuit diagram but the cut-out block is used as a single substrate. The process in this case is basically the same as the above-described example, except that a real external terminal such as a connector is generated at a wiring portion on the circuit diagram cut out by a polygon, and information on the real external terminal is obtained. It is necessary to extract connection information including The steps are almost the same as those in the above-described example. (A) a circuit diagram input step, (b) a cut-out portion input step, (c) a real external terminal generation step,
(D) connection information extraction step.

The steps (a) and (b) are the same as in the above-described example. The real external terminal generation process (c) is performed by the real external terminal generation unit 8 in the information extracting means 6 to generate an external terminal symbol at the intersection of the polygon side and the wiring on the circuit diagram. Processing. FIG. 6A shows a circuit diagram to be divided, and FIG. 6A shows a user-defined rule table (reference numeral 10 in FIG. 1) which is referred to when determining a shape name of an actual external terminal to be generated. ). A real external terminal (named as C0N001 and CON002) is generated at the obtained intersection. For example, in the case of FIG. 6A, the number of the actual external terminals is “2”, and thus the symbol shape name is selected from JCN02M and JCN02P in the rule table by conversation processing. FIG. 7A shows a state in which actual external terminals are generated.

The connection information extraction step (d) is performed by the connection information extraction unit 9, and a portion surrounded by a polygon of the circuit diagram is referred to as a block A, and other portions are referred to as a block B. The connection information is extracted. Fig. 7 (a)
Is the extracted connection information.

[0018]

As described above, according to the present invention, when a part is cut out from the circuit diagram, the original data is not changed, and a virtual external terminal is provided at the boundary of the cut out part, so that the cut out part is cut out. By maintaining the mutual relationship, there is an effect that the matching with the circuit diagram is guaranteed even when the pattern design in the cut-out block and the pattern design are performed by combining them.

Further, from the viewpoint of data management, the entire apparatus can be represented by one circuit diagram, and under that, a pattern can be designed for each individual block, thereby enabling unified management of data. For parts other than the cut block,
Use in an image like a reference diagram different from the actual circuit is also possible. Therefore, the reliability of the board design using a part of the already designed circuit is improved, and the circuit diagram can be effectively and efficiently reused.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration (and an outline of a processing procedure) of an embodiment of a CAD apparatus of the present invention.

FIG. 2 is a diagram for explaining a process of specifying a cut-out portion using the embodiment of FIG. 1;

FIGS. 3A and 3B are diagrams for explaining the contents of polygon data. FIG. 3A shows a polygon shape for specifying a cutout portion, and FIG. 3A shows an example of vertex data of the polygon. Is shown.

4A and 4B are diagrams for explaining circuit diagram data and polygon data. FIG. 4A shows a state in which a circuit diagram is surrounded by polygons, and FIG. 4A shows corresponding wiring data and polygon data. Show.

5A and 5B are diagrams for explaining a virtual external terminal; FIG. 5A shows a circuit diagram when a virtual external terminal is generated; FIG. 5A shows an example of extracted connection information;

6A and 6B are diagrams for explaining actual external terminals.
Is a circuit diagram when a cut-out portion to be made into a board is designated by a polygon, and (a) is a user-defined rule that is referred to when a shape name of a real external terminal is generated when a real external terminal is generated Show the table.

7A and 7B are diagrams illustrating connection information corresponding to the occurrence of a real external terminal, and FIG. 7A illustrates a state where a real external terminal is generated;
(A) shows the extracted connection information.

FIG. 8 is a diagram illustrating an example of a process for cutting out a part of a circuit diagram in a conventional CAD apparatus.

FIG. 9 is a diagram showing another example of a process for cutting out a part of a circuit diagram in a conventional CAD apparatus.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Circuit diagram input means 2 Cut-out part designation means 3 Circuit diagram data 4 Circuit diagram cut-out means 5 Cut-out boundary data 6 Information extraction means 7 Virtual external terminal generation unit 8 Real external terminal generation unit 9 Connection information extraction unit 10 Rule table 11 Connection Information data

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-4-115365 (JP, A) JP-A-4-18679 (JP, A) JP-A-3-238557 (JP, A) JP-A-1- 255070 (JP, A) JP-A-63-228265 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06F 17/50

Claims (1)

(57) [Claims] 1. A CAD apparatus for supporting the production of a printed circuit board or the like, which realizes a partial use function of a circuit diagram, in which at least a part of a circuit diagram of an already designed circuit is reused to design a board pattern. Means for designating a desired cut-out portion in a circuit diagram of the already-designed circuit by enclosing the cut-out portion with a polygon; and boundary data of the specified cut-out portion of the polygon. And an intersection between each side of the polygon and the wiring on the circuit diagram is obtained based on the circuit diagram data of the already designed circuit and the boundary data. Then, virtual external terminal information used for connection between blocks to be cut out or actual external terminal information such as a connector is generated, and at least the inner block or outer block surrounded by a polygon is generated. For one block of, CAD apparatus characterized by comprising a connection information extracting means for extracting a circuit diagram connection information (6), the including the terminal information.