JP2995915B2 - IGBT inverter overcurrent protection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an overcurrent protection circuit for an inverter in which an IGBT is bridged as a switching element of an upper and lower arm of each phase of a main circuit.

[0002]

2. Description of the Related Art As a conventional overcurrent protection circuit of this type, a circuit illustrated in a circuit diagram of FIG. 4 is known. FIG. 4 shows the configuration of a protection circuit for an IGBT inverter that converts a DC input into a three-phase AC. In FIG. 4, P and N are positive and negative DC input terminals, U, V and W are three-phase AC U, V and W output terminals respectively, Cf is a DC input smoothing capacitor, and T ₁ , T ₃ and T ₅ are the U,
V, W phase upper arm IGBT, likewise T ₂ and T ₄ and T
₆ is the lower arm IGB of each of the U, V and W phases
T, GDU ₁ ~GDU ₆ is a gate driving circuit of the corresponding respective IGBT.

Reference numerals 1a to 1f denote overcurrent detection / protection circuits for the corresponding IGBTs, respectively. The overcurrent detection / protection circuits 1a to 1f serve to detect and amplify the voltage drop detection resistor R of the emitter current of the corresponding IGBT and the voltage drop value. An operational amplifier OP and a transistor T (shown in FIG. 1a) which conducts by receiving the output voltage of the amplifier at its base, makes its collector-emitter voltage, and therefore the gate voltage of the corresponding IGBT zero, and cuts off the gate of the IGBT. consisting of T ₇ display) and.

As described above, the conventional overcurrent protection circuit comprises a plurality of overcurrent detection / protection circuits provided for each IGBT constituting an inverter main circuit and performing independent detection / protection operations only for the corresponding IGBT. It consisted.

[0005]

Generally, an IGBT has a small overcurrent withstand capability as compared with a normal bipolar transistor. Therefore, when an overcurrent is applied due to an output short-circuit of an inverter using the IGBT, the IGBT can be operated within an extremely short time. In addition, it is usually necessary to shut off the gate within 10 μs.
For this reason, the conventional overcurrent protection circuit has a configuration in which a dedicated protection circuit is provided for each IGBT of the main circuit configuration as described above. As a result, large size and high price were caused.
In view of this, an object of the present invention is to provide an overcurrent protection circuit of an IGBT inverter that can simplify the circuit configuration without lowering the overcurrent protection function.

[0006]

In order to achieve the above object, an overcurrent protection circuit for an IGBT inverter according to the present invention comprises:
An overcurrent protection circuit for an inverter in which an IGBT is used as a switching element of an upper and lower arm of each phase of a main circuit of the inverter, wherein a total current flowing through a negative side of a DC input terminal of the inverter exceeds a predetermined overcurrent set value. An overcurrent detection circuit that detects a state and outputs a command signal for reducing the gate voltage of the IGBT to a predetermined value, and receives the command signal for reducing the gate voltage and inputs the command signal to the lower arm of each phase of the inverter. A signal distribution circuit for simultaneously distributing and applying the voltage to each IGBT, and receiving the gate voltage reduction command signal as input, and after a predetermined time elapses from the input time of the command signal, simultaneously applying a gate to all the IGBT gates of the upper and lower arms of each phase of the inverter. And a gate cutoff control circuit for applying a gate cutoff signal to the inverter. Or the step of detecting the overcurrent detection circuit from the negative input side total current of the DC input terminal of the inverter to the total input side positive current of the DC input terminal. In place of the above, the signal distribution circuit may be changed from the one to which each IGBT of each lower arm of the inverter is applied to the output signal to the one to which each IGBT of each upper arm of the inverter is applied. I do.

[0007]

When a semiconductor element such as an IGBT is used as a switching element, the collector and the collector during the switching operation are used.
Time integral value of the product or power on the same time axis between the voltage V _CE energization current I between the emitter are those showing the internal power loss of the device, thus either one of the voltage and current or By reducing both, the permissible operation time on the overcurrent withstand characteristic of the element related to the internal loss can be extended.

According to the present invention, an overcurrent state in an inverter having a bridge configuration in which an IGBT is used as a main circuit switching element is immediately detected from an increase in the total current passing through a negative (or positive) DC input terminal, and the IGBT is energized. A set of overcurrent detection circuits for outputting, as an overcurrent detection signal, a designation signal of a predetermined gate voltage for making the current an appropriate reduction value; and a predetermined time after receiving the output signal of the detection circuit, the inverter main circuit And a gate cutoff control circuit for outputting a gate cutoff signal to all the IGBTs. When the overcurrent state occurs, first, the output signal of the overcurrent detection circuit is output to the lower arm (or upper arm) of the inverter. Inverter current applied to the gates of each IGBT at the same time via a signal distribution circuit and energized through both IGBTs of the upper and lower arms The permissible operating time in each of the IGBTs is extended by reducing the value to an appropriate value. Subsequently, the gate cutoff control circuit cuts off the gates of all the IGBTs after a predetermined time to protect the IGBTs from overcurrent. Is what you do.

The operation pattern will be described below with reference to FIGS. First, FIG. 2 is a main circuit diagram of an IGBT inverter, where T _{1 to} T ₆ are IGBTs and SW is a simulated short-circuit switch on the inverter output side.
And V for short-circuiting between the respective phases. V _G1 and V _CE1
And V _G2 and V _CE2 are T ₁ and T T of the IGBT, respectively.
₄ which shows the gate voltage and the collector-emitter voltage in the T ₁ further I by closing of the switch SW
And T ₄ as the short-circuit current of the inverter to be energized in series.

Next, FIG. 3 shows the specifications I, V _G1 , V _G2 , V
_CE1, a counter time operation waveform diagram V _CE2, illustrates a case where the inverter enters the one-phase short-circuit state from a no load condition by closing of the switch SW at time t _o. That is, rapid increase of the current I at time t _o is applied the output signal detected by the overcurrent detection circuit (not shown) at time t ₁ to T ₄ of the V-phase lower-arm IGBT, gate of the T ₄ When the voltage V _G2 is reduced, the current I also decreases. In this case, T _{1 of the} U-phase upper arm IGBT
Of the gate voltage V _G1 is not controlled.
The collector-emitter voltages V _CE1 and V _{CE2 of} T ₁ and T ₂ change as shown in FIG. Then the overcurrent said T _1, T simultaneously applied both said person to both the IGBT ₂ gate cutoff signal of the gate cut-off control circuit (not shown) receiving the output signal at time t ₁ is at time t ₂ of the detection circuit The gate voltages V _G1 and V _G2 are both set to zero, the current I is also set to zero, and the overcurrent protection operation ends. Incidentally illustrated phase upper arm IGBT, have received T ₃ and T ₅ and the lower arm IGBT, the same control as the T ₁ and T _4, respectively relates to gate voltage control and T ₂ and T ₆ in unison the same time. The illustrated voltages V _CE1 and V _CE after time t _2
CE2 is a value determined by the leakage current characteristics when the gate voltage of both T ₁ and T _{2 is} zero and is uncertain, and is indicated by a dotted line.

[0011] allowable operating time for the IGBT when overcurrent due preceding the such inverter current reduction control is shown, from a value within 10μs corresponding to the illustrated t ₁ t ₂
Is extended to a value of several tens of μs corresponding to the above, the restriction on the time required for the gate cutoff control is reduced, and the gate cutoff via the normal control circuit for all the IGBTs of the upper and lower arms can be performed.

[0012]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.
I will explain. FIG. 1 shows an embodiment of the prior art.
The same components as those shown in FIG.
The display code is attached. FIG. 1 shows the circuit diagram of FIG.
1a to 1f, that is, the upper and lower sides of the inverter main circuit
It is provided for each IGBT of each phase arm.
Gate cutoff control only for IGBT corresponding to current detection
Instead of an overcurrent detection / protection circuit for controlling
1f and its overcurrent detection
Apply the target current to the negative side of the DC input terminal of the inverter.
Overcurrent detection circuit 1 which has a total current of
₁And D_TwoAnd D_ThreeAnd the cathode of each diode is
Commonly connected and each anode connected to I
GBT_Two, T_Four, T₆Connected to the gate of
A signal distribution circuit having a configuration and an output of the overcurrent detection circuit 1 are provided.
Force signal or transistor T₇Input collector voltage
And the time of the input application (time t in FIG. 3)₁) After a predetermined time
(Time t in FIG. 3)_Two) All IGB of both upper and lower arms of each phase
The gate cutoff signal for T₁, U_Two, V₁, V
_Two, W₁, W _TwoControl circuit 2 for gate cutoff output from
And connected as shown. The control times
The road 2 is a normal input for performing a PWM operation or the like using a CPU or the like.
It is shared with the bar control circuit.
Absent.

[0013] The collector voltage of the output signal, that transistor T ₇ of the overcurrent detection circuit 1, the value of reducing to a suitable value inverter current I of the overcurrent condition (value between time t ₁ ~t ₂ in FIG. 3) Operational amplifier O
Controlled by P. To describe the protection operation by the various circuits of the overcurrent condition when occurs in the inverter in comparison with FIG. 3, the over-current output signal of the detection circuit 1 detects the overcurrent state has occurred at time t _o at time t ₁ The voltage applied to the gates of T ₂ , T ₄ , and T ₆ of the lower arm IGBT is reduced from the value in the normal operation as shown in FIG. 3 to reduce the inverter current I. ₂ , the gate cutoff signal from the control circuit 2 is transmitted to all IGBTs,
The current I is made zero by applying it to T _{1 to} T ₆ , and the required protection operation is completed.

In the circuit configuration shown in FIG. 1, the current to be detected by the overcurrent detection circuit 1 is changed from the negative current at the DC input terminal of the inverter to the positive current at the same time. Arm side T ₂ , T
_{If the} change to the upper arm side T ₁ , T ₃ , T ₅ from T ₄ , T ₆ is performed by changing the connection polarity in the detection circuit 1 and the signal distribution circuit, the same overcurrent protection function as in FIG. You can have.

[0015]

According to the present invention, an IGBT is used as an overcurrent protection circuit for an inverter in a bridge configuration as a switching element of an upper and lower arm of each phase of the main circuit, and the DC input terminal of the inverter has a negative (or positive) side. An overcurrent detection circuit for detecting a state where the total current to be supplied exceeds a predetermined overcurrent set value and outputting a command signal for reducing the gate voltage of the IGBT to a predetermined value, and inputting the gate voltage reduction command signal A signal distribution circuit for simultaneously distributing and applying the command signal to each IGBT of the lower arm (or upper arm) of each phase of the inverter; and receiving the gate voltage reduction command signal as input, and setting a predetermined value from the time of input of the command signal. After the lapse of time, all the I and
A gate cutoff control circuit for simultaneously applying a gate cutoff signal to the gates of the GBTs, and when an overcurrent state of the inverter occurs, a stepwise current reduction cutoff within a predetermined time is performed to provide a necessary overcurrent protection. Without reducing the function, it is possible to greatly simplify the required circuit configuration and reduce the cost by eliminating the necessity of installing an overcurrent detection / protection circuit for each IGBT constituting the inverter main circuit. .

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a main circuit diagram of an IGBT inverter for explaining an operation during a short circuit;

FIG. 3 is an operation waveform diagram of specifications corresponding to FIG. 2;

FIG. 4 is a circuit diagram showing an embodiment of the prior art.

[Explanation of symbols]

1 overcurrent detection circuit 1 (a to f) over-current detection and protection circuit D ₍₁ ~ ₆₎ diodes GDU ₍₁ ~ ₆₎ gate drive circuit T ₍₁ ~ ₆₎ IGBT OP operational amplifier R resistor T ₇ transistor

Claims (2)

(57) [Claims] 1. An overcurrent protection circuit for an inverter in which an IGBT is used as a switching element of an upper and lower arm of each phase of a main circuit of an inverter, wherein a total current flowing through a negative side of a DC input terminal of the inverter is a predetermined overcurrent. An overcurrent detection circuit for detecting a state exceeding a set value and outputting a reduction command signal to the IGBT to a predetermined value of a gate voltage thereof; A signal distribution circuit for simultaneously distributing and applying the IGBTs to the lower IGBTs; and inputting the gate voltage reduction command signal and inputting all the IGs of the upper and lower arms of the inverter after a lapse of a predetermined time from the input of the command signal.
An IGBT comprising: a gate cutoff control circuit for simultaneously applying a gate cutoff signal to the gate of the BT; and performing stepwise current reduction cutoff within a predetermined time when an overcurrent state of the inverter occurs. Inverter overcurrent protection circuit. 2. The overcurrent protection circuit for an IGBT inverter according to claim 1, wherein said overcurrent detection circuit detects a total current of a negative side of a DC input terminal of said inverter and a total current of a positive side of a DC input terminal. And the IGBTs of the upper arm of each phase from the ones to which the IGBTs of the lower arm of each phase of the inverter are applied with respect to the output signal of the signal distribution circuit.
Characterized in that IGB is replaced by a target to be applied.
Overcurrent protection circuit for T inverter.