JP2961522B2 - Substrate for semiconductor electronic device and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for a semiconductor electronic device manufactured by processing a SiC single crystal and a method for manufacturing the same.
Single-crystal SiC for the production of semiconductor electronic devices such as large-scale integrated circuits, rectifiers, switching devices, amplifiers, light-emitting devices, optical sensors, etc.
SCOI (SiC) made by bonding and bonding a bond wafer made of
The present invention relates to a substrate for a semiconductor electronic device having an on-insulator structure and a method for manufacturing the same.

[0002]

2. Description of the Related Art Compared with existing semiconductor materials such as Si (silicon), a SiC (silicon carbide) single crystal not only has excellent heat resistance and mechanical strength, but also has high-temperature characteristics (in view of the operation of Si). 4 for temperature below 200 ° C
It can be used up to about 00 ° C) and has excellent high-frequency characteristics, and can be highly integrated to suppress the limit of heat radiation, and is effective as a semiconductor electronic device that consumes large power, such as rectifiers and switching devices. And is attracting attention and expected as a next-generation semiconductor material for power devices.

Conventionally, as a substrate for a semiconductor electronic element formed by bonding a bond wafer to a base substrate portion, a conventional SOA using a Si wafer as the bond wafer has been used.
What has an I (silicon-on-insulator) structure is the mainstream. In order to manufacture a semiconductor electronic device substrate having an SOI structure based on the Si wafer bonding and the etch back, it is necessary to reduce the thickness of the Si wafer, and as a means of reducing the thickness, a mechanical cutting means such as a diamond cutter is used. Was adopted.

[0004]

However, in the conventional substrate for a semiconductor electronic device having the SOI structure as described above, the thinning of the Si wafer by a mechanical cutting means such as a diamond cutter or the like is at best due to the thickness of the cutter itself. After cutting, it is necessary to grind using, for example, a surface grinder, and further, to a predetermined thickness of micron or submicron after the cutting, so that a predetermined substrate for a semiconductor electronic element is required. The manufacturing process becomes large, and the Si
There is a problem that the cost is extremely high due to the material loss of the wafer. Further, in the case of thinning by mechanical cutting means and grinding and polishing, not only the thickness tends to vary easily, but also the crystal quality tends to deteriorate due to the increase in atomic displacement due to grinding and polishing, and as a semiconductor electronic element, There is a problem that electrical characteristics are impaired.

In the case where a SiC single crystal wafer having many advantages as described above as compared with existing semiconductor materials such as Si (silicon) is used as a bond wafer, a semiconductor electronic device having the above-described SOI structure is used. Similar to the manufacture of a substrate, when a SiC single crystal wafer is thinned by mechanical cutting means such as a diamond cutter,
In addition to the need for grinding and polishing after cutting, the variation in thickness is larger than that of the Si wafer, and in order to reduce the variation, stronger and longer polishing is required, thereby deteriorating the crystal quality. It is clear that the electrical characteristics as a semiconductor electronic element are further impaired, and while this has many advantages over existing semiconductor materials such as Si as described above, It can be said that this is a factor that hinders its practical use.

The present invention has been made in view of the above circumstances, and uses an SiC single crystal wafer to easily and ultra-thin the SiC single crystal wafer to a uniform thickness without deteriorating the crystal quality. It is an object of the present invention to provide a substrate for a semiconductor electronic device which can be manufactured at low cost and has excellent electrical characteristics and a method for manufacturing the same.

[0007]

According to a first aspect of the present invention, there is provided a substrate for a semiconductor electronic device, wherein a thin SiC single crystal wafer and a base substrate are joined by an oxide layer. Integrated, the thin SiC single crystal wafer is divided into two parts at an average hydrogen ion implantation depth by hydrogen ion implantation into a thick SiC single crystal wafer and heat treatment. Of these, it is characterized by being constituted by a portion remaining on the base substrate portion side.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a substrate for a semiconductor electronic device, comprising: forming an oxide layer on at least one surface of a SiC single crystal wafer and a base substrate portion; After implanting hydrogen ions therein, the SiC single crystal wafer and the base substrate are bonded and integrated at room temperature via the oxide layer, and then the SiC
By heating the single crystal wafer and the base substrate to a predetermined temperature, the SiC single crystal wafer is divided into two at the average hydrogen ion implantation depth of the SiC single crystal wafer, and the thin SiC single crystal wafer portion is separated. It is characterized by being left on the base substrate part side.

According to the first and fourth aspects of the present invention having the above constitutional requirements, as a bond wafer, high-temperature characteristics, high-frequency characteristics, and high integration can be achieved as compared with existing semiconductor materials such as conventional Si. While using a SiC single crystal wafer having many advantages such as applicability to a large power consumption element by the above, the SiC single crystal wafer can be easily and easily performed with extremely few steps such as hydrogen ion implantation and heat treatment. It is possible to make an ultrathin film with a uniform thickness. Further, since there is no need for mechanical cutting means and grinding and polishing, which have been employed for thinning a conventional Si wafer or the like, there is no material loss of the SiC wafer and the number of steps is reduced. Extremely high crystal quality SC with extremely low cost and minimal atomic displacement
It is possible to obtain a substrate having excellent electrical characteristics as an OI structure.

The base substrate used in the method for manufacturing a substrate for a semiconductor electronic device according to the first aspect of the present invention and the method for manufacturing a substrate for a semiconductor electronic element according to the fourth aspect of the present invention are the second and the third aspects. As described in item 5,
Any one selected from a Si single crystal substrate portion, a Si polycrystal substrate portion or a high-purity quartz substrate portion may be used, but in particular, as a base substrate portion when it is desired to improve the heat dissipation of the substrate. It is preferable to use a SiC polycrystalline substrate portion as described in claims 3 and 6.

In the method of manufacturing a substrate for a semiconductor electronic device according to the invention described in claim 4, the heat treatment of the SiC single crystal wafer and the base substrate portion includes the step of heating the SiC single crystal wafer and the base substrate. First-stage heat treatment at 500 ° C. or higher for dividing the single crystal wafer into two at the average hydrogen ion implantation depth, and 1000 for strengthening the chemical bond between the divided thin SiC single crystal wafer portion and the base substrate portion
It is desirable to use a two-stage treatment including a second-stage heat treatment at a temperature of not less than ° C. By adopting such a two-stage heat treatment,
It is possible to increase the bonding strength between the thin SiC single crystal wafer portion and the base substrate portion divided for making the SiC single crystal wafer ultra-thin.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 4 are schematic diagrams for explaining a method of manufacturing a substrate for a semiconductor electronic element according to the present invention in the order of steps. First, as shown in FIG. 1, a SiC single crystal wafer 1 having a thickness t of 1 to 2 mm and The surface of each of the Si single crystal substrate portions 2 as an example of the base substrate portion is set at 1000 ° C.
By heating as described above, oxide layers (SiO ₂ ) 1 a and 2 a of about 1 μm are formed on the surfaces of the SiC single crystal wafer 1 and the Si single crystal substrate 2, respectively.

Next, hydrogen ions H ⁺ are implanted into the SiC single crystal wafer 1. In this implantation of hydrogen ions, the peak of the concentration distribution of hydrogen atoms is adjusted by adjusting the implantation acceleration voltage within a dose range of 2 × 10 ¹⁶ to 1 × 10 ¹⁷ / cm ² , for example, as shown by a broken line in FIG. , And the thickness t1 of the SiC single crystal wafer 1 can be arbitrarily and accurately controlled to a range of 0.2 μm.

Thereafter, the oxidized layers (SiO ₂ ) 1a and 2a on the respective surfaces of the SiC single crystal wafer 1 and the Si single crystal substrate portion 2 are removed by RCA cleaning or the like.
After making the group H and the water molecules hydrophilic so as to exist at a high density, as shown in FIG.
By overlapping the single crystal substrate portion 2 at room temperature, the two 1 and 2 are joined and integrated via the oxide layers 1a and 2a. Specifically, OH groups and water molecules at the bonding interface at room temperature not only serve as an adhesive for attracting the SiC single crystal wafer 1 and the Si single crystal substrate portion 2 to each other, but also prevent intrusion of harmful impurities. Therefore, the SiC single crystal wafer 1 and the S
The i-single-crystal substrate portion 2 is bonded and integrated stably at room temperature.

Thereafter, the SiC single-crystal wafer 1 and the Si single-crystal substrate portion 2 that have been joined and integrated are subjected to a first-stage heat treatment at 500 ° C. or higher, so that the SiC single-crystal wafer 1 is implanted with the hydrogen ions. The thickness t1 is sometimes controlled to be 0.2 μm in the peak region of the concentration distribution of hydrogen atoms having a thickness of 0.2 μm, that is, divided into two by the average hydrogen ion implantation depth, and as shown in FIG. ) Si
The SCOI-structured semiconductor electronic device substrate 3 is manufactured while the C single crystal wafer portion 1A is left adhered to the base substrate portion 2 having a role as a reinforcing material, while another thick SiC single crystal is formed. The wafer portion 1B is recycled and reused as the SiC single crystal wafer 1 at the time of manufacturing the next semiconductor electronic element substrate.

Subsequently, the substrate 3 for a semiconductor electronic device having the SCOI structure is subjected to a second-stage heat treatment at a temperature of 1000 ° C. or more, so that the SiC single crystal wafer portion 1A and the base substrate portion 2 are formed.
And strengthen the chemical bond. Then, using the manufactured SCOI-structured semiconductor electronic device substrate 3, a semiconductor electronic device having a bulk or fully depleted C-MOS structure is manufactured.

The concentration distribution of the hydrogen atoms during the implantation of the hydrogen ions is diffused such that a peak is present at, for example, the position shown by the broken line in FIG. As a result, the diffusing hydrogen atoms are concentrated in the peak region and thermally expanded.
Variations in the layer thickness after division are extremely small at 4 nm or less, and polishing for variation correction after division is not particularly required.

Further, in the above embodiment, a single crystal of Si is used as the base substrate portion 2 serving as a reinforcing material, but other than this, a polycrystal of Si, high-purity quartz, or the like may be used. In particular, when it is desired to improve heat dissipation, it is desirable to use a SiC polycrystalline substrate. Further, in the above-described embodiment, the oxide layers 1a and 2a are formed on both surfaces of the SiC single crystal wafer 1 and the Si single crystal substrate 2, respectively.
The oxide layer may be formed only on one of the surfaces.

[0019]

As described above, claims 1 and 4 are as described above.
According to the invention described in (1), S has many advantages over existing semiconductor materials such as Si, such as high-temperature characteristics, high-frequency characteristics, and applicability to large power consumption elements due to high integration.
While using an iC single crystal as a bond wafer,
Minimizing the need for mechanical cutting means and complicated complicated steps such as grinding and polishing that have been employed for thinning C single crystal wafers such as conventional Si wafers, etc. An ultrathin film having a uniform thickness can be easily formed by a process. Further, it is possible to produce a large number of ultra-thin SiC single crystal wafers from a single thick SiC single crystal wafer, and the material loss of the SiC single crystal wafer hardly occurs. Accordingly, the manufacturing cost of a predetermined semiconductor electronic element substrate can be significantly reduced. Moreover, there is no atomic displacement due to grinding and polishing, and a substrate having an SCOI structure with very high crystal quality and excellent electrical characteristics can be obtained.
This has the effect of enabling the practical use of a power device substrate having excellent high-frequency characteristics and high power consumption applicability.

In particular, according to the third and sixth aspects of the present invention, it is possible to improve the heat dissipation of the semiconductor electronic element substrate obtained by the first and fourth aspects of the present invention. Also has the effect.

Further, according to the invention described in claim 7,
This also has the effect of increasing the bonding strength between the divided thin SiC single crystal wafer portion and the base substrate portion.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view illustrating a first step in a method for manufacturing a semiconductor electronic device substrate according to the present invention.

FIG. 2 is a schematic sectional view illustrating a second step in the manufacturing method.

FIG. 3 is a schematic sectional view illustrating a third step in the manufacturing method.

FIG. 4 is a schematic sectional view illustrating a fourth step in the manufacturing method and a manufactured semiconductor electronic element substrate.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 SiC single crystal wafer 1a Oxide layer 1A Ultra-thin SiC single crystal wafer part 1B Recycled SiC single crystal wafer part 2 Si single crystal substrate part (base substrate part) 2a Oxide layer 3 Substrate for semiconductor electronic element

Claims (7)

(57) [Claims] 1. A thin SiC single crystal wafer and a base substrate portion are joined and integrated by an oxide layer. The thin SiC single crystal wafer is formed by implanting hydrogen ions into a thick SiC single crystal wafer. A substrate for a semiconductor electronic device, comprising a part remaining on the base substrate part side among two parts divided by an average hydrogen ion implantation depth by heat treatment. 2. The semiconductor electronic device according to claim 1, wherein one selected from the group consisting of a Si single crystal substrate, a Si polycrystal substrate, and a high-purity quartz substrate is used as the base substrate. Substrate. 3. The substrate for a semiconductor electronic device according to claim 1, wherein an SiC polycrystalline substrate is used as said base substrate. 4. An oxide layer is formed on at least one surface of the SiC single crystal wafer and the base substrate, and hydrogen ions are implanted into the SiC single crystal wafer. Are bonded and integrated at room temperature via the oxide layer, and thereafter, the SiC single crystal wafer and the base substrate are heated to a predetermined temperature, so that the SiC single crystal wafer has an average hydrogen ion implantation depth of the SiC single crystal wafer. A method of manufacturing a substrate for a semiconductor electronic device, comprising dividing a wafer into two parts and leaving a thin SiC single crystal wafer part on a base substrate part side. 5. The semiconductor electronic device according to claim 4, wherein one selected from a Si single crystal substrate, a Si polycrystal substrate, and a high-purity quartz substrate is used as the base substrate. Method of manufacturing substrates. 6. The method according to claim 1, wherein a SiC polycrystalline substrate is used as the base substrate. 7. The heat treatment of the SiC single crystal wafer and the base substrate portion may be performed by setting the SiC single crystal wafer to an average hydrogen ion implantation depth of 2 μm.
Two-stage heat treatment at 500 ° C. or higher for splitting, and second heat treatment at 1000 ° C. or higher for strengthening the chemical bond between the divided thin SiC single crystal wafer portion and the base substrate portion The method for producing a substrate for a semiconductor electronic device according to claim 4, wherein the method is a treatment.