JP2953902B2 - Library verification device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for verifying a library including numerical information.

[0002]

2. Description of the Related Art Conventionally, when verifying an error in an input data library for a CAD system for automatically designing the arrangement of elements of an electronic circuit and the wiring between the elements, the individual items are visually checked. Was being verified.

[0003]

In the above-described conventional library verification method, since the library is verified by visually checking each item individually, verification omission is easily caused by oversight.

[0004] For example, there are many mistakes in which the delay of the wiring length between elements is erroneously designated by one digit of 20 nanoseconds even though the delay is originally 2 nanoseconds. When such a mistake occurs, the mistake cannot be found only by executing the CAD program, and the desired performance cannot be obtained even if an electronic circuit is prototyped and tested. The mistake is most often found as a result of a visual check of the library again. Generally, it takes a lot of time to execute a CAD program and prototype an electronic circuit.
This time is totally wasted.

It is an object of the present invention to provide a library verification apparatus which can verify a library in a short time with a simple configuration.

[0006]

According to a library verification apparatus of the present invention, in a CAD system for performing automatic wiring design,
Block name and delay time between pins corresponding to this block name
Library storing means for storing a library including: an attribute for determining an allowable range of the inter-pin delay time; and a plurality of libraries indicating a normal value range of the inter-pin delay time included in the library . The range specification information is stored and the library
One of the range specification information according to the attribute included in the
Information storage means for outputting information, and the inter-pin delay included in the library stored in the library storage means.
A range verification unit that compares whether or not the extension time is included in a range of the range specification information output from the range storage unit and outputs a comparison result, and the comparison result is out of a range of a normal value.
The block name and the pin
Display control means for displaying the inter-delay time .

[0007]

FIG. 1 is a block diagram showing an embodiment of the present invention. One embodiment of the present invention comprises a library storage unit 1 for storing a library including numerical information, a range designating unit 2 in which a numerical value for designating a range in which a numerical value in the library is to be stored, and a library storing unit. When the output value 13 is compared with the range designation information output from the range storage means 2 and the range verification means 3 outputs a comparison result 34, and when the comparison result 34 indicates that the comparison result 34 is out of the range, And a display control means for displaying the item name 14 and the numerical value 13 output from the library storage means 1 on a display device (not shown).

FIG. 2 shows an example of the contents of a library included in the library storage means 1. The delay library includes a delay time between pins of each block. For example, the delay time between the H01 pin and the N01 pin of the block A is 5 ns. Also, H0 of block B
The delay time between pin 2 and pin N01 is originally 2 ns, but is 20 ns due to an input error. The library storage unit 1 outputs the inter-pin delay time as a numerical value 13, and the block name and the pin name (both input and output) as item names 14 according to a clock signal from a clock source (not shown). The data is output in order from the upper row in FIG.

The range storage means 2 stores the range of normal delay time between pins that each block can take. Here, it is assumed that 1 to 10 ns is stored as a range of a normal delay time between pins that each block can take. A memory, a register, a switch, and the like can be used for the range storage means.

The range verifying means 3 verifies that the delay time between pins shown in FIG. 2 falls within the range of the normal delay time between pins included in the range storing means 2 of 1 to 10 ns. If not, a signal indicating the out of range is output to the display control means. This range verification means can be configured using a comparator.

When a signal indicating that the value is out of the range is supplied, the display control means 4 replaces the item name 14 and the numerical value 13 output from the library storage means 1 at that time.
The data is output to a display function such as a display or a printer (not shown). In the example of FIG. 2, the delay time between the H02 pin and the N01 pin of the block B is 20 ns, which does not fall within the range of the normal delay time between the pins included in the range storage unit 2 of 1 to 10 ns. Therefore, block B,
An input pin H02, an output pin N01, and a delay time of 20 ns are displayed.

As described above, according to the present embodiment, it is possible to verify the value of the library due to a digit difference or the like in a short time with a simple configuration.

In the embodiment described above, only one type of range is specified in the range storage means. However, in the present invention, a plurality of ranges can be specified. For example,
The allowable range can be set narrow for high-frequency signals such as clock signals, and wide for low-frequency signals. In this case, an attribute ("high speed", "low speed", etc.) item is provided in the library storage unit illustrated in FIG. 2, a signal indicating this attribute is supplied to the range storage unit 2, and the range storage unit What is necessary is just to output the range designation signal according to the attribute. According to such an embodiment, particularly rigorous verification,
For example, not only errors in digits but also errors in numerical values themselves can be verified.

[0014]

As described above, according to the present invention, a numerical value included in a library storage unit is compared with a normal value range without visually checking individual items.
Since the library is verified, there is an effect that the verification is not easily missed due to oversight. In particular, there is an effect that verification omission due to an error including a numerical value that cannot be realized is unlikely to occur.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is an example of the contents of a delay library included in a library storage unit.

[Explanation of symbols]

 1 Library storage means 2 Range storage means 3 Range verification means 4 Display control means

Continuation of front page (56) References JP-A-2-81178 (JP, A) JP-A-4-237328 (JP, A) JP-A-4-199470 (JP, A) JP-A-4-337870 (JP) , A) IPSJ Design Automation Research Report 58-9, "Support System for Creating Delay Library for VLSI Design," vol 91, No. 58, 1991.7.12 IPSJ Design Automation Research Report 55-15, "Tools in Design Support Environment DATE" Mechanism for Reducing Update Workload ”, vol. 90, no. 100, 1990.12.12-13 Proceedings of the IPSJ 40th National Convention, 2M-8, p. 1300-1301 "Rule-based wiring delay time calculation program L AVI" H2.3.14-16

Claims (1)

(57) [Claims] In a CAD system for performing automatic wiring design, a block name and a delay between pins corresponding to the block name are defined.
Attribute that determines the allowable range of delay time and this delay time between pins
And library storage means for storing a library containing bets,
A plurality of range specification information indicating the range of normal values of said pin between the delay time contained in the library is stored, the La
One of the ranges according to the attributes included in the library
A range storage unit that outputs designation information; and the inter-pin delay time included in the library stored in the library storage unit, from the range storage unit.
When indicating comparison whether within the scope of the range specifying information output, and scope verification means for outputting a comparison result, said comparison result is out of the range of normal value
Is a table showing the block name and the delay time between pins.
Library verification device, characterized in that it comprises a示制your means.