JP2937854B2 - High frequency amplifier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency amplifier for obtaining high-frequency power using a semiconductor device, and more particularly to a high-output high-frequency power amplifier used for a transmission unit such as a communication device using a microwave band. is there.

[0002]

2. Description of the Related Art In recent years, with the spread of communication devices such as portable telephones, demand for high-frequency amplifiers used in the microwave band has increased. In designing a high-frequency amplifier, it is necessary to improve stability against oscillation. In particular, since the bias supply circuit included in the high-frequency amplifier is electrically connected to a circuit outside the amplifier, consideration must be given to the suppression of oscillation in its design.

[0003] Japanese Patent Publication No. 56-2447 discloses an example of a conventional bias supply circuit for a high-frequency amplifier. FIG. 9 is a diagram showing a configuration of the bias supply circuit 50 disclosed in the above publication.

This circuit 50 is a circuit for supplying the collector bias of the FET, and is a high-frequency blocking circuit L0 for preventing the influence of the bias supply circuit on the amplified signal band.
Has a configuration in which two termination circuits are connected in parallel. Specifically, by combining one terminating circuit consisting of a parallel connection of the resistor R2 and the coil L2 and the other terminating circuit consisting of a series connection of the resistor R1 and the capacitor C1, unnecessary low-frequency signals can be obtained over a wide band. The signal of the frequency can be terminated. Therefore, unnecessary signal reflection does not occur, and oscillation can be prevented.

[0005]

The above-mentioned conventional bias supply circuit 50 is actually a collector bias supply circuit. Therefore, it is difficult to apply this as it is to another bias supply circuit, for example, a gate bias supply circuit. Even if applied, the configuration of the bias supply circuit 50 has the following problems.

In the configuration of the bias supply circuit 50, the high-frequency blocking circuit L0 and the coil L2 also serve as a bias supply line from the power supply V. Therefore, in order to prevent the high-frequency signal from being absorbed by the termination circuit, as shown in an enlarged view of a portion encircled in FIG. 9, the high-frequency blocking circuit L0 is set to a long wavelength corresponding to a quarter wavelength of the operating frequency. It must be formed as a line (strip line).

In the configuration of the bias supply circuit 50,
Since a part of the signal amplified by the FET is removed, the efficiency is not very good.

Further, in the conventional bias supply circuit 50, a resistor R1 is provided in order to improve stability against oscillation, thereby terminating unnecessary signals to eliminate reflection. However, in order to prevent the output power from lowering, it is necessary to make the resistor R1 invisible at the operating frequency. For that purpose, the high-frequency blocking circuit L0 needs to have a sufficiently large impedance for high frequencies. Specifically, the high-frequency blocking circuit L0 is formed by a microstrip line having about a quarter wavelength of the operating frequency as described above. However, for this reason, the area occupied by the high frequency blocking circuit L0 increases, and the substrate area increases.

Further, in reality, the high-frequency blocking circuit L0 still has a sufficiently large impedance for a frequency slightly lower than the operating frequency, and cannot completely suppress low-frequency oscillation. If the impedance of the high-frequency blocking circuit L0 is reduced, the effect of suppressing oscillation increases, but conversely,
Since a part of the high-frequency signal to be amplified is also absorbed, a decrease in output and a mismatch in impedance occur, and the operating characteristics of the high-frequency amplifier deteriorate. Furthermore, in order to remove unnecessary signals from the amplified signal,
Poor overall conversion efficiency.

As described above, in the configuration of the conventional bias supply circuit 50, there is a trade-off between suppression of low-frequency oscillation and maintenance of good operation characteristics, and the operation efficiency is not very good.

Furthermore, high-frequency power amplifiers used in mobile phones and the like are required to have stability against load fluctuations.
However, in the above-described conventional bias supply circuit 50, when the load of the power amplifier fluctuates (for example, when the output load impedance fluctuates from 50Ω), low-frequency oscillation may occur. That is, in the configuration of the conventional bias supply circuit 50, sufficient stability against a load change is not obtained.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to suppress low-frequency oscillation without deteriorating operation characteristics, and to operate a high-frequency high-frequency device that operates stably with respect to load fluctuations. It is to provide an amplifier.

[0013]

According to one aspect of the invention, a high frequency amplifier includes a transistor, an inductor connected to an input terminal of the transistor, and a first resistor connected to the inductor. A capacitor having one end connected to the first resistor and the other end grounded, and a capacitor connected between a power supply terminal and the input terminal of the transistor.
A second resistor connected to the inductor;
The inductance value L is 10Ω ≦ with respect to the operating frequency f.
Set to satisfy the relationship of 2πfL ≦ 100Ω
There are, above object is met.

According to another aspect of the present invention, a high frequency amplifier includes a transistor, a microstrip line connected to an input terminal of the transistor, and a first resistor connected to the microstrip line. A capacitor having one end connected to the first resistor and the other end grounded; a power supply terminal and the input terminal of the transistor;
And a second resistor connected between, the My
The characteristic impedance of the cross-trip line is
Higher than the resistance of the arrester and the length of the microstrip line
Where d is λ / 40 ≦ d ≦ λ / with respect to the wavelength λ of the operating frequency.
8 so as to satisfy the relationship, thereby achieving the above object.

According to still another aspect of the present invention, a high-frequency amplifier includes a transistor, an inductor connected to an input terminal of the transistor, a first resistor connected to the inductor, and a power supply terminal. A second resistor connected between the first resistor and the input terminal of the transistor; and a capacitor connected in parallel with one end connected to the first resistor and the other end grounded. And a third resistor, and the inductance value L of the inductor
Is 10Ω ≦ 2πfL ≦ 100Ω with respect to the operating frequency f.
It is set so as to satisfy the following relationship, whereby the above object is achieved.

According to still another aspect of the present invention, a high-frequency amplifier includes a transistor, a microstrip line connected to an input terminal of the transistor, and a first resistor connected to the microstrip line. A second resistor connected between a power supply terminal and the input terminal of the transistor; and a second resistor connected to the first resistor at one end and grounded at the other end. and a capacitor and a third resistor connected, the micro
The characteristic impedance of the strip line is the first resistor
And the length d of the microstrip line
Is λ / 40 ≦ d ≦ λ / 8 with respect to the operating frequency wavelength λ.
Is set so as to satisfy the following relationship, thereby achieving the above object.

In each of the above configurations, preferably, the resistance value of the first resistor is in a range of about 30Ω to about 70Ω.

The length of the inductance value or the microstrip lines before Symbol inductor is sufficiently small value to an extent that the impedance value for the low frequency is negligible.

[0019]

Preferably, the high-frequency amplifier of the present invention as described above is used in a microwave band of about 1 GHz to about 2 GHz, and the output power of the transistor is several hundred mW to several W.
Is within the range.

As described above, in the high-frequency amplifier of the present invention,
A bias supply circuit including an inductor or a microstrip line whose impedance value for low frequency can be ignored is connected to an input terminal of the transistor, for example, a gate terminal of the FET. A resistor (first resistor) for preventing oscillation is connected to the inductor or the microstrip line. The oscillation preventing resistor preferably has a resistance of about 30Ω to about 70Ω. With such a configuration, low-frequency oscillation is suppressed. At this time, by making the impedance for the high frequency of the bias supply circuit seen from the input terminal of the transistor sufficiently large compared to the input impedance of the transistor,
Leakage of high-frequency power supplied to the transistor is prevented, and output power increases.

Therefore, with the above configuration, both the suppression of the low-frequency oscillation in the high-frequency amplifier and the improvement of the output power are realized.

[0023]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
An embodiment of a high-frequency amplifier according to the present invention will be described with an example of a configuration including a gate input FET in which a bias supply circuit (gate bias supply circuit) is connected to a gate terminal.

(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
3 is a schematic diagram of a circuit configuration of the high-frequency amplifier according to the embodiment, and surrounds the gate bias supply circuit 100 with a dotted line.

In the circuit configuration shown in FIG. 1, an input impedance matching circuit 7 and a gate bias supply circuit 100 are connected between the input terminal of the high-frequency amplifier and the FET 6. The drain terminal of the FET 6 is connected to the power supply terminal Vdd via the drain bias supply circuit 9 and
The output impedance matching circuit 8 is connected to the output terminal of the high-frequency amplifier. The source terminal of the FET 6 is grounded.

The gate bias supply circuit 100 has an FE
A resistor 2 connected between the gate terminal 5 of T6 and the gate power supply terminal Vgg, and an inductor 10 and a resistor 1 connected between the gate terminal 5 of FET 6 and the ground terminal
And a parallel circuit of a resistor 3 and a capacitor 4.

The first of the gate bias supply circuit 100
The function of is to change the values of the resistors 1 to 3 to change the gate power supply terminal V
In other words, the voltage supplied to the gate terminal 5 of the FET 6 is controlled by changing the voltage dividing ratio with respect to the constant voltage supplied from the resistors 2 and 3 (essentially, the resistors 2 and 3).
Determines the partial pressure ratio). The second function of the gate bias supply circuit 100 is to suppress low-frequency oscillation by a series connection circuit of the inductor 10, the resistor 1, and the capacitor 4. Here, the values of the resistors 2 and 3 are set to several hundred Ω to several k in order to prevent the gate bias supply circuit 100 from affecting the matching of the input impedance and to suppress the gate current to about several mA.
It is set to a large value of about Ω.

In the gate bias supply circuit 100,
The resistance values of the resistors 1 to 3 are respectively r, R2 and R3, the inductance value of the inductor 10 is L, and the capacitance value of the capacitor 4 is about 1000 pF. Where R3
When ≫r, the impedance Z with respect to the high-frequency signal when the inductor 10 is viewed from the gate terminal 5 of the FET 6
Can be approximated as Z ≒ r + jωL using the inductance L of the inductor 10 and the resistance r of the resistor 1. For example,
When L = about 10 nH and r = about 50Ω, the fundamental frequency f =
The impedance at about 1.5 GHz is Z = 50 + j
100Ω, and its absolute value is | Z | = about 112Ω.

The input impedance of the high-output FET 6 for the fundamental frequency f = about 1.5 GHz is generally about 5Ω, and the absolute value of the impedance Z is equal to this FE.
This value is sufficiently large with respect to the input impedance value of T6. Accordingly, it is possible to prevent the high frequency power input to the gate terminal 5 of the FET 6 from leaking to the ground terminal via the resistor 1 and the capacitor 4.

On the other hand, a low frequency, for example, f = about 20 MHz
At z, the inductance value of the inductor 10 becomes negligibly small, and the impedance becomes Z イ ン ピ ー ダ ン ス about 50Ω.
Can be approximated. This is an extremely stable impedance value against abnormal oscillation, and can suppress low-frequency oscillation.
That is, as a result of studying by changing the resistance value r of the resistor 1, when r is set to about 50Ω, it is most stable against a load change at the output terminal, and VSWR ≦
No low-frequency oscillation is observed even when a load fluctuation of 10 occurs. Also, by setting the resistance value r of the resistor 1 in the range of about 30Ω to about 70Ω, a sufficient effect for suppressing low-frequency oscillation can be obtained, and even if a load fluctuation of VSWR ≦ 5 occurs at the output terminal. Stable operation can be secured.

FIG. 2 shows the output spectrum of the high-frequency amplifier of FIG. 1 when the resistance value of the resistor 1 is about 50Ω and the inductance value L of the inductor 10 is about 10 nH.

In this case, even if a load fluctuation of VSWR ≦ 10 occurs at the output terminal, no low-frequency oscillation is observed. As high frequency characteristics, an output power of about 31.5 dBm is obtained under the conditions of a fundamental frequency of about 1.5 GHz, a power supply voltage of about 3.5 V, an input power of about 7 dBm, and an output load impedance of about 50Ω. Further, even if the value of the inductance L of the inductor 10 is further increased, the output power does not increase any more, and the leakage of the high-frequency power is sufficiently prevented by the inductor 10 of about 10 nH.

As described above, the gate bias supply circuit 100 of FIG. 1 is effective in preventing leakage of high-frequency power and suppressing low-frequency oscillation.

FIG. 3 is an output spectrum of the power amplifier of FIG. 1 when the resistance value of the resistor 1 is about 10Ω and the inductance value of the inductor 10 is L = about 10 nH.

In this case, as compared with the case of FIG.
, A low-frequency oscillation occurs with respect to a load change of VSWR ≦ 5 at the output terminal. As high frequency characteristics, the frequency is about 1.5 GHz,
Under the conditions of a power supply voltage of about 3.5 V, an input power of about 7 dBm, and an output load impedance of about 50Ω, an output power of about 3
1.5 dBm is obtained.

As described above, in the gate bias supply circuit 100 of FIG. 1, by setting the inductance value L of the inductor 10 to about 10 nH, the leakage of the high-frequency power is prevented. However, when the resistance value r of the resistor 1 is about 10Ω, the resistance becomes unstable with respect to oscillation as compared with the case where r = about 50Ω.

FIG. 4 shows the resistance value r of the resistor 1 = about 160Ω.
And the inductance value L of the inductor 10 = about 10 nH
2 is an output spectrum of the power amplifier of FIG.

In this case, the VSWR at the output terminal
Low-frequency oscillation occurs for a load change of ≦ 5. As high-frequency characteristics, an output power of about 31.5 dBm is obtained under the conditions of a frequency of about 1.5 GHz, a power supply voltage of about 3.5 V, an input power of about 7 dBm, and an output load impedance of about 50Ω. As described above, even if the resistance value r of the resistor 1 becomes too large, a low-frequency oscillation occurs due to a load fluctuation of VSWR ≦ 5 at the output terminal, and the operation of the high-frequency amplifier becomes unstable with respect to the oscillation.

In the gate bias supply circuit 100,
The reason why low-frequency oscillation is suppressed by setting the resistance value r of the resistor 1 to around 50Ω will be described with reference to FIG. FIG. 5 shows a view from the gate terminal 5 of the FET 6.
6 is a Smith chart showing the impedance of the input impedance matching circuit 7 including the gate bias supply circuit 100.

The impedance at the operating frequency f = about 1.5 GHz (see point (1) in FIG. 5) matches the input impedance of the high-output FET 6 and is about 5Ω. Even if the resistance value r of the resistor 1 is changed from about 10Ω to about 160Ω, the impedance value at f = about 1.5 GHz (point (1) in FIG. 5) does not change.

On the other hand, the impedance at the low frequency f = about 20 MHz fluctuates greatly due to the resistance value r of the resistor 1. That is, when the resistance value of the resistor 1 is r = about 160Ω, the low-frequency impedance of about 20 MHz is located outside on the Smith chart as shown by a point (4) in FIG. 2.5. Resistor 1
When the resistance value of r is about 50Ω, f = about 20 MHz
Has an impedance of 50Ω as shown in point (3) of FIG.
Approach. At this time, VSWR is improved to about 1.4.
Further, when the resistance value of the resistor 1 is r = about 10Ω,
The impedance at f = about 20 MHz becomes smaller than 50Ω as shown by point (2) in FIG. 5, and VSWR = about 4.
7

From the above, when the operation of the gate bias supply circuit 100 is most stable against the low frequency oscillation when the resistance value r of the resistor 1 is about 50Ω, the operation at the low frequency (for example, f = about Impedance at 20 MHz) is 50
This is due to being closest to Ω.

[0043]

[Table 1]

Table 1 shows that, when the gate bias supply circuit 100 of the present embodiment is applied to the two-stage power amplifier of the output 1W class, the output power changes with respect to the change in the resistance value r of the resistor 1 and the presence or absence of oscillation ( ○ indicates that oscillation does not occur, and x indicates that oscillation occurs.)
The measurement conditions of the output power are as follows: for each value of r, the fundamental frequency f = about 1.5 GHz, the power supply voltage Vdd = about 3.
It is constant at 5 V and input power Pin = about 7 dBm. When measuring the presence or absence of low frequency oscillation, the load at the output
It is varied in the range of WR ≦ 5.

As shown in Table 1, the resistance r of the resistor 1
Does not change the obtained output power value. However, in order to suppress the low frequency oscillation with respect to the load fluctuation, it is necessary to set the resistance value r of the resistor 1 in a range of about 30Ω to about 70Ω.

[0046]

[Table 2]

Next, Table 2 shows the case where the inductance L of the inductor 10 is changed in a state where the resistance of the resistor 1 is fixed to r = about 50Ω and the oscillation is suppressed.
5 shows a change in output power. The output power when the inductor 10 is not included (L = 0 nH) is about 30.7 dBm, but the output power is improved by increasing the value of L,
When L> 5 nH, it tends to be almost saturated. This is because, by increasing the inductance L of the inductor 10, the impedance (Z = r + jωL) of the gate bias supply circuit 100 viewed from the gate terminal 5 of the FET 6 becomes sufficiently larger than the input impedance of the FET 6, and as a result This is because power leakage is prevented.

As described above, in the gate bias supply circuit 100, the resistance value r of the resistor 1 is set in the range of about 30Ω to about 70Ω, and the resistance r between the gate terminal 5 of the FET 6 and the resistor 1 is set. By providing the inductor 10 whose impedance value can be ignored for low frequencies, suppression of low-frequency oscillation and improvement of output power are realized. Specifically, it is preferable that the inductance L of the inductor 10 be set to about 10Ω ≦ 2πfL ≦ about 100Ω with respect to the operating frequency f.

(Second Embodiment) FIG. 6 shows a second embodiment of the present invention.
FIG. 3 is a schematic diagram of a circuit configuration of the high-frequency amplifier according to the embodiment, and a gate bias supply circuit 200 is surrounded by a dotted line.

In the gate bias supply circuit 200 of FIG. 6, the gate bias supply circuit 1 of the first embodiment is used.
The microstrip line 11 replaces the inductor 10 included in 00. The other components are the same, and the same components are denoted by the same reference numerals, and their description is omitted here.

In the configuration of the gate bias supply circuit 200 shown in FIG. 6, the resistance value r of the resistor 1 is set to about 30Ω to about 70Ω.
By setting the value in the range of Ω, low-frequency oscillation can be suppressed.

When the resistance r of the resistor 1 is about 50Ω,
From the gate terminal 5 of the FET 6 to the microstrip line 1
The impedance when looking at the side 1 greatly differs between when the characteristic impedance Z ₀ of the microstrip line 11 is larger than about 50Ω and when it is small. That is, when the characteristic impedance Z ₀ > 50Ω when the microstrip line 11 is lengthened, the impedance shifts to the high impedance side. On the other hand, when the characteristic impedance Z ₀ <50Ω,
When the microstrip line 11 is lengthened, the impedance shifts to a low impedance side. Therefore, by inserting the microstrip line 11, the FET
In order to prevent the leakage of the high-frequency power input to the gate terminal 5 of the microstrip line 6, the characteristic impedance Z ₀ of the microstrip line 11 needs to be greater than 50Ω.

For example, a thickness of about 0.6 mm and a relative permittivity ε
_{When the} microstrip line 11 is formed using a substrate with _r = 10.5, the characteristic impedance becomes about 80Ω or more when the line width is about 0.1 mm, and the high-frequency power passes through the resistor 1. Leakage can be prevented.

Table 3 shows a change in output power with respect to a change in the length d of the microstrip line 11 at this time.

[0055]

[Table 3]

When the microstrip line 11 is not used (when the length d = 0), the output power is about 30.
Although it is 7 dBm, the output power is improved by increasing the length of the microstrip line 11, and it tends to be almost saturated when d> 10 mm (electric length is λ / 8). This is because the impedance (Z = r + jωL) of the gate bias supply circuit 200 as viewed from the gate terminal 5 of the FET 6 becomes sufficiently large as compared with the input impedance of the FET 6 by lengthening the microstrip line 11. This is because leakage of high-frequency power is prevented.

As described above, in the gate bias supply circuit 200, the resistance value r of the resistor 1 is set in the range of about 30Ω to about 70Ω, and the resistance r between the gate terminal 5 of the FET 6 and the resistor 1 is set. By providing the microstrip line 11 having a negligible impedance value for low frequencies, suppression of low-frequency oscillation and improvement of output power are realized. Specifically, the characteristic impedance of the microstrip line 11 is larger than the resistance value r of the resistor 1, and the length d of the line 11 is set in the range of λ / 40 ≦ d ≦ λ / 8. Is preferred.

(Third Embodiment) FIG. 7 shows a third embodiment of the present invention.
FIG. 3 is a schematic diagram of a circuit configuration of the high-frequency amplifier according to the first embodiment, in which a gate bias supply circuit 300 is surrounded by a dotted line. In FIG. 7, components corresponding to the components shown in FIG. 1 or FIG. 6 are denoted by the same reference numerals.

In the circuit configuration shown in FIG. 7, an input impedance matching circuit 7 and a gate bias supply circuit 300 are connected between the input terminal of the high-frequency amplifier and the FET 6. The drain terminal of the FET 6 is connected to the power supply terminal Vdd via the drain bias supply circuit 9 and
The output impedance matching circuit 8 is connected to the output terminal of the high-frequency amplifier. The source terminal of the FET 6 is grounded.

The gate bias supply circuit 300 includes an FET
6 includes a resistor 2 connected between the gate terminal 5 and the gate power supply terminal Vgg, and a resistor 3 connected between the gate terminal 5 of the FET 6 and the ground terminal. Further, the gate bias supply circuit 300 includes a series circuit of the inductor 10, the resistor 1, and the capacitor 4 between the gate terminal 5 of the FET 6 and the ground terminal.

The first of the gate bias supply circuit 300
The function of is to control the voltage supplied to the gate terminal 5 of the FET 6 by changing the values of the resistors 2 and 3 and changing the voltage dividing ratio with respect to the constant voltage supplied from the gate power supply terminal Vgg. . The second function of the gate bias supply circuit 300 is that the inductor 10 and the resistor 1
And a capacitor 4 connected in series to suppress low-frequency oscillation. Here, the values of the resistors 2 and 3 are set to several hundred Ω to several kΩ in order to prevent the gate bias supply circuit 300 from affecting the matching of the input impedance and to suppress the gate current to about several mA. Is set to a large value.

Such a gate bias supply circuit 300
(Table 1) and (Table 2)
The same result as is obtained. That is, by setting the resistance value r of the resistor 1 in a range of about 30Ω to about 70Ω,
Low frequency oscillation is suppressed. Further, by inserting an inductor 10 having a low-frequency negligible impedance value between the gate terminal 5 of the FET 6 and the resistor 1, it is possible to prevent leakage of high-frequency power and increase output power. Here, the same effect can be obtained even if the connection order of the inductor 10, the resistor 1, and the capacitor 4 is changed.

(Fourth Embodiment) FIG. 8 shows a fourth embodiment of the present invention.
10 is a schematic diagram of a circuit configuration of the high-frequency amplifier according to the embodiment, and a dotted line surrounds a gate bias supply circuit 400. FIG.

In the gate bias supply circuit 400 of FIG. 8, the gate bias supply circuit 3 of the third embodiment
The microstrip line 11 replaces the inductor 10 included in 00. The other components are the same, and the same components are denoted by the same reference numerals, and their description is omitted here.

Also in the configuration of the gate bias supply circuit 400 of FIG. 8, the resistance value r of the resistor 1 is set to about 30Ω to about 70Ω.
By setting the value in the range of Ω, low-frequency oscillation can be suppressed.

Such a gate bias supply circuit 400
With the configuration described above, the same result as described above (Table 3) can be obtained. That is, the resistance value r of the resistor 1 is set to about 30Ω.
By setting the range to about 70Ω, low-frequency oscillation is suppressed. Further, by inserting a microstrip line 11 having a low-frequency negligible impedance value between the gate terminal 5 of the FET 6 and the resistor 1, it is possible to prevent high-frequency power leakage and increase output power. . Here, the same effect can be obtained even if the connection order of the microstrip line 11, the resistor 1, and the capacitor 4 is changed.

The configuration of the high-frequency amplifier according to each of the embodiments described above has sufficient stability against fluctuations in the load connected to the output terminal.

In each of the above embodiments, the present invention has been described by taking, as an example, a high-frequency amplifier having a configuration in which a signal to be amplified is input to the gate terminal of an FET. However, the application of the present invention is not limited to this.
The present invention can be applied to a configuration in which an input signal is supplied to a source terminal or a drain terminal of T, a base terminal of a bipolar transistor, or the like.

[0069]

As described above, in the high-frequency amplifier according to the present invention, the resistance r of the oscillation preventing resistor included in the bias supply circuit is set in the range of about 30 Ω to about 70 Ω. Oscillation is suppressed.

Further, the bias supply circuit includes an inductor or a microstrip line having a negligible impedance value with respect to a low frequency inserted between the input terminal of the transistor, for example, the gate terminal of the FET and the resistor. At this time, by making the impedance of the bias supply circuit with respect to the high frequency as viewed from the input terminal of the transistor sufficiently large as compared with the input impedance of the transistor, the leakage of the high frequency power supplied to the transistor is prevented, and the output is reduced. Power increases.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a circuit configuration of a high-frequency amplifier according to a first embodiment.

FIG. 2 is an example of an output spectrum of the high-frequency amplifier of FIG. 1 (when the resistance value of an oscillation preventing resistor included in a gate bias supply circuit is 50Ω).

FIG. 3 is an example of an output spectrum in the high-frequency amplifier of FIG. 1 (when the resistance value of an oscillation preventing resistor included in a gate bias supply circuit is 10Ω).

FIG. 4 is an example of an output spectrum in the high-frequency amplifier of FIG. 1 (when the resistance value of an oscillation preventing resistor included in a gate bias supply circuit is 160Ω).

FIG. 5 is a Smith chart showing impedance when the input side is viewed from the gate terminal of the FET in the high-frequency amplifier of FIG. 1;

FIG. 6 is a diagram illustrating a circuit configuration of a high-frequency amplifier according to a second embodiment of the present invention.

FIG. 7 is a diagram illustrating a circuit configuration of a high-frequency amplifier according to a third embodiment of the present invention.

FIG. 8 is a diagram illustrating a circuit configuration of a high-frequency amplifier according to a fourth embodiment of the present invention.

FIG. 9 is a diagram illustrating a configuration of a bias supply circuit in a conventional high-frequency amplifier.

[Explanation of symbols]

1, 2, 3 Resistor 4 Capacitor 5 Gate terminal of FET 6 FET 7 Input impedance matching circuit 8 Output impedance matching circuit 9 Drain bias supply circuit 10 Inductor 11 Microstrip line 100, 200, 300, 400 Gate bias supply circuit

Continuation of the front page (56) References JP-A-6-120414 (JP, A) JP-A-55-91216 (JP, A) JP-A-4-77009 (JP, A) JP-A-59-175208 (JP) JP-A-4-326206 (JP, A) JP-A-6-53761 (JP, A) JP-A-4-113701 (JP, A) JP-A-3-135207 (JP, A) JP-A-7-74285 (JP, A) JP-A-5-315867 (JP, A) JP-A-3-270405 (JP, A) JP-A-3-66201 (JP, A) A) JP-A-62-298207 (JP, A) JP-A-62-53815 (JP, U) Koizumi, "Design Method of Filter for High Frequency Band" (Transistor Technology, February 1988, pp. 403-412) (58) Field surveyed (Int.Cl. ⁶ , DB name) H03F 3/60 H03F 3/189

Claims (4)

(57) [Claims] 1. A transistor, an inductor connected to an input terminal of the transistor, a first resistor connected to the inductor, one end connected to the first resistor and the other end connected to the first resistor. A capacitor connected between the power supply terminal and the input terminal of the transistor;
A second resistor that is connected to the power supply , and the inductance value L of the inductor is adjusted to the operating frequency f.
On the other hand, the relationship of 10Ω ≦ 2πfL ≦ 100Ω is satisfied.
High-frequency amplifier set to 2. A transistor, a microstrip line connected to an input terminal of the transistor, a first resistor connected to the microstrip line, and one end connected to the first resistor. Connected between a power supply terminal and the input terminal of the transistor.
And a second resistor that is, the characteristic impedance of the microstrip line said
1, said microstrip line being higher than the resistance value of the resistor
The path length d is λ / 40 ≦ d with respect to the operating frequency wavelength λ.
A high-frequency amplifier set to satisfy a relationship of ≦ λ / 8 . 3. A transistor, an inductor connected to an input terminal of the transistor, a first resistor connected to the inductor, and a power supply terminal connected between the power supply terminal and the input terminal of the transistor. comprising a second resistor has one end and the other end is connected to the first resistor is grounded, and a capacitor and a third resistor connected in parallel to each other, and the inductor Of the operating frequency f
On the other hand, the relationship of 10Ω ≦ 2πfL ≦ 100Ω is satisfied.
High-frequency amplifier set to 4. A transistor, a microstrip line connected to an input terminal of the transistor, a first resistor connected to the microstrip line, a power supply terminal and an input terminal of the transistor. A second resistor connected between the first resistor and a capacitor and a third resistor connected in parallel to each other, one end of which is connected to the first resistor and the other end of which is grounded. provided, the characteristic impedance of the microstrip line said
1, said microstrip line being higher than the resistance value of the resistor
The length d of the path is λ / 40 ≦ d with respect to the wavelength λ of the operating frequency.
A high-frequency amplifier set to satisfy a relationship of ≦ λ / 8 .