JP2921228B2 - Programmable controller - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an SFC (Sequential Func
More particularly, the present invention relates to a programmable controller that operates by setting execution or non-execution of a program described in the SFC, and particularly relates to a programmable controller having a debug function of the program described in the SFC.

[0002]

2. Description of the Related Art Programmable controllers (hereinafter referred to as P
For example, at a work site or the like, various physical information (for example, information that the number of products passing through an outlet of a belt conveyor has reached a predetermined amount) or logical information (for example, a cutting machine) is used. In order to obtain a signal for coping with a danger when is operating, output control (sequence control) is performed in response to information such as that a sensor scanning a predetermined area has detected a moving object. Can be programmed.

Normally, the progress of the process and the working procedure are rarely specified from the beginning, and it is rare that the specifications are determined from the beginning. It is often determined by constantly changing and modifying them. For this reason, all necessary control elements are incorporated in the PC so that these changes can be easily made, and a plurality of processing elements for determining one output by combining the control elements are set in advance. . In the field, in many cases, sequence control is performed by repeatedly selecting and executing any one of the processes from the user program.

The SFC program has a step (STEP).
And a description section called a transition (TRANSITION) are connected by a link (LINK), and the execution or non-execution of the program proceeds by alternately referring to steps and transitions. Then, the PC selects the subsequent step if the transition which is the transition condition is on, and determines that the subsequent step is not selected if the transition is off.

[0005] The program is executed using so-called mnemonic expressions, which are expressed using abbreviated symbols or the like that appropriately represent the operating state and the nature of the instruction. The program described in this manner is translated into a machine language, Are sequentially written into a program storage memory such as a RAM in the order of addresses.

When debugging a program described in SFC as shown in FIG.
From step S6 to step S6, the path from step S0 to step S6 is actually the path of A (S0, S1, S2, S3, S4, S4).
5, S6) or the route of B (S0, S1, S
7, S8, S5, S6), it is not clear only from the result at the time of reaching step S6. This is because the details of the process cannot be understood.

[0007]

In order to understand the history of execution of the above-mentioned program, for example, a process in which the PC executes the program by a loader which is a peripheral device of the PC is monitored and recorded. Should be
In this case, since the operation speed of the PC is too high relative to the operation speed of the monitor, the operation of the monitor cannot follow the operation speed. Also,
The PC processes a series of programs (one scan) starting from the beginning of the program described in the SFC, returns to the beginning, and repeats the processing of the program in the same manner thereafter. There is a problem that the recorded data may be exhausted at any time and a large amount of memory is required.

The present invention has been made in consideration of the above-mentioned conventional problems, and
It is intended to store a large number of sets of data which can be used to understand the history of the processing of a program for one scan, and to easily check the path later to easily debug the program. .

[0009]

FIG. 1 is a block diagram for explaining the principle of the present invention. In FIG. 1, a memory 1 is provided in a PC 1, and in this memory 2, a previous processing transient information recording area 3 for recording transient information in the previous processing and an SFC for sequentially recording the history of processing of a program for one scan. A history information recording area 4 is provided.

When the PC 1 completes the processing of the program for one scan, the PC 1
The transient information comparison means 5 for comparing the transient information of the previous processing with the contents of the previously processed transient information recording area 3, and the result of comparison by the transient information comparing means 5, the contents of the previously processed transient information recording area and the processing completed this time And a transient information recording means 6 for recording the SFC transient information for the currently completed processing in the SFC history information recording area 4 and the previous processing transient information recording area 3 when the SFC transient information differs from the SFC transient information. I have.

[0011]

At the end of the scan, the PC compares the transient information of the SFC for the process completed this time with the contents of the previous process transient information recording area. As a result, if they do not match, the transient information of the SFC for the currently completed processing is recorded in the SFC history information recording area 4 and the previous processing transient information recording area 3. Since this process is repeated for each scan, the SFC history information recording area 4 records information that indicates the details of the process each time the process is changed. Therefore, it is possible to confirm the process of executing the program by referring to the contents of the SFC history information recording area 4 when necessary.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings. FIG. 2 is an explanatory diagram showing the details of the SFC history information recording area 4 of the RAM provided in the PC 1. In FIG. 1 and FIG. 2, the SFC history information recording area 4 corresponds to each step of the program so that a number of sets (several hundred sets) of information that can be distinguished between execution and non-execution of the step can be recorded as one unit. I have to.

On the other hand, the RAM is provided with a previous processing transient information recording area 3 (FIG. 1) for recording transient information in the previous processing, and the SFC transient for the currently completed processing is stored in a memory (not shown). Information is recorded. In this embodiment, the previous processing transient information recording area 3 and the SFC history information recording area 4 are provided in the same memory, but they are independently provided as the last processing transient information recording memory and the SFC history information recording memory. It can also be configured.

FIG. 3 is a flowchart of a processing program for confirming the history of execution of the program so that the debug function of the program can be exhibited. When the processing of the program for one scan is completed, the control procedure becomes the process P
In step 1, the transient information of the SFC for the currently completed process is read from the memory, the transient information of the previous process is read from the previous process transient information recording area 3, and these are compared. In the process P2, as a result of the comparison, it is determined whether or not they are different. If both information is the same as a result of the comparison, the processing shown in this flowchart is terminated without doing anything.

If the two information are different,
The process proceeds to process P3, where the SFC transient information for the process completed this time is recorded in the SFC history information recording area 4. Next, the process proceeds to process P4, where the SFC transient information (step ON / OFF) for the process completed this time is stored in the previous process transient information recording area (previous step ON / OFF recording memory) 3.
(The contents of the OFF recording memory) (FIGS. 4A and 4B).
), To update the contents of the previous processing transient information recording area 3. Then, the processing shown in this flowchart ends. As a result, whenever the transient information of the SFC is changed as shown in FIG. 2, the changed transient information is recorded in the SFC history information recording area 4 (first change, second change, third change). , ...
・). In addition, the process P3 and the process P4 may be executed in any order. Therefore, the process P4 may be executed first, and the process P3 may be executed afterwards.

Based on a set of transient information of the SFC history information recording area 4, the execution order of the steps as shown in FIG. 5 is drawn, or a graphic is displayed by using a PC peripheral device or a personal computer. The execution history of the program can be easily known by displaying an image on a display device or the like. Then, such plots or images are expressed for each of the transient information after the change, and by comparing each of them, it is possible to know how the configuration of the program has changed, and to easily debug the program. become. Also, as shown in FIG.
Even if the program branches in parallel (performs in parallel), all the transient information is recorded when one scan of the changed program is executed. It can be later recognized that the operation has been performed. It should be noted that the steps circled in FIG. 5 indicate that the steps are being executed.

[0017]

As described in detail above, according to the present invention, all the transient information is recorded in the SFC history information recording area when one scan of the changed program is executed. Thereafter, a programmable controller that can recognize the execution path of the program and can easily debug the program can be obtained.

[Brief description of the drawings]

FIG. 1 is a configuration diagram illustrating the principle of the present invention.

FIG. 2 is an explanatory diagram showing details of an SFC history information recording area 4 of a RAM provided in a PC 1.

FIG. 3 is a flowchart of a processing program for confirming the history of execution of the program so that the debugging function of the program is exhibited.

FIG. 4A is a schematic diagram of a memory in which SFC transient information for a process completed this time is written.
(b) is a schematic diagram of a memory in which previous process transient information is written.

FIG. 5 is a schematic diagram showing an example for expressing the execution history of a program based on the contents of an SFC history information recording area so as to be grasped;

FIG. 6 is a schematic diagram showing an example for expressing the execution history of a program including a parallel process based on the contents of an SFC history information recording area so as to be grasped.

FIG. 7 is a schematic diagram showing a program for one scan described in SFC.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Programmable controller 2 Memory 3 Previous processing transient information recording area 4 SFC history information recording area 5 Transient information comparison means 6 Transient information recording means

Claims (1)

(57) [Claims] 1. A programmable controller that operates by setting execution or non-execution of a program based on a description of an SFC (Sequential Function Chart) and has a memory in which transient information for a previous process is recorded. A previous process transient information recording area and an SFC history information recording area for sequentially recording history information for processing for one scan are provided, and when the processing of the program for one scan is completed, the SFC transient information for the processing completed this time and Transient information comparing means for comparing the contents of the last processed transient information recording area 3 with the contents of the last processed transient information recording area; and the result of comparison by the transient information comparing means, the contents of the last processed transient information recording area and the current For completed processing And transient information recording means for recording the SFC transient information for the process completed this time in the SFC history information recording area and the previous process transient information recording area when the SFC transient information differs from the SFC transient information. And a programmable controller.