JP2827588B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device,
Especially regarding SRAM. In recent years, the chip size of SRAM has been increasing with the increase of storage capacity. As a result, the cell size is shrinking, and the burden on the manufacturing process is increasing.

[0002] In an SRAM cell, two cells are used for one cell.
The split word line type cell through which one word line passes is advantageous over the conventional type cell because there is no dead end portion in the active region and the LCOS (selective oxidation) method can be used for element isolation, but the chip size becomes large. ， Some measures are required.

[0003] The present invention can be used as an SRAM that meets this demand.

[0004]

2. Description of the Related Art FIG. 2 is an equivalent circuit diagram of an SRAM cell. In the figure, Q ₁ and Q ₂ are driver transistors and n-channel FETs, Q ₃ and Q ₄ are transfer transistors and n-channel FETs, and P ₁ and P ₂ are load transistors and p-channel FEs.
T (the load may be replaced by a polysilicon resistor), WL is a word line and transfer transistors Q ₃ and Q
Gate ₄ and BL are bit lines and upper metal wiring, VCC, VSS
Is a power supply line.

FIGS. 4A and 4B are plan views of a conventional SRAM cell. In the figure, Q ₁ and Q ₂ are driver transistors, Q ₃ and Q ₄ are transfer transistors, WL is a word line and the gates of the transfer transistors Q ₃ and Q ₄ ,
D and D 'are the cell sizes in the vertical direction in the figure, W and W' are the channel width of the driver transistor, and the hatched area surrounded by the isolation oxide film 2 is the active region.

As can be seen from the figure, the active region surrounded by the isolation oxide film 2 has a dead end portion, and the driving capabilities (driving drain current, gate width) of the left and right driver transistors Q ₁ and Q ₂ tend to be asymmetric. Structure.

FIG. 4B shows a case where the gate insulating film (oxide film) of the transfer transistor is made thicker than that of the driver transistor in order to reduce the cell size. In this case, the vertical reduction of the cell size ΔD = D−
D 'is a reduction Δ in the channel width of the driver transistor.
Only W = WW ′.

This is because the two driver transistors are arranged side by side in parallel on the layout, so that only one reduction of the channel width is effective. for that reason,
Even if the thicknesses of the gate oxide films of the driver transistor and the transfer transistor were changed, the cell size could not be significantly reduced.

[0009]

As described above, it is desired to adopt a split word line type cell having a high performance but a large cell size and to increase the reduction rate of the chip size of the SRAM cell as compared with the conventional cell. .

It is an object of the present invention to reduce the cell size of an SRAM cell by employing a split word line type cell, thereby contributing to an improvement in the performance of the SRAM and a higher integration.

[0011]

Means for solving the above problems are as follows: 1) Split word line type SR having two word lines
It has an AM (Static Random Access Memory) cell, and two driver transistors in the cell are formed such that each gate width direction is formed in a direction perpendicular to the two word lines, and each source gate An active region forming a drain is formed so as to be juxtaposed vertically with the word line without intersecting in the cell, and the thickness of the gate insulating film of two transfer transistors in the cell is equal to the thickness of the driver transistor. A semiconductor device characterized by being thicker than a gate insulating film; or 2) having the SRAM cell and a peripheral circuit, wherein a gate insulating film of a transistor of an input / output circuit in the peripheral circuit has a thickness within the cell. The gate of a transistor having the same thickness as the gate insulating film of the transfer transistor and different from the input / output circuit in the peripheral circuit The semiconductor device according to 1), wherein the thickness of the insulating film is the same as the thickness of the gate insulating film of the driver transistor in the cell, or 3) the semiconductor substrate including the SRAM cell and the peripheral circuit region. ,
Defining at least two active regions in the SRAM cell; forming a first oxide film on the active region; and defining a transfer transistor in the SRAM cell and a transfer transistor in the peripheral circuit region. Forming a resist film on the input / output circuit transistor formation region, etching and removing the first oxide film using the resist film as an etching mask, removing the resist film and forming the resist film on the active region; A second oxide film is formed, which is thick on the transfer transistor in the SRAM cell area and the input / output circuit transistor formation area in the peripheral circuit area, and is thicker on the driver transistor in the SRAM cell area and in the peripheral circuit area. Gate oxide film to be thin on the transistor formation area other than the input / output circuit Forming a conductive film on the semiconductor substrate including the gate oxide film; and patterning the conductive film to form an input / output circuit transistor and a transistor other than the input / output circuit in the peripheral circuit region. Forming a gate electrode of two transfer transistors and a gate electrode of two driver transistors in the SRAM cell, wherein the gate electrodes of the two transfer transistors are on two active regions in the SRAM cell region. And the SRA
A split word line is formed in the M cell area, and
The two active regions are formed so as to be juxtaposed vertically with the word line without intersecting with each other in a cell, and the gate electrodes of the two driver transistors in the cell have word widths in the gate width direction. This is achieved by a method of manufacturing a semiconductor device, wherein the semiconductor device is formed so as to be perpendicular to the line direction.

[0012]

FIGS. 1A and 1B are diagrams illustrating the principle of the present invention. The figure is a plan view of a split word line type SRAM cell.

In the figure, Q ₁ and Q ₂ are driver transistors, Q ₃ and Q ₄ are transfer transistors, WL is a word line and the gates of the transfer transistors Q ₃ and Q ₄ ,
D and D 'are the cell sizes in the vertical direction in the figure, W and W' are the channel width of the driver transistor, and the hatched area surrounded by the isolation oxide film 2 is the active region.

In the SRAM cell, the driving capability of the driver transistor needs to be set several times (cell ratio) of the transfer transistor. Therefore, the driver transistor requires a wide channel width, and the transfer transistor requires a long channel length.

Here, by forming the gate oxide film of the driver transistor thinner than that of the transfer transistor, the channel width W of the driver transistor can be reduced to some extent.

In this case, in the conventional cell, the reduction ΔD in the vertical direction is ΔW as shown in FIG. 4, but by adopting the split word line type cell, as is apparent from FIG. Is reduced by 2 × ΔW, which is twice as large as that of the conventional cell shown in FIG.

This is because the two driver transistors are arranged vertically in the layout, and the reduction in channel width is effective for two transistors. As a result, in the present invention, the cell size can be greatly reduced by using both the split word line type cell and the method of forming two types of gate oxide films.

[0018]

3 (A) to 3 (E) are explanatory diagrams of one embodiment of the present invention. FIG. 3A is a plan view similar to FIG.
3 (B) to 3 (E) are AA sectional views showing a process flow.

If the gate oxide film thickness of the driver transistor is 130 mm and the gate oxide film thickness of the transfer transistor is 200 mm, the channel width of the driver transistor can be reduced to 65% while maintaining the same cell ratio as in FIG. Can be.

The description is given below. The drain current I _d of the transistor is expressed by the following equation. I _d = Wμ _eff ε (V _g −V _th ) ² / 2Ld, where W: channel width L: channel length μ _eff : effective mobility of carrier ε: dielectric constant of oxide film V _g : gate voltage V _th : Threshold voltage In the above equation, the cell ratio is set to 3, the transfer transistor I _{d is set} to I _dT , and the driver transistor I _{d is set} to I _dT.
Assuming that _d is I _dD , I _dT = 1 → 0.65 (due to the gate oxide film being 130 ° → 200 °), I _dD = 3 → 1.95, and the gate width W of the driver transistor can be reduced to 0.65 times.

Therefore, the length of the cell in the vertical direction is W × (1
-0.65) x2. For example, when W = 0.7 μm, the vertical length of the cell can be reduced by 0.49 μm.

Next, a process for forming gate oxide films having two different thicknesses will be described. In FIG. 3B, an isolation oxide film 2 is formed on a silicon (Si) substrate 1 by a LOCOS method, and a first-layer gate oxide film 3 having a thickness of 140 ° is formed in an active region by thermal oxidation.

In the LOCOS method, the thickness is determined by oxidizing hydrochloric acid at 950 ° C.
This is performed using a silicon nitride (Si ₃ N ₄ ) film having a thickness of 1150 mm formed on a thermal oxide film of 100 mm as an oxidation-resistant mask. Oxidation for forming the first-layer gate oxide film 3 is performed by using nitrogen (N
₂ ) By partial pressure oxidation.

In FIG. 3C, a resist film 4 (FIG.
(Also described in (A)). In FIG. 3D, the first-layer gate oxide film 3 is etched away with 1/10 buffered hydrofluoric acid using the resist film 4 as a mask.

In FIG. 3E, when the resist film 4 is removed and a second-layer gate oxide film 5 having a thickness of 110 ° is formed in the active region by thermal oxidation, the gate oxide film of the transfer transistor becomes the first-layer gate oxide film. The film 3 and the second layer gate oxide film 5 are two layers, and the gate oxide film of the driver transistor is only the second layer gate oxide film 5.

Oxidation for forming the second-layer gate oxide film 3 is performed by nitrogen partial pressure oxidation at 1050.degree. Next, an embodiment for a peripheral circuit will be described.

The thickness of the gate oxide film of the input / output transistor of the peripheral circuit is made the same as the thickness of the gate oxide film of the transfer transistor of the cell to form an input / output circuit having a strong resistance to static electricity. If the film thickness is the same as the gate oxide film of the driver transistor of the cell, the circuit speed can be secured.

[0028]

The present invention employs a split word line type cell.
The cell size of the SRAM cell could be reduced. Also,
The performance of the peripheral circuits was also improved.

As a result, it was possible to contribute to the improvement of the performance and the high integration of the SRAM.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is an equivalent circuit diagram of an SRAM cell.

FIG. 3 is an explanatory view of one embodiment of the present invention.

FIG. 4 is a plan view of a conventional example.

[Explanation of symbols]

Q ₁ , Q ₂ Driver transistor Q ₃ , Q ₄ Transfer transistor WL Gate of transfer transistors Q ₃ , Q ₄ in word line D, D 'Vertical cell size W, W' Channel width of driver transistor 1 Silicon (Si) Substrate 2 Isolation oxide film 3 First layer gate oxide film 4 Resist film 5 Second layer gate oxide film

Claims (3)

(57) [Claims] 1. A split word line type SRAM (static random access memory) cell having two word lines, and two driver transistors in the cell have a gate width direction of each of the two word lines. And the active region forming each source, gate and drain is formed so as to be juxtaposed with the word line without intersecting in the cell,
A semiconductor device, wherein the gate insulating films of two transfer transistors in the cell are thicker than the gate insulating films of the driver transistors. 2. The SRAM cell further comprising a peripheral circuit, wherein a gate insulating film of a transistor of an input / output circuit in the peripheral circuit has the same thickness as a gate insulating film of a transfer transistor in the cell. 2. The semiconductor device according to claim 1, wherein a thickness of a gate insulating film of a transistor different from an input / output circuit in the peripheral circuit is the same as a thickness of a gate insulating film of a driver transistor in the cell. 3. A step of defining an active region on a semiconductor substrate including an SRAM cell and a peripheral circuit region so as to have at least two active regions in the SRAM cell, and forming a first oxide film on the active region. Forming a resist film on a transfer transistor in an SRAM cell and an input / output circuit transistor forming region in a peripheral circuit region; and etching away the first oxide film using the resist film as an etching mask. Removing the resist film to form a second oxide film on the active region, and forming the second oxide film on the transfer transistor in the SRAM cell region and the input / output circuit transistor formation region in the peripheral circuit region. Then, the thick SRAM
Forming a gate oxide film so as to be thin on a transistor forming region other than the driver transistor in the cell region and the input / output circuit in the peripheral circuit region; and forming a conductive film on the semiconductor substrate including the gate oxide film. Forming the conductive film and patterning the conductive film to form an input / output circuit transistor and a gate electrode of a transistor other than the input / output circuit in the peripheral circuit region, and two transfer transistors and two driver transistors in the SRAM cell. Forming a split word line in the SRAM cell region, wherein the gate electrodes of the two transfer transistors extend on two active regions in the SRAM cell region, respectively. And the two active regions do not cross each other in the cell. And the gate electrodes of the two driver transistors in the cell are formed such that the gate width direction is perpendicular to the word line direction. Manufacturing method of a semiconductor device.