JP2778126B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a semiconductor integrated device in which a bipolar transistor including a Schottky barrier diode and a C-MOS field effect transistor are formed simultaneously. The present invention relates to a circuit manufacturing method.

[Conventional technology]

Conventionally, in a Schottky barrier diode (SBD) using silicide, since the silicide is formed only in the contact opening, the electric field strength around the silicide becomes extremely high, and the reverse current in this part becomes dominant. Worsens the reverse characteristics. In order to prevent this, there is a method of forming a region of the opposite conductivity type to the diffusion layer around the opening to reduce the electric field intensity. This is a so-called SBD structure with a guard ring, and has a structure shown in FIG.
FIG. 2A is a plan view, and FIG. 2B is a sectional view thereof. For example, N-type epitaxial silicon layer (2,4)
A silicon oxide film (2, 8) is formed thereon, a predetermined portion is selectively opened, and the exposed surface of the N-type epitaxial silicon layer (2, 4) is silicided with a metal such as platinum, for example. (2,19) is formed. A P-type ⁺ guard ring diffusion layer (2,14) must be added to the boundary between the silicide layer (2,19) and the silicon oxide film (2,8) in advance so as not to concentrate the reverse current at the boundary. It is formed in an annular shape.

Further, a barrier metal layer (2, 20) made of a high melting point metal is formed so as to cover the silicide layer (2, 19), and electrodes (2, 22) are formed with a wiring material such as aluminum.

[Problems to be solved by the invention]

In the above-described conventional SBD, when patterning a contact opening, it is necessary to perform alignment so as to have a P ⁺ type guard ring diffusion layer around the opening, and to increase the margin of the alignment, A wide width in the lateral direction of the P ⁺ type guard ring diffusion layer must be ensured. Therefore, there is a disadvantage that the area of the SBD becomes large due to the formation of the P ⁺ -type guard ring diffusion layer, and that high integration is difficult.

[Means for solving the problem]

The present invention relates to MOS field effect transistors and Schottky transistors.
In a method of manufacturing a semiconductor device having both a barrier diode, a step of opening a silicon oxide film on a main surface of one conductive type epitaxial layer in a Schottky barrier diode region; Forming a region, forming a sidewall on the side wall of the opening, and performing anisotropic etching using the sidewall and the silicon oxide film as a mask to form the impurity of the opposite conductivity type immediately below the opening. The method includes a step of removing the region and a step of forming a Schottky barrier diode by silicidizing the side and bottom surfaces of the groove that can be removed.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

1 (a) to 1 (f) are cross-sectional views of a semiconductor chip arranged in the order of steps for explaining one embodiment of the present invention.
For comparison with the manufacturing process of other devices, an N-channel MOS transistor is shown on the left, an SBD is shown in the center, and a bipolar transistor is shown on the right.

First, as shown in FIG. 1A, for example, an N ⁺ -type buried layer (1,2) and a P ⁺ -type buried layer (1,3) are formed in a P-type semiconductor substrate (1,1).
Are selectively formed. Furthermore, an N-type epitaxial silicon layer (1,4) is formed on a P-type semiconductor substrate (1,1), and electrical insulation is provided between each element by an insulating oxide film (1,5) and a P-type insulating region (1,6). Insulation. Further, a thin gate oxide film (1,7) of 100-1000Å is formed on the surface of the N-type epitaxial silicon layer (1,4) of the N-channel and P-channel MOS transistors, and a silicon film of 500-3000Å is formed on the SBD and bipolar transistor portions. An oxide film (1,8) is formed. Further, a P-type well region (1, 9) is formed in the N-channel MOS transistor portion by ion implantation via a gate oxide film (1, 7), and an N-type well region is formed in the P-channel MOS transistor portion. To form Further, a P-type base region (1, 10) is formed in the bipolar transistor portion.
To form

Next, as shown in FIG. 1B, a hole is formed in the silicon oxide film (1, 8) of the bipolar transistor portion, and polysilicon is deposited on the entire surface. Further, the polysilicon is patterned and etched to form a gate polysilicon layer (1,11) in the N-channel and P-channel transistor portions and an emitter polysilicon layer (1,11) in the bipolar transistor portion.
Form 12). Gate polysilicon layer (1,11)
The N-type lightly doped source / drain diffusion layers (1, 13) are self-aligned to an N-channel MOS transistor, and the P-type lightly doped source / drain diffusion layers are P-channel MOs.
Formed on S transistors.

Further, as shown in FIG. 1 (c), the silicon oxide film (1, 8) in the portion where the SBD is formed is patterned and etched to form the SBD opening A. Next, a P-type conductive impurity such as boron is formed from the SBD opening A by an ion implantation method or the like.
Heat treatment is performed in an N ₂ gas atmosphere to obtain a P ⁺ type guard ring diffusion layer (1,14). Further, a silicon oxide layer (1,15) of 500 to 2000Å is deposited on the entire surface by a CVD method or the like.

Next, as shown in FIG. 1 (d), the silicon oxide layer (1, 15) is etched back by anisotropic etching, and the side wall of the gate polysilicon layer (1, 10) and the SBD opening A are formed. The sidewall oxide film (1, 16) is left only on the sidewalls of. Further LD
D (Lightly doped drain-source)
Doped Drain-Source) structure to form N ⁺ -type high-concentration source / drain diffusion layers (1,17) in N-channel MOS transistors and P ⁺ -type high-concentration source / drain diffusion layers in P-channel MOS transistors I do. Further, an N-type conductive impurity such as phosphorus or arsenic is formed in the P-type base region (1, 10) by ion implantation through the emitter polysilicon layer (1, 12) of the bipolar transistor to form an N ⁺ -type emitter region. (1,18) is obtained. At this time, the N ⁺ -type high-concentration source / drain diffusion layers (1,17) and the N ⁺ -type emitter regions (1,18) may be formed simultaneously.

Next, as shown in FIG. 1 (e), the SBD opening A is anisotropically silicon-etched using only the SBD portion with the silicon oxide film (1,8) and the side wall oxide film (1,16) as a mask. The processing is performed to form a groove B deeper than the P ⁺ type guard ring diffusion layer (1, 14). Further, the bottom and side surfaces of the groove B are silicidized with a metal such as platinum to form a silicide layer (1,19). Furthermore, so as to cover the silicide layer (1,19),
For example, a barrier metal layer (1, 2
0) is formed.

Next, an insulating film (1,21) is deposited on the entire surface, and electrodes (1,22) are formed from various parts using a wiring material such as aluminum.

According to the above-described method for manufacturing an SBD, the P ⁺ -type guard ring diffusion layer extends only from the opening of the SBD by the amount of diffusion and is formed on the outer periphery of 0.2 to 0.5 μm with respect to the opening. In the conventional SBD, the P ⁺ -type guard ring diffusion layer is formed 1-2 μm outside of the SBD opening in order to provide a margin for alignment between the P ⁺ -type guard ring diffusion layer and the SBD opening. I had to.

Therefore, according to the present invention, by forming the guard ring diffusion layer of the SBD with self-alignment, the area of the SBD is reduced, and a highly integrated semiconductor device can be provided.

〔The invention's effect〕

As described above, according to the present invention, by forming the guard ring diffusion layer of the SBD with self-alignment,
No misalignment and highly integrated Schottky
There is an effect that a semiconductor device having a barrier diode can be manufactured.

[Brief description of the drawings]

1 (a) to 1 (e) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention, and FIGS. 2 (a) and 2 (b) illustrate a conventional example. And a cross-sectional view of a semiconductor chip for use. (1,1) ...... P-type semiconductor substrate, (1, 13) ...... N-type low concentration source and drain diffusion layers, (1,2) ...... N ⁺ -type buried layer,
(1,14,), (2,14)… P ⁺ guard ring diffusion layer,
(1,3) P ⁺ type buried layer, (1,15) silicon oxide layer, (1,4), (2,4) N-type epitaxial silicon layer, (1,16) ... sidewall oxide film, (1,5) ... insulating oxide film, (1,17) ... N ⁺ type high concentration source / drain diffusion layer,
(1,6) P-type insulating region, (1,18) N ⁺ -type emitter region, (1,7) Gate oxide film, (1,19), (2,19)
... silicide layer, (1,8), (2,8) ... silicon oxide film, (1,20), (2,20) ... barrier metal layer, (1,9)
…… P-type well region, (1,21) …… Insulating film, (1,10)…
... P-type base region, (1,22), (2,22) ...
11) Gate polysilicon layer, (1, 12) Emitter polysilicon layer, A: SBD opening, B: Groove.

Claims (1)

(57) [Claims] In a method of manufacturing a semiconductor device having both a MOS field-effect transistor and a Schottky barrier diode, a silicon oxide film having a first conductive type epitaxial layer main surface of a Schottky barrier diode region is opened. Performing a step of forming an impurity region of the opposite conductivity type from the opening, a step of forming a sidewall on the side wall of the opening, and performing anisotropic etching using the sidewall and the silicon oxide film as a mask. And removing the opposite conductivity type impurity region immediately below the opening portion, and forming a Schottky barrier diode by silicidizing the side and bottom surfaces of the removed groove. Semiconductor device manufacturing method.