JP2705400B2 - Semiconductor fine wire forming method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a semiconductor wire, particularly a quantum wire.

[0002]

2. Description of the Related Art Quantum wires are expected to have a luminous efficiency exceeding a quantum well and mobility, and are being actively researched and developed. The formation of quantum wires is particularly difficult, and the formation method is an important research theme.

[0003] One example is Iimura et al., Japanese Journal of Applied Physics (Jpn. J. Appl. Phys.) Vol. 28, L10.
It is described on pages 83-1085. In this paper, Iimura et al. Formed a thin line having a width of about 1000 °.

[0004]

In the above-mentioned paper,
Have formed a grating on the cleavage surface of a multilayer structure of GaAs / AlAs by thermal etching, and then formed quantum wires of GaAs only in the recesses by selective growth. In this method, the crystal plane (00
Since the cleavage plane (110) perpendicular to 1) is used, there is a feature that an accurate perpendicular cross section can be obtained.

[0005] However, cleavage has the disadvantage that the subsequent processing such as photolithography is difficult because the crystal is cut. In addition, since the work of arranging the cleavage planes at once must be manually performed in the atmosphere, there is a disadvantage that mass production is difficult and a clean surface is difficult to obtain.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of forming a semiconductor fine wire in which subsequent photolithography is easy, mass production is easy, and a clean surface is easily obtained.

[0007]

In order to achieve the above object, a method for forming a semiconductor thin wire according to the present invention comprises the steps of alternately laminating two types of semiconductor layers having different compositions to form a multilayer structure. Using an etching beam on the surface of the structure, performing dry etching from a direction inclined at an angle of inclination θ ° (θ> 0) from a vertical direction to expose a cross section of the multilayer structure; On the other hand, a step of forming a grating corresponding to the semiconductor layer on a cross section of the exposed multilayer structure using a selective etching method having a different etching rate, and a step of crystal-growing a semiconductor thin wire on the cross section of the multilayer structure having the grating. And

[0008]

According to the semiconductor thin wire method of Iimura et al.
Irregularities are formed by thermal etching on the cleavage surface of the multilayer structure composed of GaAs / AlAs. On the contrary,
The present invention is characterized in that the cross section of the multilayer structure is exposed by using oblique etching by dry etching. Thus, a large number of cross sections can be obtained without cleaving the wafer.

Further, since the wafer is not cracked, a subsequent process by photolithography or the like is easy.
In addition, by using a composite device in which a dry etching chamber and a growth device are connected to each other, it becomes possible to perform crystal growth without exposing the cross-section of the multilayer structure by dry etching to the atmosphere, so that a clean surface can be maintained. The crystal growth of the next semiconductor wire can be performed as it is.

[0010]

Next, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 schematically shows the steps of one embodiment of the present invention.

In the figure, 1 is a GaAs substrate, 2 is AlGaAs
s / GaAs multilayer structure (GaAs thickness d1 ≤1000 °,
AlGaAs thickness d 2 ≦ 1000 °, Al composition = 0.1 to
1) and 3 are selection masks (for example, SiO ₂ film, thickness = 10)
4 is an etching beam (for example, C
l ₂ + Ar ⁺ gas beam), 5 is AlGaAs (thickness ≧
30 °, Al composition ≧ 0.1, 6 is GaAs (thickness ≦ 2)
00}) and 7 are AlGaAs (Al composition ≧ 0.1).

In the process of this embodiment, first, FIG.
(A) As shown in FIG.
/ The crystal growth of the GaAs multilayer structure 2 is performed. The growth method may be any method suitable for growing an ultrathin film, such as a molecular beam epitaxy method (MBE method), a metal organic chemical vapor deposition method (MOCVD method), and a vapor phase MBE method (CBE method). A growth method may be used.

Next, as shown in FIG. 1B, the selection mask 8 is patterned by using a conventional photolithography technique or an electron beam exposure technique.

Next, the etching of the AlGaAs / AlGaAs / AlGaAs / AlGaAs substrate is performed using
The GaAs multilayer structure 2 is obliquely etched. On the slope 8 formed at this time, a cross section of the periodic structure of AlGaAs / GaAs is exposed. The period of the periodic structure on the slope 8 is expressed as follows by using the GaAs thickness d1, the AlGaAs thickness d2, and the inclination angle θ.

Period = (1 / cos θ) (d 1 + d 2) (1)

In the above equation, when θ is changed from 15 ° to 75 °, the period is from 1.03 times d1 + d2 to 3.
It can be changed up to 86 times. It is also an advantage of the forming method of the present invention that the inclination angle θ is changed from an arbitrary period by changing the inclination angle θ. Also, d1 and d2 are accurately controlled by a crystal growth method having excellent film thickness controllability,
In addition, there is an advantage that the cycle can be accurately controlled by accurately controlling θ by using dry etching having high beam directivity.

As a dry etching method, a Cl ₂ -based reactive ion beam etching method (RIBE method),
By using an ion beam assisted etching method (IBAE method) using an ion beam of r and Cl ₂ gas etching, a slope 8 with good flatness can be obtained.

Next, as shown in FIG. 1C, irregularities corresponding to the difference in composition between GaAs and AlGaAs are formed using selective etching.

As this selective etching method, Iimu
Ra and others perform thermal etching to selectively remove only GaAs by raising the temperature to about 800 ° C. while irradiating an As beam in the MBE chamber.

In the present invention, the present invention is not limited to this. For example, selective etching by chlorine-based or fluorine-based gas etching may be used. However, in this case, AlGaAs is selectively etched.

Since selective etching by gas etching can be performed at a lower temperature than thermal etching,
As / GaAs interdiffusion hardly occurs, and the grating 9 having a sharp profile can be formed.

Next, the MBE method, MOCVD method, CB
As shown in FIG. 1D, the AlGaAs
A quantum well structure of / GaAs / AlGaAs is formed.
At this time, the thickness of the GaAs 6 changes periodically reflecting the grating 9 formed on the slope 8 or grows in some cases, so that a thin semiconductor wire is formed.

Even when the GaAs 6 is grown without interruption, the GaAs 6 grows thickly on the concave portion, and the wave function of the electrons is confined in this portion. Also, as performed by Iimura et al., GaAs was formed only in the concave portions using the CBE method.
Can be formed to form a semiconductor thin line structure.

When performing the steps of this embodiment, for example, M
If a combined apparatus in which the BE apparatus and the dry etching apparatus are connected by a vacuum is used, it is possible to perform the growth up to the final growth (FIG. 1D) without exposing the etched slope 8 to the atmosphere. In this case, a semiconductor wire having a clean interface can be obtained, so that a high-quality quantum wire can be realized.

In the above embodiment, if the CF ₄ gas is used in the dry etching chamber after the step of FIG. 1C, the selective mask 3 made of SiO ₂ can be removed. This avoids polycrystal growth on the selection mask 3 during crystal growth in FIG.

[0026]

As described above, according to the present invention, photolithography after the formation of a semiconductor thin line is easy, and the semiconductor thin line which can be mass-produced and which can easily obtain a clean surface can be realized.

[Brief description of the drawings]

1 (a) to 1 (d) are views showing steps of one embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 GaAs substrate 2 AlGaAs / GaAs multilayer structure 3 Selection mask 4 Etching beam 5 AlGaAs 6 GaAs 7 AlGaAs 8 Slope 9 Grating

Claims (1)

(57) [Claims] 1. A step of alternately laminating two types of semiconductor layers having different compositions to form a multilayer structure, and using an etching beam on the surface of the multilayer structure to tilt from a vertical direction at an angle θ ° (θ> 0). A) a step of performing dry etching from a direction inclined at an angle to expose the cross section of the multilayer structure; and forming a grating corresponding to the semiconductor layer on both the semiconductor layers by using a selective etching method having different etching rates. A method for forming a semiconductor thin line, comprising: forming a cross section of an exposed multilayer structure; and crystal growing a semiconductor thin line on the cross section of the multilayer structure having the grating.