JP2633405B2 - Liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device used for a color television, OA equipment and the like.

[0002]

2. Description of the Related Art FIG. 8 shows a configuration of an active matrix substrate using a thin film transistor (TFT) as a switching element in a liquid crystal display device of a simultaneous scanning method with two scanning signal lines. In this TFT active matrix substrate, a large number of scanning signal lines 13 and data signal lines 14 are formed on a substrate 11 so as to be orthogonal to each other.
5, the pixel electrodes 12 are connected in a matrix. In addition, a common counter electrode (not shown) is arranged on the opposite surface of the TFT active matrix substrate via a liquid crystal layer. With this configuration, when a selection signal is applied to each scanning signal line 13, the conducting TFT 1
5, the pixel electrode 1 connected to the scanning signal line 13
2, the data signal of each data signal line 14 is sent. Then, the application of the selection signal is completed and the TFT 15
Even after the power supply is cut off, the potential of the data signal is held in each pixel electrode 12 by the capacity of the liquid crystal layer or the like, and this potential is updated every time the selection signal is applied. Therefore, even in a matrix system in which selection signals are sequentially applied to the scanning signal lines, each pixel electrode 12 can always hold the potential of the data signal and apply it to the liquid crystal layer.

[0003] The dual simultaneous scanning method is such that in such a liquid crystal display device, a selection signal is applied to two adjacent scanning signal lines 13 at the same time. That is, FIG.
As shown in the figure, in the scanning of the odd field, first, the selection signal is applied to the first and second scanning signal lines 13 at the same time, and then the third and fourth scanning signal lines 13 are delayed by one horizontal scanning period. Applying a selection signal at the same time,
A selection signal is sequentially applied to the odd-numbered scanning signal lines 13 and the even-numbered scanning signal lines 13 located next to the odd-numbered scanning signal lines 13 simultaneously. In the scanning of the even-numbered field, first, a selection signal is applied to the first scanning signal line 13, and then a selection signal is simultaneously applied to the second and third scanning signal lines 13 with a delay of one horizontal scanning period. A selection signal is simultaneously applied to two adjacent scanning signal lines 13 which are different in combination from the time of scanning the odd field, such as the fifth and fifth scanning signal lines 13. Therefore, compared with the simple scanning method in which the selection signal is applied to each of the scanning signal lines 13 one by one, the double scanning method requires about twice as many scanning signal lines 13 and the pixel electrodes 12, A high-resolution image conforming to the system can be obtained.

[0004]

When a selection signal is applied to the scanning signal line 13, the potential of the pixel electrode 12 connected thereto becomes TF at the end of the application of the selection signal.
Under the influence of the parasitic capacitance C _gd between the gate and the drain at T15, the potential becomes lower than the potential of the data signal. That is, in the case of the simple scanning method, when the gate voltages at the time of conduction and at the time of interruption of the TFT 15 are V _GH and V _GL , respectively, and the capacitance of the liquid crystal layer at the pixel electrode 12 is C _LC , the following equation 1 is obtained. The potential is lower than the potential of the data signal by the potential △ V.

[0005]

(Equation 1)

However, in the case of the simple scanning method, such a decrease in potential is common to all the pixel electrodes 12.
For this reason, the counter voltage applied to the counter electrode is reduced
With only a shift, it is easy to maintain the DC balance of the voltage applied to the liquid crystal layer by AC driving to zero.

However, in the case of the dual scanning method, in addition to the parasitic capacitance C _gd , the stray capacitance C between the pixel electrode and an adjacent scanning signal line which is not connected to the pixel electrode and is not connected to the pixel electrode.
The effect of _pg must also be considered. That is, as shown in FIG. 10, the scanning signals Sa and S are applied to the scanning signal lines 13a and 13b.
b, the row of the pixel electrodes 12a and 12b is selected, and the pixel electrode 12a located between these scanning signal lines 13a and 13b and connected to the scanning signal line 13a is connected to the pixel electrode 12a. However, since the potential of the adjacent scanning signal line 13b is also changed by the scanning signal Sb, the lowered potential ΔV1 at the end of the application of the selection signal of the scanning signal Sa is expressed by the following equation (2).

[0008]

(Equation 2)

However, since the other pixel electrode 12b is not connected to the pixel electrode 12b and the selection signal has not yet been applied to the adjacent scanning signal line 13c, there is no change in the potential. V2 is expressed by the following equation (3).

[0010]

(Equation 3)

Therefore, the pixel electrode 12a and the pixel electrode 12
b, the difference between ΔV1 and ΔV2 occurs in the reduced potential at the end of the application of the selection signal despite the fact that the same data signal voltage is applied while being connected to the same data signal line 14,
After that, the retained potential of the pixel electrode 12b becomes higher.

Therefore, in the conventional liquid crystal display device, when a selection signal is applied to a plurality of scanning signal lines at the same time, there is a problem that the brightness of adjacent pixels on the same data signal line is different and the image quality is reduced. Had occurred.

In view of the above circumstances, the present invention changes the voltage of the selection signal on the two scanning signal lines so that each pixel electrode can hold the potential under the same condition, thereby simultaneously providing a plurality of scanning signals. It is an object of the present invention to provide a liquid crystal display device that does not cause unevenness in brightness of pixels even in a driving method in which a selection signal is applied to a line.

[0014]

A liquid crystal display device according to the present invention comprises a liquid crystal panel having a pixel electrode connected to a data signal line via a switching element whose switching is controlled by a scanning signal line. An active matrix type liquid crystal display device provided with a scanning signal line driving circuit for simultaneously applying a selection signal to the scanning signal lines,
The scanning signal line driving circuit sets the voltage of the selection signal applied to one of two adjacent scanning signal lines to which the selection signal is applied simultaneously to the voltage of the selection signal applied to the other scanning signal line. To achieve the above object.

The one scanning signal line is connected to two adjacent scanning signal lines to which a selection signal is simultaneously applied, and a scanning signal line located between two columns of pixel electrodes connected via switching elements. Is preferred.

[0016]

In the above configuration, as shown in FIG. 1, when the scanning signals Sa and Sb are applied simultaneously to the scanning signal lines 13a and 13b, the data is applied to the pixel electrodes 12a and 12b via the conducting TFTs 15a and 15b. The data signal on the signal line 14 is sent. However, regarding the potential of the selection signal at this time, the voltage V _GH 2 of the scanning signal line Sb applied to the scanning signal line 13b located between the pixel electrodes 12a and 12b connected to the scanning signal lines 13a and 13b, and the other _Is higher than the voltage V _GH1 of the scanning signal Sa applied to the scanning signal line 13a. The voltages V _GH1 and V _GH 2 are both voltages that can make the TFT 15 sufficiently conductive.

Next, when the application of the selection signal to the scanning signal lines 13a and 13b is completed, the pixel electrodes 12a and 12b
Is reduced due to coupling by the parasitic capacitance C _gd and the stray capacitance C _pg . However, since the voltages of the selection signals are different from each other, the reduced potential ΔV at the pixel electrodes 12a and 12b is
1 ′ and ΔV2 ′ are values shown by the following equations 4 and 5, respectively.

[0018]

(Equation 4)

[0019]

(Equation 5)

Here, if .DELTA.V1 '=. DELTA.V2', the potentials held by the pixel electrodes 12a and 12b become equal.

[0021]

(Equation 6)

[0022] By sets the V _GH 1 and V _GH 2 to stand, to equalize the potential drop in the pixel electrodes 12a, 12b, can be equal to the potential of the pixel electrodes 12a, 12b are held.

As a result, according to the liquid crystal display device of the present invention, even when a selection signal is applied to two scanning signal lines at the same time, the potential drop at the end of the application of the selection signal is the same. The potentials held by the respective pixel electrodes become equal, and a uniform display image can be obtained.

[0024]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to embodiments.

2 to 7 show one embodiment of the present invention. FIG. 2 is a block diagram of a liquid crystal display device, FIG. 3 is a block diagram of a scanning signal line driving circuit, and FIG. 4 is a scanning signal line. time chart showing the operation of the driving circuit, FIG. 5 is a time chart of the block diagram and the power supply voltage V _H of the circuit for generating a power supply voltage applied to the scanning signal line driver circuit, FIG. 6 at the time of odd field scanning in the liquid crystal display device FIG. 7 is a time chart showing the operation, and FIG. 7 is a time chart showing the operation at the time of scanning the even field in the liquid crystal display device. Components having the same functions as those of the conventional example shown in FIGS. 8 to 10 are denoted by the same reference numerals.

The TF of the liquid crystal panel 1 in the liquid crystal display device
As shown in FIG. 8, the T active matrix substrate has a large number of pixel electrodes 12a, 12b,..., Scanning signal lines 13a, 13b,.
TFTs 15a, 15b,... Are formed. Each of the pixel electrodes 12a, 12b,... Is connected to an adjacent data signal line 14 via the source-drain terminals of the TFTs 15a, 15b,. The gate terminals of the TFTs 15a, 15b,... Are connected to the adjacent scanning signal lines 13a, 13b,.
When a scanning signal of a high level voltage is applied to these scanning signal lines 13a, 13b,... As a selection signal, conduction is established between the source and drain terminals of the TFT connected to the scanning signal line. .

As shown in FIG. 2, the TFT active matrix substrate of the liquid crystal panel 1 has the scanning signal lines 13a, 1
3b,... Are drawn out by alternately arranging every other even-numbered line and odd-numbered line. The odd-numbered scanning signal lines 13a, 13c,... Are connected to the scanning-signal-line driving circuit 2, and the even-numbered scanning signal lines 13b, 13d,.

As shown in FIG. 3, the scanning signal line driving circuits 2 and 3 sequentially shift the start signal according to the clock signal, and the shift register circuits 2a and 3a output the shift register circuits 2a and 3a to drive the TFT 15. A level shifter circuit 2b, 3b for raising the level to a required level, and output buffers 2c, 3c for holding outputs of the level shifter circuits 2b, 3b and outputting the signals to the respective scanning signal lines 13 are provided. As shown in FIG. 2, a start signal and a clock signal having a period of a horizontal scanning period are input from the timing control circuit 4 to the shift register circuits 2a and 3a.

The timing control circuit 4 outputs a start signal and a clock signal based on a synchronization signal separated from a video signal. The start signal is output to the scanning signal line driving circuits 2 and 3 at the same time during the scanning of the odd field in synchronization with the vertical synchronizing signal, and the start signal to the scanning signal line driving circuit 3 at the time of the scanning of the even field. The output is delayed by one horizontal scanning signal period from the driving circuit 2.

Therefore, as shown in FIG. 4, a selection signal obtained by sequentially shifting the start signal is supplied to each of the scanning signal lines 13a, 13b,... Connected to the scanning signal line driving circuits 2, 3 for one horizontal scanning period. Will be output with a delay. In this case, the application of each selection signal is started in synchronization with the fall of the previous clock signal, and the application ends in synchronization with the rise of the subsequent clock signal. Further, the voltages of the selection signals output from the scanning signal line driving circuits 2 and 3 to the respective scanning signal lines 13 are the power supply voltages V _H and V _L applied to the level shifter circuits 2 b and 3 b and the output buffers 2 c and 3 c.
Accordingly, when selecting the V _H, when not selected is determined to be the V _L.

As for the power supply voltage V _H applied to the scanning signal line driving circuits 2 and 3, the scanning signal driving circuit power supply circuit 5 as shown in FIG. the voltage V _GH 1, the scanning signal line drive circuit 3 is applied a high voltage V _GH 2 than V _GH 1, V _GH back to the scanning signal line driving circuit 2 as in the odd field in the even field 2 and V _GH 1 are applied to the scanning signal line driving circuit 3. These voltages V _GH 1,
V _GH 2 is the gate-drain parasitic capacitance C _gd and stray capacitance C _pg of the TFT 15 and the scanning signal line driving circuit 2,
3 is set to a value that satisfies the relationship shown in Equation 6 above between the value _VGL of the power supply voltage V _L applied to 3 (that is, the voltage of the scanning signal lines 13a, 13b,... At the time of non-selection).

The operation of the liquid crystal display device having the above configuration will be described with reference to FIGS.

When the scanning of the odd-numbered field is performed by the interlace method, the start signal is simultaneously output from the timing control circuit 4 to the scanning signal line driving circuits 2 and 3, so that the first and second scanning signal lines are first. 13a,
A selection signal is simultaneously applied to the scanning signal line 13b, and thereafter, similarly, two scanning signal lines 13c, an odd-numbered scanning line and an even-numbered scanning line,
The selection signal is sequentially applied to 13d. Also,
When the scanning of the even field is performed, the start signal is output from the timing control circuit 4 to the scanning signal line driving circuit 2 first, and the start signal is output to the scanning signal line driving circuit 3 with a delay of one horizontal scanning period. Is done. For this reason, when the selection signal is applied to the first scanning signal line 13a, the selection signal is applied to the second and third scanning signal lines 13b and 13c at the same time with a delay of the horizontal scanning period. The selection signal is sequentially applied to the two scanning signal lines 13d and 13e, ie, the second scanning signal line and the odd scanning line. As a result, each pixel of the liquid crystal panel 1 displays odd-numbered scanning lines and odd-numbered scanning lines in odd-numbered fields, and displays even-numbered scanning lines and odd-numbered scanning lines in even-numbered fields. As a result, a high-resolution image can be displayed by the two-line simultaneous scanning method based on the interlace method.

In the odd field, the value of the power supply voltage V _H applied to the scanning signal line drive circuit 3 (V _GH 2)
_Is higher than the value (V _GH 1) of the power supply voltage V _H applied to the scanning signal line driving circuit 2,
The selection signals simultaneously applied to the a, 13b,... are actually higher voltages on the even-numbered scanning signal lines 13b, 13d,. For this reason, the potential held at the pixel electrode 12a and the potential held at the pixel electrode 12b at the end of the application of the selection signal are equal to the reduced potentials △ and ５, respectively.
Although V1 ′ and ΔV2 ′ are lower than the potential of the data signal, the potentials held by the pixel electrodes 12a and 12b are equal because ΔV1 ′ = △ V2 ′ under the condition of Equation 6.

Further, in the even field, the value of the power supply voltage V _H applied to the scanning signal line drive circuit 2 (V _GH 2)
_Is higher than the value (V _GH 1) of the power supply voltage V _H applied to the scanning signal line driving circuit 3,
In practice, the selection signals simultaneously applied to the a, 13b,... have higher voltages on the odd-numbered scanning signal lines 13a, 13c,. Therefore, the potential held at the pixel electrode 12a and the potential held at the pixel electrode 12b at the end of the application of the selection signal are lower than the potential of the data signal by the reduced potentials △ V2 'and △ V1', respectively. , As mentioned above
Since V1 ′ = △ V2 ′, the pixel electrodes 12a, 12b
Holds the same potential.

According to the liquid crystal display device of this embodiment, even when a selection signal is applied to two scanning signal lines at the same time by the dual simultaneous scanning method based on the interlacing method, the application of the selection signal is terminated. The reduced potential of the pixel electrode becomes the same for each scanning line, and the potential held by each pixel electrode becomes equal, so that a uniform display screen can be obtained.

[0037]

As is apparent from the above description, according to the liquid crystal display device of the present invention, even when the selection signals are applied to a plurality of adjacent scanning signal lines at the same time, the application of these selection signals is completed. Can be made the same, the potentials held by the pixel electrodes become equal, and a uniform display image can be obtained.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an active matrix substrate for explaining one embodiment of the present invention.

FIG. 2 is a block diagram showing a main part of the embodiment.

FIG. 3 is a block diagram of a scanning signal line driving circuit in the embodiment.

FIG. 4 is a time chart illustrating an operation of the scanning signal line driving circuit.

5 is a time chart of the block diagram and the voltage V _H of the circuit for generating a power supply voltage applied to the scanning signal line drive circuit.

FIG. 6 is a time chart showing an operation at the time of scanning an odd-numbered field of the embodiment.

FIG. 7 is a time chart showing an operation at the time of scanning an even-numbered field in the embodiment.

FIG. 8 shows a conventional example, and is a partially enlarged plan view of a TFT active matrix substrate.

FIG. 9 is a time chart for explaining the operation of the dual simultaneous scanning method in the conventional example.

FIG. 10 shows a conventional example and is a circuit diagram on an active matrix substrate.

[Explanation of symbols]

 Reference Signs List 1 liquid crystal panel 2 scanning signal line driving circuit 3 scanning signal line driving circuit 4 timing control circuit 5 power supply circuit for scanning signal driving circuit 12 pixel electrode 13 scanning signal line 14 data signal line 15 TFT (switching element)

 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-60-4992 (JP, A) JP-A-4-282610 (JP, A) JP-A-64-26822 (JP, A) JP-A-1- 147434 (JP, A)

Claims (1)

(57) [Claims] 1. A scanning device comprising: a liquid crystal panel having a pixel electrode connected to a data signal line via a switching element whose switching is controlled by a scanning signal line, and applying a selection signal to two adjacent scanning signal lines simultaneously. An active matrix type liquid crystal display device provided with a signal line driving circuit, wherein the scanning signal line driving circuit applies a selection signal to one of two adjacent scanning signal lines to which a selection signal is applied at the same time. A liquid crystal display device having means for setting the voltage of a selection signal higher than the voltage of a selection signal applied to the other scanning signal line.