JP2581433B2 - Method for manufacturing multilayer printed wiring board - Google Patents
Method for manufacturing multilayer printed wiring boardInfo
- Publication number
- JP2581433B2 JP2581433B2 JP33629693A JP33629693A JP2581433B2 JP 2581433 B2 JP2581433 B2 JP 2581433B2 JP 33629693 A JP33629693 A JP 33629693A JP 33629693 A JP33629693 A JP 33629693A JP 2581433 B2 JP2581433 B2 JP 2581433B2
- Authority
- JP
- Japan
- Prior art keywords
- outer layer
- wiring board
- printed wiring
- multilayer printed
- layer material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 17
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000000463 material Substances 0.000 claims description 31
- 238000007747 plating Methods 0.000 claims description 18
- 239000011347 resin Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 239000011521 glass Substances 0.000 claims description 5
- 238000010030 laminating Methods 0.000 claims description 5
- 239000004744 fabric Substances 0.000 claims description 4
- 238000003825 pressing Methods 0.000 claims description 4
- 229920001187 thermosetting polymer Polymers 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 2
- 238000009740 moulding (composite fabrication) Methods 0.000 claims 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 15
- 229910052802 copper Inorganic materials 0.000 description 15
- 239000010949 copper Substances 0.000 description 15
- 238000005553 drilling Methods 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 5
- 238000003475 lamination Methods 0.000 description 4
- 239000000654 additive Substances 0.000 description 2
- 230000000996 additive effect Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000032798 delamination Effects 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 241000981595 Zoysia japonica Species 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、多層印刷配線板の製造
方法に関し、特に表面実装に好適なブラインドバイアホ
ールを有する多層印刷配線板の製造方法に関するもので
ある。The present invention relates to a method for manufacturing a multilayer printed wiring board, and more particularly to a method for manufacturing a multilayer printed wiring board having a blind via hole suitable for surface mounting.
【0002】[0002]
【従来の技術】昨今、多層印刷配線板の更なる高密度化
に伴い、図9に示すような未貫通構造のブラインドバイ
アホール13を有する多層印刷配線板が実用化されてき
た。ブラインドバイアホール13は多層印刷配線板の内
層の配線面を貫通しないので、内層に収容する配線の自
由度が大きく、配線数も増加する。このブラインドバイ
アホールの製造方法としては積層された多層印刷配線板
の表面からドリル穴あけ加工、またはレーザ光の照射に
より多層基板に至る未貫通穴を施した後、めっき処理を
行う方法等が用いられる。また、例えば特開平2−49
494号公報に示されているように、貫通孔を形成した
外層板を用いる方法もある。2. Description of the Related Art Recently, a multilayer printed wiring board having a blind via hole 13 having a non-penetrating structure as shown in FIG. Since the blind via holes 13 do not penetrate the wiring surface of the inner layer of the multilayer printed wiring board, the degree of freedom of wiring accommodated in the inner layer is large, and the number of wirings also increases. As a method of manufacturing this blind via hole, a method of performing a drilling process from the surface of the laminated multilayer printed wiring board, or a method of performing a non-through hole reaching the multilayer substrate by irradiating a laser beam, and then performing a plating process or the like is used. . Further, for example, Japanese Patent Application Laid-Open No. 2-49
As shown in Japanese Patent No. 494, there is a method using an outer layer plate having a through hole formed therein.
【0003】すなわち、まず図6(a)に示すような多
層印刷配線板の外層材となる銅張積層板1の任意の位置
にドリル加工等により貫通孔2を施し、次に、図6
(b)に示す様に外層面と直下の内層面との導通を得る
べく銅めっきを行い、銅めっき層5を形成する(図6
(b))。次に配線パターンの形成そ行うが、この場
合、該外層材の外層面側にはドライフィルムレジスト4
をラミネートし、内層面側には光硬化性樹脂の永久レジ
ストである感光性ソルダーレジスト15をラミネートす
る。ソルダーレジスト15をフォトマスク等により所定
のパターンに露光・現像し、露出した銅めっき層5をエ
ッチングで除去する。更に、外層面のドライフィルムレ
ジスト4を剥離することにより、図6(e)に示す如く
貫通孔2の内層面側に感光性ソルダーレジスト15によ
るふたを施した形の外層材6を得る。このようにして形
成された外層材6と、通常の工法により任意のパターン
を形成した内層材8とを熱硬化性半硬化樹脂含浸ガラス
布7を介して積層し、プレス用金型9の上下間に挟み込
み、積層プレスの熱板10間で加熱加圧成型処理を行う
事により多層印刷配線板11を得る(図7)。その後、
ドリル加工等により多層印刷配線板11の貫通孔16を
施し(図8(a))、最外層間の導通を得るべく銅めっ
きを行い、銅めっき層12を形成する(図8(b))。
更にサブトラクティブ法や、アディティブ法にて外層面
の配線パターン17を形成し、ブラインドバイアホール
13を有する多層印刷配線板を得る(図9)。That is, first, a through hole 2 is formed by drilling or the like at an arbitrary position of a copper-clad laminate 1 as an outer layer material of a multilayer printed wiring board as shown in FIG.
As shown in FIG. 6B, copper plating is performed to obtain electrical continuity between the outer layer surface and the inner layer surface immediately below, thereby forming a copper plating layer 5 (FIG. 6).
(B)). Next, a wiring pattern is formed. In this case, a dry film resist 4 is formed on the outer layer side of the outer layer material.
And a photosensitive solder resist 15, which is a permanent resist of a photocurable resin, is laminated on the inner layer side. The solder resist 15 is exposed and developed into a predetermined pattern using a photomask or the like, and the exposed copper plating layer 5 is removed by etching. Further, by removing the dry film resist 4 on the outer layer surface, an outer layer material 6 in which a lid is formed with a photosensitive solder resist 15 on the inner layer surface side of the through hole 2 as shown in FIG. The outer layer material 6 formed in this manner and the inner layer material 8 having an arbitrary pattern formed by a normal method are laminated via a thermosetting semi-cured resin impregnated glass cloth 7, and the upper and lower portions of a pressing mold 9 are vertically stacked. The multi-layer printed wiring board 11 is obtained by performing a heating and pressing molding process between the hot plates 10 of the laminating press by sandwiching between them (FIG. 7). afterwards,
A through hole 16 of the multilayer printed wiring board 11 is formed by drilling or the like (FIG. 8A), and copper plating is performed to obtain conduction between the outermost layers to form a copper plating layer 12 (FIG. 8B). .
Further, a wiring pattern 17 on the outer layer surface is formed by a subtractive method or an additive method, and a multilayer printed wiring board having blind via holes 13 is obtained (FIG. 9).
【0004】[0004]
【発明が解決しようとする課題】上述のような従来のブ
ラインドバイアホールを有する多層印刷配線板の製造方
法によると、外層材の内層面側の全配線パターン上に感
光性ソルダーレジストを残したまま積層するため、層間
の密着力が低下し、部品実装時の熱ストレス等による層
間剥離が発生する恐れがある。According to the conventional method of manufacturing a multilayer printed wiring board having blind via holes as described above, the photosensitive solder resist is left on the entire wiring pattern on the inner layer side of the outer layer material. Since the layers are stacked, the adhesion between the layers is reduced, and delamination may occur due to thermal stress or the like at the time of component mounting.
【0005】また、外層材に貫通孔を施した後、外層面
とその直下の内層面との導通を得るべく銅めっきを施し
た場合、最外層面の導体厚は多層印刷配線板の貫通孔穿
孔後にも銅めっきが施されることとあわせて銅めっき厚
が厚くなる為、外層配線パターンにおける細線の形成を
行う際の障害となる等の問題があった。Further, when a through hole is formed in the outer layer material and then copper plating is performed to obtain conduction between the outer layer surface and the inner layer surface immediately below the outer layer material, the conductor thickness of the outermost layer surface is limited to the through hole of the multilayer printed wiring board. Since the copper plating becomes thicker together with the copper plating even after the perforation, there is a problem that it becomes an obstacle when forming fine wires in the outer wiring pattern.
【0006】[0006]
【課題を解決するための手段】多層印刷配線板を構成す
る外層材にあらかじめ貫通孔を施す工程と、該外層材の
内層面側に配線パターンを形成する工程と、該外層材の
内層面側にドライフィルムレジストをラミネートする工
程と、外層面側から露光し貫通孔の部分のみ感光させて
現像する工程と、該外層材に熱硬化性半硬化樹脂含浸ガ
ラス布を介して所定の内層材と組み合わせ加熱加圧成型
する工程と、外層材の内層面側の貫通孔部に残しておい
たドライフィルムレジストを除去する工程と、多層印刷
配線板の貫通孔を施す工程と、銅めっきを行う工程と、
外層の配線パターンを形成する工程を有することを特徴
とする多層印刷配線板の製造方法。Means for providing a through hole in an outer layer material constituting a multilayer printed wiring board, a step of forming a wiring pattern on an inner layer side of the outer layer material, and a step of forming a wiring pattern on the inner layer side of the outer layer material A step of laminating a dry film resist, a step of exposing only the through-hole portion by exposing from the outer layer surface side and developing, and a predetermined inner layer material through a thermosetting semi-cured resin impregnated glass cloth to the outer layer material. A step of performing combined heat and pressure molding, a step of removing the dry film resist left in the through hole on the inner layer side of the outer layer material, a step of forming a through hole in the multilayer printed wiring board, and a step of performing copper plating When,
A method for producing a multilayer printed wiring board, comprising a step of forming an outer layer wiring pattern.
【0007】[0007]
【実施例】以下に、本発明の一実施例を図を用いて具体
的に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be specifically described below with reference to the drawings.
【0008】図1〜5は、本発明の一実施例にかかる多
層印刷配線板の製造方法の各々の工程を説明するもので
ある。FIGS. 1 to 5 illustrate steps of a method for manufacturing a multilayer printed wiring board according to an embodiment of the present invention.
【0009】まず、多層印刷配線板の外層材となる板厚
0.1mmの銅張積層板1に、ドリル加工等によりあら
かじめ任意の位置に直径0.15mmの貫通孔2を施す
(図1(a))。次に、該外層材の内層面となる側面に
のみ、サブトラクティブ法等で任意の配線パターン3を
形成する(図1(d))。配線パターン形成後、再度、
内層面側にドライフィルムレジスト18をラミネートす
る。ドライフィルムレジストは例えば旭化成の“MVA
シリーズ”が用いられる。ラミネート時のロール圧力は
通常の1.5〜2倍の5.0〜7.0kg/cm 、速
度も通常より落として0.5〜1.0m/分でラミネー
トする。これにより図2(a)に示すようにドライフィ
ルムレジスト18が貫通孔内に埋め込むようにラミネー
トされ、積層時の圧力に耐えうるだけの密着力を得るこ
とができる。更にラミネート後、散乱光により160m
j/cmで前記外層材の外層面側から露光を行い、貫通
孔2を通して内層面側のドライフィルムレジスト18を
感光させる。この時、散乱光を用いているため、内層側
のドライフィルムは貫通孔2の直径0.15mmよりも
径で0.01mmほど広く露光される。その後、Na2
CO3 1%の水溶液(温度:30℃)で約35秒間現像
を行うことにより、図2(b)に示す様に貫通孔2の内
層面側にドライフィルムレジスト18によるふたを施し
た形の外層材6を得る。このようにして形成された外層
材6と、任意のパターンを形成した厚さ0.15mmの
内層材8を図2(c)に示すような厚さ0.1mmのプ
リプレグ、例えば熱硬化性半硬化樹脂含浸ガラス布7数
枚を介して積層する。さらに図3(a)の如く、プレス
用金型9の上下間に挟み込み、積層プレスの熱板10間
で温度150〜300℃・圧力10〜40kgf/cm
にて加熱加圧成型処理を行う事により多層印刷配線板1
1が得られる。First, a through hole 2 having a diameter of 0.15 mm is formed in an arbitrary position in advance on a copper-clad laminate 1 having a thickness of 0.1 mm as an outer layer material of a multilayer printed wiring board by drilling or the like (FIG. 1 ( a)). Next, an arbitrary wiring pattern 3 is formed only on the side surface serving as the inner layer surface of the outer layer material by a subtractive method or the like (FIG. 1D). After forming the wiring pattern,
A dry film resist 18 is laminated on the inner layer side. As for dry film resist, for example, “MVA” of Asahi Kasei
Series "is used. The roll pressure at the time of lamination is 1.5 to 2 times the normal value of 5.0 to 7.0 kg / cm 2, and the laminating speed is lower than usual and the lamination is performed at 0.5 to 1.0 m / min. 2 (a), the dry film resist 18 is laminated so as to be embedded in the through-hole, and an adhesive force enough to withstand the pressure at the time of lamination can be obtained. 160m
Exposure is performed at j / cm from the outer layer side of the outer layer material to expose the dry film resist 18 on the inner layer side through the through holes 2. At this time, since the scattered light is used, the dry film on the inner layer side is exposed to a diameter of about 0.01 mm wider than the diameter of the through hole 2 of 0.15 mm. Then, Na 2
By developing with an aqueous solution of 1% CO 3 (temperature: 30 ° C.) for about 35 seconds, the inner surface of the through hole 2 is covered with a dry film resist 18 as shown in FIG. An outer layer material 6 is obtained. The outer layer material 6 formed in this way and the 0.15 mm thick inner layer material 8 having an arbitrary pattern formed thereon are combined with a 0.1 mm thick prepreg as shown in FIG. Lamination is performed via several glass sheets impregnated with the cured resin. Furthermore, as shown in FIG. 3 (a), it is sandwiched between the upper and lower sides of a pressing die 9, and a temperature of 150 to 300 ° C. and a pressure of 10 to 40 kgf / cm between hot plates 10 of the laminating press.
To perform multi-layer printed wiring board 1
1 is obtained.
【0010】多層印刷配線板11として一体化形成した
後、ドリル加工等により直径0.3mmの貫通孔16を
施す(図3(b))。更に図4に示すように、プラズマ
処理により外層材の内層面側に施されたドライフィルム
レジスト18を除去し、多層印刷配線板の最外層間、並
びに最外層とその直下の内層との導通を得るべく20μ
m程度の銅めっき層12を形成する(図5(a))。そ
の後、サブトラクティブ法やアディティブ法等により最
外層面の配線パターン17を形成する(図5(b))。After integrally forming the multilayer printed wiring board 11, a through hole 16 having a diameter of 0.3 mm is formed by drilling or the like (FIG. 3B). Further, as shown in FIG. 4, the dry film resist 18 applied to the inner layer side of the outer layer material is removed by plasma treatment, and conduction between the outermost layer of the multilayer printed wiring board, and the outermost layer and the inner layer immediately below the outermost layer. 20μ to get
A copper plating layer 12 of about m is formed (FIG. 5A). Thereafter, a wiring pattern 17 on the outermost layer is formed by a subtractive method, an additive method, or the like (FIG. 5B).
【0011】[0011]
【発明の効果】以上、説明したように、本発明によれ
ば、外層材の内層面側の配線パターンを形成し、再度ド
ライフィルムレジストをラミネートした後、ドライフィ
ルムレジストを任意の貫通孔の部分にのみ形成すること
によって、層間の密着力低下による層間剥離を防ぐこと
ができる。また、この発明は内層側にラミネートしたド
ライフィルムレジストを、外層側から貫通孔を通して露
光する事により、マスクフィルムを用いなくても全ての
貫通孔にふたを形成することができる。As described above, according to the present invention, the wiring pattern on the inner layer side of the outer layer material is formed, the dry film resist is laminated again, and then the dry film resist is arbitrarily applied to the portion of the through hole. By forming only the layer, it is possible to prevent delamination due to a decrease in adhesion between layers. Further, according to the present invention, by exposing the dry film resist laminated on the inner layer side through the through holes from the outer layer side, lids can be formed in all the through holes without using a mask film.
【0012】更に、多層印刷配線板の貫通孔を穿孔した
後に銅めっきを行うことにより同時に外層材の貫通孔内
にも銅めっきが施される為、めっき回数を最小限に留め
ることができる。これにより最外層の銅めっき厚が抑え
られ、細線の配線パターンが形成可能となる。Furthermore, by performing copper plating after drilling the through-holes of the multilayer printed wiring board, copper plating is simultaneously performed in the through-holes of the outer layer material, so that the number of times of plating can be minimized. As a result, the thickness of the outermost copper plating is suppressed, and a thin wiring pattern can be formed.
【図1〜5】本発明の一実施例の製造方法を説明するた
め製造工程順に示した断面図である。FIGS. 1 to 5 are sectional views showing a manufacturing method according to an embodiment of the present invention in the order of manufacturing steps.
【図6〜9】従来の印刷配線板の製造方法を説明するた
め製造工程順に示した断面図である。FIGS. 6 to 9 are cross-sectional views showing a conventional method of manufacturing a printed wiring board, in the order of manufacturing steps.
1 銅張積層板 2 貫通孔 3 配線パターン 4 ドライフィルムレジスト 5 銅めっき層 6 外層材 7 熱硬化性半硬化樹脂含浸ガラス布 8 内層材 9 プレス用金型 10 熱板 11 多層印刷配線板 12 銅めっき層 13 ブラインドバイアホール 14 スルーホール 15 光硬化性ソルダーレジスト 16 貫通孔 17 配線パターン 18 ドライフィルムレジスト DESCRIPTION OF SYMBOLS 1 Copper-clad laminated board 2 Through-hole 3 Wiring pattern 4 Dry film resist 5 Copper plating layer 6 Outer layer material 7 Thermosetting semi-cured resin impregnated glass cloth 8 Inner layer material 9 Die for press 10 Hot plate 11 Multilayer printed wiring board 12 Copper Plating layer 13 Blind via hole 14 Through hole 15 Photocurable solder resist 16 Through hole 17 Wiring pattern 18 Dry film resist
───────────────────────────────────────────────────── フロントページの続き (72)発明者 井上 誠一 東京都港区芝五丁目7番1号 日本電気 株式会社内 (56)参考文献 特開 平2−54994(JP,A) 特開 平1−143293(JP,A) 特開 昭51−45767(JP,A) ──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Seiichi Inoue 5-7-1 Shiba, Minato-ku, Tokyo Within NEC Corporation (56) References JP-A-2-54994 (JP, A) JP-A-1 -143293 (JP, A) JP-A-51-45767 (JP, A)
Claims (2)
かじめ貫通孔を施す工程と、前記外層材の内層面側に配
線パターンを形成する工程と、前記外層材の内層面側に
ドライフィルムレジストをラミネートする工程と、外層
面側から露出し貫通孔の部分のみ感光させて現像する工
程と、該外層材にプリプレグを介して所定の内層材と組
み合わせ加熱加圧成型する工程と、外層材の内層面側の
貫通孔部に残しておいたドライフィルムレジストを除去
する工程と、積層部材に貫通孔を形成する工程と、導電
層めっきを行う工程と、外層の配線パターンを形成する
工程とを有することを特徴とする多層印刷配線板の製造
方法。1. A step of forming through holes in an outer layer material constituting a multilayer printed wiring board in advance, a step of forming a wiring pattern on an inner layer surface side of the outer layer material, and a step of forming a dry film resist on the inner layer surface side of the outer layer material. Laminating, exposing only the portion of the through-hole exposed from the outer layer surface side, developing and exposing, combining the outer layer material with a predetermined inner layer material via a prepreg, heating and pressing, and forming the outer layer material. A step of removing the dry film resist left in the through-hole portion on the inner layer surface side, a step of forming a through-hole in the laminated member, a step of performing conductive layer plating, and a step of forming a wiring pattern of the outer layer A method for manufacturing a multilayer printed wiring board, comprising:
ラス布であることを特徴とする請求項1記載の多層印刷
配線板の製造方法。2. The method for producing a multilayer printed wiring board according to claim 1, wherein the prepreg is a thermosetting semi-cured resin impregnated glass cloth.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP33629693A JP2581433B2 (en) | 1993-12-28 | 1993-12-28 | Method for manufacturing multilayer printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP33629693A JP2581433B2 (en) | 1993-12-28 | 1993-12-28 | Method for manufacturing multilayer printed wiring board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH07202434A JPH07202434A (en) | 1995-08-04 |
JP2581433B2 true JP2581433B2 (en) | 1997-02-12 |
Family
ID=18297643
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP33629693A Expired - Fee Related JP2581433B2 (en) | 1993-12-28 | 1993-12-28 | Method for manufacturing multilayer printed wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2581433B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6273684B2 (en) * | 2013-03-18 | 2018-02-07 | 富士通株式会社 | Electronic device exterior member, electronic device, and manufacturing method of electronic device exterior member |
-
1993
- 1993-12-28 JP JP33629693A patent/JP2581433B2/en not_active Expired - Fee Related
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JPH07202434A (en) | 1995-08-04 |
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