JP2532716B2 - Phase shift judgment device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase shift determination device used in a PLL (phased, lock, loop) circuit or the like.

2. Description of the Related Art Conventionally, a phase shift determination device for determining the degree of phase shift of a PLL integrates the phase shift pulse output of a phase comparator with a resistor and a capacitor so that phase shift determination is not performed with a slight phase shift. , A voltage comparator with a set threshold value.

FIG. 4 shows a conventional PLL synthesizer having a phase shift judging circuit. In FIG. 4, reference numeral 7 is a controller for controlling the PLL, which is a variable frequency divider 2 for dividing the oscillation output of a voltage controlled oscillator (VCO) 1 and a variable frequency divider 4 for dividing the oscillation output of a reference oscillator 3. The data of the frequency division number is set, and it is judged by the phase shift judging device 9 whether or not the PLL is locked. Reference numeral 5 denotes a phase comparator, which detects a phase shift between the outputs of the variable frequency dividers 2 and 4, and a loop filter 6 removes harmonic components to control the oscillation frequency of the VCO 1. Finally,
The loop is controlled so that the phase of each input of the phase comparator 5 becomes the same, and settles in the locked state.

Next, regarding the operation of the phase shift determination device of the conventional example,
A description will be given with reference to FIG. 5 which is a circuit diagram of the phase comparator 5 of FIG. 4 and FIG. 6 which is a time chart of input / output of the phase comparator 5 and the phase shift determining device 9.

In FIG. 6, (a) is an input 51 of the phase comparator 5, (b) is an input 52 of the phase comparator 5, (c) is an output 53 of the phase comparator 5,
(D) is the phase shift output 54 of the phase comparator 5, (e) is the input 94 of the voltage comparator 95, and (f) is the output 96 of the voltage comparator 95.

Fig. 5 shows a general phase comparator, the phase of input 51 (b)
Is advanced to the input 52 (b), the output 53 (c) is H for the time difference and the impedance is high in other sections, and when the phase of the input 52 is advanced to the input 51 The output 53 is L for the shifted time, and the impedance is high at other times. And when the phases of the inputs 51 and 52 are the same, it is in high impedance. When the phases of the inputs 51 and 52 are different and the output 53 is H or L, the phase shift output 54
(D) outputs H. The phase shift judging device 9 integrates the voltage of the phase shift output 54 with the resistor 91 and the capacitor 92, and sets the phase shift degree to a voltage related to [voltage × time]. Compare with 93 and determine the phase shift. Generally, there is a phase shift of VCO1 due to the leak current of the input of VCO1 and the leak of the capacitor used for the loop filter 6, and a phase shift due to disturbances outside the loop such as vibration, and the loop moves to correct this. , The phase shift output 54 always outputs a narrow pulse. The time constant of the resistor 91 and the capacitor 92, the threshold voltage 93, and the hysteresis of the voltage comparator 95, which can correctly determine the phase shift without being confused by such a pulse, are set to the PLL.
It needs to be optimized according to the synthesizer.

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention However, in the above-described conventional phase shift determination device, the phase shift signal obtained from the phase comparison circuit is integrated and is determined by the analog voltage comparison circuit. A resistor, a capacitor, and a voltage comparison circuit were required, and there was a problem in constructing a PLL with a small size and low power consumption.

The present invention is to solve such a conventional problem, and to integrate the configuration of the phase shift determination circuit into a digital circuit by replacing all of the configuration with a digital circuit to configure a PLL with a small size and low power consumption. It is an object of the present invention to provide an excellent phase shift determination device capable of performing the above.

Means for Solving the Problems In order to achieve the above object, the present invention provides a clock, a phase comparison means for converting the phase difference between two input signals into a pulse width, and the output pulse width as the number of clocks. The counting means for converting, the first comparing means for outputting the state 1 when the count value is equal to or more than the threshold value and the state 2 when the count value is less than or equal to the threshold value, and the first comparing means for outputting the state 1 In the addition operation, when the state 2 is the addition / subtraction counting means controlled to be the subtraction operation, and when this count value is equal to or larger than the large threshold value, it is determined that there is a phase shift, and the addition or subtraction counting means is smaller than or equal to the small threshold value. It is configured so as to include a second comparing unit that sometimes determines that there is no phase shift.

Effect According to the present invention, therefore, the phase shift determining device can be digitized, so that integration can be easily performed.

Embodiment FIG. 1 and FIG. 2 show the construction of an embodiment of the present invention.

Further, FIG. 3 is a diagram showing the mutual relation of the waveforms of the respective parts.

In FIG. 2, 8a is a counting / determining means, which is an addition counter.
8a1 and a threshold comparator 8a2. 8b is an addition means, an addition and subtraction counter 8b1, a counting upper limit comparator 8b2,
It is composed of a counting lower limit comparator 8b3. Reference numeral 8c is a comparison means, which is composed of a threshold value H comparator (first comparator) 8c1, a threshold value L comparator (second comparator) 8c2, and an RS latch 8c3.

FIG. 3 is a diagram showing the relationship between the waveforms of the respective parts,
(A) is one input 51 of the phase comparator 5, (b) is the other input 52, (c) is its output 53, and (d) is the phase shift output 5
4, (e) is the output of the reference oscillator 3, and (c) is the addition counter 8
a1 count value, (g) is the count value of the addition / subtraction counter 8b1,
(H) The output 84 of the phase shift determination device 8.

Next, a higher embodiment will be described. In the above embodiment, the addition counter 8a1 is the phase shift output 54 of the phase comparator 5.
Reference oscillator 3 only when (d) is H, which is out of phase
The output signals of the above are counted, and the pulse width of the phase shift output 54 is measured. The count value that is the result of this measurement is compared with the threshold value comparator 8a2.
If is larger than the set threshold value, the addition / subtraction counter 8b1 is switched to the addition state, and if it is smaller than the set threshold value, the addition / subtraction counter 8b1 is switched to the subtraction state. Since the pulse is output from the phase comparator 5 every cycle, the addition counter 8a1 is configured to be initialized before the next pulse width counting.

The adder / subtractor counter 8b1 selects addition or subtraction according to the output of the threshold value comparator 8a2, and counts the output signal of the variable frequency divider 4, which is the delimiter for phase comparison. That is, the count value of the adder / subtractor counter 8b1 increases only when the phase shift is large and is larger than the threshold value set in the threshold value comparator 8a2, and decreases when it is small. The count value of the adder / subtractor counter 8b1 is set by the count upper limit comparator 8b2 so that overflow does not occur.
Also, a counting lower limit comparator 8b3 is provided so that a borrow does not occur, and the count value of the addition / subtraction counter 8b1 is the counting upper limit value set by the counting upper limit comparator 8b2 and the counting set by the counting lower limit comparator 8b3. Increase or decrease within the range of the lower limit.
The threshold H comparator 8c1 sets the RS latch 8c3 at a threshold value or more set and determines whether there is a phase shift. Further, the threshold L comparator 8c2 resets the RS latch 8c3 when the threshold value is equal to or lower than the set threshold value, and determines that there is no phase shift. The threshold value of the threshold value H comparator 8c1 is equal to the threshold value L comparator 8c2.
Set larger than the threshold value of.

As described above, according to the above-described embodiment, the counting unit 8a determines the level of the phase shift that recognizes that the phase shift has occurred, and by adding up the number of the phase shifts that the adder / subtractor 8b recognizes, [voltage x time ] As a count value, the comparing means 8c judges that there is a phase shift when the count value exceeds the larger of the two set threshold values (h), and when it falls below the smaller one. By determining that there is no phase shift, it is possible to make the comparator behave with hysteresis and replace the entire phase shift determination device with a digital circuit.

In the above embodiment, the counting means 8a is the addition counter 8a1.
And the threshold value comparator 8a2, the level of the phase shift to recognize that a phase shift has occurred is set to the point where the state of a specific bit of the addition counter 8a1 changes for the first time. Can be added to the addition / subtraction counter 8b1 as it is, and the threshold comparator 8a2 can be omitted. Similarly, when the counting means 8a is composed of N stages of shift registers, the threshold value comparator 8a2 can be omitted by adding the output of a specific bit of the shift register to the addition / subtraction counter 8b1.

EFFECTS OF THE INVENTION The present invention has the following effects, as is apparent from the above-described embodiments.

(1) Since the phase shift output of the phase comparator is substantially integrated and the comparator with hysteresis makes the judgment, the same judgment as the conventional analog method can be realized digitally, so that it can be integrated in the LSI. , PLL can be configured with small size and low power consumption.

(2) There are many parameters for controlling the phase shift determination material, and it is easy to optimize the conditions for making a correct determination.

(3) P that directly applies FM modulation to the PLL synthesizer
When the disturbance to the LL loop is positively used, the level of the phase shift for recognizing that the phase shift has occurred can be freely set, so that the correct determination can be made.

[Brief description of drawings]

FIG. 1 is a block diagram of a PLL incorporating a phase shift determining device according to an embodiment of the present invention, FIG. 2 is an internal block diagram of the same device of FIG. 1, and FIG. 3 is an operation time chart of FIG. Fig. 4 shows a PLL that incorporates a conventional phase shift detector
FIG. 5 is a circuit diagram of a phase comparator of the device,
FIG. 6 is an operation time chart of FIG. 5 ... Phase comparator, 8 ... Phase shift judging circuit, 8a1 ... Addition counter, 8a2 ... Threshold comparator, 8b1 ... Addition / subtraction counter, 8c1
Threshold H comparator, 8c2 Threshold L comparator.

Claims (2)

(57) [Claims] 1. A clock, phase comparison means for converting a phase difference between two input signals into a pulse width, counting means for converting an output pulse width of the phase comparison means into the number of clocks, and the counting. First comparing means for outputting a state 1 when the count value of the means is equal to or more than a threshold value and outputting state 2 when the count value of the counting means is less than or equal to the threshold value;
When the output of the comparison means is in the state 1, the addition operation is controlled, and when the output of the first comparison means is in the state 2, the subtraction operation is performed, and the addition / subtraction count for counting the input signal of the phase comparison means is performed. And the addition / subtraction counting means is greater than or equal to a large threshold value, it is determined that there is a phase shift, and when the count value of the addition / subtraction counting means is less than or equal to a small threshold value, it is determined that there is no phase deviation. A phase shift judging device comprising a second comparing means. 2. The phase shift determining apparatus according to claim 1, wherein an upper limit and a lower limit are provided for the count value of the addition / subtraction counting means.