JP2024157071A - Plasma processing method and plasma processing system - Google Patents

Abstract

To provide a technology that controls the shape of a recessed section formed by etching.SOLUTION: There is provided a plasma processing method. The method includes the steps of: (a) providing a substrate which has a silicon-containing film and a masking film that is formed on the silicon-containing film, on a substrate support part in a chamber; (b) supplying processing gas into the chamber; and (c) supplying an RF signal to generate plasma of the processing gas in the chamber, while supplying a biasing signal to the substrate support part, and etching the substrate. The RF signal is a pulsed wave which includes, in an alternating manner, first periods having a first power level and second periods having a second power level that is lower than the first power level. During the step of (c), the second power level is reduced relative to the first power level as the etching proceeds.SELECTED DRAWING: Figure 2

Description

Exemplary embodiments of the present disclosure relate to a plasma processing method and a plasma processing system.

Patent document 1 discloses a method for etching a silicon-containing film.

JP 2016-39309 A

This disclosure provides a technique for controlling the shape of recesses formed by etching.

In one exemplary embodiment of the present disclosure, a plasma processing method is provided that includes: (a) providing a substrate having a silicon-containing film and a mask film formed on the silicon-containing film on a substrate support in a chamber; (b) supplying a process gas into the chamber; and (c) supplying an RF signal to generate a plasma of the process gas in the chamber and supplying a bias signal to the substrate support to etch the substrate, the RF signal being a pulse wave that alternates between a first period having a first power level and a second period having a second power level lower than the first power level, and in the step (c), the second power level relative to the first power level is reduced as etching progresses.

According to one exemplary embodiment of the present disclosure, the shape of the recess formed by etching can be controlled.

1 is a schematic diagram of a plasma processing system 1; 4 is a flowchart illustrating an example of the present processing method. 2 is a diagram illustrating an example of a cross-sectional structure of a substrate W provided in a process ST1. FIG. The cross-sectional structure of the substrate W after the processes in steps ST3A to ST3F 11 is a timing chart showing an example of a source RF signal in steps ST3A to ST3F. 11 is a timing chart showing an example of a bias RF signal in steps ST3A to ST3F.

Each embodiment of the present disclosure is described below.

In one exemplary embodiment, a plasma processing method is provided that includes the steps of (a) providing a substrate having a silicon-containing film and a mask film formed on the silicon-containing film on a substrate support in a chamber, (b) supplying a process gas into the chamber, and (c) providing an RF signal to generate a plasma of the process gas in the chamber and providing a bias signal to the substrate support to etch the substrate, the RF signal being a pulse wave that alternates between a first period having a first power level and a second period having a second power level lower than the first power level, and in the step (c), decreasing the second power level relative to the first power level as etching progresses.

In one exemplary embodiment, the bias signal is a pulse wave that includes two alternating periods of different power or voltage levels.

In one exemplary embodiment, the bias signal is a continuous wave.

In one exemplary embodiment, a plasma processing method is provided that includes the steps of (a) providing a substrate having a silicon-containing film and a mask film formed on the silicon-containing film on a substrate support in a chamber, (b) supplying a process gas into the chamber, and (c) supplying an RF signal to generate a plasma of the process gas in the chamber and supplying a bias signal to the substrate support to etch the substrate, the bias signal being a pulse wave that alternates between a third period having a third power or voltage level and a fourth period having a fourth power or voltage level lower than the third power or voltage level, and in the step (c), increasing the fourth power or voltage level relative to the third power or voltage level as etching progresses.

In one exemplary embodiment, the RF signal is a pulsed wave that includes two alternating periods of different power levels.

In one exemplary embodiment, the RF signal is a continuous wave.

In one exemplary embodiment, an RF signal is used as the bias signal.

In one exemplary embodiment, a DC signal is used as the bias signal.

In one exemplary embodiment, a plasma processing method is provided that includes: (a) providing a substrate having a silicon-containing film and a mask film formed on the silicon-containing film on a substrate support in a chamber; (b) supplying a process gas into the chamber; and (c) providing a source RF signal to generate a plasma of the process gas in the chamber and a bias RF signal to the substrate support to etch the substrate, the source RF signal being a pulse wave that alternates between a first period having a first power level and a second period having a second power level lower than the first power level, the bias RF signal being a pulse wave that alternates between a third period having a third power level and a fourth period having a fourth power level lower than the third power level, and the step (c) includes: (c1) decreasing the second power level relative to the first power level as the etching progresses; and (c2) increasing the fourth power level relative to the third power level as the etching progresses.

In one exemplary embodiment, in step (c1), the fourth power level is kept constant relative to the third power level, and in step (c2), the second power level is kept constant relative to the first power level.

In one exemplary embodiment, in step (c), step (c1) is performed, followed by step (c2).

In one exemplary embodiment, step (c2) is performed after the etching time or etching depth exceeds a given time or depth in step (c).

In one exemplary embodiment, in step (c), the pressure in the chamber is reduced as the etching progresses.

In one exemplary embodiment, the process gas includes _{CxFy gas} (x, _y are positive integers) or _{CsHtFu gas} (s, t, u are positive integers).

In one exemplary embodiment, the aspect ratio of the recess formed by step (c) is 100 or greater.

In one exemplary embodiment, the duty ratio of the pulse wave of the source RF signal and/or the duty ratio of the pulse wave of the bias RF signal is greater than or equal to 20% and less than or equal to 80%.

In one exemplary embodiment, the silicon-containing film is a laminate film of a silicon oxide film and a silicon nitride film.

In one exemplary embodiment, the stacked film is included in a 3D-NAND structure.

In one exemplary embodiment, the mask film is an amorphous carbon film.

In one exemplary embodiment, a plasma processing system is provided that includes a chamber, a substrate support configured to support a substrate having a silicon-containing film and a mask film formed on the silicon-containing film in the chamber, a gas supply configured to supply a process gas into the chamber, a power supply that generates a source RF signal and a bias RF signal, the source RF signal being a pulse wave that alternates between a first period having a first power level and a second period having a second power level lower than the first power level, and the bias RF signal being a pulse wave that alternates between a third period having a third power level and a fourth period having a fourth power level lower than the third power level, and a control unit configured to control the supply of the source RF signal from the power supply to generate a plasma of the process gas in the chamber and the supply of the bias RF signal from the power supply to the substrate support to etch the substrate, the control unit performing a control to reduce the second power level relative to the first power level as the etching progresses, and a control to increase the fourth power level relative to the third power level as the etching progresses.

In one exemplary embodiment, the plasma processing apparatus includes a capacitively coupled type.

In one exemplary embodiment, the source RF signal is provided to the substrate support.

Each embodiment of the present disclosure will be described in detail below with reference to the drawings. Note that identical or similar elements in each drawing will be given the same reference numerals, and duplicated explanations will be omitted. Unless otherwise specified, positional relationships such as up, down, left, right, etc. will be described based on the positional relationships shown in the drawings. The dimensional ratios in the drawings do not represent actual ratios, and the actual ratios are not limited to the ratios shown in the drawings.

<Configuration Example of Plasma Processing System>
An example of the configuration of a plasma processing system will be described below: Fig. 1 is a diagram for explaining an example of the configuration of a capacitively coupled plasma processing apparatus.

The plasma processing system includes a capacitively coupled plasma processing device 1 and a control unit 2. The capacitively coupled plasma processing device 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. The plasma processing device 1 also includes a substrate support unit 11 and a gas introduction unit. The gas introduction unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas introduction unit includes a shower head 13. The substrate support unit 11 is disposed in the plasma processing chamber 10. The shower head 13 is disposed above the substrate support unit 11. In one embodiment, the shower head 13 constitutes at least a part of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the shower head 13, the sidewall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space 10s and at least one gas exhaust port for exhausting gas from the plasma processing space. The plasma processing chamber 10 is grounded. The shower head 13 and the substrate support 11 are electrically insulated from the plasma processing chamber 10 housing.

The substrate support 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central region 111a for supporting the substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in a plan view. The substrate W is disposed on the central region 111a of the main body 111, and the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. Therefore, the central region 111a is also called a substrate support surface for supporting the substrate W, and the annular region 111b is also called a ring support surface for supporting the edge ring assembly 112.

In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 may function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Note that other members surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member, may have the annular region 111b. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. Also, an RF or DC electrode may be disposed within the ceramic member 1111a, in which case the RF or DC electrode functions as the lower electrode. When a bias RF signal or DC signal, which will be described later, is connected to the RF or DC electrode, the RF or DC electrode is also called a bias electrode. Note that both the conductive member of the base 1110 and the RF or DC electrode may function as two lower electrodes.

The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

The substrate support 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow passage 1110a, or a combination thereof. A heat transfer fluid such as brine or a gas flows through the flow passage 1110a. In one embodiment, the flow passage 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. The substrate support 11 may also include a heat transfer gas supply configured to supply a heat transfer gas between the back surface of the substrate W and the central region 111a.

The shower head 13 is configured to introduce at least one processing gas from the gas supply unit 20 into the plasma processing space 10s. The shower head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and multiple gas inlets 13c. The processing gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the multiple gas inlets 13c. The shower head 13 also includes an upper electrode. Note that the gas introduction unit may include, in addition to the shower head 13, one or more side gas injectors (SGIs) attached to one or more openings formed in the sidewall 10a.

The gas supply 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply 20 is configured to supply at least one process gas from a respective gas source 21 through a respective flow controller 22 to the showerhead 13. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Additionally, the gas supply 20 may include one or more flow modulation devices to modulate or pulse the flow rate of the at least one process gas.

The power source 30 includes an RF power source 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power source 31 is configured to supply at least one RF signal (RF power), such as a source RF signal and a bias RF signal, to at least one lower electrode and/or at least one upper electrode. This causes a plasma to be formed from at least one processing gas supplied to the plasma processing space 10s. Thus, the RF power source 31 can function as at least a part of a plasma generating unit configured to generate plasma from one or more processing gases in the plasma processing chamber 10. In addition, by supplying a bias RF signal to at least one lower electrode, a bias potential is generated on the substrate W, and ion components in the formed plasma can be attracted to the substrate W.

In one embodiment, the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is coupled to at least one lower electrode and/or at least one upper electrode via at least one impedance matching circuit and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generating unit 31a may be configured to generate multiple source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and/or at least one upper electrode.

The second RF generator 31b is coupled to at least one lower electrode via at least one impedance matching circuit and configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a lower frequency than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generator 31b may be configured to generate multiple bias RF signals having different frequencies. The generated one or more bias RF signals are provided to at least one lower electrode. Also, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

The power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generator 32a and a second DC generator 32b. In one embodiment, the first DC generator 32a is connected to at least one lower electrode and configured to generate a first DC signal. The generated first bias DC signal is applied to the at least one lower electrode. In one embodiment, the second DC generator 32b is connected to at least one upper electrode and configured to generate a second DC signal. The generated second DC signal is applied to the at least one upper electrode.

In various embodiments, at least one of the first and second DC signals may be pulsed. In this case, a sequence of DC-based voltage pulses is applied to at least one lower electrode and/or at least one upper electrode. The voltage pulses may have a rectangular, trapezoidal, triangular, or combination thereof pulse waveform. In one embodiment, a waveform generator for generating a sequence of voltage pulses from the DC signal is connected between the first DC generator 32a and at least one lower electrode. Thus, the first DC generator 32a and the waveform generator constitute a voltage pulse generator. When the second DC generator 32b and the waveform generator constitute a voltage pulse generator, the voltage pulse generator is connected to at least one upper electrode. The voltage pulses may have a positive polarity or a negative polarity. Also, the sequence of voltage pulses may include one or more positive polarity voltage pulses and one or more negative polarity voltage pulses within one period. The first and second DC generating units 32a and 32b may be provided in addition to the RF power source 31, or the first DC generating unit 32a may be provided in place of the second RF generating unit 31b.

The exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is adjusted by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform various steps described in this disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform various steps described herein. In one embodiment, a part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include, for example, a computer 2a. The computer 2a may include, for example, a processing unit (CPU: Central Processing Unit) 2a1, a storage unit 2a2, and a communication interface 2a3. The processing unit 2a1 may be configured to perform various control operations by reading a program from the storage unit 2a2 and executing the read program. This program may be stored in the storage unit 2a2 in advance, or may be acquired via a medium when necessary. The acquired program is stored in the storage unit 2a2 and is read from the storage unit 2a2 by the processing unit 2a1 and executed. The medium may be various storage media readable by the computer 2a, or may be a communication line connected to the communication interface 2a3. The storage unit 2a2 may include a RAM (Random Access Memory), a ROM (Read Only Memory), a HDD (Hard Disk Drive), a SSD (Solid State Drive), or a combination of these. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network).

<An example of a plasma treatment method>
2 is a flow chart showing a plasma processing method (hereinafter, also referred to as "this processing method") according to one exemplary embodiment. As shown in FIG. 2, this processing method includes a step ST1 of providing a substrate, a step ST2 of supplying a processing gas, and a step ST3 of etching the substrate. The step ST3 of etching the substrate includes a step ST3A of etching a first region, a step ST3B of etching a second region, a step ST3C of etching a third region, a step ST3D of etching a fourth region, a step ST3E of etching a fifth region, and a step ST6F of etching a sixth region.

The processing in each step may be performed in the plasma processing system shown in FIG. 1. In the following, an example will be described in which the control unit 2 controls each part of the plasma processing apparatus 1 to perform this processing method on the substrate W.

(Step ST1: Providing a substrate)
In step ST1, a substrate W is provided in a plasma processing space 10s of the plasma processing apparatus 1. The substrate W is placed on an upper surface of a substrate support 11.

Figure 3 is a diagram showing an example of the cross-sectional structure of the substrate W provided in process ST1. The substrate W has a silicon-containing film SF and a mask film MF formed in this order on an undercoat film UF. The substrate W may be used, for example, in the manufacture of semiconductor devices including semiconductor memory devices such as DRAMs and 3D-NAND flash memories.

The base film UF may be, for example, a silicon wafer or an organic film, a dielectric film, a metal film, a semiconductor film, or the like formed on a silicon wafer. The base film UF may be composed of multiple films stacked together.

The silicon-containing film SF is the film to be etched in this processing method. The silicon-containing film SF may be, for example, a silicon oxide film, a silicon nitride film, or a silicon oxynitride film. The silicon-containing film SF may be formed by stacking a plurality of films. For example, the silicon-containing film SF may be formed by alternately stacking a silicon oxide film and a polycrystalline silicon film. Also, for example, the silicon-containing film SF may be formed by alternately stacking a silicon oxide film and a silicon nitride film.

The mask film MF may be, for example, a carbon-containing film such as an amorphous carbon film, a spin-on carbon film, or a photoresist film. The mask film MF may be a single-layer mask consisting of one layer, or a multilayer mask consisting of two or more layers. The mask film MF has at least one opening OP. The opening OP may have any shape in a plan view of the substrate W, i.e., when the substrate W is viewed from the top to the bottom in FIG. 3. The shape may be, for example, a circle, an ellipse, a rectangle, a line, or a combination of one or more of these. The mask film MF may have multiple openings OP.

(Step ST2: Supply of processing gas)
In step ST2, a processing gas is supplied into the plasma processing space 10s. The processing gas is a gas used for etching the silicon-containing film SF formed on the substrate W. The type of processing gas may be appropriately selected based on the material of the silicon-containing film SF, the material of the mask film MF, the material of the base film UF, the pattern of the mask film MF, the etching depth, and the like.

The processing gas may include, for example, either one or _both of _CxFy gas _{and CsHtFu gas} . Here, x, y, s, t, and _u are positive integers _{. The CxFy} gas may be at least one selected from the group consisting of _C4F6 gas, _{C4F8 gas} , _C3F6 gas, and _C7F8 gas. The _{CsHtFu gas} may be _{CH2F2 gas} or _CH3F gas. The processing gas may include a hydrogen _- containing gas such as _H2 gas or _{CH4 gas} .

(Step ST3: Etching)
In step ST3, a source RF signal (RF power) is supplied from the first RF generating unit 31a to the lower electrode and/or the upper electrode. A bias RF signal is supplied from the second RF generating unit 31b to the lower electrode. As a result, plasma is generated from the processing gas supplied to the plasma processing space 10s, and a bias potential is generated on the substrate W. Active species such as ions and radicals in the generated plasma are attracted to the substrate W, and the silicon-containing film SF is etched. The timing at which the supply of the source RF signal is started and the timing at which the supply of the bias RF signal is started may be simultaneous or different.

In steps ST3A to ST3F of process ST3, the power levels of the source RF signal and the bias RF signal are changed as the etching of the silicon-containing film SF progresses. This will be explained using Figures 4A to 4F, 5A to 5F, and 6A to 6F. The progress of the etching may be determined based on the extension of the etching depth or the passage of the etching time.

Figures 4A to 4F are diagrams showing examples of the cross-sectional structure of a substrate W after processing in steps ST3A to ST3F, respectively.

5A to 5F are timing charts showing an example of a source RF signal in steps ST3A to ST3F, respectively. In FIGS. 5A to 5F, the horizontal axis indicates time. The vertical axis indicates the effective value of the power level of the source RF signal. "L ₁₁ ", "L ₁₂ ", "L ₁₃ ", and "L ₁₄ " indicate a power level lower than that indicated by "H ₁ ". Furthermore, the relationship of L ₁₁ > L ₁₂ > L ₁₃ > L ₁₄ is established among L ₁₁ , L ₁₂ , L ₁₃ , and L ₁₄ (i.e., among L ₁₁ , L ₁₂ , L ₁₃ , and L ₁₄ , L ₁₁ has the highest power level and L ₁₄ has the lowest power level). "L ₁₄ " includes a case where the power level is 0 W, that is, where no signal is supplied. As shown in FIGS. 5A to 5F, the source RF signal is a pulse wave that alternates between an H1 period (first period) having a power level (first power) of _H1 and an L1 period (second period) having a power level (second power) of _L11 , _L12 , _L13 , or _L14 lower than _H1 .

6A to 6F are timing charts showing an example of a bias RF signal in steps ST3A to ST3F, respectively. In FIGS. 6A to 6F, the horizontal axis indicates time. The vertical axis indicates the effective value of the power level of the bias RF signal. "L ₂₁ ", "L ₂₂ ", and "L ₂₃ " indicate a power level lower than that indicated by "H ₂ ". Furthermore, L ₂₁ , L ₂₂ , and L ₂₃ have a relationship of L ₂₁ < L ₂₂ < L ₂₃ (i.e., among L ₂₁ , L ₂₂ , and L ₂₃ , L ₂₁ has the lowest power level and L ₂₃ has the highest power level). "L ₂₁ " includes a case where the power level is 0 W, i.e., no signal is supplied. The bias RF signal is a pulse wave that alternates between an _H2 period (third period) having a power level of H2 (third power) and an L2 period (fourth period) having a power level of _L21 , _L22 , or _L23 (fourth power) lower than _H2 .

(Step ST3A: Etching of First Region)
Step ST3A is performed in the first region from the start of etching until the etching depth of the recess RC formed by etching reaches d1 (see FIG. 4A). The recess RC is a portion of the silicon-containing film SF that corresponds to the opening OP of the mask film MF. In step ST3A, a pulse wave including an H1 period having a power level of _H1 and an L1 period having a power level _L11 lower than _H1 is used as the source RF signal (see FIG. 5A). Also, a pulse wave including an H2 period having a power level of _H2 and an L2 period having a power level _L21 lower than _H2 is used as the bias RF signal (see FIG. 6A).

(Step ST3B: Etching of the second region)
The process ST3B is performed in the second region until the etching depth of the recess RC reaches d2 (see FIG. 4B). The etching depth d2 is deeper than the etching depth d1, and the relationship d2>d1 is established. In the process ST3B, a pulse wave including an H1 period having a power level of _H1 and an L1 period having a power level _L12 lower than _H1, alternately, is used as the source RF signal (see FIG. 5B). The power level _L12 of the source RF signal in the process ST3B is lower than the power level _L11 of the source RF signal in the process ST3A. The bias RF signal uses the same pulse wave as in the process ST3A (see FIG. 6B).

(Step ST3C: Etching of third region)
The process ST3C is performed in the third region until the etching depth of the recess RC reaches d3 (see FIG. 4C). The etching depth d3 is deeper than the etching depth d2, and the relationship d3>d2 is established. The etching depth d3 may be, for example, half the depth to be etched in the process ST3. In one example, the etching depth d3 may be half the thickness of the silicon-containing film SF. In the process ST3C, a pulse wave including an H1 period having a power level of _H1 and an L1 period having a power level _L13 lower than _H1 , alternately, is used as the source RF signal (see FIG. 5C). The power level _L13 of the source RF signal in the process ST3C is lower than the power level _L12 of the source RF signal in the process ST3B. The bias RF signal is the same pulse wave as in the process ST3A and the process ST3B (see FIG. 6C).

(Step ST3D: Etching of Fourth Region)
The process ST3D is performed in the fourth region until the etching depth of the recess RC reaches d4 (see FIG. 4D). The etching depth d4 is deeper than the etching depth d3, and the relationship d4>d3 is established. In the process ST3D, a pulse wave including an H1 period having a power level of _H1 and an L1 period having a power level _L14 lower than _H1, alternately, is used as the source RF signal (see FIG. 5D). The power level _L14 of the source RF signal in the process ST3D is lower than the power level _L13 of the source RF signal in the process ST3C. The bias RF signal is the same pulse wave as in the processes ST3A to ST3C (see FIG. 6D).

(Step ST3E: Etching of Fifth Region)
The process ST3E is performed in the fifth region until the etching depth of the recess RC reaches d5 (see FIG. 4E). The etching depth d5 is deeper than the etching depth d4, and the relationship d2>d1 holds. In the process ST3E, the same pulse wave as that in the process ST3D is used as the source RF signal (see FIG. 5E). As the bias RF signal, a pulse wave including an H2 period having a power level of _H2 and an L2 period having a power level _L22 lower than _H2, alternately, is used (see FIG. 6E). The power level _L22 of the bias RF signal in the process ST3E is higher than the power level _L21 of the bias RF signal in the processes ST3A to ST3D.

(Step ST3F: Etching of Sixth Region)
Step ST3F is performed in the sixth region until the etching depth of the recess RC reaches d6 (see FIG. 4F). The etching depth d6 is deeper than the etching depth d5, and the relationship d6>d5 holds. In one example, the etching depth d6 is the film thickness of the silicon-containing film SF. In this case, step ST3F is performed until the bottom of the recess RC reaches the undercoat film UF. The aspect ratio of the recess RC in this state may be, for example, 20 or more, 30 or more, 40 or more, 50 or more, or 100 or more. In step ST3F, the same pulse wave as in step ST3D or step ST3E is used as the source RF signal (see FIG. 5F). As the bias RF signal, a pulse wave including an H2 period having a power level of _H2 and an L2 period having a power level _L23 lower than _H2, alternately, is used (see FIG. 6E). The power level _L23 of the bias RF signal in process ST3F is higher than the power level _L22 of the bias RF signal in process ST3E.

In step ST3, the duty ratio of the pulse wave of the source RF signal, i.e., the ratio of the H1 period to the H1 period and the L1 period, may be 20% or more and 80% or less. The duty ratio of the pulse wave of the bias RF signal, i.e., the ratio of the H2 period to the H2 period and the L2 period, may be 20% or more and 80% or less. The H1 period of the source RF signal may be synchronized with the H2 period of the bias RF signal, or may not be synchronized. The time length of the H1 period of the source RF signal may be the same as the time length of the H2 period of the bias RF signal, or may be different. Part or all of the H1 period of the source RF signal may overlap with the H2 period of the bias RF signal.

In step ST3, the power level of the source RF signal in the L1 period relative to the power level _H1 in the H1 period may decrease stepwise from step ST3A to step ST3D, and may be the lowest in steps ST3D to ST3F (see FIGS. 5A to 5F). As a result, in steps ST3A to ST3C, i.e., in etching the region where the recess RC is shallower, plasma with higher density is generated in this order. Also, in steps ST3D to ST3F, i.e., in etching the region where the recess RC is deeper, plasma with lower density is generated compared to steps ST3A to ST3C.

In step ST3, the power level of the bias RF signal in the L2 period relative to the power level _H2 in the H2 period may be the lowest in steps ST3A to ST3D and may increase stepwise from step ST3D to step ST3F (see FIGS. 6A to 6F). As a result, a lower bias potential is generated on the substrate W in steps ST3A to ST3D, i.e., etching of the region where the recess RC is shallower, compared to steps ST3E to ST3F, i.e., etching of the region where the recess RC is deeper. Also, a higher bias potential is generated on the substrate W in step ST3F compared to step ST3E.

Note that, in step ST3, while the power level of the L1 period of the source RF signal is being gradually decreased, i.e., in steps ST3A to ST3D, the power level of the L2 period of the bias RF signal may be kept constant. Also, while the power level of the L2 period of the bias RF signal is being gradually increased, i.e., in steps ST3D to ST3F, the power level of the L1 period of the source RF signal may be kept constant.

According to the above, in the step ST3, etching can be performed with a higher density plasma and a lower bias potential in the area where the depth of the recess RC is shallower. In the high density plasma, the dissociation of C _x F _y gas and/or C _s H _t F _u gas in the processing gas is promoted, and molecules with a higher adsorption coefficient are more likely to be generated. Therefore, the amount of reaction products adhering to the side walls of the mask film MF and the recess RC can be increased. On the other hand, in the high density plasma, the flow of ions toward the substrate W is reduced, and the low bias potential reduces sputtering on the side walls of the mask film MF and the recess RC. As a result, in the area where the depth of the recess RC is shallow, it becomes easy to form a protective film on the side walls of the mask film MF and the recess RC. This protective film can protect the side walls of the recess RC in the etching after the step ST3 (including etching in the area where the depth of the recess RC is deeper). Therefore, bowing, in which the opening width of the recess RC becomes wider in a part, can be suppressed.

In addition, in the step ST3, etching may be performed with a lower density plasma and a higher bias potential in the region where the depth of the recess RC is deep. In the low density plasma, dissociation of C _x F _y gas and/or C _s H _t F _u gas in the processing gas is not easily promoted, and molecules with a high adsorption coefficient are not easily generated. Therefore, the amount of reaction products adhering to the side walls of the mask film MF and the recess RC may be reduced. This prevents the openings of the mask film MF and the recess RC from narrowing, and prevents the angle of incidence of ions incident on the recess RC from changing. In addition, the high density plasma may increase the flow of ions toward the bottom of the recess RC. Furthermore, since etching is performed with a high bias potential, the angle of incidence of ions incident on the recess RC may become closer to vertical. As a result, the bottom width (bottom CD) of the recess RC may be prevented from narrowing in the area where the recess RC is deep.

As described above, in step ST3, the power level of the L1 period of the source RF signal may be gradually decreased, and then the power level of the L2 period of the bias RF signal may be gradually increased. In one example, in step ST3, the power level of the L1 period of the source RF signal may be kept constant, and only the power level of the L2 period of the bias RF signal may be gradually increased. Also, only the power level of the L1 period of the source RF signal may be gradually decreased, and the power level of the L2 period of the bias RF signal may be kept constant.

As described above, in step ST3, a pulse wave of the source RF signal and a pulse wave of the bias RF signal may be used. In one example, either the source RF signal or the bias RF signal may be a continuous wave that does not have an H1 period or an L1 period. For example, a continuous wave of the source RF signal and a pulse wave of the bias RF signal may be used. In this case, the power level of the continuous wave of the source RF signal may be gradually decreased in steps ST3A to ST3D, and the power level of the L2 period of the bias RF signal may be gradually increased in steps ST3D to ST3F. Also, for example, a pulse wave of the source RF signal and a continuous wave of the bias RF signal may be used. In this case, the power level of the L1 period of the source RF signal may be gradually decreased in steps ST3A to ST3D, and the power level of the continuous wave of the bias RF signal may be gradually increased in steps ST3E to ST3F.

As described above, in step ST3, a bias RF signal may be used as the bias signal (power) supplied to the lower electrode. In one example, a negative DC voltage may be supplied to the lower electrode from the first DC generating unit 32a as a bias DC signal. In this case, the voltage level of the bias DC signal is the effective value of the absolute value of the negative DC voltage. The bias DC signal may be a pulse wave or a continuous wave.

As described above, in step ST3, six regions where etching is performed by changing the power levels of the source RF signal and the bias RF signal may be provided according to the depth of the recess RC. In one example, the number of such regions may be two or more. For example, the silicon-containing film SF may be divided into two regions, an upper region where the upper half of the thickness is etched, and a lower region where the lower half is etched, and the power levels of the source RF signal and the bias RF signal may be changed in the upper and lower regions. Furthermore, the region may be set according to the etching time rather than the etching depth (depth of the recess RC).

In one example, in step ST3, the pressure in the plasma processing chamber 10 may be reduced as the etching progresses. This may result in a higher density plasma being generated where the recess RC is shallower, and a lower density plasma being generated where the recess RC is deeper. The progress of the etching may be determined based on the increase in etching depth or the passage of etching time.

<Example>
Next, examples of the present processing method will be described. The present disclosure is not limited to the following examples.

In Examples 1 to 3, the present processing method was applied to the substrate W shown in FIG. 3, and the silicon-containing film SF was etched with a processing gas containing C ₄ F ₈ gas. In each example, the silicon-containing film SF of the substrate W was a laminated film of a silicon oxide film and a silicon nitride film, and the mask film MF was an amorphous carbon film. The opening pattern of the mask film MF was a hole pattern. In each example, the silicon-containing film SF was divided into six regions (referred to as the "first region", the "second region", etc. from the top), and etching was performed in each region by changing the power level of the pulse wave of the source RF signal and the pulse wave of the bias RF signal. The etching time for each region was 300 seconds.

In Example 1, the power level of the L1 period of the source RF signal was gradually decreased, and then the power level of the L2 period of the bias RF signal was gradually increased. The power level _H1 of the H1 period of the source RF signal was 7500 [W] in all of the first to sixth regions. The power level of the L1 period of the source RF signal was 400 [W] in the first region, 200 [W] in the second region, and 0 [W] in the third to sixth regions. The power level of the H2 period of the bias RF signal was 12000 [W] in all of the first to sixth regions. The power level of the L2 period of the bias RF signal was 0 [W] in the first to fourth regions, 200 [W] in the fifth region, and 700 [W] in the sixth region.

In Example 2, only the power level of the L1 period of the source RF signal was gradually decreased, and the power level of the L2 period of the bias RF signal was kept constant. The power level _H1 of the H1 period of the source RF signal was 7500 [W] in all of the first to sixth regions. The power level of the L1 period of the source RF signal was 500 [W] in the first region, 300 [W] in the second region, 100 [W] in the third region, and 0 [W] in the fourth to sixth regions. The power level of the H2 period of the bias RF signal was 12000 [W] in all of the first to sixth regions. The power level of the L2 period of the bias RF signal was 0 [W] in all of the first to sixth regions.

In Example 3, the power level of the L1 period of the source RF signal was kept constant, and only the power level of the L2 period of the bias RF signal was increased stepwise. Specifically, the power level _H1 of the H1 period of the source RF signal was 7500 [W] in all of the first to sixth regions. The power level of the L1 period of the source RF signal was 0 [W] in all of the first to sixth regions. The power level of the H2 period of the bias RF signal was 12000 [W] in all of the first to sixth regions. The power level of the L2 period of the bias RF signal was 0 [W] in the first to fourth regions, 200 [W] in the fifth region, and 700 [W] in the sixth region.

In the reference example, the silicon-containing film SF of the substrate W having the same configuration and hole pattern as the substrate W in the embodiment was etched with a process gas containing _C4F8 gas. In the reference example, etching was performed continuously for ₁₈₀₀ seconds without changing the power levels of the pulse wave of the source RF signal and the pulse wave of the bias RF signal. The power level of the H1 period of the source RF signal was 7500 [W]. The power level of the L1 period of the source RF signal was 0 [W]. The power level of the H2 period of the bias RF signal was 12000 [W]. The power level of the L2 period of the bias RF signal was 0 [W].

Table 1 shows various measurement results for each of the examples and the reference example. In Table 1, "D" is the etching depth of the silicon-containing film SF after processing. " _Bw " is the maximum opening width (bowing CD) of the recess RC. " _Bt " is the width of the bottom of the recess RC (bottom CD). " _Bw - _Bt " is the difference between the bowing CD and the bottom CD.

As shown in Table 1, the difference between the bowing CD and the bottom CD in the examples was improved compared to the reference example. In other words, in the examples, it was possible to increase the bottom width of the recess RC while suppressing bowing due to etching.

This processing method may be modified in various ways without departing from the scope and spirit of this disclosure. For example, this processing method may be performed using a plasma processing device using any plasma source, such as an inductively coupled plasma or microwave plasma, other than the capacitively coupled plasma processing device 1.

1: Plasma processing apparatus, 2: Control unit, 10: Plasma processing chamber, 10s: Plasma processing space, 11: Substrate support unit, 13: Shower head, 20: Gas supply unit, 31a: First RF generator, 31b: Second RF generator, 32a: First DC generator, MF: Mask film, OP: Opening, SF: Silicon-containing film, RC: Recess, UF: Undercoat film, W: Substrate

Claims (22)

(a) providing a substrate having a silicon-containing film and a mask film formed on the silicon-containing film on a substrate support in a chamber;
(b) supplying a process gas into the chamber;
(c) providing an RF signal to generate a plasma of the process gas in the chamber and a bias signal to the substrate support to etch the substrate;
the RF signal is a pulse wave including alternating first periods having a first power level and second periods having a second power level lower than the first power level;
In the step (c), the second power level is decreased relative to the first power level as the etching progresses.
Plasma treatment method. The plasma processing method according to claim 1, wherein the bias signal is a pulse wave including two periods of different power levels or two periods of different voltage levels alternating with each other. The plasma processing method according to claim 1, wherein the bias signal is a continuous wave. (a) providing a substrate having a silicon-containing film and a mask film formed on the silicon-containing film on a substrate support in a chamber;
(b) supplying a process gas into the chamber;
(c) providing an RF signal to generate a plasma of the process gas in the chamber and providing a bias signal to the substrate support to etch the substrate;
the bias signal is a pulse wave including alternating third periods having a third power or voltage level and fourth periods having a fourth power or voltage level lower than the third power or voltage level;
In the step (c), the fourth power or voltage level relative to the third power or voltage level is increased as the etching progresses.
Plasma treatment method. The plasma processing method according to claim 4, wherein the RF signal is a pulse wave including two alternating periods of different power levels. The plasma processing method according to claim 4, wherein the RF signal is a continuous wave. The plasma processing method according to any one of claims 1 to 6, wherein an RF signal is used as the bias signal. The plasma processing method according to any one of claims 1 to 6, wherein a DC signal is used as the bias signal. (a) providing a substrate having a silicon-containing film and a mask film formed on the silicon-containing film on a substrate support in a chamber;
(b) supplying a process gas into the chamber;
(c) providing a source RF signal to generate a plasma of the process gas in the chamber and providing a bias RF signal to the substrate support to etch the substrate;
the source RF signal is a pulsed wave having alternating first periods having a first power level and second periods having a second power level that is lower than the first power level;
the bias RF signal is a pulse wave including alternating third periods having a third power level and fourth periods having a fourth power level lower than the third power level;
The step (c) includes: (c1) decreasing the second power level relative to the first power level as the etching progresses; and (c2) increasing the fourth power level relative to the third power level as the etching progresses.
Plasma treatment method. The plasma processing method according to claim 9, wherein in step (c1), the fourth power level is kept constant relative to the third power level, and in step (c2), the second power level is kept constant relative to the first power level. The plasma processing method according to claim 9 or 10, wherein in the step (c), the step (c2) is performed after the step (c1) is performed. The plasma processing method according to any one of claims 9 to 11, wherein in step (c), after the etching time or etching depth exceeds a given time or depth, step (c2) is performed. The plasma processing method according to any one of claims 1 to 12, wherein in step (c), the pressure in the chamber is reduced as the etching progresses. 14. The plasma processing method according to claim 1, wherein the processing gas includes _{a CxFy} gas (x and y are positive integers) or _{a CsHtFu gas} (s, t, and u are positive integers). The plasma processing method according to any one of claims 1 to 14, wherein the aspect ratio of the recess formed by step (c) is 100 or more. The plasma processing method according to any one of claims 9 to 12, wherein the duty ratio of the pulse wave of the source RF signal and/or the duty ratio of the pulse wave of the bias RF signal is 20% or more and 80% or less. The plasma processing method according to any one of claims 1 to 16, wherein the silicon-containing film is a laminated film of a silicon oxide film and a silicon nitride film. The plasma processing method according to claim 17, wherein the laminated film is included in a 3D-NAND structure. The plasma processing method according to any one of claims 1 to 18, wherein the mask film is an amorphous carbon film. A chamber;
a substrate support disposed within the chamber and configured to support a substrate having a silicon-containing film and a mask film formed on the silicon-containing film;
a gas supply configured to supply a process gas into the chamber;
a power supply that generates a source RF signal and a bias RF signal, the source RF signal being a pulse wave that alternates between a first period having a first power level and a second period having a second power level lower than the first power level, and the bias RF signal being a pulse wave that alternates between a third period having a third power level and a fourth period having a fourth power level lower than the third power level;
a controller configured to control the supply of the source RF signal from the power supply to generate a plasma of the process gas in the chamber and the supply of the bias RF signal from the power supply to the substrate support to etch the substrate;
the control unit executes control to decrease the second power level with respect to the first power level as etching progresses, and control to increase the fourth power level with respect to the third power level as etching progresses.
Plasma processing systems. The plasma processing system of claim 20, including a capacitively coupled plasma processing device. The plasma processing system of claim 20 or 21, wherein the source RF signal is supplied to the substrate support.

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