JP2021534471A - Circuit wiring storage method, FPGA system and storage medium - Google Patents

Abstract

The present invention provides a circuit wiring storage method, an FPGA system, and a storage medium. The circuit wiring storage method includes a step of constructing a circuit wiring model for each type of circuit wiring in the circuit and a step of storing the circuit wiring in the circuit based on the circuit wiring model, and includes the same type of circuit wiring. In, the start device, the end device, the start port and the end port connected to the circuit wiring are all the same, and the circuit wiring model has the information of the start port, the information of the end port, and the start point. The start point device is a device connected to the start point of the circuit wiring, and the end point device is a device connected to the end point of the circuit wiring, including the device information and the end point device information. This solves the conventional problem of occupying a large amount of resources in the memory of circuit wiring. Further, the present invention provides a device and a storage medium, and by carrying out the above-mentioned method, it is possible to reduce the memory resources consumed for storing the circuit wiring. [Selection diagram] Fig. 1

Description

The present invention relates to the field of FPGA (Field Programmable Gate Array). Specifically, the present invention relates to a circuit wiring storage method, an FPGA system and a storage medium, but the present invention is not limited to this.

An FPGA is a digital circuit or digital system that can realize almost all types by programming, and consists of a large amount of logic blocks, memory, and a DSP (digital signal processor, digital signal processor). FPGAs have programmable functions and can simplify the process of digital circuit design.

EDA (Electronic Design Automation) tools are tools for designers to implement circuit design on software platforms using hardware description languages or principle diagrams, and finally bitstreams are generated and programming downloads. Logic compilation, comprehensive optimization, layout, routing, and simulation can be completed automatically until such things are done. The EDA tool also allows designers to more conveniently check the status of each stage of the entire process, make timely adjustments, and finally simulate and display the placement and routing of the circuit design on the FPGA chip in the tool. Will be done. By designing with EDA tools, the efficiency, reliability, and operability of circuit design are greatly improved, the labor intensity of the designer is reduced, and the difficulty of circuit design is reduced.

The circuit wiring storage method, FPGA system and storage medium provided by the embodiment of the present invention mainly aim to solve the conventional problem that the method of storing the circuit wiring of the storage circuit consumes a large amount of memory resources. And.

According to an aspect of the present invention, a step of constructing a circuit wiring model for each type of circuit wiring in the circuit and a step of storing the circuit wiring in the circuit based on the circuit wiring model are included. In the same type of circuit wiring, the start device, the end device, the start port and the end port connected to the circuit wiring are all the same, and the circuit wiring model is the information of the start port. , The end point port information, the origin device information, and the end point device information are included, the origin device is a device connected to the start point of the circuit wiring, and the end point device is the circuit. A circuit wiring storage method, which is a device connected to the end point of wiring, is provided.

According to another aspect of the present invention, the processor, the memory, and the communication bus are included, and the communication bus enables connection communication between the processor and the memory. , An FPGA system that executes one or more computer programs stored in the memory is provided so that the steps of the circuit wiring storage method described above are performed.

According to another aspect of the present invention, the storage medium in which one or more computer programs are stored is such that the one or more computer programs are such that the steps of the circuit wiring storage method described above are performed. A storage medium executed by one or more processors is provided.

Aspects of the present invention have the following beneficial effects.
The circuit wiring storage method, FPGA system, and storage medium according to the embodiment of the present invention are used for each type of circuit wiring in the circuit in order to solve the conventional problem that a large amount of memory resources are consumed for storing the circuit wiring. Build a circuit wiring model for each. Here, in the same type of circuit wiring, the start device, end device, start port, and end port of a plurality of circuit wirings are all the same, and the circuit wiring model is a start port connected to a certain type of circuit wiring. Information, information on the destination port, information on the origin device, and information on the destination device. That is, in aspects of the invention, one circuit wiring model contains relevant information for one type of circuit wiring and stores each circuit wiring in the circuit based on the circuit wiring model. As a result, compared to the conventional method of storing all the structures of circuit wiring, in this embodiment, by classifying based on the type of circuit wiring and storing the circuit wiring based on the type of circuit wiring, a large number of memories are stored. It saves resources and improves the user experience.

Other features of the invention and corresponding beneficial effects will be described below. It should be understood that at least some beneficial effects will be apparent from the description of the specification.

It is a flowchart of the circuit wiring storage method which concerns on Example 1 of this invention. It is a related information diagram in the coordinate system of the circuit wiring which concerns on Example 1 of this invention. It is a flowchart of the circuit wiring storage method which concerns on Example 2 of this invention. It is a related information diagram in the coordinate system of the circuit module which concerns on Example 2 of this invention. It is a related information diagram in the coordinate system of the device which concerns on Example 2 of this invention. The module-related figure of the FPGA system which concerns on Example 3 of this invention.

Hereinafter, in order to more clearly explain the object, technical solution, and advantage of the present invention, examples of the present invention will be described in more detail with reference to the drawings. Here, the specific examples described are merely for explaining the present invention, and do not limit the present invention.

As the scale of circuit design grows, so do the various layout and wiring resources used in the circuit, especially the wiring resources. The explosive increase in wiring resources not only consumes a large amount of memory resources for EDA tools, but also consumes a large amount of memory resources for expression and operation, which makes it difficult to model circuit wiring. In view of the above circumstances, the present invention provides the following countermeasures.

Example 1
In the prior art, when an EDA tool stores circuit wiring for circuit resources, it typically stores the structure of each and every circuit wiring in the circuit. As the scale of circuit design grows, so do the various layout and wiring resources used in the circuit, especially the wiring resources. Therefore, if the conventional method of storing the circuit wiring is used, a large number of memory resources are occupied. In order to solve this problem, according to this embodiment, a circuit wiring protection method applied to the EDA tool is proposed. As shown in FIG. 1, the circuit wiring storage method includes step S101 for constructing a circuit wiring model for each type of circuit wiring in the circuit.

As you can see, in the EDA tool, the starting point of the circuit wiring is called the starting point, the ending point of the circuit wiring is called the ending point, the starting device is the device connected to the starting point of the circuit wiring, and the ending device is. , The origin port is the port of the origin device connected to the origin of the circuit wiring, and the endpoint port is the port of the endpoint device connected to the endpoint of the circuit wiring. ..

In some embodiments, the same type of circuit wiring may be a plurality of circuit wirings having the same origin device, end device, and connected port. That is, if the circuit has a plurality of circuit wirings in which the origin device, the end device, the origin port, and the end port are all of the same type, the plurality of circuit wirings are the same type of circuit wiring. That is, for the same type of circuit wiring, the device connected to the starting point and the port of the device, the device connected to the ending point, and the port of the device are all the same.

For example, a circuit has two DQSs (Bi-directional Data Strobe signals) and two CIMs, and the two DQSs and the two CIMs are DQS1, DQS2 and CIM1 and CIM2, respectively. Further, the circuit has a circuit wiring 1 and a circuit wiring 2, and the two circuit wirings are referred to as net1 and net2, respectively. The starting port of net1 is the WL_OV port of DQS1, and the ending port is the S_IY3 port of CIM1. The starting port of net2 is the WL_OV port of DQS2, the ending port is the S_IY3 port of CIM2, and the starting device, starting port, ending device, and ending port of net1 and net2 are all the same, so that net1 and net2 Is a circuit wiring that belongs to the same type.

Circuit wirings of different lengths have different transmission delays, etc., so in the same type of circuit wiring, the starting device, ending device, relative position between the starting device and the ending device, the starting port, and the ending port of each circuit wiring are different. Both may be the same. That is, if the circuit has circuit wiring that has the same origin device, end device, relative position between the origin device and the end device, the origin port, and the end port, these circuit wirings are the same type of circuit wiring. Is.

For example, a circuit includes two devices A (referred to as A1 and A2), two devices B (referred to as B1 and B2), and two circuit wirings (referred to as net3 and net4). The starting port of net3 is the a port of A1, the ending port is the b port of B1, the starting port of net4 is the a port of A2, and the ending port is the b port of B2. A1 is located on the right side of B1, the distance between A1 and B1 is d, A2 is also located on the right side of B2, and the distance between A2 and B2 is d. As described above, since the start device, the start port, the end device, the end port, and the relative positions of the start device and the end device are the same in net3 and net4, both are circuit wirings belonging to the same type.

As can be understood, the EDA tool stores a large number of circuits such as circuits that realize specific functions and FPGA chip circuits. In many cases, the circuit stored in the EDA tool has at least two circuit wirings belonging to the same type as described above. Therefore, in order to reduce the memory resource consumed for storing the circuit wiring, in this embodiment, it is possible to construct a circuit wiring model for each type of circuit wiring in the circuit stored in the EDA tool. .. That is, one circuit wiring model corresponds to one type of circuit wiring. Here, a circuit wiring model contains relevant information of all the circuit wirings of a certain type in the circuit, and can restore all the circuit wirings of the type based on the circuit wiring model. The circuit wiring model is the (relevant) information of the origin port and the (relationship) information of the end port connected to any type of circuit wiring, and the (relationship) of the origin device of each circuit wiring of the circuit wiring belonging to the type in the circuit. ) Information and (related) information of the end device may be included.

Subsequently, for example, net1 and net2 are circuit wirings belonging to the same type. When there are only net1 and net2 of the circuit wiring of the type in the circuit, the ports connected to net1 and net2 are the same, so that the information contained in the circuit wiring model corresponding to these is the origin device DQS1 and the origin device DQS2. WL_OV port related information, end point device CIM1 and end point device CIM2 S_IY3 port related information, origin device DQS1 related information, end point device CIM1 related information, starting device DQS2 related information, and end point device CIM2 related information. .. Thereby, the circuit wiring model can store the related information of the type of circuit wiring such as net1 and net2 in the circuit. Then, net1 and net2 can be restored based on the circuit wiring model.

Alternatively, the circuit wiring model may include a starting device type and an ending device type of a corresponding type of circuit wiring model. Subsequently, for example, net1 and net2 are circuit wirings belonging to the same type. If there are only net1 and net2 circuit wiring of the type in the circuit, the ports connected to net1 and net2 are the same, so the information contained in the circuit wiring model corresponding to these is the origin device DQS1 and the origin device DQS2. WL_OV port related information, end point device CIM1 and end point device CIM2 S_IY3 port related information, origin device DQS type, end point device CIM type, origin device DQS1 related information, end point device CIM1 related information, origin device DQS2 Related information and related information of the end point device CIM2.

In the same type of circuit wiring, if the origin device, end device, relative position between the origin device and the end device of each circuit wiring, and the connected port are all the same, the origin device and the end device of each circuit wiring Since the relative positions of the two are the same, it is possible to obtain the related information of the end device based on the related information of the starting device and the relative position of the starting device and the ending device, or the related information and the starting point of the ending device. Information related to the starting device can be obtained based on the relative position between the device and the ending device. Therefore, in the same type of circuit wiring, if all five elements of the start device, start port, end point device, end point port, and relative position between the start point device and the end point device of the circuit wiring are the same, the circuit wiring is stored. In order to reduce the memory resources consumed to do so, the circuit wiring model includes information on the origin port of any type of circuit wiring, information on the end port, and the origin device and end device of the type of circuit wiring. Relative position information, related information of the origin device of each circuit wiring belonging to the type in the circuit, or the circuit wiring model is related information of the origin port connected to any type of circuit wiring, related information of the end port. , Relative position information between the start device and the end device of the circuit wiring belonging to the type, and related information of the end device of each circuit wiring belonging to the type in the circuit. This is based on the port related information of the origin device, the port related information of the end device, the origin device related information (or the end device related information) of each circuit wiring, and the relative position information between the origin device and the end device. , Each circuit wiring can be restored.

Subsequently, for example, when there is only net4 in the circuit wiring that belongs to the same type as net3, the circuit wiring model constructed corresponding to these is related to the starting device A1 of net3 and the relation of the starting device A2 of net4. The information, the origin port a, the end port b, and the origin device are located on the right side of the end device, and the distance between them is d, and the relative position between the origin device and the end device is included. Thereby, the end point device B1 can be detected based on the relative position between the start point device and the end point device and the start point device A1, and based on the start point port a, the end point port b, the start point device A1, and the end point device B1. Net3 can be restored. Similarly, net4 can be restored.

Here, the relative position information between the start point device and the end point device may be the position offset information of the end point device with respect to the start point device and the end point device, and the position offset of the start point device with respect to the end point device. It may be information.

In this embodiment, a coordinate system can be constructed based on the concrete layout of the simulation of the circuit in the electronic design automation tool before constructing the circuit wiring model for each type of circuit wiring in the circuit. As a result, each device in the circuit has unique coordinates, and the device can be detected based on the coordinates. Here, the (X, Y) coordinate system can be constructed on the right and above, respectively, with the lower left corner of the circuit as the origin. Of course, the coordinate system can be constructed by other methods, but is not particularly limited in the present invention. As a result, the information related to the origin device of each circuit wiring included in the circuit wiring model may be the coordinate information of the origin device. The related information of the end point device of each circuit wiring included in the circuit wiring model may be the coordinate information of the end point device. The relative position information between the start point device and the end point device may be a coordinate offset between the start point device and the end point device.

For example, FIG. 2 is a circuit. As shown in FIG. 2, the circuit includes a first circuit wiring (net5) 2011, a second circuit wiring (net6) 2012, and a third circuit wiring (net7) 2013. The coordinates of the origin device (SRB1) 2021 of the first circuit wiring 2011 are (1,1), the coordinates of the end point device (CLMA1) 2031 are (4,5), and the coordinates of the origin device (4,5) of the second circuit wiring 2012 are. The coordinates of (SRB2) 2022 are (8,1), the coordinates of the end point device (SRB2) 2032 are (11,5), and the coordinates of the start point device (SRB3) 2023 of the third circuit wiring 2013 are. (1,7), and the coordinates of the end point device (SRB3) 2033 are (4,11). It can be seen that the end point ports of the first circuit wiring 2011, the second circuit wiring 2012, and the third circuit wiring 2013 are offset by 3 in the horizontal direction and 4 in the vertical direction with respect to the start point port. That is, net5, net6, and net7 are circuit wirings belonging to the same type.

Based on this, the starting port of the starting device (SRB1) 2021, the starting device (SRB2) 2022, and the starting device (SRB3) 2023 are collectively referred to as port 1, and the ending device (SRB1) 2031 and the ending device (SRB2) 2032. The end point port of is collectively referred to as port 2. The information in the circuit wiring model of the above type is related information of the starting device and / or related information of the ending device CLIMA, related information of the starting port 1, related information of the ending port 2, and relative position information between the starting device and the ending point. (3,4) (that is, 3 in the horizontal direction and 4 in the vertical direction), and origin coordinates (1,1), (8,1), (1,7) are included. Based on the circuit model, net5, net6, and net7 can be restored.

Here, in order to reduce the resources occupied in the memory of the circuit wiring, the origin device-related information of each circuit wiring in the circuit wiring model processes the abscissa and ordinate coordinates of the origin device based on a predetermined rule. It may be an integer representing the coordinates of the origin device obtained by the above. The end point device-related information of each circuit wiring may be an integer representing the coordinates of the end point device acquired by processing the abscissa and the ordinate of the end point device based on a predetermined rule. Here, the predetermined rule can be flexibly set as needed. For example, the predetermined rule may be Z = (X << 16) + Y, where X is abscissa, Y is ordinate, and Z is the processed value. It is intended to be stored in the circuit wiring model.

In some embodiments, the number of origin devices or endpoint devices of one type of circuit wiring corresponding to one circuit wiring model can be flexibly set as needed. For example, to ensure uniqueness of the origin, the number of origin devices of a type of circuit wiring corresponding to the circuit wiring model is one, and the number of end devices is one or at least two.

In step S102, the circuit wiring in the circuit is stored based on the circuit wiring model.

In this embodiment, after the circuit wiring model is constructed, all the related information of the circuit wiring in the circuit is stored based on the circuit wiring model. Here, all the circuit wiring models corresponding to the circuit can be stored in the intermediate file.

If it is necessary to load the circuit wiring of a device in the circuit after storing the circuit wiring in the circuit based on the circuit wiring model, load the relevant information of each circuit wiring of the device in the circuit based on the circuit wiring model. be able to.

In the circuit wiring storage method provided by this embodiment, a circuit wiring model is constructed for each type of circuit wiring in the circuit. Here, in the same type of circuit wiring, the origin device, the end device, the origin port, and the end port of a plurality of circuit wirings are all the same, and the circuit wiring model is a origin port connected to a certain type of circuit wiring. Information, end point port information, origin device information, end point device information, that is, in this embodiment, one circuit wiring model contains one type of circuit wiring related information. It is included and stores each circuit wiring in the circuit based on the circuit wiring model. As a result, in this embodiment, the circuit wiring is classified based on the type of the circuit wiring and the circuit wiring is stored based on the type of the circuit wiring, as compared with the conventional method of storing all the structures of all the circuit wirings. It saves a lot of memory resources and improves the user experience.

Example 2
In order to better understand the present invention, the present embodiment will be described in combination with more specific examples. As shown in FIG. 3, FIG. 3 is a flowchart of the circuit wiring storage method according to the second embodiment of the present invention. The circuit wiring storage method includes step S301 for constructing a coordinate system based on a specific layout of a simulation of an FPGA chip circuit in an EDA tool.

As shown in FIG. 4, FIG. 4 is a concrete layout of the simulation of the entire FPGA chip circuit in the EDA tool. In the FPGA chip circuit, the device has a characteristic with a high degree of overlap. Each block, represented by a square, contains a circuit module 401 with multiple devices. Each circuit module 401 may include the same circuit module 401. It should be understood that there is a circuit connection between each circuit module 401. In this embodiment, the coordinate origins (0,0) are constructed in the lower left corner of all the circuit modules 401, and the (X, Y) coordinate systems are constructed on the right and above, respectively, to form one circuit module 401. Build a grid coordinate system as one grid point. This allows each gridpoint to have its own gridpoint coordinates.

As shown in FIG. 5, FIG. 5 shows the structure of the gridpoint's internal netlist connection in the FPGA chip shown in FIG. Similarly, the lower left corner of the grid point is set as the origin (0,0), and the (X, Y) coordinate system (hereinafter referred to as the device coordinate system) is constructed on the right and above. As a result, each small device inside the gridpoint also has its own relative coordinates. Any device can be identified based on gridpoint coordinates and device coordinates. The plurality of small devices may be a starting device 11 or an ending device 12.

In step S302, a circuit wiring model is constructed for each type of circuit wiring in the FPGA chip circuit.

In this embodiment, the circuit wiring of the same type is a starting device 11, an ending device 12, a starting port, an ending port, and a circuit wiring having the same relative position between the starting device and the ending device. One circuit wiring model corresponds to one type of circuit wiring. One circuit wiring model is the origin device related information, the end device related information, the origin port related information, the end port related information, the relative position between the origin device and the end device, and the FPGA chip of a certain type of circuit wiring. Contains the coordinate information of the origin device of each circuit wiring belonging to the type in the circuit. Here, the relative position between the starting device and the ending device is the coordinate offset of the ending device with respect to the starting device, and the coordinate information of the starting device of each circuit wiring is the horizontal coordinates and the vertical of the starting device based on a predetermined rule. It is an integer representing the coordinates of the origin device obtained by processing the coordinates. Here, in one circuit wiring model, one origin device may be connected to a plurality of end devices via circuit leads, but a plurality of origin devices may be connected to one end device via circuit leads. Must not be. That is, each origin device is connected to at least one endpoint device via circuit leads, and each endpoint device is connected to one endpoint device via circuit leads. This guarantees the uniqueness of the origin point and allows the coordinates of the end point device to be detected based on the coordinates of the origin device and the coordinate offset. That is, the number of origin devices of any circuit wiring corresponding to one circuit model is one, and the number of end devices of any circuit wiring is one or at least two. The number of starting devices of each circuit wiring belonging to the same type is the same, and the number of ending devices is the same.

Here, the storage format of the circuit wiring model is as follows.
[NETVIEW BEGIN]
[DRIVERREF WL_OV (STRUCTUREREF (DEVICEREF DQS)) 0 0]
[LOADREF S_IY3 (STRUCTUREREF (DEVICEREF CIM)) 4 2]
[DEVICE BEGIN]
8060928 8061417 10420224 10420713 12779520 12780009 15138816 15139305 17498112 17498601 20119552 20120041 22478848 224793337 243818144 24838633 27197440 2717929295567336
[DEVICE END]
[NETVIEW END]

The above is the data storage of the complete circuit wiring model. Here, "WL_OV" in [DRIVERREF WL_OV (STRUCTUREREF DQS) 0 0] is the starting port of the circuit wiring of the type, and "DQS" is the starting device of the circuit wiring of the type. "0 0" is the coordinate offset of the origin device with respect to the origin point of the circuit wiring of the type (because the origin point is the origin device, it becomes "0 0"), and is [LOADREF S_IY3 (STRUCTUREREF (DEVICEREF CIM)) 4 2]. "S_IY3" is the end point port of the circuit wiring of the type, "CIM" is the end point device of the circuit wiring of the type, and "42" is the end point device of the circuit wiring of the type. Coordinate offset (because the origin device is the origin device, it is the coordinate offset of the end device with respect to the origin device). Each integer in "34275817 5701632 5702121" is the coordinate of the origin device of each circuit wiring belonging to the type, and there are 27 origin coordinates here. Therefore, it corresponds to 27 circuit wirings belonging to the type. The above example shows that there are 27 circuit wirings using the circuit wiring model. The circuit wiring model is a circuit wiring that connects the WL_OV port of the DQS resource to the S_IY3 port of the CIM resource. The relative coordinates between these are based on the device where the starting port WL_OV is located, and the coordinate offset of the device where the ending port S_IY3 is located with respect to the starting device is 4 for the X coordinate offset and 2 for the Y coordinate offset.

In step S303, the circuit wiring in the FPGA chip circuit is stored based on the circuit wiring model.

By storing the circuit wiring model corresponding to all types of circuit wiring in the intermediate file, the file can describe all the circuit connection relationships of the entire FPGA chip. When loading circuit wiring into the EDA tool, all the circuit wiring of the FPGA can be loaded into the EDA tool simply by loading and building the wiring model from the intermediate file.

When circuit wiring is used with the EDA tool, port A of any device is specified, and since the device is located in the grid coordinate system, it has absolute coordinates corresponding to the entire FPGA device. Also, since the circuit wiring model in which port A has its own characteristics is already stored at the time of construction, when it is necessary to acquire the circuit wiring connected to port A, port A is set to the absolute coordinates of the device in which it is located. Based on the coordinate offset between the devices where the start and end points are located in the circuit wiring model, the device information of the devices located at other nodes in the circuit wiring model is detected, and the port corresponding to the node name is detected according to the node name. Information can be acquired and necessary circuit wiring (device net) can be constructed.

In the circuit wiring storage method provided by this embodiment, a circuit wiring model is constructed for each type of circuit wiring in the circuit. Here, in the same type of circuit wiring, the origin device, the end device, the origin port, and the end port of a plurality of circuit wirings are all the same, and the circuit wiring model is a origin port connected to a certain type of circuit wiring. Information, information on the destination port, information on the origin device, and information on the destination device. That is, in this embodiment, one circuit wiring model contains related information of one type of circuit wiring, and stores each circuit wiring in the circuit based on the circuit wiring model. As a result, in this embodiment, the circuit wiring is classified based on the type of the circuit wiring and the circuit wiring is stored based on the type of the circuit wiring, as compared with the conventional method of storing all the structures of all the circuit wirings. It saves a lot of memory resources and improves the user experience.

Example 3
As shown in FIG. 6, the FPGA system provided by this embodiment includes a processor 601, a memory 602, and a communication bus 603. Here, the communication bus 603 enables connection communication between the processor 601 and the memory 602. The processor 601 executes one or more computer programs stored in the memory 602 so that at least one step of the circuit wiring storage method in the first and second embodiments is performed.

The storage medium provided by this embodiment is volatile or non-volatile as implemented in any method or technique for storing information (eg, computer-readable instructions, data structures, computer program modules or other data). Includes removable or non-removable media. The storage medium is RAM (Random Access Memory, random access memory), ROM (Read-Only Memory, read-only memory), EEPROM (Electrically Erasable Programmable read-only memory), and electrically erasable and rewritable. Memory or other memory technology, CD-ROM (Compact Disc Read-Only Memory, compact disk read-only memory), digital multifunction disk (DVD) or other optical disk memory, magnetic box, magnetic tape, magnetic disk storage device or others. A magnetic storage system, or other medium capable of storing necessary information and accessible from a computer, but not limited to.

The storage medium according to this embodiment is used to store one or more computer programs. The stored computer program is executed by the processor so that the steps are performed in the circuit wiring storage method in the first and second embodiments described above.

In the FPGA system and storage medium provided by this embodiment, one or more computer programs are stored in the storage medium, and one or more computer programs are used to store a circuit wiring model for each type of circuit wiring in the circuit. To construct. Here, in the same type of circuit wiring, the origin device, the end device, the origin port, and the end port of a plurality of circuit wirings are all the same, and the circuit wiring model is a origin port connected to a certain type of circuit wiring. Information, information on the destination port, information on the origin device, and information on the destination device. That is, in this embodiment, one circuit wiring model contains relevant information of one type of circuit wiring and stores each circuit wiring in the circuit based on the circuit wiring model. This makes it possible to classify based on the type of circuit wiring and store the circuit wiring based on the type of circuit wiring in the present invention, as compared with the conventional method of storing all structures of all circuit wiring. Memory resources are saved and the user experience is improved.

As will be appreciated by those skilled in the art, all or part of the steps in the methods disclosed above, functional modules / units in a device, are software (implemented by computer program code executable by a computing system), firmware, and so on. Implemented as hardware and the appropriate combination thereof. In the hardware implementation mode, the division between functional modules / units described above does not necessarily correspond to the division of physical components. For example, one physical component may have a plurality of functions, or one function or step may be executed in cooperation by a plurality of physical components. Some or all physical components are performed as integrated circuits such as software, hardware, or application-specific integrated circuits executed by processors such as central processing units, digital signal processors, or microprocessors.

The above-mentioned contents explain the embodiment of the present invention in more detail based on the specific embodiment, and it cannot be considered that the specific implementation of the present invention is limited to these explanations. Those skilled in the art may make minor improvements and modifications as long as they do not deviate from the spirit of the present invention. These improvements and modifications are also considered to be the scope of protection of the present invention.

This application is the priority of a Chinese patent application filed with the China Bureau of Interest on July 22, 2019, with an application number of 201910662629.5 and the title of the invention being "circuit wiring storage method, device and storage medium". And incorporates all the contents of the previous application.

Claims (20)

It is a circuit wiring storage method.
Steps to build a circuit wiring model for each type of circuit wiring in the circuit,
Including a step of storing circuit wiring in the circuit based on the circuit wiring model.
In the same type of circuit wiring, the start device, end device, start port and end port connected to the circuit wiring of a plurality of circuit wirings are all the same.
The circuit wiring model includes information on the start point port, information on the end point port, information on the start point device, and information on the end point device.
The origin device is a device connected to the origin of the circuit wiring.
A circuit wiring storage method, wherein the end point device is a device connected to the end point of the circuit wiring. The circuit wiring storage method according to claim 1.
A circuit wiring storage method, characterized in that the relative positions of the start point device and the end point device are the same in the circuit wiring of the same type. The circuit wiring storage method according to claim 2.
A circuit wiring storage method, characterized in that the relative position information related to the relative position between the start point device and the end point device includes the position offset information of the end point device with respect to the start point device. The circuit wiring storage method according to claim 2 or 3.
The circuit wiring is characterized in that the information of the end point device in any circuit wiring is acquired by the information of the start point device in the circuit wiring and the relative position between the start point device and the end point device in the circuit wiring. Memory method. The circuit wiring storage method according to claim 2 or 3.
The circuit wiring is characterized in that the information of the origin device in any circuit wiring is acquired by the information of the end point device in the circuit wiring and the relative position between the origin device and the end point device in the circuit wiring. Memory method. The circuit wiring storage method according to claim 2 or 3.
The circuit wiring model contains information on the start point port, information on the end point port, relative position information between the start point device and the end point device, and information on the start point device in any type of circuit wiring. A circuit wiring storage method comprising. The circuit wiring storage method according to claim 2 or 3.
The circuit wiring model includes information on the start point port, information on the end point port, relative position information between the start point device and the end point device, and information on the end point device in any type of circuit wiring. A circuit wiring storage method characterized by including. The circuit wiring storage method according to claim 2.
Before performing the steps to build a circuit wiring model for each type of circuit wiring in the circuit,
A circuit wiring storage method comprising further steps of constructing a coordinate system based on a specific layout of a simulation of the circuit in an electronic design automation tool. The circuit wiring storage method according to claim 8.
The circuit wiring storage method is characterized in that the circuit wiring model has information on the origin device including coordinate information of the origin device. The circuit wiring storage method according to claim 9.
The circuit wiring storage method, characterized in that the information of the origin device includes an integer representing the coordinates of the origin device acquired by processing the abscissa and coordinates of the origin device based on a predetermined rule. The circuit wiring storage method according to claim 8.
The circuit wiring storage method is characterized in that the circuit wiring model has information on the end point device including coordinate information on the end point device. The circuit wiring storage method according to claim 11.
The circuit wiring storage method, characterized in that the information of the origin device includes an integer representing the coordinates of the end device acquired by processing the abscissa and coordinates of the end device based on a predetermined rule. The circuit wiring storage method according to any one of claims 8 to 12.
The circuit includes a plurality of circuit modules.
The steps to build a coordinate system based on the concrete layout of the simulation of the circuit in the electronic design automation tool are:
A circuit wiring storage method comprising a step of constructing a grid coordinate system according to the arrangement of the circuit modules based on a specific layout of simulation of the circuit in an electronic design automation tool. The circuit wiring storage method according to claim 13.
The circuit module includes a plurality of devices.
The steps to build a coordinate system based on the concrete layout of the simulation of the circuit in the electronic design automation tool are:
A circuit wiring storage method comprising a step of constructing a device coordinate system according to the arrangement of the device based on a specific layout of simulation of the circuit in an electronic design automation tool. The circuit wiring storage method according to claim 1.
Each of the origin devices is connected to at least one of the endpoint devices via circuit leads.
A circuit wiring storage method, wherein each end point device is connected to one start point device via the circuit lead. The circuit wiring storage method according to claim 1.
The plurality of circuit wirings of the same type have the same number of origin devices.
A circuit wiring storage method, wherein a plurality of the circuit wirings of the same type have the same number of end point devices. The circuit wiring storage method according to claim 1.
After performing the step of storing the circuit wiring in the circuit based on the circuit wiring model,
A circuit wiring storage method comprising a step of constructing a circuit wiring of the device based on the circuit wiring model when constructing the circuit wiring belonging to the device. The circuit wiring storage method according to claim 1.
The circuit is a circuit wiring storage method, characterized in that the circuit is a field programmable logic array FPGA chip circuit. It ’s an FPGA system.
Includes processor, memory, communication bus,
The communication bus enables connection communication between the processor and the memory.
The FPGA comprises executing one or more computer programs stored in the memory so that the steps of the circuit wiring storage method according to any one of claims 1 to 10 are performed. system. A storage medium in which one or more computer programs are stored.
Storage characterized in that one or more of the computer programs are executed by one or more processors so that the steps of the circuit wiring storage method according to any one of claims 1 to 18 are performed. Medium.

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