JP2020161763A - Semiconductor device, electronic apparatus and movable body - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device having a small thermal resistance between a heat exchange element and a substrate, and an electronic device and a moving body including the semiconductor device.
SOLUTION: An insulating substrate having a first surface and a second surface which are in a front-to-back relationship with each other, a plurality of external connection terminals provided on the first surface, and provided on the second surface. A wiring board having a plurality of internal connection terminals and a penetrating wiring that penetrates the insulating substrate and electrically connects the external connection terminal and the internal connection terminal is provided on the second surface. A semiconductor element and a heat exchange element provided between the wiring substrate and the semiconductor element and having a plurality of thermoelectric semiconductor elements are provided, and the internal connection terminal and the heat exchange element are a bonding wire or a metal for bonding. A semiconductor device characterized by being electrically connected to each other via a device.
[Selection diagram] Fig. 1

Description

The present invention relates to semiconductor devices, electronic devices and mobile bodies.

The amount of heat generated from semiconductor elements is increasing due to the high speed and high integration of semiconductor devices. On the other hand, the structure of the semiconductor device has shifted from the conventional lead frame structure to the area array package structure provided with protruding electrodes such as solder balls. For this reason, the heat generated from the semiconductor element is likely to be trapped, and the performance of the semiconductor device may be deteriorated.

Therefore, Patent Document 1 discloses a laminated multi-chip semiconductor device in which electronic cooling elements are arranged in a state of being laminated on a plurality of semiconductor elements. Specifically, this laminated multi-chip semiconductor device includes an interposer, a Peltier element, and a semiconductor element. In such a semiconductor device, the heat of the semiconductor element can be efficiently dissipated to the interposer side by the electronic cooling element.

Japanese Unexamined Patent Publication No. 2003-17638

However, in the semiconductor device described in Patent Document 1, the Peltier element and the interposer are connected via a large number of bumps. The bump generally refers to a protruding terminal. Therefore, when the electronic cooling element and the interposer are connected via the bump, the bump serves as a heat dissipation path, but the connection area is very small compared to the area of the electronic cooling element. Therefore, there is a problem that the thermal resistance between the electronic cooling element and the interposer becomes large, and the heat dissipation efficiency cannot be sufficiently improved.

The semiconductor device according to the application example of the present invention includes an insulating substrate having a first surface and a second surface which are in a front-to-back relationship with each other, a plurality of external connection terminals provided on the first surface, and the second surface. A wiring board having a plurality of internal connection terminals provided on the surface, and a through wiring that penetrates the insulating substrate and electrically connects the external connection terminal and the internal connection terminal.
The semiconductor element provided on the second surface side and
A heat exchange element provided between the wiring board and the semiconductor element and having a plurality of thermoelectric semiconductor elements,
With
The internal connection terminal and the electrode of the heat exchange element are electrically connected to each other via a bonding wire or a bonding metal.

It is sectional drawing which shows the semiconductor device which concerns on 1st Embodiment. It is a block diagram which shows the function which the semiconductor element shown in FIG. 1 has. It is a circuit diagram which shows the structure of the switching part shown in FIG. It is a table showing the relationship between the enable signal EN and the current control signal CNT in the switching section shown in FIG. 3 and the energized state of the heat exchange element. This is an example of a flowchart for controlling the operation of the heat exchange element shown in FIG. It is a figure for demonstrating an example of the control pattern of the heat exchange element controlled by the flow shown in FIG. It is sectional drawing which shows the semiconductor device which concerns on the modification of 1st Embodiment. It is sectional drawing which shows the semiconductor device which concerns on 2nd Embodiment. It is sectional drawing which shows the semiconductor device which concerns on 3rd Embodiment. It is a perspective view which shows the mobile type personal computer which is an electronic device which concerns on embodiment. It is a top view which shows the mobile phone which is the electronic device which concerns on embodiment. It is a perspective view which shows the digital still camera which is an electronic device which concerns on embodiment. It is a perspective view which shows the automobile which is the moving body which concerns on embodiment.

Hereinafter, the semiconductor device, the electronic device, and the moving body of the present invention will be described in detail based on the preferred embodiments shown in the accompanying drawings.

<First Embodiment>
First, the semiconductor device according to the first embodiment will be described.

FIG. 1 is a cross-sectional view showing a semiconductor device according to the first embodiment. In FIG. 1, the X-axis, the Y-axis, and the Z-axis are shown as three axes orthogonal to each other. In the following description, for convenience of explanation, the Z-axis plus side will be referred to as "upper" and the Z-axis minus side will be referred to as "lower".

However, in the following description, "provided on the surface" and "provided on the surface side" are the states in which they are provided so as to be in contact with the surface regardless of whether they are above or below in the drawing, or their It refers to any of the states provided on the surface via some inclusions.

The semiconductor device 1 shown in FIG. 1 includes a wiring board 2, a semiconductor element 3, and a heat exchange element 4. A heat exchange element 4 is arranged on the wiring board 2, and a semiconductor element 3 is arranged on the heat exchange element 4. Further, the semiconductor element 3 and the heat exchange element 4 are coated with the mold resin 9. Each part will be described below.

The wiring board 2 is an interposer board having a so-called area array package structure. Specifically, the area array package structure includes, for example, a ball grid array (BGA) structure, a land grid array (LGA) structure, a pin grid array (PGA) structure, and the like. In FIG. 1, as an example, the wiring board 2 adopting the ball grid array structure is shown, but the wiring board 2 may adopt another structure.

The wiring board 2 shown in FIG. 1 has an insulating substrate 22 having a lower surface 221 (first surface) and an upper surface 222 (second surface) which are in a front-to-back relationship with each other, and a plurality of external connection terminals provided on the lower surface 221. 24, a plurality of internal connection terminals 26 provided on the upper surface 222, and a plurality of through wirings 28 that penetrate the insulating substrate 22 and electrically connect the external connection terminal 24 and the internal connection terminal 26. Have.

Of these, the plurality of internal connection terminals 26 are located between the first internal connection terminal 261 arranged around the heat exchange element 4 on the upper surface 222 of the insulating substrate 22, and between the heat exchange element 4 and the wiring board 2. It includes a second internal connection terminal 262, which is arranged. Further, some of the first internal connection terminals 261 are electrically connected to each other via wiring (not shown). As a result, the pitch between the internal connection terminals 26 and the pitch between the external connection terminals 24 can be made different, and the wiring board 2 can be used as an interposer board.

On the other hand, the external connection terminals 24 are arranged in a grid shape on the lower surface 221 of the insulating substrate 22. In other words, the external connection terminals 24 are arranged at equal intervals in both the X-axis direction and the Y-axis direction, for example. The wiring board 2 has a solder ball 29 to be joined to each external connection terminal 24. According to such a grid array structure, it is possible to increase the density of electrical connections while reducing the package size.

Further, the plurality of external connection terminals 24 are arranged in a grid shape as described above, but include a first external connection terminal 241 and a second external connection terminal 242. Of these, the first external connection terminal 241 is electrically connected to the first internal connection terminal 261. Further, the second external connection terminal 242 is thermally connected to the second internal connection terminal 262. Such electrical and thermal connections are realized by a plurality of through wires 28. Specifically, the plurality of through wirings 28 described above include the first through wiring 281 and the second through wiring 282. Then, the first external connection terminal 241 and the first internal connection terminal 261 are electrically connected via the first through wiring 281. Further, the second external connection terminal 242 and the second internal connection terminal 262 are thermally connected via a second through wiring 282 which is a thermal through-hole via.

The second external connection terminal 242 is provided at substantially the same position in the XY plane of the second internal connection terminal 262 described above. As a result, the wiring length of the second through wiring 282 can be shortened, and the thermal resistance between the second external connection terminal 242 and the second internal connection terminal 262 can be reduced.

Further, the GND plane, the heat radiating plane, the heat radiating fins, and the like of the substrate used for the secondary mounting may be connected to the second external connection terminal 242, if necessary. As a result, the heat dissipation efficiency at the second external connection terminal 242 can be further improved.

Examples of the insulating substrate 22 include a resin substrate and a ceramics substrate. Further, the insulating substrate 22 may be a multilayer substrate in which wiring or the like is formed.

The constituent materials of the external connection terminal 24, the internal connection terminal 26, and the through wiring 28 include, for example, simple metals such as Ni, Au, Pd, Cu, Ag, Pt, Al, Ti, Mn, Mo, and W, or these. Examples include alloys.

The solder ball 29 is a ball bump containing various solders or various brazing materials. The solder balls 29 are responsible for electrical and mechanical connection with the mounting board when the semiconductor device 1 is mounted on the mounting board or the like.

A semiconductor element 3 is arranged on the wiring board 2 via a heat exchange element 4 described later.
Examples of the semiconductor element 3 include integrated circuit elements such as ICs (Integrated Circuits) and LSIs (Large Scale Integrated circuits). The semiconductor element 3 shown in FIG. 1 has an element main body 31 and an electrode 32 provided on the upper surface of the element main body 31. The electrode 32 and the first internal connection terminal 261 are electrically connected via a bonding wire 52.

A heat exchange element 4 is arranged between the wiring board 2 and the semiconductor element 3.
The heat exchange element 4 includes a plurality of thermoelectric semiconductor elements 42, a first support substrate 44 provided below the thermoelectric semiconductor element 42, and a second support substrate 46 provided above the thermoelectric semiconductor element 42. have. Further, the adjacent thermoelectric semiconductor elements 42 are electrically connected to each other via electrodes 48 provided on the upper surface of the first support substrate 44 and the lower surface of the second support substrate 46, respectively. Further, the first support substrate 44 and the second support substrate 46 are filled with the filling portion 49 and electrically insulated from each other.

The thermoelectric semiconductor element 42 according to this embodiment is a Peltier element. The Peltier element is an element that causes a phenomenon in which heat generation or heat absorption is generated in a connected portion by connecting thermoelectric semiconductor elements 42 having different electrical characteristics in series and passing an electric current, that is, a so-called Peltier effect. By utilizing this phenomenon, the heat from the semiconductor element 3 can be absorbed and released to the wiring board 2 side. On the contrary, the heat on the wiring board 2 side can be transferred to the semiconductor element 3. As a result, the heat of the semiconductor element 3 can be efficiently transferred.

Specifically, the thermoelectric semiconductor element 42 includes an n-type thermoelectric semiconductor element 42n and a p-type thermoelectric semiconductor element 42p. Then, the n-type thermoelectric semiconductor element 42n and the p-type thermoelectric semiconductor element 42p are arranged alternately, and the adjacent elements are electrically connected to each other via the electrode 48.

Further, the electrode 48 located outside the second support substrate 46 is provided so that the upper surface thereof is exposed. Then, the electrode 48 and the first internal connection terminal 261 are electrically connected via the bonding wire 54.

The first support substrate 44 and the second support substrate 46 are, for example, ceramic substrates, respectively. Further, the electrode 48 is, for example, a metal foil or a metal plating film formed on these substrates.

The filling portion 49 fills between the first support substrate 44 and the second support substrate 46, and insulates the thermoelectric semiconductor elements 42 from each other. As the filling portion 49, for example, a resin material is used. Further, a conductive filler or the like may be added as needed. The filling portion 49 may be omitted.

The wiring board 2 and the heat exchange element 4 are adhered to each other via an adhesive layer 62. As a result, the wiring board 2 and the heat exchange element 4 are mechanically fixed and insulated.

Further, the heat exchange element 4 and the semiconductor element 3 are adhered to each other via an adhesive layer 64. As a result, the heat exchange element 4 and the semiconductor element 3 are mechanically fixed and insulated.

Examples of the constituent materials of the adhesive layers 62 and 64 include epoxy adhesives, silicone adhesives, urethane adhesives, acrylic adhesives and the like. Further, an additive such as a heat conductive filler may be added to the adhesive layer 62, if necessary.

As described above, the semiconductor device 1 according to the present embodiment is provided on the insulating substrate 22 having the lower surface 221 (first surface) and the upper surface 222 (second surface) and the lower surface 221 which are in a front-to-back relationship with each other. Through wiring that penetrates the plurality of external connection terminals 24, the plurality of internal connection terminals 26 provided on the upper surface 222, and the insulating substrate 22 to electrically connect the external connection terminals 24 and the internal connection terminals 26. A wiring substrate 2 having 28, a semiconductor element 3 provided on the upper surface 222 side, and a heat exchange element 4 provided between the wiring substrate 2 and the semiconductor element 3 and having a plurality of thermoelectric semiconductor elements 42. , Is equipped. The electrodes 48 and the internal connection terminals 26 of the heat exchange element 4 are electrically connected to each other via the bonding wire 54.

According to such a configuration, since the heat exchange element 4 and the wiring board 2 are connected via the bonding wire 54, the heat exchange element 4 and the wiring board 2 can be connected to each other without using a bump as in the conventional case. Can be electrically connected. Therefore, the distance between the heat exchange element 4 and the wiring board 2 can be reduced. As a result, the thickness of the adhesive layer 62 can be the minimum thickness that can ensure the insulating property. Therefore, it is possible to reduce the thermal resistance between the heat exchange element 4 and the wiring board 2.

That is, in the case of connection via bumps as in the conventional case, since heat is transferred through the bumps, there is a problem that the area of the heat transfer path becomes small and the path length becomes long. On the other hand, since the bonding wire 54 eliminates the need for bumps, the thickness of the adhesive layer 62 described above, that is, the path length of the heat transfer path can be shortened, and the thermal resistance can be reduced. it can. As a result, the heat transferred from the semiconductor element 3 to the heat exchange element 4 can be efficiently exhausted to the wiring board 2 side via the adhesive layer 62.

As a result, in the semiconductor device 1, the response of the temperature control of the semiconductor element 3 by the heat exchange element 4 becomes faster, and more accurate temperature control becomes possible. Therefore, it is possible to realize a highly reliable semiconductor device 1 with particularly little deterioration in performance due to temperature changes. Further, since the power consumption of the heat exchange element 4 required for temperature control can be reduced, the power consumption of the semiconductor device 1 can be reduced.

The thickness of the adhesive layers 62 and 64 is preferably 500 μm or less, more preferably 300 μm or less, and further preferably 50 μm or more and 200 μm or less. By setting the thickness of the adhesive layers 62 and 64 within the above range, it is possible to secure sufficient insulating properties while suppressing the thermal resistance of the adhesive layers 62 and 64 in the thickness direction.

Further, according to the bonding wire 54, the wiring can be laid at a position away from the wiring board 2, so which of the first internal connection terminals 261 of the wiring board 2 is connected to the bonding wire 54? The degree of freedom of choice can be increased. That is, it is possible to eliminate the restriction that the first internal connection terminal 261 for connecting to the heat exchange element 4 is arranged directly below the heat exchange element 4. As a result, the first internal connection terminal 261 for connecting to the semiconductor element 3 can be arranged at a more optimum position, so that the characteristics of the semiconductor device 1 can be easily improved.

Further, since the bonding wire 54 is connected to the electrode 48 exposed on the upper surface of the heat exchange element 4, the area of the electrode 48 can be sufficiently widened. Therefore, some misalignment of the bonding wire 54 is allowed. In other words, since it is not necessary to improve the placement accuracy of the heat exchange element 4 with respect to the wiring board 2, the placement work can be facilitated. Therefore, the semiconductor device 1 is easier to manufacture.

Further, in the present embodiment, the electrode 32 of the semiconductor element 3 and the first internal connection terminal 261 are electrically connected to each other via the bonding wire 52. Further, there are a plurality of first internal connection terminals 261 to which the bonding wire 52 is connected and a plurality of first internal connection terminals 261 to which the above-mentioned bonding wire 54 is connected, and some of them are not shown. It is electrically connected via. Therefore, the electrode 32 of the semiconductor element 3 and the electrode 48 of the heat exchange element 4 are electrically connected via the bonding wires 52 and 54.

According to such a configuration, the electrical connection related to the semiconductor element 3 and the electrical connection related to the heat exchange element 4 can be performed in one bonding operation. Further, the conventional step of providing the bump and the step of electrically connecting the bump and the internal connection terminal 26 are not required. Therefore, the work efficiency is high and the cost can be easily reduced.

Further, as described above, the internal connection terminal 26 according to the present embodiment is located at a position where it does not overlap with the heat exchange element 4 when the upper surface 222 (second surface) of the insulating substrate 22 is viewed in a plane on the negative side in the Z-axis direction. It includes a first internal connection terminal 261 provided and a second internal connection terminal 262 provided at a position overlapping with the heat exchange element 4.

Therefore, the bonding wires 52 and 54 can be connected to the first internal connection terminal 261. On the other hand, the second internal connection terminal 262 comes close to the heat exchange element 4 via the adhesive layer 62. Therefore, the heat discharged from the heat exchange element 4 is transferred to the outside of the semiconductor device 1 via the second internal connection terminal 262, the second through wiring 282 connected to the second internal connection terminal 262, and the second external connection terminal 242. Can be done. Therefore, by providing the second internal connection terminal 262, it is possible to reduce the thermal resistance in the thickness direction of the wiring board 2 and improve the efficiency of exhaust heat.

Further, the wiring board 2 shown in FIG. 1 has a second through wiring 282 for connecting the second internal connection terminal 262 and the external connection terminal 24. By providing such a second through wiring 282, the thermal resistance between the second external connection terminal 242 and the second internal connection terminal 262 can be particularly reduced.

In particular, it is preferable that the second through wiring 282 is provided directly below the second internal connection terminal 262. Directly below means a state in which the second through wiring 282 is located inside the outer edge of the second internal connection terminal 262 when the upper surface 222 of the insulating substrate 22 is viewed in a plan view on the negative side in the Z-axis direction. By providing such a second through wiring 282, the thermal resistance between the second external connection terminal 242 and the second internal connection terminal 262 can be further reduced.

Further, the cross-sectional area of the second through wiring 282, that is, the cross-sectional area when cut on the XY plane, is the cross section of the first through wiring 281 that connects the first internal connection terminal 261 and the first external connection terminal 241 described above. It may be larger than the area. As a result, the thermal resistance can be further reduced.

Here, as described above, the heat exchange element 4 includes an n-type thermoelectric semiconductor element 42n and a p-type thermoelectric semiconductor element 42p connected in series. Then, in the heat exchange element 4 shown in FIG. 1, when a direct current is passed from the electrode 482 connected to the p-type thermoelectric semiconductor element 42p, the second support substrate 46 side becomes the heat absorbing side, and the heat from the semiconductor element 3 becomes the heat absorbing side. Can be absorbed and moved to the first support substrate 44 side. On the other hand, on the contrary, when a direct current is passed from the electrode 481 connected to the n-type thermoelectric semiconductor element 42n, the second support substrate 46 side becomes the heat dissipation side, so that the semiconductor element 3 can be heated.

The operation of such a heat exchange element 4 may be controlled from the outside of the semiconductor device 1, but may be controlled by the semiconductor element 3.

FIG. 2 is a block diagram showing a function included in the semiconductor element 3 shown in FIG. The semiconductor element 3 has a current control circuit 30 including a temperature sensor unit 33, a temperature control unit 34, and a switching unit 36 as internal functions. Hereinafter, each part of the current control circuit 30 will be described in detail. Further, FIG. 3 is a circuit diagram showing the configuration of the switching unit shown in FIG.

The temperature sensor unit 33 directly measures the temperature of the semiconductor element 3 itself. Therefore, it is possible to output a detection result with a small measurement error and a small time lag.

The temperature control unit 34 controls the operation of the switching unit 36 based on the temperature detection result output from the temperature sensor unit 33. The temperature control unit 34 outputs an enable terminal 342 that outputs an enable signal that controls the on / off of the operation of the heat exchange element 4, and a current control that outputs a current control signal that controls the on / off of the current to the heat exchange element 4. It has terminals 344 and. The enable signal and the current control signal have a potential of either 0 or 1.

The switching unit 36 includes a first control element 361 and a second control element 362. The first control element 361 and the second control element 362 include p-type MOS transistors 361p and 362p and n-type MOS transistors 361n and 362n, respectively. The source electrodes of the p-type MOS transistors 361p and 362p are given a power supply potential VDD via the p-type MOS transistor 363p provided in the middle of the power supply line. The gate electrode of the p-type MOS transistor 363p is connected to the enable terminal 342 described above. On the other hand, a reference potential GND is given to each source electrode of the n-type MOS transistors 361n and 362n.

Further, the output end 3612 of the first control element 361 is connected to the electrode 482 of the p-type thermoelectric semiconductor element 42p of the heat exchange element 4. Further, the output end 3622 of the second control element 362 is connected to the electrode 481 of the n-type thermoelectric semiconductor element 42n of the heat exchange element 4.

On the other hand, the input end 3611 of the first control element 361 is connected to the above-mentioned current control terminal 344. Further, the input end 3621 of the second control element 362 is connected to the current control terminal 344 via the NOT gate 364.

Next, the operation of the switching unit 36 will be described.
FIG. 4 is a table showing the relationship between the enable signal EN and the current control signal CNT in the switching unit shown in FIG. 3 and the energized state of the heat exchange element 4. FIG. 5 is an example of a flowchart for controlling the operation of the heat exchange element 4 shown in FIG. FIG. 6 is a diagram for explaining an example of a control pattern of the heat exchange element 4 controlled by the flow shown in FIG.

As shown in FIG. 4, when the enable signal EN is 1 and the current control signal CNT is 0 or 1, the heat exchange element 4 is not energized, so the heat exchange element 4 does not operate.

On the other hand, when the enable signal EN is 0 and the current control signal CNT is 0, the power supply potential VDD is selected in the p-type MOS transistor 361p of the first control element 361, so that the power supply potential VDD is given to the electrode 482. Since the reference potential GND is selected in the n-type MOS transistor 362n of the second control element 362, the reference potential GND is given to the electrode 481. Therefore, the heat exchange element 4 is energized in the direction of heating the semiconductor element 3.

Further, when the enable signal EN is 0 and the current control signal CNT is 1, the reference potential GND is selected in the n-type MOS transistor 361n of the first control element 361, so that the reference potential GND is given to the electrode 482. Since the power potential VDD is selected in the p-type MOS transistor 362p of the second control element 362, the power potential VDD is given to the electrode 481. Therefore, the heat exchange element 4 is energized in the direction of cooling the semiconductor element 3.

Next, the control flow shown in FIG. 5 will be described.
First, when the power of the semiconductor device 1 is turned on in step S01 of FIG. 5 and the semiconductor element 3 is activated in step S02, the temperature of the semiconductor element 3 is detected by the temperature sensor unit 33 in step S03. Further, as shown after the time t1 in FIG. 6, the temperature of the semiconductor element 3 detected by the temperature sensor unit 33 gradually rises. Then, in step S04, the temperature control unit 34 determines whether the temperature of the semiconductor element 3 is higher or lower than the temperature control range T.

At time t2, since the temperature of the semiconductor element 3 is higher than the temperature control range T, the enable signal EN is changed from 1 to 0, and 1 is selected as the current control signal CNT. As a result, in step S05, the heat exchange element 4 is energized in the direction of absorbing the heat of the semiconductor element 3, that is, in the cooling direction, so that the temperature of the semiconductor element 3 drops. On the other hand, although not shown, when the temperature of the semiconductor element 3 is lower than the temperature control range T, 0 may be selected as the current control signal CNT. As a result, in step S06, the heat exchange element 4 is energized in the direction of heating the semiconductor element 3, so that the temperature of the semiconductor element 3 rises.

After that, in step S07, it is determined whether or not the operation of the semiconductor element 3 is stopped, and if it is stopped, the power is turned off as step S08, and if it is not stopped, the process goes to step S03 again. I will be back.

In FIG. 6, after the time t2, the temperature drop of the semiconductor element 3 is detected in step S03, and at the time t3 below the temperature control range T shown in FIG. 6, current control is performed based on the determination of the temperature control unit 34 in step S04. Select 0 as the signal CNT. As a result, in step S06, the heat exchange element 4 is energized in the direction of heating the semiconductor element 3, so that the temperature of the semiconductor element 3 rises. After that, at time t4 when the temperature of the semiconductor element 3 exceeds the temperature control range T, 1 is selected again as the current control signal CNT. As a result, the temperature of the semiconductor element 3 drops again. After the time t5, the control is performed in the same manner as in the case of the time t3 and the time t4. As described above, the temperature of the semiconductor element 3 can be controlled so as to fall within the temperature control range T shown in FIG.

According to the above control, heat is suppressed from being trapped in the semiconductor element 3, and performance deterioration due to heat is less likely to occur. In addition, since the temperature of the semiconductor element 3 can be controlled so as to fall within the temperature control range T, even if the characteristics of the semiconductor element 3 are temperature-dependent, the characteristic change can be minimized. As a result, a more reliable semiconductor device 1 can be realized.

As described above, the semiconductor element 3 according to the present embodiment has a current control circuit 30 that controls the current flowing through the heat exchange element 4. As a result, the semiconductor element 3 can control its own temperature. Therefore, it is possible to realize a highly reliable semiconductor device 1 with little change in performance even when the temperature of the semiconductor element 3 changes without relying on an external current control circuit.

<Modification example>
Next, the semiconductor device according to the modified example of the first embodiment will be described.
FIG. 7 is a cross-sectional view showing a semiconductor device according to a modified example of the first embodiment.

Hereinafter, a modified example will be described, but in the following description, the differences from the first embodiment will be mainly described, and the description of the same matters will be omitted. Note that, in FIG. 7, the same components as those in the first embodiment are designated by the same reference numerals as those in the above-described drawings.

This modification is the same as that of the first embodiment except that the second internal connection terminals 262 are connected to each other. That is, the semiconductor device 1 shown in FIG. 7 includes a plurality of second internal connection terminals 262 provided at positions overlapping with the heat exchange element 4. Then, the second internal connection terminals 262 are connected to each other to form one large terminal. That is, at least two of the plurality of second internal connection terminals 262 are integrally arranged. According to such a configuration, the thermal contact resistance between the second internal connection terminal 262 and the heat exchange element 4 can be suppressed to be smaller. As a result, the thermal resistance between the heat exchange element 4 and the wiring board 2 can be further reduced.
Even in the above-described modification, the same effect as that of the first embodiment can be obtained.

<Second Embodiment>
Next, the semiconductor device according to the second embodiment will be described.
FIG. 8 is a cross-sectional view showing the semiconductor device according to the second embodiment.

Hereinafter, the second embodiment will be described, but in the following description, the differences from the first embodiment will be mainly described, and the same matters will be omitted. In FIG. 8, the same configurations as those in the first embodiment are designated by the same reference numerals as those in the above-described drawings.

In the above-described first embodiment, the heat exchange element 4 and the wiring board 2 are electrically connected via the bonding wire 54, whereas in the present embodiment, the heat exchange element is connected via the bonding metal 56. 4 and the wiring board 2 are electrically connected.

Specifically, in the heat exchange element 4 shown in FIG. 1, the electrodes 481 and 482 are exposed on the upper surface thereof, whereas in the heat exchange element 4 shown in FIG. 8, the electrodes 481 and 482 are exposed on the lower surface side thereof. It is exposed.

Then, the electrode 481 and the second internal connection terminal 262 are electrically connected via the bonding metal 56. Similarly, the electrode 482 and the second internal connection terminal 262 are electrically connected via the bonding metal 56.

As described above, the semiconductor device 1 according to the present embodiment is provided on the insulating substrate 22 having the lower surface 221 (first surface) and the upper surface 222 (second surface) and the lower surface 221 which are in a front-to-back relationship with each other. Through wiring that penetrates the plurality of external connection terminals 24, the plurality of internal connection terminals 26 provided on the upper surface 222, and the insulating substrate 22 to electrically connect the external connection terminals 24 and the internal connection terminals 26. A wiring substrate 2 having 28, a semiconductor element 3 provided on the upper surface 222 side, and a heat exchange element 4 provided between the wiring substrate 2 and the semiconductor element 3 and having a plurality of thermoelectric semiconductor elements 42. , Is equipped. The electrodes 48 and the internal connection terminals 26 of the heat exchange element 4 are electrically connected to each other via the bonding metal 56.

According to such a configuration, since the heat exchange element 4 and the wiring board 2 are connected via the bonding metal 56, the heat exchange element 4 and the wiring board 2 can be connected to each other without using a bump as in the conventional case. Can be electrically connected. Therefore, the distance between the heat exchange element 4 and the wiring board 2 can be reduced. As a result, the thickness of the adhesive layer 62 can be the minimum thickness that can ensure the insulating property. Therefore, it is possible to reduce the thermal resistance between the heat exchange element 4 and the wiring board 2.

Examples of the bonding metal 56 include solder, a brazing material, a metal paste containing Au, Ag, Cu, Au-Pd, Ag-Pd, and the like, and solder is particularly preferably used. According to solder, bonding can be performed at a relatively low temperature, and the contact resistance can be relatively low.
In the second embodiment as described above, the same effect as that of the first embodiment can be obtained.

<Third Embodiment>
Next, the semiconductor device according to the third embodiment will be described.
FIG. 9 is a cross-sectional view showing the semiconductor device according to the third embodiment.

Hereinafter, the third embodiment will be described, but in the following description, the differences from the first embodiment will be mainly described, and the same matters will be omitted. In FIG. 9, the same configurations as those in the first embodiment are designated by the same reference numerals as those in the above-described drawings.

In the first embodiment described above, the heat exchange element 4 is a Peltier element, whereas in the present embodiment, the heat exchange element 4A shown in FIG. 9 is a Seebeck element. The Seebeck element is an element that causes a phenomenon in which a potential difference is generated by connecting thermoelectric semiconductor elements 42 having different electrical characteristics in series and exposing them to a temperature difference, that is, a so-called Seebeck effect. Utilizing this phenomenon, the semiconductor element 3 side is set to the high temperature side and the wiring board 2 side is set to the low temperature side, and power generation can be performed using this temperature difference and heat can be transferred. On the contrary, with the wiring board 2 side as the high temperature side and the semiconductor element 3 side as the low temperature side, power generation can be performed using this temperature difference and heat can be transferred. This makes it possible to control the temperature of the semiconductor element 3.

Further, since the Seebeck element can generate electric energy from the temperature difference, the semiconductor device 1 according to the present embodiment is wired so that the generated electric energy can be supplied to the power supply line of the semiconductor element 3. It may have been. As a result, the power consumption of the semiconductor device 1 can be reduced.
Also in the third embodiment as described above, the same effect as that of the first embodiment can be obtained.

<Electronic equipment>
FIG. 10 is a perspective view showing a mobile personal computer which is an electronic device according to an embodiment.

In FIG. 10, the personal computer 1100 is composed of a main body 1104 having a keyboard 1102 and a display unit 1106 having a display 1108, and the display unit 1106 rotates with respect to the main body 1104 via a hinge structure. It is movably supported. Such a personal computer 1100 has a built-in semiconductor device 1 for controlling its operation.

FIG. 11 is a plan view showing a mobile phone which is an electronic device according to the embodiment.
In FIG. 11, the mobile phone 1200 includes an antenna (not shown), a plurality of operation buttons 1202, an earpiece 1204 and a mouthpiece 1206, and a display unit 1208 is arranged between the operation button 1202 and the earpiece 1204. There is. Such a mobile phone 1200 has a built-in semiconductor device 1 for controlling its operation.

FIG. 12 is a perspective view showing a digital still camera which is an electronic device according to an embodiment.

In FIG. 12, a display unit 1310 is provided on the back surface of the case 1302 of the digital still camera 1300 so as to perform display based on an image pickup signal by a CCD, and the display unit 1310 displays a subject as an electronic image. Functions as a finder. Further, on the front side of the case 1302, that is, on the back side in the drawing, a light receiving unit 1304 including an imaging optical system such as an optical lens and a CCD is provided. Then, when the photographer confirms the subject image displayed on the display unit 1310 and presses the shutter button 1306, the imaging signal of the CCD at that time is transferred and stored in the memory 1308. Such a digital still camera 1300 has a built-in semiconductor device 1 for controlling its operation.

The electronic device as described above includes the semiconductor device 1. Since the semiconductor device 1 is a highly reliable device in which performance deterioration due to a temperature change is suppressed, the reliability of the electronic device can be improved.

The electronic device including the semiconductor device 1 includes a personal computer of FIG. 9, a mobile phone of FIG. 11, a digital still camera of FIG. 12, and for example, a smartphone, a tablet terminal, a clock including a smart watch, an inkjet ejection device, and the like. For example, wearable terminals such as inkjet printers and HMDs (head mount displays), laptop personal computers, televisions, video cameras, video tape recorders, car navigation devices, pagers, electronic notebooks including communication functions, electronic dictionaries, calculators, electronic games. Equipment, word processors, workstations, videophones, security TV monitors, electronic binoculars, POS terminals, electronic thermometers, blood pressure monitors, blood glucose meters, electrocardiogram measuring devices, ultrasonic diagnostic devices, medical devices such as electronic endoscopes, school of fish It may be a detector, various measuring devices, a vehicle, an aircraft, an instrument such as a ship, a base station for a mobile terminal, a flight simulator, or the like.

<Moving body>
FIG. 13 is a perspective view showing an automobile which is a moving body according to the embodiment.
The above-mentioned semiconductor device 1 is built in the automobile 1500 shown in FIG. The semiconductor device 1 includes, for example, a keyless entry, an immobilizer, a car navigation system, a car air conditioner, an anti-lock braking system (ABS), an airbag, a tire pressure monitoring system (TPMS), an engine control, and a brake. It can be widely applied to electronic control units (ECUs) such as systems, battery monitors for hybrid vehicles and electric vehicles, and body posture control systems.

The moving body as described above includes the semiconductor device 1. Since the semiconductor device 1 is a highly reliable device in which performance deterioration due to a temperature change is suppressed, the reliability of the moving body can be improved.

The moving body including the semiconductor device 1 may be, for example, a robot, a drone, a two-wheeled vehicle, an aircraft, a ship, a train, a rocket, a spaceship, or the like, in addition to the automobile shown in FIG.

Although the semiconductor device, the electronic device, and the moving body of the present invention have been described above based on the illustrated embodiment, the present invention is not limited to this, and the configuration of each part is arbitrary having the same function. It can be replaced with the one of the configuration. Further, any other constituents may be added to the present invention.

1 ... Semiconductor device, 2 ... Wiring substrate, 3 ... Semiconductor element, 4 ... Heat exchange element, 4A ... Heat exchange element, 9 ... Mold resin, 22 ... Insulation substrate, 24 ... External connection terminal, 26 ... Internal connection terminal, 28 ... through wiring, 29 ... solder ball, 30 ... current control circuit, 31 ... element body, 32 ... electrode, 33 ... temperature sensor unit, 34 ... temperature control unit, 36 ... switching unit, 42 ... thermoelectric semiconductor element, 42n ... n Type thermoelectric semiconductor element, 42p ... p type thermoelectric semiconductor element, 44 ... 1st support substrate, 46 ... 2nd support substrate, 48 ... electrode, 49 ... filling part, 52 ... bonding wire, 54 ... bonding wire, 56 ... for bonding Metal, 62 ... Adhesive layer, 64 ... Adhesive layer, 221 ... Bottom surface, 222 ... Top surface, 241 ... First external connection terminal, 242 ... Second external connection terminal, 261 ... First internal connection terminal, 262 ... Second internal connection Terminal, 281 ... 1st through wiring, 282 ... 2nd through wiring, 342 ... Enable terminal, 344 ... Current control terminal, 361 ... 1st control element, 361n ... n-type MOS transistor, 361p ... p-type MOS transistor, 362 ... Second control element, 362n ... n-type MOS transistor, 362p ... p-type MOS transistor, 363p ... p-type MOS transistor, 364 ... NOT gate, 481 ... electrode, 482 ... electrode, 1100 ... personal computer, 1102 ... keyboard, 1104 ... Main body, 1106 ... Display unit, 1108 ... Display, 1200 ... Mobile phone, 1202 ... Operation button, 1204 ... Earpiece, 1206 ... Mouthpiece, 1208 ... Display, 1300 ... Digital steel camera, 1302 ... Case, 1304 ... Light receiving unit, 1306 ... Shutter button, 1308 ... Memory, 1310 ... Display unit, 1500 ... Automobile, 3611 ... Input end, 3612 ... Output end, 3621 ... Input end, 3622 ... Output end, CNT ... Current control signal, EN ... Enable signal, GND ... Reference potential, T ... Temperature control range, VDD ... Power supply potential

Claims (10)

An insulating substrate having a first surface and a second surface that are in a front-to-back relationship with each other, a plurality of external connection terminals provided on the first surface, and a plurality of internal connections provided on the second surface. A wiring board having a terminal and a through wiring that penetrates the insulating substrate and electrically connects the external connection terminal and the internal connection terminal.
The semiconductor element provided on the second surface side and
A heat exchange element provided between the wiring board and the semiconductor element and having a plurality of thermoelectric semiconductor elements,
With
A semiconductor device characterized in that the internal connection terminals and the electrodes of the heat exchange element are electrically connected to each other via a bonding wire or a metal for bonding. The semiconductor device according to claim 1, wherein the electrodes of the semiconductor element and the electrodes of the heat exchange element are electrically connected to each other via the bonding wire. The internal connection terminal is provided at a position where the first internal connection terminal does not overlap the heat exchange element when the second surface is viewed in a plan view, and a second internal connection terminal is provided at a position where the heat exchange element overlaps. The semiconductor device according to claim 1 or 2, which includes an internal connection terminal. The semiconductor device according to claim 3, wherein the semiconductor device includes a plurality of the second internal connection terminals, and at least two of the plurality of second internal connection terminals are integrally arranged. The semiconductor device according to claim 3 or 4, wherein the wiring board has a through wiring for connecting the second internal connection terminal and the external connection terminal. The semiconductor device according to any one of claims 1 to 5, wherein the heat exchange element is a Peltier element. The semiconductor device according to any one of claims 1 to 5, wherein the heat exchange element is a Seebeck element. The semiconductor device according to any one of claims 1 to 7, wherein the semiconductor element has a current control circuit that controls a current flowing through the heat exchange element. An electronic device comprising the semiconductor device according to any one of claims 1 to 8. A moving body including the semiconductor device according to any one of claims 1 to 8.

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