JP2019091995A - Multiplexer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress deterioration of attenuation characteristics of a high-pass filter. SOLUTION: A low-pass filter 22 connected between a common terminal Tant and a first terminal T1 and formed by one or a plurality of first inductors and one or a plurality of first capacitors, and the common terminal and the second terminal. A bandpass filter 24 which is connected to T2 and has a higher pass band than the pass band of the low pass filter and is formed by one or more second inductors and one or more second capacitors, and the common terminal. With a high-pass filter HPF connected between the and the third terminal T3, having a pass band higher than the pass band of the bandpass filter, and formed by one or more third inductors and one or more third capacitors. A multiplexer comprising a fourth inductor L4 having one end connected to the common terminal and the other end connected to the high-pass filter. [Selection diagram] FIG. 6

Description

  The present invention relates to a multiplexer, for example, a multiplexer in which a plurality of dielectric layers are stacked.

  In order to speed up wireless communication such as smart phones and mobile phones, a technique for simultaneously communicating a large number of bands such as carrier aggregation is used. For this purpose, a multiplexer is used. In the multiplexer, one end of each of the plurality of low pass filters (LPFs), band pass filters (BPFs) and / or high pass filters (HPFs) is commonly connected to a common terminal (for example, Patent Documents 1 to 3).

JP, 2015-115866, A JP, 2006-332980, A JP, 2011-91862, A

  However, in the multiplexer having the LPF, BPF and HPF, the attenuation characteristic of the HPF is degraded.

  The present invention has been made in view of the above problems, and an object thereof is to suppress the deterioration of the attenuation characteristic of the high pass filter.

  The present invention relates to a low pass filter connected between a common terminal and a first terminal and formed by one or more first inductors and one or more first capacitors, and between the common terminal and the second terminal. A band pass filter connected to the low pass filter and having a pass band higher than the pass band of the low pass filter and formed by one or more second inductors and one or more second capacitors, the common terminal and the third terminal A high pass filter formed between the one or more third inductors and the one or more third capacitors and having a pass band higher than the pass band of the band pass filter, and one end connected to the common terminal And a fourth inductor connected at the other end to the high pass filter.

  In the above configuration, the one or more third capacitors include a fourth capacitor connected to the fourth inductor without any other element and connected in series between the common terminal and the third terminal. It can be configured.

  In the above configuration, the one or more third inductors include a fifth inductor connected to the fourth capacitor without any other element and shunted between the common terminal and the third terminal. The one or more third capacitors are connected to the fourth capacitor and the fifth inductor without any other element, and are connected in series between the common terminal and the third terminal. It can be configured to include.

  In the above configuration, the capacitance of the fourth capacitor may be half or less of the capacitance of the fifth capacitor.

  In the above-mentioned configuration, the one or more first inductors include a sixth inductor connected to the common terminal without any other element and connected in series between the common terminal and the first terminal, The one or more second capacitors may be configured to include a sixth capacitor connected to the common terminal without any other element and connected in series between the common terminal and the second terminal. it can.

  In the above configuration, a plurality of laminated dielectric layers, a plurality of conductive patterns formed on the surface of one of the plurality of dielectric layers, and at least a plurality of dielectric layers respectively. A plurality of via wires penetrating one dielectric layer and electrically connected to at least one conductor pattern of the plurality of conductor patterns; the one or more first inductors, the one or more The first capacitor, the one or more second inductors, the one or more second capacitors, the one or more third inductors, the one or more third capacitors, and the fourth inductor, respectively; And at least a part of the conductor pattern of

  In the above configuration, the length of the conductor pattern connecting the fourth inductor and the common terminal is the length of the conductor pattern electrically connecting the low pass filter and the common terminal, and the band pass filter It can be set as the structure shorter than the length of the conductor pattern which electrically connects with the said common terminal.

  In the above configuration, the fourth inductor includes at least two conductor patterns respectively provided on the surfaces of at least two dielectric layers, and the at least two conductor patterns are in the stacking direction of the plurality of dielectric layers. In the above, at least a part of the winding patterns may overlap each other.

  According to the present invention, the deterioration of the attenuation characteristic of the high pass filter can be suppressed.

FIG. 1 is a circuit diagram of a multiplexer according to Comparative Example 1. FIG. 2 is a diagram illustrating the pass characteristic of the multiplexer according to Comparative Example 1. FIG. 3 is a circuit diagram of a multiplexer according to Comparative Example 2. FIG. 4 is a diagram illustrating the pass characteristic of the multiplexer according to Comparative Example 2. FIG. 5 is a diagram illustrating the loss in the pass band of the multiplexer according to Comparative Examples 1 and 2. FIG. 6 is a circuit diagram of the multiplexer according to the first embodiment. FIG. 7 is a diagram showing the pass characteristics of the multiplexer according to Comparative Example 1 and Example 1. FIG. 8 is a diagram illustrating the loss in the pass band of the multiplexer according to Comparative Example 1 and Example 1. FIG. 9 is a disassembled perspective view of the multiplexer according to the first embodiment. FIG. 10 is a disassembled perspective view of the multiplexer according to the first embodiment. FIG. 11 is a disassembled perspective view of the multiplexer according to the first embodiment. FIG. 12 is a disassembled perspective view of the multiplexer according to the first embodiment. FIG. 13 is an enlarged view of the conductor pattern 12k in the first embodiment.

Comparative Example 1
FIG. 1 is a circuit diagram of a multiplexer according to Comparative Example 1. As shown in FIG. 1, an LPF (low pass filter) 22 is connected between the common terminal Tant and the terminal T1. A BPF (band pass filter) 24 is connected between the common terminal Tant and the terminal T2. An HPF (high pass filter) 26 is connected between the common terminal Tant and the terminal T3. The LPF 22, the BPF 24 and the HPF 26 are commonly connected at the common node Na. The passband of the BPF 24 is higher than the passband of the LPF 22, and the passband of the HPF 26 is higher than the passband of the BPF 24.

  The LPF 22 outputs the signal of the pass band among the high frequency signals input to the terminal T1 (or the common terminal Tant) to the common terminal Tant (or the terminal T1), and suppresses the signals of other frequency bands. The BPF 24 outputs the signal of the pass band among the high frequency signals input to the terminal T2 (or the common terminal Tant) to the common terminal Tant (or the terminal T2), and suppresses the signals of other frequency bands. The HPF 26 outputs the signal in the passband of the high frequency signal input to the terminal T3 (or the common terminal Tant) to the common terminal Tant (or the terminal T3), and suppresses the signals in other frequency bands.

  The LPF 22, the BPF 24 and the HPF 26 are each formed by one or more inductors and one or more capacitors. The LPF 22 includes inductors L11 and L12 and capacitors C11 to C13. The inductors L11 and L12 are connected in series between the common terminal Tant and the terminal T1. The capacitor C11 is connected between the node N11 between the inductors L11 and L12 and the ground. The capacitor C13 is connected between the node N12 on the terminal T1 side of the inductor L12 and the ground. Capacitor C12 is connected in parallel to inductor L12 between nodes N11 and N12.

  The BPF 24 has an HPF 24 a and an LPF 24 b. The HPF 24a and the LPF 24b are connected in series between the common terminal Tant and the terminal T2. The HPF 24a includes an inductor L21 and capacitors C21 to C23. The LPF 24b includes an inductor L22 and capacitors C24 to C26. The capacitors C21 and C23 and the inductor L22 are connected in series between the common terminal Tant and the terminal T2. The inductor L21 and the capacitor C22 are connected in series between the node N21 between the capacitors C21 and C23 and the ground. Capacitor C24 is connected between node N22 between capacitor C23 and inductor L22 and the ground. The capacitor C26 is connected between the node N23 on the terminal T2 side of the inductor L22 and the ground. Capacitor C25 is connected between nodes N22 and N23 in parallel with inductor L22.

  The HPF 26 includes an inductor L31 and capacitors C31 to C33. The capacitors C31 and C33 are connected in series between the common terminal Tant and the terminal T3. The inductor L31 and the capacitor C32 are connected in series between the node N32 between the capacitors C31 and C33 and the ground.

The pass characteristics between the common terminal Tant and the terminals T1 to T3 in Comparative Example 1 were simulated. The inductances and capacitances used for the simulation are shown in Table 1.

  FIG. 2 is a diagram illustrating the pass characteristic of the multiplexer according to Comparative Example 1. T1 to T3 are the pass characteristics between the common terminal Tant and the terminals T1 to T3, respectively, and correspond to the pass characteristics of the LPF 22, BPF 24 and HPF 26, respectively. As shown in FIG. 2, the pass band of the LPF 22 is about 2.7 GHz or less. The passband of the BPF 24 is approximately 3.1 GHz to 4.2 GHz. The pass band of the HPF 26 is about 4.5 GHz or more. The pass bands of the LPF 22, the BPF 22 and the HPF 26 do not overlap each other. As in the region 50, the attenuation characteristics of 1.5 GHz to 3.7 GHz of the HPF 26 are degraded.

  The attenuation characteristics of the HPF 26 deteriorate because the capacitance of the capacitor C31 is large. If the capacitance of the capacitor C31 is reduced, the attenuation characteristic in the region 50 is improved. However, if the LPF 22, BPF 24 and HPF 26 are connected to the common terminal Tant and impedance matching is attempted to improve the attenuation characteristics of the HPF 26 in the passbands of the other filters (LPF 22 and BPF 24), the capacitance of the capacitor C 31 becomes large. It will

Comparative Example 2
FIG. 3 is a circuit diagram of a multiplexer according to Comparative Example 2. As shown in FIG. 3, the LPF 24b and the HPF 26 are commonly connected at the node N31. The HPF 24a is connected between the node N31 and the common terminal Tant. The LPF 24 b and the HPF 24 a function as a BPF corresponding to the BPF 24 in FIG. 2. An inductor L23 is connected between nodes N31 and N22. The multiplexer according to Comparative Example 2 includes a diplexer 25a having an LPF 22 and an HPF 24a, and a diplexer 25b having an LPF 24b and an HPF 26. The other configuration is the same as that of FIG. 1 of Comparative Example 1, and the description thereof is omitted.

  In the second comparative example, the HPF 24a is connected in series with the HPF 26 between the common terminal Tant and the terminal T3. Thus, the attenuation characteristics in the region 50 are improved.

The pass characteristics between the common terminal Tant and the terminals T1 to T3 in Comparative Example 2 were simulated. The inductances and capacitances used for the simulation are shown in Table 2.

  FIG. 4 is a diagram illustrating the pass characteristic of the multiplexer according to Comparative Example 2. T1 to T3 are pass characteristics between the common terminal Tant and the terminals T1 to T3, respectively. As shown in FIG. 4, the attenuation characteristics of 1.5 GHz to 3.5 GHz between the common terminal Tant and the terminal T1 are improved as compared to FIG. 2 of the comparative example 1.

  FIG. 5 is a diagram illustrating the loss in the pass band of the multiplexer according to Comparative Examples 1 and 2. The dashed and solid lines indicate Comparative Examples 1 and 2, respectively. As shown in FIG. 5, the loss between the common terminal Tant and the terminal T1 and the loss between the common terminal Tant and the terminal T2 are substantially the same in the first and second comparative examples. As indicated by the arrow 52, the loss between the common terminal Tant and the terminal T3 in Comparative Example 2 is larger than the loss in Comparative Example 1.

Table 3 shows the loss between the common terminal Tant and the terminal T1 at 2690 MHz, the loss between the common terminal Tant and the terminal T2 at 3500 MHz, and the loss between the common terminal Tant and the terminal T3 at 5150 MHz in Comparative Examples 1 and 2. Is a table showing losses between

  As shown in Table 3, the loss at terminals T1 and T2 in Comparative Example 2 is as good as or improved in Comparative Example 1. However, the loss between the common terminal Tant and the terminal T3 in the comparative example 2 is about 0.32 dB worse than that in the comparative example 1.

  As shown in FIG. 5 and Table 3, in Comparative Example 2, the loss of the HPF is degraded. This is because two HPFs 24a and 26 are connected in series between the common terminal Tant and the terminal T3.

  FIG. 6 is a circuit diagram of the multiplexer according to the first embodiment. As shown in FIG. 6, in the first embodiment, the inductor L4 is connected between the node N31 on the common terminal Tant side of the HPF 26 and the node Na. The other configuration is the same as that of FIG. 1 of Comparative Example 1, and the description thereof is omitted.

  In the first embodiment, the inductor L4 is provided. By setting the inductance of the inductor L4 to an appropriate value, the capacitance of the capacitor C31 can be reduced even with impedance matching. Thus, the attenuation characteristics in the low band can be improved.

The pass characteristics between the common terminal Tant and the terminals T1 to T3 in Example 1 were simulated. The inductances and capacitances used for the simulation are shown in Table 4.

  FIG. 7 is a diagram showing the pass characteristics of the multiplexer according to Comparative Example 1 and Example 1. T1 to T3 are pass characteristics between the common terminal Tant and the terminals T1 to T3, respectively. The dashed and solid lines indicate Comparative Example 1 and Example 1, respectively. As shown in FIG. 7, the attenuation characteristics between 1.5 GHz and 3.7 GHz between the common terminal Tant and the terminal T3 are improved as compared with FIG. 2 of Comparative Example 1. As indicated by the arrow 54, the attenuation at 2.6 GHz is −12.2 dB in the first comparative example and −17.5 dB in the first embodiment, and is improved by 5.3 dB.

  FIG. 8 is a diagram illustrating the loss in the pass band of the multiplexer according to Comparative Example 1 and Example 1. The dashed and solid lines indicate Comparative Example 1 and Example 1, respectively. As shown in FIG. 8, the loss between the common terminal Tant and the terminal T1 in the first embodiment, the loss between the common terminal Tant and the terminal T2, and the loss between the common terminal Tant and the terminal T3 are compared. Similar to the loss of Example 1.

Table 5 shows the loss between the common terminal Tant and the terminal T1 at 2690 MHz, the loss between the common terminal Tant and the terminal T2 at 3500 MHz, and the common terminal Tant and the terminal T3 at 5150 MHz in Comparative Example 1 and Example 1. And the loss between them.

  As shown in Table 5, in Example 1, the loss at the terminals T1 and T2 is slightly improved over that in Comparative Example 1. The loss between the common terminal Tant and the terminal T3 in the first embodiment is 0.11 dB worse than that of the first comparative example, but is smaller than the loss deterioration (0.32 dB) of the second comparative example in Table 3.

  As shown in FIG. 7, in the first embodiment, the deterioration of the attenuation characteristics in the low frequency region of the HPF 26 is suppressed as compared with the first comparative example. Furthermore, as shown in FIG. 8 and Table 5, deterioration of the loss of the HPF 26 is suppressed as compared to Comparative Example 2. This is because the provision of the inductor L4 enables impedance matching even if the capacitance of the capacitor C31 is reduced. By reducing the capacitance of the capacitor C31, the impedance in the low frequency region is increased, and the attenuation characteristic in the low frequency region is improved.

  9 to 12 are disassembled perspective views of the multiplexer according to the first embodiment. As shown in FIGS. 9 to 12, in the laminate 10, a plurality of dielectric layers 11a to 11j are stacked. Conductor patterns 12a to 12j are formed on the top surfaces of the dielectric layers 11a to 11j. A terminal 14 is provided on the lower surface of the dielectric layer 11 j. The inductor is formed of at least one of the conductor patterns 12a to 12j. The capacitor is formed of conductor patterns 12a to 12j sandwiching one or more dielectric layers 11b to 11i.

  Via interconnections 13 penetrating dielectric layers 11 b to 11 j are provided. The connection of the via wiring 13 is indicated by a broken line. Black circles indicate that the via interconnections 13 pass through the illustrated dielectric layers 11 b to 11 j. White circles indicate that the via wiring 13 penetrates the dielectric layers 11 b to 11 i on the dielectric layers 11 c to 11 j illustrated but does not penetrate the dielectric layers 11 c to 11 j illustrated. The dashed arrow indicates the connection destination in another figure. For example, a broken line arrow L4a in FIG. 9 indicates that a portion L4a of the inductor L4 is connected in FIG.

  As shown in FIG. 9, the conductor pattern 12a serves as a direction identification mark. A portion L11b of the inductor L11, an inductor L12, a portion L21b of the inductor L21, an inductor L22, an inductor L31, and a portion L4c of the inductor L4 are formed by the conductor pattern 12b. A portion L11a of the inductor L11, a portion L21a of the inductor L21, and a portion L4b of the inductor L4 are formed by the conductor pattern 12c.

  As shown in FIG. 10, a portion L4a of the inductor L4 is formed of the conductor pattern 12d. One electrode C31b of the capacitor C31 is formed of the conductor pattern 12e. One electrode C12b of the capacitor C12, one electrode C21b of the capacitor C21, and one electrode C23b of the capacitor C23 are formed by the conductor pattern 12f.

  As shown in FIG. 11, the other electrode C21a of the capacitor C21, the other electrode C23a of the capacitor C23, the one electrode C24b of the capacitor C24, the one electrode C25b of the capacitor C25, the other electrode C31a of the capacitor C31 and the capacitor C33. One electrode C33b is formed of the conductor pattern 12g. Among the conductor patterns 12g, the conductor pattern 12k is provided with a node Na to which the LPF 22, the BPF 24 and the HPF 26 are connected in common.

  The other electrode C12a of the capacitor C12, the other electrode C25a of the capacitor C25, and the other electrode C33a of the capacitor C33 are formed by the conductor pattern 12h. One electrode C11b of the capacitor C11, one electrode C13b of the capacitor C13, one electrode C22b of the capacitor C22, one electrode C26b of the capacitor C26 and one electrode C32b of the capacitor C32 are formed by the conductor pattern 12i.

  As shown in FIG. 12, the ground pattern Gnd is formed by the conductor pattern 12j. The ground pattern doubles as the other electrodes C11a, C13a, C22a, C24a, C26a and C32a of the capacitors C11, C13, C22, C24, C26 and C32. The terminal 14 provided on the lower surface of the dielectric layer 11j includes a common terminal Tant, terminals T1 to T3 and a ground terminal Tgnd. The ground terminal Tgnd is electrically connected to the ground pattern Gnd through the via wiring 13.

The dielectric layers 11a to 11j are made of, for example, a ceramic material, and contain, for example, oxides of Si, Ca and Mg (for example, di-oside CaMgSi ₂ O ₆ ) as main components. The conductor patterns 12 a to 12 j and the via wiring 13 are metal layers including, for example, Ag, Pd, Pt, Cu, Ni, Au, an Au—Pd alloy or an Ag—Pt alloy. The terminal 14 has a metal layer made of the same material as the conductor patterns 12a to 12j and a plated layer provided therebelow. The plating layer is, for example, a Ni film, a Sn film, or the like. The Sn film is a solder layer for mounting the multiplexer on a mother board or the like, and the Ni film is a barrier layer for suppressing interdiffusion between the solder layer and the collector pattern.

  According to the first embodiment, the LPF 22 is connected between the common terminal Tant and the terminal T1 (first terminal), and includes one or more inductors (first inductor) and one or more capacitors (first capacitor). It is formed. The BPF 24 is connected between the common terminal Tant and the terminal T2 (second terminal), has a passband higher than that of the LPF 22, and has one or more inductors (second inductors) and one or more capacitors And the second capacitor). The HPF 26 is connected between the common terminal Tant and the terminal T3 (third terminal), has a passband higher than that of the BPF 24, and has one or more inductors (third inductor) and one or more capacitors (third 3) are formed.

  When such a multiplexer attempts to match the impedance, the attenuation characteristics of the HPF 26 deteriorate as shown in FIG. 2 of Comparative Example 1. Therefore, an inductor L4 (fourth inductor) having one end connected to the common terminal Tant and the other end connected to the HPF 26 is provided. Thereby, as shown in FIG. 7, the attenuation characteristic of the HPF 26 can be improved. Further, compared to Comparative Example 2, the loss of the HPF 26 can be suppressed as shown in FIG.

  The inductor or capacitor electrically connected most to the inductor L4 side in the HPF 26 is a capacitor C31 (fourth capacitor) connected in series between the common terminal Tant and the terminal T3.

  That is, the capacitor in the HPF 26 is connected to the inductor L4 without passing through other elements (ie, the capacitor and the inductor), and the capacitor C31 (fourth capacitor) connected in series between the common terminal Tant and the terminal T3. )including.

  As described above, in the case where the element closest to the common terminal Tant of the HPF 26 is the capacitor C31, if it is attempted to perform impedance matching as in Comparative Example 1, the capacitance of the capacitor C31 is increased. When the capacitance of the capacitor C31 is large, attenuation characteristics at low frequencies are degraded. Therefore, the deterioration of the attenuation characteristic of the HPF 26 can be suppressed by providing the inductor L4 as in the first embodiment.

  Furthermore, in the HPF 26, the inductor or capacitor electrically connected to the inductor L4 side next to the capacitor C31 is an inductor L31 (fifth inductor) shunt-connected between the common terminal Tant and the terminal T3. The inductor or capacitor electrically connected to the inductor L4 side next to the inductor L31 is a capacitor C33 (fifth capacitor) connected in series between the common terminal Tant and the terminal T3.

  That is, the inductor in the HPF 26 includes an inductor L31 (fifth inductor) connected to the capacitor C31 without any other element and shunted between the common terminal Tant and the terminal T3. The capacitor in the HPF 26 includes a capacitor C33 (fifth capacitor) connected to the capacitor C31 and the inductor L31 without any other element and connected in series between the common terminal Tant and the terminal T3.

  As described above, when the T-type CLC filter is used for the HPF 26, the attenuation characteristic is easily deteriorated. Therefore, the deterioration of the attenuation characteristics can be suppressed by providing the inductor L4.

  The capacitance of the capacitor C31 is equal to or less than half of the capacitance of the capacitor C33. Thereby, the deterioration of the attenuation characteristic can be further suppressed. The capacitance of the capacitor C31 is preferably 1/3 or less of the capacitance of the capacitor C33.

  When the LPF and the HPF are connected to the common terminal Tant as in the diplexer, if the first stage of the LPF is an inductor and the first stage of the HPF is a capacitor, it is easy to perform impedance matching between the LPF and the HPF.

  However, in the LPF 22, the inductor or capacitor electrically connected to the most common terminal Tant side is the inductor L11 (sixth inductor) connected in series between the common terminal Tant and the terminal T1. In the BPF 24, an inductor or a capacitor electrically connected most to the common terminal Tant is a capacitor C21 (sixth capacitor) connected in series between the common terminal Tant and the terminal T2.

  That is, the inductor of the LPF 22 includes an inductor L11 (sixth inductor) connected to the common terminal Tant via other elements (i.e., an inductor and a capacitor) and connected in series between the common terminal Tant and the terminal T1. The capacitor of the BPF 24 includes a capacitor C21 (sixth capacitor) connected to the common terminal Tant without passing through other elements (i.e., the inductor and the capacitor), and connected in series between the common terminal Tant and the terminal T2.

  Thus, when the first stage of the LPF 22 (that is, the element closest to the common terminal Tant) is the inductor L11, the first stage of the BPF 24 is the capacitor C21, and the first stage of the HPF 26 is the capacitor C31, the first stage is two filters of capacitors . This makes it difficult to match the three filters. Therefore, it is preferable to provide the inductor L4 as in the first embodiment.

  The multiplexer includes a plurality of dielectric layers 11a to 11j, a plurality of conductive patterns 12a to 12j formed on the surface of one of the plurality of dielectric layers 11a to 11j, and a plurality of dielectrics A plurality of via wires 13 penetrating through at least one dielectric layer of the layers 11a to 11j and electrically connected to at least one conductor pattern of the plurality of conductor patterns 12a to 12j are provided. The inductors and capacitors of the LPF 22, the BPF 24 and the HPF 26 each include at least a part of a plurality of conductor patterns. Thus, the multiplexer can be formed by laminating dielectric layers.

  FIG. 13 is an enlarged view of the conductor pattern 12k in the first embodiment. As shown in FIG. 13, a conductor pattern 12k is provided on the surface of the dielectric layer 11g. The conductor pattern 12k has a node Na to which the LPF 22, the BPF 24 and the inductor L4 are connected in common. The via wiring 13a connecting the common terminal Tant and the conductor pattern 12k is connected to the conductor pattern 12k at the position P1. Via interconnection 13b electrically connecting inductor L4 to conductor pattern 12k electrically connects to conductor pattern 12k at position P2. The via wiring 13c electrically connecting the inductor L11 of the LPF 22 and the conductor pattern 12k is electrically connected to the conductor pattern 12k at the position P3. The other electrode C21a of the capacitor C21 of the BPF 24 is integrally formed with the conductor pattern 12k, and is connected to the conductor pattern 12k at a position P4.

  Positions P1 and P2 are approximately the same position in conductor pattern 12k, and positions P1 and P2 correspond to node Na. From this, the length of the conductor pattern 12k connecting the inductor L4 and the common terminal Tant is approximately zero. On the other hand, the length of the conductor pattern 12k connecting the LPF 22 and the common terminal Tant corresponds to the length D1 of the positions P1 and P3, and the length of the conductor pattern 12k connecting the BPF 24 and the common terminal Tant is a position It corresponds to the length D2 of P1 and P4. Thus, the length of the conductor pattern 12k connecting the inductor L4 and the common terminal Tant is equal to the length of the conductor pattern 12k electrically connecting the LPF 22 and the common terminal Tant, and the length of the BPF 24 and the common terminal Tant. It is shorter than the length of the conductor pattern 12k to be electrically connected.

  As a result, the parasitic capacitance added between the inductor L4 and the common terminal Tant is reduced, which facilitates impedance matching.

  As shown in FIGS. 9 and 10, the inductor L4 includes at least two conductor patterns 12b to 12d provided on the surfaces of at least two dielectric layers 11b to 11d, respectively. The conductor patterns of the portions L4b and L4c of the inductor L4 are winding patterns at least partially overlapping in the stacking direction of the plurality of dielectric layers 11a to 11j. Thereby, the inductor L4 having a large inductance can be formed using the conductor patterns 12b to 12d.

  In the first embodiment, an example in which the multiplexer is formed in the laminated body 10 in which the dielectric layers 11a to 11j are laminated has been described, but a multiplexer may be formed in addition to the laminated body 10. The number of dielectric layers 11a to 11j can be set arbitrarily.

  As mentioned above, although the embodiment of the present invention has been described in detail, the present invention is not limited to such a specific embodiment, and various modifications may be made within the scope of the subject matter of the present invention described in the claims. Changes are possible.

Reference Signs List 10 laminated body 11a-11j dielectric layer 12a-12k conductor pattern 13, 13a-13c via wiring 14 terminal

Claims (8)

A low pass filter connected between the common terminal and the first terminal and formed by the one or more first inductors and the one or more first capacitors;
A band pass filter connected between the common terminal and the second terminal, having a pass band higher than the pass band of the low pass filter, and formed by one or more second inductors and one or more second capacitors When,
A high pass filter connected between the common terminal and the third terminal, having a pass band higher than that of the band pass filter, and formed by one or more third inductors and one or more third capacitors When,
A fourth inductor having one end connected to the common terminal and the other end connected to the high pass filter;
With a multiplexer.   The one or more third capacitors are connected to the fourth inductor without any other element, and include a fourth capacitor connected in series between the common terminal and the third terminal. Description multiplexer. The one or more third inductors include a fifth inductor connected to the fourth capacitor without any other element and shunted between the common terminal and the third terminal.
The one or more third capacitors are connected to the fourth capacitor and the fifth inductor without any other element, and are connected in series between the common terminal and the third terminal. The multiplexer of claim 2 comprising.   The multiplexer according to claim 3, wherein a capacitance of the fourth capacitor is equal to or less than 1/2 of a capacitance of the fifth capacitor. The one or more first inductors include a sixth inductor connected to the common terminal without any other element and connected in series between the common terminal and the first terminal,
The one or more second capacitors include a sixth capacitor connected to the common terminal without any other element and connected in series between the common terminal and the second terminal. Multiplexer according to any one of the preceding claims. Multiple dielectric layers stacked,
A plurality of conductor patterns formed on the surface of one of the plurality of dielectric layers;
A plurality of via wires which penetrate through at least one dielectric layer of each of the plurality of dielectric layers and are electrically connected to at least one conductor pattern of the plurality of conductor patterns;
Equipped with
The one or more first inductors, the one or more first capacitors, the one or more second inductors, the one or more second capacitors, the one or more third inductors, the one or more The multiplexer according to any one of claims 1 to 5, wherein the third capacitor and the fourth inductor each include at least a part of the plurality of conductor patterns.   The length of the conductor pattern connecting the fourth inductor and the common terminal is the length of the conductor pattern electrically connecting the low pass filter and the common terminal, and the band pass filter and the common terminal The multiplexer according to claim 6, wherein the length of the conductor pattern is shorter than the length of the conductor pattern electrically connecting the The fourth inductor includes at least two conductor patterns respectively provided on surfaces of at least two dielectric layers,
The multiplexer according to claim 7, wherein the at least two conductor patterns are winding patterns at least partially overlapping in the stacking direction of the plurality of dielectric layers.

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