JP2017073531A - Printed circuit board and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a printed circuit board and a method for manufacturing the same.
A printed circuit board according to one aspect of the present invention includes at least one insulating layer and a wiring portion, and the insulating layer includes a first insulating layer in contact with the wiring portion, and the first insulating layer. A second insulating layer disposed in a lower portion of the layer, wherein first and second fillers are dispersed in the first and second insulating layers, respectively, The second filler has a higher etching property with respect to the acid than the second filler, and the second filler has a structure having a lower scattering property with respect to UV than the first filler.
[Selection] Figure 2

Description

  The present invention relates to a printed circuit board and a method for manufacturing the same.

  With the development of the electronic industry, demands for multi-functionality, high functionality and miniaturization of electronic components are increasing rapidly. Further, as electronic components become lighter, thinner, and smaller, printed circuit boards on which electronic components are mounted are also required to have higher circuit patterns for integrating many electronic products in a small area. As the circuit pattern of the printed circuit board becomes finer and the interlayer distance between the circuits becomes narrower, defects such as dielectric loss and short, or the adhesion between the circuit and the insulator decreases, and the reliability of the product decreases. Has occurred. Therefore, a photosensitive insulating film capable of forming a fine opening pattern is used for a printed circuit board (Printed Circuit Board, PCB), a semiconductor package substrate, a flexible printed circuit board (Flexible Printed Circuit Board, FPCB), or the like.

  One of the objects of the present invention is a printed circuit board which is suitable for realizing a fine pattern and further improves the reliability by enhancing the adhesion between the insulating layer and the wiring part, and a method for efficiently manufacturing the same. It is to provide.

  As a method for solving the above-described problem, the present invention provides a printed circuit board in which the adhesion between an insulating layer and a wiring portion is enhanced according to an embodiment, and a fine wiring portion can be implemented. In order to propose a new structure, specifically, a printed circuit board according to one aspect of the present invention includes at least one insulating layer and a wiring portion, and the insulating layer includes the wiring portion. A first insulating layer in contact with the first insulating layer, and a second insulating layer disposed under the first insulating layer, wherein the first and second fillers are respectively disposed in the first and second insulating layers. The first filler has a higher etching property with respect to acid than the second filler, and the second filler has a lower scattering property with respect to UV than the first filler. It is.

  As one of the various effects of the present invention, by adopting a multi-layered insulating layer in which fillers having mutually different characteristics are dispersed, the adhesion between the insulating layer and the wiring portion is improved, and a fine circuit is provided. A printed circuit board capable of embodying a pattern is provided, and as another effect of the present invention, a manufacturing method capable of efficiently manufacturing a printed circuit board having the above-described structure can be provided.

  In this case, in the first insulating layer, irregularities are formed at the interface in contact with the wiring portion, and the wiring portion is formed so as to fill the wiring portion, thereby providing sufficient adhesion between the insulating layer and the wiring portion. Can be ensured. Here, the unevenness can be formed by removing the first filler present on the surface of the first insulating layer in the manufacturing process of the substrate.

  The various and beneficial advantages and effects of the present invention are not limited to the above-described contents, but can be more easily understood in the course of describing specific embodiments of the present invention.

1 is a cross-sectional view schematically showing a printed circuit board according to an embodiment of the present invention. In the embodiment of FIG. 1, it is a figure which shows the detailed form of an insulating layer and a wiring part (A area | region) in detail. It is a figure which compares and shows the aspect in which a through-hole is formed in the insulating layer which concerns on a comparative example and the Example of this invention. It is a figure which compares and shows the aspect in which a through-hole is formed in the insulating layer which concerns on a comparative example and the Example of this invention. It is a figure which compares and shows the aspect in which a through-hole is formed in the insulating layer which concerns on a comparative example and the Example of this invention. It is process drawing which shows schematically the manufacturing method of the printed circuit board which concerns on one Embodiment of this invention. It is a figure which shows an example of the method of obtaining the insulating layer of the multilayer structure proposed by this invention.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiments of the present invention can be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. In addition, the embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for a clearer description.

  FIG. 1 is a cross-sectional view schematically showing a printed circuit board according to an embodiment of the present invention. FIG. 2 is a diagram showing in more detail the detailed configuration of the insulating layer and the wiring portion (A region) in the embodiment of FIG.

  Referring to FIG. 1, a printed circuit board 100 according to an embodiment of the present invention has a structure including an insulating layer 120 and a wiring part 121, and the insulating layer 120 and the wiring part 121 are centered on a core part 110. As can be placed on all sides. In this case, the core part 110 may include a conductive pattern 111 and a conductive via 112 for electrical connection. However, the core part 110 may be omitted depending on the embodiment, and in the following, other components, in particular, components of the printed circuit board 100 will be described in detail focusing on the insulating layer 120 and the wiring part 121.

  As shown in the example shown in FIG. 1, a plurality of insulating layers 120 may be provided and stacked. However, according to circumstances, the substrate may be implemented with only a single insulating layer 120. Good. Any material can be used as the insulating layer 120 as long as it has an electrical insulating property. For example, a photosensitive resin, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or a glass thereof. Resins impregnated with reinforcing materials such as fibers or inorganic fillers, such as prepreg (PPG), can be used. Among these materials, when using a photosensitive material (PID) as the insulating layer 120, it is easier to form a fine pattern in the insulating layer 120 than when mechanical processing or the like is used. In this embodiment, an example using a photosensitive substance will be described, which is advantageous for manufacturing a high-density printed circuit board.

  The wiring part includes a conductive pattern 121 and a conductive via 122, which can be made of a metal material such as copper, nickel, or silver having high electrical conductivity. As described above, when the insulating layer 120 is formed of a material containing a photosensitive resin, a fine pattern can be easily realized.

  The outer layer 130 may have an opening that exposes at least a part of the conductive pattern 121 of the wiring part. The material of the outer layer 130 is not particularly limited, and for example, a solder resist may be used. In addition, the same material as the insulating layer 120 of the wiring portion may be used, and the outer layer 130 is generally a single layer, but may be configured in multiple layers as necessary. Good.

  As in the example illustrated in FIG. 2, the insulating layer 120 includes first and second insulating layers 120 a and 120 b, and the first insulating layer 120 a includes a wiring portion, in this embodiment, a conductive pattern 121. In contact therewith, the second insulating layer 120b is disposed under the first insulating layer 120a. First and second fillers P1 and P2 are dispersed in the first and second insulating layers 120a and 120b, respectively. The fillers P1 and P2 are relatively in comparison with the insulating layers 120a and 120b. In particular, by using a material having a low thermal expansion coefficient, the rigidity of the insulating layers 120a and 120b can be increased, which can contribute to the improvement of the warp characteristics of the substrate. In the present embodiment, rather than using the same type of filler in the entire insulating layer, a region is divided and the characteristics with respect to the etching solution and light are different from each other.

Specifically, the first filler P1 included in the first insulating layer 120a adjacent to the conductive pattern 121 has higher etchability with respect to acid than the second filler P2. Before forming the conductive pattern 121, when using a filler having low etchability with respect to an etchant when etching the surface of the insulating layer by a desmear process or the like, it should remain exposed on the surface of the insulating layer. become. If the conductive pattern 121 is formed in such a state, the bonding strength with the insulating layer 120a may be reduced. Therefore, in the present embodiment, the first insulating layer 120a which is a region where the conductive pattern 121 is formed. The 1st filler P1 which has the high etching property with respect to the acid on the surface of was used. As an example of such a material, the first filler P1 can be formed of a material such as SiO ₂ , ZnO, Al ₂ O ₃ , MgO, BN, SiC, AlBO ₃ , BaTiO ₃ , and CaZrO ₃ . As in the illustrated example, the spherical shape is a generally adoptable shape, but other deformed shapes such as a pseudo-spherical shape or a form in which irregularities are formed on the surface are also possible.

  The first filler P1 exposed on the surface can be removed by an etching solution used in a desmear process or the like in the substrate process, and typically includes HF. The unevenness R on the surface of the first insulating layer 120a formed by removing the first filler P1 is filled with the conductive pattern 121 as shown in FIG. 2, thereby the insulating layer 120 and the conductive pattern are filled. The adhesion with 121 can be enhanced and the stability of the circuit pattern can be improved.

  The second filler P2 included in the second insulating layer 120b has a lower scattering property than the first filler P1 with respect to light, in particular, UV provided for forming a through hole in the insulating layer 120. Such a through hole can be provided as a region for forming a conductive via for electrical connection between layers in the substrate. When the insulating layer is implemented using a photosensitive material as described above, By irradiating UV or the like, fine and precise through-holes can be formed. However, since the filler contained in the insulating layer scatters light, it is difficult to obtain fine through holes as the amount of filler increases. In view of this, the inventors of the present invention have selected the second filler P2 present in the insulating layer in consideration of light scattering rather than etching characteristics.

As described above, since the second filler P2 has a low scattering property with respect to UV, it is possible to reduce the light consumed by the scattering during UV irradiation. Therefore, the accuracy can be improved when the process of forming the through hole in the insulating layer 120 is performed. A white pigment-based material can be used for the second filler P2 so as to have such characteristics. Specifically, the second filler P2 can be made of a material such as BaSO ₄ , TiO ₂ , or ZnS. In the case of such a white pigment-based material, the etching property with respect to UV is low and advantageous in terms of formation of the through hole, but the etching property with respect to an etching solution such as HF is relatively low. Therefore, since it is not easily removed from the surface of the insulating layer in a normal etching process, the adhesion with the conductive pattern 121 may be lower than when the first filler P1 is used. Considering this point, the first filler P1 is used for the insulating layer 120a adjacent to the conductive pattern 121, and the second filler P2 is used for the insulating layer 120b that is not adjacent.

  The function of the second filler P2 will be described more specifically with reference to FIGS. 3-5 is a figure which compares and shows the aspect in which a through-hole is formed in a comparative example and the insulating layer based on the Example of this invention. In this case, FIG. 3 shows the first insulating layer 120a, FIG. 4 shows the second insulating layer 120b, and FIG. 5 shows the laminated structure of the first and second insulating layers 120a and 120b as shown in FIG. Based on the same thickness. In each drawing, the size of the through hole decreases from the left side to the right side, and 80 μm, 30 μm, and 10 μm through holes are formed on the basis of the uppermost surface.

First, as in the example illustrated in FIG. 3, in the case of the first insulating layer 120a using a first filler having a high scattering property with respect to UV, for example, SiO ₂ , the UV that disappears is relatively large. The size of the through-hole V is remarkably reduced as it goes to, and it is difficult to implement a fine through-hole V having a level of 30 μm or less. On the other hand, as can be seen from the example of FIG. 4, in the case of the second insulating layer 120b using the second filler such as BaSO ₄ , TiO ₂ , ZnS, it is confirmed that there is no problem in realizing the fine through hole V. can do. In the same manner, in the case of the embodiment of the present invention using both the first and second insulating layers 120a and 120b (FIG. 5), the first insulating layer 120a having an excellent filler etching performance is formed on the upper portion. Although it exists, the fine through hole V can be formed at a level almost similar to the comparative example using only the second insulating layer 120b.

  In consideration of the inherent functions of the first and second insulating layers 120a and 120b described above, their thicknesses can be adjusted appropriately. In the case of the first insulating layer 120a, the main purpose is to provide a high bonding strength with the conductive pattern 121. Therefore, the first insulating layer 120a can be formed to a relatively thin thickness, and is formed to have a thickness of about 2 to 10 μm. Can. As shown in FIG. 5, the second insulating layer 120b related to the formation of the through hole of the entire insulating layer can be formed thicker than this, and the first and second insulating layers 120a and 120b can be formed. The combined total thickness can be employed in a range not exceeding about 100 μm.

  As described above, the insulating layer 120 having a multilayer structure adopted in the present invention has improved stability because of its high bonding strength with the circuit pattern, and a fine and precise pattern that has been widely demanded in the substrate field in recent years. It is the form which can embody.

  Hereinafter, a method by which the above-described printed circuit board can be efficiently manufactured will be described, and the above-described components can be understood in more detail by the following description regarding the manufacturing method. FIG. 6 is a process diagram schematically showing a method of manufacturing a printed circuit board according to an embodiment of the present invention, and a process of laminating an insulating layer, a process of forming a core part, and the like are widely used in this technical field. Since a substrate process can be used, a specific description is omitted. FIG. 7 shows an example of a method for obtaining a multilayered insulating layer proposed in the present invention.

  Referring to FIG. 6, first, an insulating layer having a multilayer structure is provided. In this case, the first insulating layer 120a has a configuration in which the first filler P1 is dispersed therein, and the second insulating layer 120b has the second filler. P2 is dispersed inside. In this case, the second filler P2 has a lower etching property with respect to the acid and a lower scattering property with respect to UV than the first filler P1. As an example of a method for obtaining the insulating layers 120a and 120b, a method of coating the fillers P1 and P2 on the carrier film together with an uncured photosensitive resin and the like can be used. In this case, the first and second insulating layers 120a and 120b may be individually formed and stacked on each other, and unlike the process example illustrated in FIG. As a reference, it is possible to use a method in which the coating liquid is sprayed through a large number of ejection portions while moving the carrier film 201. An insulating layer having a multilayer structure can be obtained in a single step by such a multilayer coating method.

  Next, a hole V penetrating the insulating layers 120a and 120b is formed by using a method of irradiating UV, and the second insulating material in which the second filler P2 that scatters UV relatively little as described above is employed. A precise through hole V can be formed by the layer 120b.

  Next, at least a part of the first filler P1 exposed on the surface of the first insulating layer 120a is removed, and the surface of the first insulating layer 120a has a concavo-convex structure, that is, one surface of the first insulating layer 120a. Concavities and convexities are formed in a form in which the portion is buried. As an example of a method for removing the first filler P1, the acid used during the desmear process can be applied to etch the first filler P1. However, the 1st filler P1 does not necessarily need to be removed after forming the through-hole V, and may be removed before that according to the Example.

  Next, a conductive via 122 filling the through hole V is formed, and a conductive pattern 121 is formed on the surface of the first insulating layer 120a. As described above, the conductive pattern 121 is formed so as to fill the unevenness on the surface of the first insulating layer 120a, and can form a stable coupling structure with the first insulating layer 120a. In this case, the conductive pattern 121 can be obtained by a method of applying a conductive paste, a plating process using a seed layer, or the like.

  On the other hand, in the case of the process of forming the insulating layers 120a and 120b, the conductive pattern 121, and the conductive via 122, these may be sequentially stacked. As another example, the insulating layers 120a and 120b, the conductive pattern 121 and conductive vias 122 may be individually fabricated and then stacked together.

  Next, an external layer 130 such as a solder resist is formed on the outermost side of the printed circuit board to obtain the printed circuit board described in the above embodiment. The external layer 130 is used as an IC package board or the like. As a form suitable for use, it may be provided in an appropriate shape according to the design and necessary functions.

  As mentioned above, although embodiment of this invention was described in detail, the scope of the present invention is not limited to this, and various correction and deformation | transformation are within the range which does not deviate from the technical idea of this invention described in the claim. It will be apparent to those having ordinary knowledge in the art.

DESCRIPTION OF SYMBOLS 100 Printed circuit board 110 Core part 111, 121 Conductive pattern 112, 122 Conductive via 120 Insulating layer 120a, 120b 1st and 2nd insulating layer 130 External layer P1, P2 1st and 2nd filler R Concavity and convexity V Through-hole 201 Carrier film 202 injection unit

Claims (16)

Including at least one insulating layer and a wiring portion;
The insulating layer includes a first insulating layer in contact with the wiring part, and a second insulating layer disposed under the first insulating layer,
First and second fillers are dispersed in the first and second insulating layers, respectively.
The first filler has higher etchability with respect to acid than the second filler,
The printed circuit board, wherein the second filler has a lower scattering property with respect to UV than the first filler.   The printed circuit board according to claim 1, wherein unevenness is formed on an interface in contact with the wiring portion in the first insulating layer.   The printed circuit board according to claim 1, wherein the first insulating layer is thinner than the second insulating layer.   The printed circuit board according to claim 2, wherein the wiring portion is configured to fill the unevenness. 5. The method according to claim 1, wherein the first filler is at least one selected from the group consisting of SiO ₂ , ZnO, Al ₂ O ₃ , MgO, BN, SiC, AlBO ₃ , BaTiO ₃ , and CaZrO _3. A printed circuit board according to claim 1.   The printed circuit board according to claim 1, wherein the second filler is a white pigment-based material. The printed circuit board according to claim 1, wherein the second filler is at least one selected from the group consisting of BaSO ₄ , TiO ₂ , and ZnS.   The printed circuit board according to claim 1, wherein the wiring portion includes a conductive pattern formed on the insulating layer and a conductive via penetrating the insulating layer.   The printed circuit board according to claim 1, wherein the insulating layer includes a photosensitive material.   The printed circuit board according to claim 1, wherein the acid is HF. A first insulating layer in which a first filler is dispersed; and a second insulation in which a second filler having an etching property lower than acid and lower scattering than UV than the first filler is dispersed. And forming an insulating layer comprising:
Removing at least a portion of the first filler exposed on the surface of the first insulating layer to form irregularities in a form in which a portion of the surface of the first insulating layer is buried;
Forming a wiring portion on a surface of the first insulating layer.   The method of manufacturing a printed circuit board according to claim 11, wherein the insulating layer includes a photosensitive material.   The method of manufacturing a printed circuit board according to claim 11, further comprising forming a through hole penetrating the first and second insulating layers.   The method of manufacturing a printed circuit board according to claim 13, wherein forming the through hole is performed by irradiating the first and second insulating layers with UV.   The method of manufacturing a printed circuit board according to claim 11, wherein the step of forming irregularities on the surface of the first insulating layer is performed by etching the exposed first filler with HF.   The method for manufacturing a printed circuit board according to claim 11, wherein the wiring portion is formed so as to fill in unevenness formed on a surface of the first insulating layer.

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