JP2017011013A - Inspection wiring board and method for manufacturing inspection wiring board - Google Patents

Abstract

An inspection wiring board capable of suppressing slippage of an inspection probe and an inspection wiring board manufacturing method are provided.
An inspection wiring board according to the present invention has a laminated structure in which one or more insulating layers and conductor layers are laminated, and is an inspection wiring board used in the inspection of electrical characteristics of electronic components. In addition, on the main surface of the laminated structure, a pad group in which a plurality of pad portions to be a plurality of electrode pads that come into contact with the inspection probe at the time of electrical characteristic inspection are arranged in an array, and arranged around the pad group The plurality of pad portions constituting the pad group have depressions on the main surface on the side in contact with the inspection probe.
[Selection] Figure 1

Description

  The present invention relates to a wiring board for inspection used in the inspection of electrical characteristics of electronic components and a method for manufacturing the wiring board for inspection.

  An electronic component such as a semiconductor chip is subjected to electrical characteristic inspection in the manufacturing process. This electrical characteristic inspection is performed by bringing an inspection probe into contact with the connection terminal of the semiconductor chip and the electrode pad of the inspection wiring board. However, in recent years, connection terminals included in electronic components have been miniaturized and pitches have been reduced, and accordingly, electrode pads provided in the inspection wiring board have also been reduced in size and pitch.

  When the electrode pad is further miniaturized, the size (surface area in a top view) of the electrode pad is reduced, and therefore, when the inspection probe is brought into contact with the electrode pad, the inspection probe may slip and be detached from the electrode pad. In addition, since the interval between the electrode pads is narrowed due to the narrowing of the pitch, the sliding inspection probe contacts the adjacent electrode pad, shorts between the electrode pads (short circuit), it is determined to be rejected in the electrical property inspection, An accurate inspection may not be possible. Further, high accuracy is required for alignment between the inspection probe and the electrode pad.

  In the conventional wiring board, in order to stabilize the contact between the inspection probe and the connection terminal, a plurality of recesses each having a substantially square pyramid shape are formed on almost the entire connection surface (surface) of the connection terminal provided in the wiring board. Some are formed so as to be scattered two-dimensionally and uniformly (see, for example, Patent Document 1).

  In addition, there is a wiring board in which a contact portion in contact with a protruding electrode is flattened in order to increase contact reliability with the protruding electrode such as a bump of the object to be inspected (for example, see Patent Document 2).

  Further, in order to reduce contact resistance with an external terminal of a semiconductor device or an electronic device, a wiring pattern formed on an insulating substrate and a semiconductor device formed so as to be electrically connected to the wiring pattern or There has been proposed an inspection probe substrate that includes a metal plating protrusion that comes into contact with an external terminal of an electronic device, and has a recess at the center of the portion where the metal plating protrusion comes into contact with an external terminal of a semiconductor device or an electronic device (for example, (See Patent Document 3).

JP 2005-129658 A JP-A-8-297142 JP 2001-242219 A

  However, at the present time when the miniaturization of the electrode pad has progressed, it is difficult to two-dimensionally and uniformly interpose a plurality of concave portions having a substantially regular quadrangular pyramid shape as in the invention disclosed in Patent Document 1. In addition, when a plurality of recesses are scattered two-dimensionally and uniformly on the miniaturized electrode pad, each recess becomes too small, and the tip of the inspection probe cannot be captured by the recess, Slip cannot be suppressed.

  Further, in the invention disclosed in Patent Document 2, since the contact portion that contacts the protruding electrode is flat, the tip of the inspection probe cannot be reliably captured, and the inspection probe may slip. Furthermore, the invention disclosed in Patent Document 3 is an invention for reducing the contact resistance with the external terminal of the electronic device, and is not for suppressing the slip of the inspection probe. In addition, a plurality of processes are required to form the depressions in the metal plating protrusions, which increases the number of manufacturing processes.

  The present invention has been made in response to the above-described circumstances, and provides a wiring board for inspection and a method for manufacturing the wiring board for inspection that can suppress slipping of the inspection probe during the electrical property inspection of electronic components. With the goal.

  In order to achieve the above object, an inspection wiring board according to the present invention has a laminated structure in which one or more insulating layers and conductor layers are laminated, and is used for inspection of electrical characteristics of electronic components. A wiring board, a pad group in which a plurality of pad portions to be a plurality of electrode pads that come into contact with an inspection probe at the time of electrical property inspection are arranged in an array on the main surface of the laminated structure, The plurality of pad portions constituting the pad group have depressions on the main surface on the side in contact with the inspection probe.

  According to the wiring board for inspection according to the present invention, the plurality of pad portions constituting the pad group have a depression on the main surface on the side in contact with the inspection probe. For this reason, the front-end | tip of a test | inspection probe is caught by the hollow in the main surface of a pad part. As a result, the inspection probe can be prevented from slipping. Further, even if a positional deviation occurs with the inspection probe, the positional deviation can be corrected because the inspection probe is caught in the recess in the main surface of the pad portion.

  The wiring board for inspection according to the present invention is characterized in that the depth of the recess of the pad portion in the outer peripheral portion of the pad group is larger than the depth of the recess of the pad portion on the inner peripheral side of the outer peripheral portion.

  According to the wiring board for inspection according to the present invention, since the depth of the recess of the pad portion at the outer peripheral portion of the pad group is larger than the depth of the recess of the pad portion at the inner peripheral side than the outer peripheral portion, the inspection probe The slippage of the inspection probe can be effectively suppressed at the outer peripheral portion of the pad group that is likely to be displaced between the two. Further, the positional deviation from the inspection probe can be effectively corrected.

  A wiring board for inspection according to the present invention is a wiring board for inspection that has a laminated structure in which one or more insulating layers and conductor layers are laminated, and is used in an electrical characteristic inspection of an electronic component. On the main surface of the structure, a plurality of pad portions are provided, each including a pad group in which a plurality of pad portions to be a plurality of electrode pads that come into contact with the inspection probe at the time of an electrical characteristic inspection are arranged in an array. Has a depression on the main surface on the side in contact with the inspection probe, and the depth of the depression of the pad portion at the outer peripheral portion of the pad group is greater than the depth of the depression of the pad portion on the inner peripheral side than the outer peripheral portion. It is large.

  According to the wiring board for inspection according to the present invention, the plurality of pad portions constituting the pad group have depressions on the main surface on the side in contact with the inspection probe, and further have the pad portion on the outer peripheral portion of the pad group. The depth of the recess is larger than the depth of the recess of the pad portion on the inner peripheral side than the outer peripheral portion. For this reason, it is possible to effectively suppress slippage of the inspection probe at the outer peripheral portion of the pad group that is particularly likely to be displaced from the inspection probe, and to effectively correct the displacement from the inspection probe. .

  The method for manufacturing a wiring board for inspection according to the present invention includes a laminated structure in which one or more insulating layers and conductor layers are stacked, and the manufacturing of a wiring board for inspection used in the inspection of electrical characteristics of electronic components. A pad group in which a plurality of pad portions to be a plurality of electrode pads that come into contact with an inspection probe at the time of electrical property inspection are arranged in an array on the main surface of the laminated structure, and the periphery of the pad group And a dummy metal layer that is simultaneously formed by plating. In the plating process, a depression is formed in the main surface of the pad portion on the side in contact with the inspection probe.

  According to the method for manufacturing a wiring board for inspection according to the present invention, a pad group in which a plurality of pad portions to be a plurality of electrode pads that come into contact with the inspection probe at the time of electrical characteristic inspection are arranged in an array, There is a plating step of simultaneously forming a dummy metal layer disposed around by plating, and in the plating step, a recess is formed in the main surface of the pad portion on the side in contact with the inspection probe. For this reason, the front-end | tip of a test | inspection probe is caught by the hollow in the main surface of a pad part. As a result, the inspection probe can be prevented from slipping. Further, it is possible to correct the positional deviation from the inspection probe. Furthermore, since the pad portion having the depression on the main surface can be formed in one process, it is not necessary to increase the manufacturing process and the manufacturing cost can be suppressed.

  As described above, according to the present invention, it is possible to provide a wiring board for inspection and a method for manufacturing the wiring board for inspection that can suppress slipping of the inspection probe during the electrical property inspection of the electronic component.

The top view of the wiring board for a test concerning an embodiment. FIG. 3 is a partial cross-sectional view of the inspection wiring board according to the embodiment. Sectional drawing of the electrode pad with which the wiring board for an inspection which concerns on embodiment is provided. The manufacturing process figure of the wiring board for inspection concerning an embodiment. The manufacturing process figure of the wiring board for inspection concerning an embodiment. The partial cross section figure of the wiring board for inspection concerning other embodiments.

  Hereinafter, embodiments according to the present invention will be described in detail with reference to the drawings. The inspection wiring board according to the embodiment is merely an example, and is not particularly limited as long as the wiring board for inspection has at least one conductor layer and at least one insulating layer. For example, in the following embodiments, the present invention is described by taking an inspection wiring substrate having a core substrate as an example. However, the present invention can also be applied to a so-called coreless wiring board that does not have a core board. In the following description, the side provided with the pad portion serving as the electrode pad that comes into contact with the inspection probe will be described as the surface side.

(Configuration of wiring board)
FIG. 1 is a plan view of an inspection wiring board 100 according to the embodiment. FIG. 2 is an enlarged cross-sectional view of a part of the cut surface obtained by cutting the wiring board 100 along the line II shown in FIG.

  The inspection wiring board 100 includes a core substrate 2, a multilayer structure composed of insulating layers 41 to 44 and conductor layers 33 and 34 alternately stacked on the core substrate 2, and the surface side of the multilayer structure. A plurality of pad portions 35 serving as a plurality of electrode pads that come into contact with an inspection probe (not shown) at the time of electrical characteristic inspection are arranged on the main surface of the pad group and around the pad group. A dummy metal layer 36 is provided. The dummy metal layer 36 is disposed at a predetermined interval from the pad group so as to surround the pad group, and is electrically independent from the plurality of pad portions 35 constituting the pad group. In addition, a pad group in which a plurality of pad portions 37 serving as a plurality of electrode pads are arranged in an array is provided on the main surface on the back surface side of the multilayer structure.

  The core substrate 2 is made of a heat-resistant resin plate (for example, a bismaleimide-triazine resin plate) having a conductor layer 31 and a conductor layer 32 formed on the front and back surfaces, a fiber reinforced resin plate (for example, a glass fiber reinforced epoxy resin), or the like. It is the plate-shaped resin-made board | substrate comprised. A through hole 21 formed by a drill or the like is formed in the core substrate 2, and a through hole conductor 22 that electrically connects the conductor layer 31 and the conductor layer 32 is formed on the inner wall surface thereof. Furthermore, the inside of the through-hole conductor 22 is filled with a resin hole filling material 23 such as an epoxy resin.

  Insulating layers 41 and 43 and a conductor layer 33 are laminated on the surface side of the core substrate 2. Insulating layers 42 and 44 and a conductor layer 34 are laminated on the back side of the core substrate 2.

  The insulating layers 41 to 44 are made of, for example, an epoxy resin film. In the insulating layers 41 to 44, via holes 41A to 44A penetrating in the thickness direction are formed, respectively. Via conductors 41A to 44A are filled with via conductors 51 to 54 so as to embed the via holes 41A to 44A. The via conductor 51 is the conductor layer 31 and the conductor layer 33, the via conductor 52 is the conductor layer 32 and the conductor layer 34, the via conductor 53 is the conductor layer 33 and the pad portion 35, and the via conductor 54 is the conductor layer 34 and the pad portion 37. Are electrically connected to each other.

  The conductor layers 31 to 34 are made of copper (Cu), which is a good electrical conductor. The conductor layers 31 to 34 include via lands 31A to 34A connected to the via conductors 51 to 54 and wirings 31B to 34B connected to the via lands 31A to 34A, respectively.

  The pad portion 35 is made of copper (Cu), which is a good electrical conductor. The pad portion 35 is provided on the surface side of the inspection wiring board 100, and a metal plating layer is laminated on the surface, so that the pad portion 35 comes into contact with an inspection probe when performing an electrical property inspection of an electronic component such as a semiconductor chip. It becomes an electrode pad.

  The metal plating layer laminated | stacked on the surface of the pad part 35 is comprised by the single layer or several layers selected from metal layers, such as Ni layer, Sn layer, Ag layer, Pd layer, Au layer. For example, Ni (nickel), Pd (palladium), and Au (gold) may be laminated on the surface of the pad portion 35 in the same order to form a metal plating layer. A so-called hard gold plating layer hardened by adding cobalt (Co), nickel (Ni), or the like may be laminated on the surface of the pad portion 35 to form a metal plating layer. When the hard gold plating layer is laminated on the surface of the pad portion 35, the life is extended because of excellent wear resistance.

  The pad portion 37 is made of copper (Cu), which is a good electrical conductor. The pad portion 35 is provided on the back side of the inspection wiring substrate 100, and becomes an electrode pad by laminating a metal plating layer on the surface in the same manner as the pad portion 35.

  FIG. 3 is a cross-sectional view of the pad portion 35 provided in the inspection wiring board 100 according to the embodiment. 3A is a cross-sectional view of the pad portion 35 in the outer peripheral portion of the pad group arranged in an array as shown in FIG. 1, and FIG. 3B is an array as shown in FIG. It is sectional drawing of the pad part 35 in the center part of the inner peripheral side rather than an outer peripheral part among the arranged pad groups.

  As shown in FIGS. 3A and 3B, the pad portion 35 has a recess 35b on the main surface 35a on the side in contact with the inspection probe (not shown). One recess 35b is formed in the pad portion 35, and a portion of the main surface 35a forming the recess 35b is a curved surface. And the depth D1 of the hollow 35b which the pad part 35 has in the outer peripheral part of a pad group is larger than the depth D2 of the hollow 35b which the pad part 35 has in the center part of the inner peripheral side rather than an outer peripheral part. Here, the depths D1 and D2 are distances from the highest position of the main surface 35a of the pad portion 35 to the deepest position of the recess 35b of the pad portion 35, respectively.

  As described above, the metal plating layer is laminated on the surface of the pad portion 35. The thickness of the metal plating layer is usually about several μm, and the metal plating layer is the surface of the pad portion 25. Lamination is performed along the shape. For this reason, even if a metal plating layer is laminated on the surface of the pad portion 35 to form an electrode pad, a depression exists on the main surface on the side in contact with the inspection probe (not shown). In order to suppress slippage of the inspection probe, it is preferable that the depth of the recess on the main surface side with which the inspection probe abuts is 3 μm or more after the metal plating layer is laminated.

  Usually, in an electronic component such as a semiconductor chip, among the external connection terminals arranged in an array, the connection terminals arranged on the outer peripheral part are arranged for signal (Signal) and in the central part on the inner peripheral side of the outer peripheral part. The connection terminals are often used for power supply and grounding (GND). In the electrical inspection of electronic components, since a more precise inspection is performed on signal connection terminals, not only conduction with an inspection probe but also contact resistance becomes a problem.

  That is, in the electrical inspection of the electronic component, the sliding of the inspection probe is more reliably suppressed in the pad portion 35 arranged on the outer peripheral portion of the pad group in which the plurality of pad portions 35 are arranged in an array. It is necessary to make contact so that the contact resistance becomes small. For this reason, in this embodiment, as shown in FIGS. 3A and 3B, the pad portion 35 included in the inspection wiring board 100 is a recess 35b of the pad portion 35 in the outer peripheral portion of the pad group. The depth D1 is larger than the depth D2 of the recess 35b of the pad portion 35 in the central portion on the inner peripheral side with respect to the outer peripheral portion.

  For this reason, in the pad part 35 arrange | positioned in the outer peripheral part where suppression of the slip of a test probe more reliably is required, the slip of a test probe can be suppressed more reliably. Further, the contact resistance with the inspection probe can be reduced. As a result, a more precise inspection can be performed in the outer peripheral portion where the signal (Signal) inspection electrode pads are arranged.

  In the present embodiment, in some pad portions 35, the depth D1 of the recess 35b of the pad portion 35 in the outer peripheral portion of the pad group has the pad portion 35 in the central portion on the inner peripheral side with respect to the outer peripheral portion. There is a possibility that the depth D2 of the dent 35b is not larger than the depth D2, but as a whole pad group, the depth D1 of the dent 35b of the pad part 35 in the outer peripheral part of the pad group is smaller than the outer peripheral part. It tends to be larger than the depth D2 of the recess 35b of the pad portion 35 in the central portion on the circumferential side.

(Method for manufacturing inspection wiring board)
Next, with reference to FIGS. 2-5, the manufacturing method of the wiring board 100 for test | inspection in this embodiment is demonstrated.

  A copper clad laminate having a copper foil attached to the front and back surfaces of a plate-shaped resin substrate is prepared. Further, a drilling process is performed on the copper-clad laminate using a drill, and a through hole that becomes the through hole 21 is formed in advance at a predetermined position. In addition, it is desirable to perform the desmear process which removes the smear of a process part after the through-hole 21 formation process.

  Next, by performing electroless copper plating and electrolytic copper plating according to a conventionally known method, the through-hole conductor 22 is formed on the inner wall of the through-hole 21, and a copper plating layer is formed on both surfaces of the copper-clad laminate. Thereafter, the inside of the through-hole conductor 22 is filled with a resin hole filling material 23 such as an epoxy resin, and the copper plating layers formed on the copper foils on both sides of the copper-clad laminate are etched into a desired shape to obtain a copper-clad laminate. Via lands 31A and 32A and wirings 31B and 32B constituting the conductor layers 31 and 32 are formed on the front and back surfaces of the plate, respectively (see FIG. 4).

  Note that the surfaces of the via lands 31A and 32A and the wirings 31B and 32B constituting the conductor layers 31 and 32 are preferably roughened with a copper surface roughening agent (for example, MEC etch bond CZ: manufactured by MEC).

  Next, a resin film is laminated on the front surface side and the back surface side of the core substrate 2 and cured by pressurizing and heating under vacuum to form the insulating layers 41 and 42. Thereby, the front surface and the back surface of the core substrate 2 are covered with the insulating layers 41 and 42.

Next, the insulating layers 41 and 42 are irradiated with laser light having a predetermined intensity from, for example, a CO ₂ gas laser or a YAG laser to form via holes 41A and 42A, respectively. Thereafter, a roughening process is performed on the insulating layers 41 and 42 including the via holes 41A and 42A. In addition, when the insulating layers 41 and 42 contain a filler, when the roughening treatment is performed, the filler is liberated and remains on the insulating layers 41 and 42, so that water washing is appropriately performed.

  Next, desmear processing and outline etching are performed on the via holes 41A and 42A to clean the via holes 41A and 42A. In addition, you may perform an air blow process between the said water washing and a desmear process. Even when the filler released by washing with water is not completely removed, the remaining of the filler can be more reliably suppressed by the air blowing process.

  Next, a seed layer (first conductor layer) for electrolytic plating is formed on the insulating layers 41 and 42. The seed layer can be formed by a conventionally known method such as electroless copper plating, sputtering (PVD), vacuum deposition, or the like.

  Thereafter, a resist layer made of a photosensitive resin having an opening of a desired pattern is formed on the seed layer on the insulating layers 41 and 42, and electrolytic copper plating is performed on a portion where the resist layer is not formed, whereby the second conductor Form a layer. As a result, via conductors 51 and 52 are formed, and via lands 33A and 34A and wirings 33B and 34B constituting the conductor layers 33 and 34 are formed. After forming the via conductors 51 and 52, the via lands 33A and 34A, and the wirings 33B and 34B, the resist layer and the seed layer under the resist layer are removed (see FIG. 5).

  Note that the surfaces of the via lands 33A and 34A and the wirings 33B and 34B constituting the conductor layers 33 and 34 are preferably roughened with a copper surface roughening agent (for example, MEC etch bond CZ: manufactured by MEC).

  Next, a resin film is laminated on the conductor layers 33 and 34 and the insulating layers 41 and 42, and cured by pressurizing and heating under vacuum to form the insulating layers 43 and 44, respectively.

Next, the insulating layers 43 and 44 are irradiated with laser light of a predetermined intensity from, for example, a CO ₂ gas laser or a YAG laser to form via holes 43A and 44A, respectively, and then the insulating layers 43 and 44 including the via holes 43A and 44A. A roughening process is performed on

  Next, desmear processing and outline etching are performed on the via holes 43A and 44A to clean the inside of the via holes 43A and 44A. Next, a seed layer (first conductor layer) for electrolytic plating is formed on the insulating layers 43 and 44. The seed layer can be formed by a conventionally known method such as electroless copper plating, sputtering (PVD), vacuum deposition, or the like.

  Thereafter, a resist layer having an opening having a desired pattern is formed on the seed layer on the insulating layers 43 and 44, and electrolytic copper plating is performed on a portion where the resist layer is not formed, thereby forming a second conductor layer. As a result, via conductors 53 and 54 are formed, and a pad group in which a plurality of pad portions 35 are arranged in an array and a dummy metal layer 36 are simultaneously formed on the surface side of the multilayer structure. At this time, a plurality of pad portions 37 are formed on the back surface side of the laminated structure.

  In addition, by simultaneously forming a pad group in which a plurality of pad portions 35 are arranged in an array and a dummy metal layer 36 by electrolytic plating, a plating current flows not only in the pad portion 35 but also in the dummy metal layer 36. . For this reason, the plating current flowing through the pad portion 35 is reduced, and a recess 35b is formed in the main surface 35a of the pad portion 35 on the side in contact with the inspection probe.

  Further, the decrease in the plating current flowing through the pad portion 35 is significant at the outer peripheral portion of the pad group close to the dummy metal layer 36. Therefore, as shown in FIGS. 3A and 3B, the depth D1 of the recess 35b of the pad portion 35 in the outer peripheral portion of the pad group is such that the pad portion 35 on the inner peripheral side of the outer peripheral portion has a depth D1. It becomes larger than the depth D2 of the hollow 35b to have.

  After the pad portion 35, the dummy metal layer 36, and the pad portion 37 are formed, the resist layer and the seed layer under the resist layer are removed to obtain the inspection wiring board 100 according to the present embodiment (see FIG. 2). ).

  After obtaining the inspection wiring board 100 shown in FIG. 1, a metal plating layer is laminated on the surfaces of the pad portions 35 and 37, and the pad portions 35 and 37 are used as electrode pads. Here, before forming the metal plating layer, the surfaces of the pad portions 35 and 37 may be roughened with a copper surface roughening agent (for example, Mec Etch Bond CZ: manufactured by Mec Co., Ltd.). In addition, a metal plating layer may be laminated on the surface of the dummy metal layer 36.

  As described above, the inspection wiring board 100 according to the present embodiment has a laminated structure in which one or more insulating layers and conductor layers are laminated, and is used for inspection of electrical characteristics of electronic components. A pad group in which a plurality of pad portions 35 serving as a plurality of electrode pads that come into contact with an inspection probe at the time of electrical characteristic inspection are arranged in an array on the main surface of the multilayer structure, and a pad group The plurality of pad portions 35 constituting the pad group have depressions 35b on the main surface 35a on the side in contact with the inspection probe. For this reason, the tip of the inspection probe is caught in the recess 35 b in the main surface 35 a of the pad portion 35. As a result, the inspection probe can be prevented from slipping. Further, it is possible to correct the positional deviation from the inspection probe.

  Further, in the inspection wiring board 100 according to the present embodiment, the depth D1 of the recess 35b of the pad portion 35 in the outer peripheral portion of the pad group is the depth of the recess 35b of the pad portion 35 on the inner peripheral side of the outer peripheral portion. It is larger than D2. For this reason, the sliding of the inspection probe can be more reliably suppressed in the outer peripheral portion where the connection terminal of the signal line (Signal Line) that requires more precise inspection is arranged. In addition, the positional deviation from the inspection probe can be effectively corrected at the outer periphery of the pad group that is likely to be displaced from the inspection probe. Furthermore, the contact resistance with the inspection probe can be reduced. As a result, a more precise inspection can be performed in the outer peripheral portion where the signal (Signal) inspection electrode pads are arranged.

  Furthermore, the method for manufacturing the inspection wiring board 100 includes a laminated structure in which one or more insulating layers and conductor layers are laminated, and the method for manufacturing the inspection wiring board used in the electrical property inspection of the electronic component. A pad group in which a plurality of pad portions 35 to be a plurality of pad portions 35 that come into contact with the inspection probe at the time of electrical characteristic inspection are arranged on the main surface of the laminated structure, and There is a plating step of simultaneously forming the dummy metal layer 36 disposed around by plating, and in the plating step, a depression is formed in the main surface of the pad portion on the side in contact with the inspection probe. For this reason, the tip of the inspection probe is caught by the recess 35b in the main surface 35a of the pad portion 35, and the inspection probe can be prevented from slipping. Further, it is possible to correct the positional deviation from the inspection probe. Moreover, since the pad part 35 which has the hollow 35b in the main surface 35a can be formed in one process, it is not necessary to increase a manufacturing process and can suppress manufacturing cost.

(Other embodiments)
The present invention is not limited to the above embodiment. For example, as shown in FIG. 6, when wirings 38 and 39 other than the pad portions 35 and 37 are provided on the insulating layers 43 and 44, the pads are respectively formed on the insulating layers 43 and 44 to cover the wirings 38 and 39. Resist layers 61 and 62 having openings 61A and 62A exposing the portions 35 and 37 may be provided.

  In FIG. 1, a dummy metal layer 36 is formed on the entire surface of a pad group in which a plurality of pad portions 35 are arranged in an array. The arrangement position and size of the dummy metal layer 36 are shown in FIG. It is not restricted to the example shown. For example, the dummy metal layer 36 may be divided into a plurality of regions and arranged around the pad group. The size of the recess 35 b that can be formed in the main surface 35 a of the pad portion 35 can be controlled by the arrangement position and size of the dummy metal layer 36. Further, the dummy metal layer 36 can be removed after the formation of the plurality of pad portions 35.

  In FIG. 3, the deepest part of the recess 35b formed in the main surface 35a of the pad portion 35 is located above the surface of the insulating layer 43 (the main surface on the surface side of the laminated structure). The deepest portion of the recess 35b formed in the main surface 35a of the pad portion 35 may be located below the surface of the insulating layer 43 (the main surface on the surface side of the laminated structure).

  Furthermore, in the above embodiment, the example in which the present invention is applied to a so-called organic wiring board in which one or more resin insulating layers and conductor layers are laminated has been described. However, a so-called ceramic wiring board in which the insulating layer is formed of ceramic. It is also applicable to.

2 ... Core substrate 21 ... Through hole 22 ... Through hole conductor 23 ... Resin filling material 31-34 Conductor layers 31A-34A ... Via land 31B-34B ... Wiring 35 ... Pad part 36 ... Dummy metal layer 37 ... Pad parts 41-44 Insulating layers 41A to 44A ... Via holes 51 to 54 ... Via conductors 61, 62 ... Resist layers 61A, 62A ... Opening 100 ... Inspection wiring board

Claims (4)

It has a laminated structure in which one or more insulating layers and conductor layers are laminated, and is a wiring board for inspection used in the inspection of electrical characteristics of electronic components,
On the main surface of the laminated structure, a pad group in which a plurality of pad portions to be a plurality of electrode pads that come into contact with the inspection probe at the time of the electrical property inspection are arranged in an array, and arranged around the pad group A dummy metal layer,
The plurality of pad portions constituting the pad group are:
An inspection wiring board having a recess in a main surface on the side in contact with the inspection probe.   2. The inspection according to claim 1, wherein the depth of the recess of the pad portion in the outer peripheral portion of the pad group is greater than the depth of the recess of the pad portion on the inner peripheral side of the outer peripheral portion. Wiring board. It has a laminated structure in which one or more insulating layers and conductor layers are laminated, and is a wiring board for inspection used in the inspection of electrical characteristics of electronic components,
Provided on the main surface of the laminated structure is a pad group in which a plurality of pad portions to be a plurality of electrode pads that come into contact with an inspection probe in the electrical characteristic inspection are arranged in an array,
The plurality of pad portions constituting the pad group are:
Having a recess in the main surface on the side in contact with the inspection probe;
The inspection wiring board, wherein a depth of the recess of the pad portion in the outer peripheral portion of the pad group is larger than a depth of the recess of the pad portion on the inner peripheral side of the outer peripheral portion. A method of manufacturing a wiring board for inspection used in the case of inspecting electrical characteristics of an electronic component, having a laminated structure in which at least one insulating layer and a conductor layer are laminated,
On the main surface of the laminated structure, a pad group in which a plurality of pad portions to be a plurality of electrode pads that come into contact with the inspection probe at the time of the electrical property inspection are arranged in an array, and arranged around the pad group And a dummy metal layer to be formed simultaneously by plating,
In the plating step, a depression is formed in the main surface of the pad portion on the side in contact with the inspection probe.

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