JP2016164490A

JP2016164490A - Current detector, driving device, and industrial machine

Info

Publication number: JP2016164490A
Application number: JP2015044185A
Authority: JP
Inventors: 拓嗣川中子; Takuji Kawanakako
Original assignee: Canon Inc
Current assignee: Canon Inc
Priority date: 2015-03-06
Filing date: 2015-03-06
Publication date: 2016-09-08

Abstract

PROBLEM TO BE SOLVED: To provide a current detector that is advantageous in current detection accuracy.SOLUTION: There is provided a current detector for detecting current flowing through a load that is driven by a bipolar DC power supply and first and second switching element pairs. The current detector comprises: first and second current detection resistors; a first voltage division path configured by series connecting a plurality of voltage-dividing resistors via a first node, and connected in parallel to a current path including the first current detection resistor and the load; a second voltage division path configured by series connecting the plurality of voltage-dividing resistors via a second node, and connected in parallel to a current path including the second current detection resistor and the load; and an output unit for outputting a voltage corresponding to the current flowing through the load using a voltage from the first node and a voltage from the second node as input.SELECTED DRAWING: Figure 1

Description

本発明は、電流検出装置、駆動装置および産業機械に関する。 The present invention relates to a current detection device, a drive device, and an industrial machine.

一般的に、負荷（モーターなど）に流れる電流は、負荷と直列に接続された電流検出抵抗での電圧降下として検出される。この電圧降下は、電流検出抵抗の両端の電圧を差動増幅器などの検出回路に入力して得られた出力（＝差電圧）として求められる。しかし、負荷への印加電圧を上昇させた場合、電流検出抵抗の両端に高い同相電圧が印加されるので、差電圧には検出回路に依存する誤差が含まれてしまう。これに対して、特許文献１は、負荷の両端に電流検出抵抗を挿入し、差動増幅器により各抵抗での差電圧を検出し、これら２つの差電圧を加算することで電流検出精度の悪化を抑制する電流検出装置を開示している。 Generally, a current flowing through a load (such as a motor) is detected as a voltage drop at a current detection resistor connected in series with the load. This voltage drop is obtained as an output (= differential voltage) obtained by inputting the voltage across the current detection resistor to a detection circuit such as a differential amplifier. However, when the voltage applied to the load is increased, a high common-mode voltage is applied to both ends of the current detection resistor, so that the difference voltage includes an error depending on the detection circuit. On the other hand, in Patent Document 1, current detection resistors are inserted at both ends of a load, a differential voltage at each resistor is detected by a differential amplifier, and these two difference voltages are added to deteriorate current detection accuracy. Disclosed is a current detection device that suppresses noise.

特開２００８−６４５０６号公報JP 2008-64506 A

しかしながら、特許文献１の装置においても、電流検出抵抗の両端に高い同相電圧が印加されることに変わりはない。したがって、差動増幅器から出力される差電圧には、その性能に依存する誤差が含まれ、電流検出精度の点で不利となりうる。本発明は、例えば、検出精度の点で有利な電流検出装置を提供することを目的とする。 However, even in the apparatus of Patent Document 1, a high common-mode voltage is applied to both ends of the current detection resistor. Therefore, the differential voltage output from the differential amplifier includes an error depending on its performance, which may be disadvantageous in terms of current detection accuracy. An object of the present invention is to provide a current detection device that is advantageous in terms of detection accuracy, for example.

上記課題を解決するために、本発明は、両極性の直流電源と第１および第２スイッチング素子対とにより駆動される負荷に流れる電流を検出する電流検出装置であって、第１および第２電流検出抵抗と、第１接続点を介して複数の分圧抵抗を直列に接続して構成され、第１電流検出抵抗と負荷とを含む電流経路とは並列に接続された第１分圧経路と、第２接続点を介して複数の分圧抵抗を直列に接続して構成され、第２電流検出抵抗と負荷とを含む電流経路とは並列に接続された第２分圧経路と、を有し、第１接続点からの電圧および第２接続点からの電圧を入力として電流に対応した電圧を出力する出力部と、を有することを特徴とする。 In order to solve the above-mentioned problems, the present invention provides a current detection device for detecting a current flowing in a load driven by a bipolar DC power supply and a first and second switching element pair, wherein the first and second A first voltage dividing path configured by connecting a current detecting resistor and a plurality of voltage dividing resistors in series via a first connection point, and the current path including the first current detecting resistor and the load is connected in parallel. And a second voltage dividing path configured by connecting a plurality of voltage dividing resistors in series via the second connection point, and connected in parallel with the current path including the second current detection resistor and the load. And an output unit that outputs the voltage corresponding to the current with the voltage from the first connection point and the voltage from the second connection point as inputs.

本発明によれば、例えば、検出精度の点で有利な電流検出装置を提供することができる。 According to the present invention, for example, a current detection device that is advantageous in terms of detection accuracy can be provided.

第１実施形態に係る電流検出装置の構成を示す回路図である。It is a circuit diagram which shows the structure of the electric current detection apparatus which concerns on 1st Embodiment. 第２実施形態に係る電流検出装置の構成を示す回路図である。It is a circuit diagram which shows the structure of the electric current detection apparatus which concerns on 2nd Embodiment. 第３実施形態に係る電流検出装置の構成を示す回路図である。It is a circuit diagram which shows the structure of the current detection apparatus which concerns on 3rd Embodiment. 第４実施形態に係る電流検出装置の構成を示す回路図である。It is a circuit diagram which shows the structure of the current detection apparatus which concerns on 4th Embodiment. 本発明の実施形態に係る電流検出装置を使用可能な光走査装置の制御システムを示す概略図である。It is the schematic which shows the control system of the optical scanning device which can use the electric current detection apparatus which concerns on embodiment of this invention. 本発明の実施形態に係る電流検出装置を使用可能な駆動装置を示す概略図である。It is the schematic which shows the drive device which can use the electric current detection apparatus which concerns on embodiment of this invention.

以下、本発明を実施するための形態について図面を参照して説明する。 Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.

（第１実施形態）
図１は本発明の第１実施形態に係る電流検出装置の構成を示す回路図である。電流検出装置１は、直流電源２および３と、第１スイッチング素子対８および第２スイッチング素子対９と、直流モータである負荷１０とを備える。さらに、負荷１０の両端に第１電流検出抵抗１１および第２電流検出抵抗１２を備え、分圧抵抗１３、１４、１５および１６と、出力部（検出回路）１９と、を備える。直流電源２および３は、直列に接続されるとともに、その接続点が接地されることで直流電源２が正極、直流電源３が負極の電圧が概略等しい両極性の直流電源として構成される。第１スイッチング素子対８および第２スイッチング素子対９は、直流電源２と３との間に並列に配置される。第１スイッチング素子対８は、ＦＥＴ（電界効果トランジスタ）であるスイッチング素子４と５とを第３接続点を介して直列に接続した構成をしており、一端が直流電源２と接続され他端が直流電源３に接続される。第２スイッチング素子対９の構成および直流電源との接続も同様であり、スイッチング素子６と７とを第４接続点を介して直列に接続した構成をしており、一端が直流電源２と接続され他端が直流電源３に接続される。第１電流検出抵抗１１は、負荷１０の一端と第３接続点との間に接続される。第２電流検出抵抗１２は、負荷１０の他端と第４接続点との間に接続される。以上のように各素子を配置することで、この回路は、直流電源２および３と第１スイッチング素子対８および第２スイッチング素子対９を備えた負荷駆動手段により負荷１０を駆動するフルブリッジ回路を構成する。 (First embodiment)
FIG. 1 is a circuit diagram showing the configuration of the current detection device according to the first embodiment of the present invention. The current detection device 1 includes DC power supplies 2 and 3, a first switching element pair 8 and a second switching element pair 9, and a load 10 that is a DC motor. Further, the load 10 includes a first current detection resistor 11 and a second current detection resistor 12 at both ends, and voltage dividing resistors 13, 14, 15 and 16, and an output unit (detection circuit) 19. The DC power sources 2 and 3 are connected in series and grounded at their connection point, so that the DC power source 2 is configured as a bipolar DC power source having substantially the same positive and negative voltage. The first switching element pair 8 and the second switching element pair 9 are arranged in parallel between the DC power supplies 2 and 3. The first switching element pair 8 has a configuration in which switching elements 4 and 5 which are FETs (field effect transistors) are connected in series via a third connection point, and one end is connected to the DC power source 2 and the other end. Is connected to the DC power source 3. The configuration of the second switching element pair 9 and the connection to the DC power supply are the same, and the switching elements 6 and 7 are connected in series via the fourth connection point, and one end is connected to the DC power supply 2. The other end is connected to the DC power source 3. The first current detection resistor 11 is connected between one end of the load 10 and the third connection point. The second current detection resistor 12 is connected between the other end of the load 10 and the fourth connection point. By arranging each element as described above, this circuit is a full bridge circuit that drives the load 10 by load driving means including the DC power sources 2 and 3, the first switching element pair 8, and the second switching element pair 9. Configure.

分圧抵抗１３および１４は、抵抗値が概略等しく、第１接続点１７を介して直列に接続された第１分圧経路として構成される。第１分圧経路の一端は第４接続点に接続され、他端が負荷１０と第１電流検出抵抗１１との接続点に接続される。つまり、第１電流検出抵抗１１と負荷１０とを含む電流経路とは並列に接続される。この分圧経路と、第１電流検出抵抗１１とにより電源電圧が分圧される。同様に、分圧抵抗１５および１６は、抵抗値が概略等しく、第２接続点１８を介して直列に接続されて第２分圧経路として構成される。第２分圧経路の一端は第３接続点に接続され、他端が負荷１０と第２電流検出抵抗１２との接続点に接続される。つまり、第２電流検出抵抗１２と負荷１０とを含む電流経路とは並列に接続される。この分圧経路と、第２電流検出抵抗１２とにより電源電圧が分圧される。出力部１９は、入力電圧を演算して出力する回路であり、本実施形態では差動増幅回路を用いる。分圧抵抗１３と１４との第１接続点１７および分圧抵抗１５と１６との第２接続点１８は、出力部１９の入力に接続される。出力部１９は、第１接続点１７および第２接続点１８からの電圧を入力として、負荷１０に流れる電流Ｉｓ１に対応した電圧を出力する。 The voltage dividing resistors 13 and 14 have substantially the same resistance value, and are configured as a first voltage dividing path connected in series via the first connection point 17. One end of the first voltage dividing path is connected to the fourth connection point, and the other end is connected to a connection point between the load 10 and the first current detection resistor 11. That is, the current path including the first current detection resistor 11 and the load 10 is connected in parallel. The power supply voltage is divided by the voltage dividing path and the first current detection resistor 11. Similarly, the voltage dividing resistors 15 and 16 have substantially the same resistance value and are connected in series via the second connection point 18 to be configured as a second voltage dividing path. One end of the second voltage dividing path is connected to the third connection point, and the other end is connected to the connection point between the load 10 and the second current detection resistor 12. That is, the current path including the second current detection resistor 12 and the load 10 is connected in parallel. The power supply voltage is divided by the voltage dividing path and the second current detection resistor 12. The output unit 19 is a circuit that calculates and outputs an input voltage. In the present embodiment, a differential amplifier circuit is used. A first connection point 17 between the voltage dividing resistors 13 and 14 and a second connection point 18 between the voltage dividing resistors 15 and 16 are connected to the input of the output unit 19. The output unit 19 receives the voltage from the first connection point 17 and the second connection point 18 as an input, and outputs a voltage corresponding to the current Is1 flowing through the load 10.

負荷１０の駆動状態について説明する。負荷１０は前述したフルブリッジ回路により駆動される。ここで、スイッチング素子４、５、６および７は、図示しない制御装置によりオンもしくはオフどちらかの状態に制御される。第１の負荷駆動状態では、スイッチング素子４および７がオン状態に制御され、スイッチング素子５および６がオフ状態に制御される。この第１の負荷駆動状態では、負荷に流れる電流が第１スイッチング素子対８から第２スイッチング素子対９へ向かう方向となる。このとき、スイッチング素子４と５との接続点には最大で直流電源２の電圧＋Ｖｐが印加され、スイッチング素子６と７との接続点には最小で直流電源３の電圧−Ｖｐが印加される。第２の負荷駆動状態では、スイッチング素子５および６がオン状態に制御され、スイッチング素子４および７がオフ状態に制御される。この第２の負荷駆動状態では、負荷に流れる電流が第２スイッチング素子対９から第１スイッチング素子対８へ向かう方向となる。このとき、スイッチング素子６と７との接続点には最大で直流電源２の電圧＋Ｖｐが印加され、スイッチング素子４と５との接続点には最小で直流電源３の電圧−Ｖｐが印加される。 A driving state of the load 10 will be described. The load 10 is driven by the above-described full bridge circuit. Here, the switching elements 4, 5, 6 and 7 are controlled to be either on or off by a control device (not shown). In the first load driving state, switching elements 4 and 7 are controlled to be in an on state, and switching elements 5 and 6 are controlled to be in an off state. In the first load driving state, the current flowing through the load is directed from the first switching element pair 8 toward the second switching element pair 9. At this time, the voltage + Vp of the DC power supply 2 is applied to the connection point between the switching elements 4 and 5 at the maximum, and the voltage −Vp of the DC power supply 3 is applied to the connection point between the switching elements 6 and 7 at the minimum. . In the second load driving state, switching elements 5 and 6 are controlled to be in an on state, and switching elements 4 and 7 are controlled to be in an off state. In the second load driving state, the current flowing through the load is directed from the second switching element pair 9 toward the first switching element pair 8. At this time, the voltage + Vp of the DC power supply 2 is applied to the connection point between the switching elements 6 and 7 at the maximum, and the voltage −Vp of the DC power supply 3 is applied to the connection point between the switching elements 4 and 5 at the minimum. .

次に、電流検出装置１における電流検出の原理について、第１の負荷駆動状態の場合で説明する。スイッチング素子４と５との接続点電圧を＋Ｖｐ、スイッチング素子６と７との接続点電圧を−Ｖｐとすると、分圧抵抗の第１接続点１７および第２接続点１８の電圧Ｖ１１およびＶ１２はそれぞれ式（１）および（２）で表される。
Ｖ１１＝−１／２（Ｉｓ１×Ｒｓ１１＋Ｉｂ×Ｒ）（１）
Ｖ１２＝１／２（Ｉｓ１×Ｒｓ１２−Ｉｂ×Ｒ）（２）
ここで、Ｉｓ１は負荷１０に流れる電流、Ｒｓ１１およびＲｓ１２はそれぞれ第１電流検出抵抗１１および第２電流検出抵抗１２の抵抗値、Ｉｂは出力部１９の入力バイアス電流であり、入力バイアス電流の流れる向きは図１に矢印で示す方向とする。また、Ｒは分圧抵抗１３、１４、１５および１６の抵抗値である。 Next, the principle of current detection in the current detection device 1 will be described in the case of the first load driving state. When the connection point voltage between the switching elements 4 and 5 is + Vp and the connection point voltage between the switching elements 6 and 7 is −Vp, the voltages V11 and V12 at the first connection point 17 and the second connection point 18 of the voltage dividing resistor are They are represented by formulas (1) and (2), respectively.
V11 = −1 / 2 (Is1 × Rs11 + Ib × R) (1)
V12 = 1/2 (Is1 * Rs12-Ib * R) (2)
Here, Is1 is a current flowing through the load 10, Rs11 and Rs12 are resistance values of the first current detection resistor 11 and the second current detection resistor 12, respectively, Ib is an input bias current of the output unit 19, and the input bias current flows. The direction is the direction indicated by the arrow in FIG. R is the resistance value of the voltage dividing resistors 13, 14, 15 and 16.

出力部１９からはＶ１１とＶ１２の差電圧と、共通に印加される同相電圧による誤差電圧が出力される。式（１）および（２）から、同相電圧は−１／２（Ｉｂ×Ｒ）であるので、出力部１９の出力電圧Ｖｓ１は式（３）で表される。
Ｖｓ１＝１／２｛Ｉｓ１×（Ｒｓ１１＋Ｒｓ１２）｝−Ａ｛１／２（Ｉｂ×Ｒ）｝（３）
第一の項が差電圧であり、第二の項が同相電圧による誤差電圧である。第２の負荷駆動状態においては、差電圧の項の符号が反転する。なお、Ａは出力部１９の同相電圧除去比であり、例えばＡ＝−８０ｄＢの検出回路であれば、同相電圧による誤差電圧は、同相電圧の０．０１％に低減される。 The output unit 19 outputs a difference voltage between V11 and V12 and an error voltage due to the common-mode voltage applied in common. From the equations (1) and (2), since the common-mode voltage is −½ (Ib × R), the output voltage Vs1 of the output unit 19 is represented by the equation (3).
Vs1 = 1/2 {Is1 * (Rs11 + Rs12)}-A {1/2 (Ib * R)} (3)
The first term is the differential voltage, and the second term is the error voltage due to the common-mode voltage. In the second load driving state, the sign of the differential voltage term is inverted. A is the common-mode voltage rejection ratio of the output unit 19. For example, if the detection circuit has A = −80 dB, the error voltage due to the common-mode voltage is reduced to 0.01% of the common-mode voltage.

例えば、分圧抵抗１３、１４、１５および１６の抵抗値Ｒを２０ｋΩ、出力部１９の入力バイアス電流Ｉｂを１０ｎＡとすると、式（３）から同相電圧による誤差電圧は１０ｎＶとなる。第１電流検出抵抗１１および第２電流検出抵抗１２の抵抗値Ｒｓ１１およびＲｓ１２を１０ｍΩ、負荷１０に流れる電流Ｉｓ１を１Ａとした場合、差電圧は１０ｍＶとなる。この条件では、同相電圧による電流検出誤差が０．０００１％であり、通常、検出誤差として無視できる値となる。 For example, if the resistance value R of the voltage dividing resistors 13, 14, 15 and 16 is 20 kΩ, and the input bias current Ib of the output unit 19 is 10 nA, the error voltage due to the common-mode voltage is 10 nV from Equation (3). When the resistance values Rs11 and Rs12 of the first current detection resistor 11 and the second current detection resistor 12 are 10 mΩ and the current Is1 flowing through the load 10 is 1 A, the differential voltage is 10 mV. Under this condition, the current detection error due to the common-mode voltage is 0.0001%, which is normally a value that can be ignored as the detection error.

そして、式（３）から明らかなように、出力電圧Ｖｓ１には直流電源２および３の電圧値Ｖｐを含む項がないため、負荷１０への印加電圧は、出力部１９の出力電圧Ｖｓ１と無関係になる。 As apparent from the equation (3), since the output voltage Vs1 has no term including the voltage value Vp of the DC power supplies 2 and 3, the voltage applied to the load 10 is independent of the output voltage Vs1 of the output unit 19. become.

以上のように、本実施形態によれば、負荷への印加電圧を上昇させても電流検出精度の点で有利な電流検出装置を提供することができる。 As described above, according to the present embodiment, it is possible to provide a current detection device that is advantageous in terms of current detection accuracy even when the voltage applied to the load is increased.

（第２実施形態）
図２は本発明の第２実施形態に係る電流検出装置の構成を示す回路図である。図１の電流検出装置１と同じ構成については説明を省略する。電流検出装置１と電流検出装置２０との相違点は、電流検出抵抗の個数と接続位置、分圧抵抗の個数と接続位置、および検出回路の個数と構成である。すなわち、電流検出装置２０は、第１電流検出抵抗２１、第２電流検出抵抗２４、第３電流検出抵抗２２、第４電流検出抵抗２３と、分圧抵抗２５〜３２と、出力部（検出回路）１９、３７および３８と、を備える。電流検出抵抗２１〜２４は、それぞれ、直流電源の正極または負極の一方とスイッチング素子対との間に接続される。たとえば、第１電流検出抵抗２１は、正極である直流電源２と第１スイッチング素子対８との間に接続される。この場合、電源電圧は、抵抗値が概略等しい分圧抵抗２５および２６を直列に接続されて構成された第１分圧経路と、第１電流検出抵抗２１とにより分圧される。この分圧経路の一端は、直流電源の他方の極である直流電源３に接続され、他端は第１スイッチング素子対８と第１電流検出抵抗２１との接続点に接続される。第２電流検出抵抗２４は、正極である直流電源２と第２スイッチング素子対９との間に接続される。この場合、電源電圧は、抵抗値が概略等しい分圧抵抗３１および３２を直列に接続されて構成された第２分圧経路と、第２電流検出抵抗２４とにより分圧される。この分圧経路の一端は、直流電源の他方の極である直流電源３に接続され、他端は第２スイッチング素子対９と第２電流検出抵抗２４との接続点に接続される。分圧抵抗２７および２８、２９および３０も同様にして分圧経路を構成し、その接続位置も同様である。また、スイッチング素子４と５との接続点とスイッチング素子６と７との接続点との間には、負荷１０のみが接続される。 (Second Embodiment)
FIG. 2 is a circuit diagram showing a configuration of a current detection device according to the second exemplary embodiment of the present invention. The description of the same configuration as that of the current detection device 1 in FIG. 1 is omitted. The differences between the current detection device 1 and the current detection device 20 are the number and connection positions of current detection resistors, the number and connection positions of voltage dividing resistors, and the number and configuration of detection circuits. That is, the current detection device 20 includes a first current detection resistor 21, a second current detection resistor 24, a third current detection resistor 22, a fourth current detection resistor 23, voltage dividing resistors 25 to 32, and an output unit (detection circuit). ) 19, 37 and 38. The current detection resistors 21 to 24 are respectively connected between one of the positive electrode and the negative electrode of the DC power supply and the switching element pair. For example, the first current detection resistor 21 is connected between the DC power supply 2 that is a positive electrode and the first switching element pair 8. In this case, the power supply voltage is divided by the first current detection resistor 21 and the first voltage dividing path configured by connecting the voltage dividing resistors 25 and 26 having approximately the same resistance value in series. One end of the voltage dividing path is connected to the DC power supply 3 that is the other pole of the DC power supply, and the other end is connected to a connection point between the first switching element pair 8 and the first current detection resistor 21. The second current detection resistor 24 is connected between the DC power source 2 that is a positive electrode and the second switching element pair 9. In this case, the power supply voltage is divided by the second voltage dividing path formed by connecting the voltage dividing resistors 31 and 32 having approximately the same resistance value in series and the second current detection resistor 24. One end of the voltage dividing path is connected to the DC power supply 3 that is the other pole of the DC power supply, and the other end is connected to a connection point between the second switching element pair 9 and the second current detection resistor 24. Similarly, the voltage dividing resistors 27 and 28, 29 and 30 constitute a voltage dividing path, and the connection positions thereof are also the same. Further, only the load 10 is connected between the connection point between the switching elements 4 and 5 and the connection point between the switching elements 6 and 7.

分圧抵抗の接続点３３、３４および３５、３６は、それぞれ、加算回路である検出回路３７および３８に接続される。検出回路３７、３８の出力電圧は、出力部１９に入力され、負荷１０に流れる電流Ｉｓ２に対応した電圧が出力される。 The connection points 33, 34 and 35, 36 of the voltage dividing resistor are connected to detection circuits 37 and 38 which are addition circuits, respectively. The output voltages of the detection circuits 37 and 38 are input to the output unit 19, and a voltage corresponding to the current Is2 flowing through the load 10 is output.

負荷１０は、第１実施形態と同様にして駆動される。電流検出装置２０における電流検出の原理について、第１の負荷駆動状態の場合で説明する。分圧抵抗の接続点３３〜３６の電圧をそれぞれＶ２１〜Ｖ２４とすると、これら電圧は次式で示すことができる。
Ｖ２１＝−｛１／２（Ｉｓ２×Ｒｓ２１＋Ｉｂ×Ｒ）｝
Ｖ２２＝−１／２（Ｉｂ×Ｒ）
Ｖ２３＝１／２（Ｉｓ２×Ｒｓ２３−Ｉｂ×Ｒ）
Ｖ２４＝−１／２（Ｉｂ×Ｒ）
ここで、Ｒｓ２１およびＲｓ２３はそれぞれ、第１電流検出抵抗２１および第４電流検出抵抗２３の抵抗値、Ｉｂは検出回路３７および３８の入力バイアス電流であり、入力バイアス電流の流れる向きは図２に矢印で示す方向とする。また、Ｒは分圧抵抗２５〜３２の抵抗値である。検出回路３７および３８には、それぞれＶ２１、Ｖ２２およびＶ２３、Ｖ２４が入力され、検出回路３７および３８の出力電圧が出力部１９に入力される。出力部１９からは、第１実施形態で述べたように、差電圧と、共通に印加される同相電圧による誤差電圧が出力される。よって、出力部１９の出力電圧Ｖｓ２は次式となる。
Ｖｓ２＝（Ｖ２３＋Ｖ２４）−（Ｖ２１＋Ｖ２２）
＝１／２｛Ｉｓ２×（Ｒｓ２１＋Ｒｓ２３）｝−Ａ（Ｉｂ×Ｒ）（４） The load 10 is driven in the same manner as in the first embodiment. The principle of current detection in the current detection device 20 will be described in the case of the first load driving state. If the voltages at the connection points 33 to 36 of the voltage dividing resistor are V21 to V24, respectively, these voltages can be expressed by the following equations.
V21 =-{1/2 (Is2 * Rs21 + Ib * R)}
V22 = −1 / 2 (Ib × R)
V23 = 1/2 (Is2 * Rs23-Ib * R)
V24 = −1 / 2 (Ib × R)
Here, Rs21 and Rs23 are the resistance values of the first current detection resistor 21 and the fourth current detection resistor 23, respectively, Ib is the input bias current of the detection circuits 37 and 38, and the direction in which the input bias current flows is shown in FIG. The direction indicated by the arrow. R is the resistance value of the voltage dividing resistors 25-32. V21, V22, V23, and V24 are input to the detection circuits 37 and 38, respectively, and output voltages of the detection circuits 37 and 38 are input to the output unit 19. As described in the first embodiment, the output unit 19 outputs an error voltage due to the differential voltage and the common-mode voltage applied in common. Therefore, the output voltage Vs2 of the output unit 19 is as follows.
Vs2 = (V23 + V24)-(V21 + V22)
= 1/2 {Is2 * (Rs21 + Rs23)}-A (Ib * R) (4)

第２の負荷駆動状態の場合は、Ｖ２１〜Ｖ２４の電圧は次式のように表される。
Ｖ２１＝−１／２（Ｉｂ×Ｒ）
Ｖ２２＝１／２（Ｉｓ２×Ｒｓ２２−Ｉｂ×Ｒ）
Ｖ２３＝−１／２（Ｉｂ×Ｒ）
Ｖ２４＝−｛１／２（Ｉｓ２×Ｒｓ２４＋Ｉｂ×Ｒ）｝
ここで、Ｒｓ２２およびＲｓ２４はそれぞれ、第３電流検出抵抗２２および第２電流検出抵抗２４の抵抗値である。上記より、出力部１９の出力電圧Ｖｓ２は、次式となる。
Ｖｓ２＝（Ｖ２３＋Ｖ２４）−（Ｖ２１＋Ｖ２２）
＝−１／２｛Ｉｓ２×（Ｒｓ２２＋Ｒｓ２４）｝−Ａ（Ｉｂ×Ｒ）（５）
式（５）のＲｓ２２およびＲｓ２４をＲｓ２１およびＲｓ２３に置換え、差電圧の項について符号を反転したものが式（４）に相当する。 In the case of the second load driving state, the voltages V21 to V24 are expressed by the following equations.
V21 = −1 / 2 (Ib × R)
V22 = 1/2 (Is2 * Rs22-Ib * R)
V23 = −1 / 2 (Ib × R)
V24 =-{1/2 (Is2 * Rs24 + Ib * R)}
Here, Rs22 and Rs24 are the resistance values of the third current detection resistor 22 and the second current detection resistor 24, respectively. From the above, the output voltage Vs2 of the output unit 19 is expressed by the following equation.
Vs2 = (V23 + V24)-(V21 + V22)
= −1 / 2 {Is2 × (Rs22 + Rs24)} − A (Ib × R) (5)
The expression (4) is obtained by replacing Rs22 and Rs24 in the expression (5) with Rs21 and Rs23 and inverting the sign of the difference voltage term.

第１実施形態と同様に、分圧抵抗２５〜３２の抵抗値Ｒを２０ｋΩ、検出回路３７および３８の入力バイアス電流を１０ｎＡ、同相電圧除去比Ａを−８０ｄＢとして、出力部１９から出力される誤差電圧を考える。この条件で式（４）に従って誤差電圧を計算すると、その値は２０ｎＶとなる。電流検出抵抗２１〜２４に、１０ｍΩの抵抗値を用いて、負荷に流れる電流を１Ａとした場合、差電圧は１０ｍＶとなる。この条件では、同相電圧による電流検出誤差が０．０００２％であり、通常、検出誤差として無視できる値となる。 As in the first embodiment, the resistance value R of the voltage dividing resistors 25 to 32 is 20 kΩ, the input bias current of the detection circuits 37 and 38 is 10 nA, and the common-mode voltage rejection ratio A is −80 dB. Consider the error voltage. If the error voltage is calculated according to the equation (4) under this condition, the value is 20 nV. When the resistance value of 10 mΩ is used for the current detection resistors 21 to 24 and the current flowing through the load is 1 A, the differential voltage is 10 mV. Under this condition, the current detection error due to the common-mode voltage is 0.0002%, which is normally a value that can be ignored as the detection error.

式（４）または式（５）から明らかなように、出力部１９の出力電圧Ｖｓ２には直流電源２および３の電圧値Ｖｐの項が含まれないため、電源電圧は出力の誤差電圧に無関係となる。したがって、以上のような電流検出装置によっても、第１実施形態と同様の効果を奏する。 As is clear from the equation (4) or the equation (5), the output voltage Vs2 of the output unit 19 does not include the term of the voltage value Vp of the DC power supplies 2 and 3, so that the power supply voltage is independent of the output error voltage. It becomes. Therefore, the same effect as that of the first embodiment can be obtained by the current detection device as described above.

更に、本実施形態は、負荷１０から見て分圧経路を第１スイッチング素子対８および第２スイッチング素子対９よりも直流電源２および３側に接続した構成になっている。これにより、スイッチング素子４〜７のオン/オフ切り替え時に第１スイッチング素子対８と第２スイッチング素子対９との間に発生する過渡的な電圧変動が分圧抵抗の接続点３３〜３６に印加されることを防ぐことができる。したがって、本実施形態の電流検出装置は、高周波領域での電流検出精度の悪化を抑制する効果も奏する。 Further, in the present embodiment, the voltage dividing path as viewed from the load 10 is connected to the DC power sources 2 and 3 side of the first switching element pair 8 and the second switching element pair 9. As a result, transient voltage fluctuations generated between the first switching element pair 8 and the second switching element pair 9 when the switching elements 4 to 7 are switched on / off are applied to the connection points 33 to 36 of the voltage dividing resistor. Can be prevented. Therefore, the current detection device of the present embodiment also has an effect of suppressing deterioration of current detection accuracy in a high frequency region.

（第３実施形態）
つぎに、図３に基づいて本発明の第３実施形態の電流検出装置について説明する。図３は本発明の第３実施形態の電流検出装置の構成を示す回路図である。図１の電流検出装置と同じ構成については説明を省略する。電流検出装置１と電流検出装置４０との相違点は、電流検出抵抗の接続位置と分圧抵抗の接続位置である。すなわち、第１電流検出抵抗４１および第２電流検出抵抗４２は、それぞれ、直流電源２と第１スイッチング素子対８との間、直流電源２と第２スイッチング素子対９との間に接続される。また、スイッチング素子４と５との接続点とスイッチング素子６と７との接続点との間には、負荷１０のみが接続される。 (Third embodiment)
Next, a current detection device according to a third embodiment of the present invention will be described with reference to FIG. FIG. 3 is a circuit diagram showing the configuration of the current detection device according to the third embodiment of the present invention. The description of the same configuration as that of the current detection device of FIG. 1 is omitted. The difference between the current detection device 1 and the current detection device 40 is the connection position of the current detection resistor and the connection position of the voltage dividing resistor. That is, the first current detection resistor 41 and the second current detection resistor 42 are respectively connected between the DC power supply 2 and the first switching element pair 8 and between the DC power supply 2 and the second switching element pair 9. . Further, only the load 10 is connected between the connection point between the switching elements 4 and 5 and the connection point between the switching elements 6 and 7.

分圧抵抗４３および４４は、抵抗値が概略等しく、直列に接続されて第１分圧経路として構成され、一端は第１スイッチング素子対８と第１電流検出抵抗４１との接続点に接続され、他端は直流電源３に接続される。同様に、分圧抵抗４５および４６は、抵抗値が概略等しく、直列に接続されて第２分圧経路として構成され、一端は第２スイッチング素子対９と第２電流検出抵抗４２との接続点に接続され、他端は直流電源３に接続される。分圧抵抗の接続点４７および４８からの電圧Ｖ３１およびＶ３２は、出力部１９に入力され、負荷１０に流れる電流Ｉｓ３に対応した電圧が出力される。 The voltage dividing resistors 43 and 44 have substantially the same resistance value and are connected in series to form a first voltage dividing path. One end of the voltage dividing resistors 43 and 44 is connected to a connection point between the first switching element pair 8 and the first current detection resistor 41. The other end is connected to the DC power source 3. Similarly, the voltage dividing resistors 45 and 46 have substantially the same resistance value and are connected in series to form a second voltage dividing path, one end of which is a connection point between the second switching element pair 9 and the second current detection resistor 42. The other end is connected to the DC power source 3. The voltages V31 and V32 from the connection points 47 and 48 of the voltage dividing resistor are input to the output unit 19, and a voltage corresponding to the current Is3 flowing through the load 10 is output.

負荷１０は、第１実施形態と同様にして駆動される。電流検出装置４０における電流検出の原理について、第１の負荷駆動状態の場合で説明する。電圧Ｖ３１およびＶ３２は次式のように表される。
Ｖ３１＝−｛１／２（Ｉｓ３×Ｒｓ４１＋Ｉｂ×Ｒ）｝
Ｖ３２＝−１／２（Ｉｂ×Ｒ）
ここで、Ｒｓ４１は第１電流検出抵抗４１の抵抗値、Ｒは分圧抵抗４３〜４６の抵抗値である。出力部１９からはＶ３１とＶ３２の差電圧と、共通に印加される同相電圧による誤差電圧が出力される。よって、出力部１９の出力電圧Ｖｓ３は次式となる。
Ｖｓ３＝１／２（Ｉｓ３×Ｒｓ４１）−Ａ｛１／２（Ｉｂ×Ｒ）｝（６） The load 10 is driven in the same manner as in the first embodiment. The principle of current detection in the current detection device 40 will be described in the case of the first load driving state. The voltages V31 and V32 are expressed as follows:
V31 = − {1/2 (Is3 × Rs41 + Ib × R)}
V32 = −1 / 2 (Ib × R)
Here, Rs41 is a resistance value of the first current detection resistor 41, and R is a resistance value of the voltage dividing resistors 43 to 46. The output unit 19 outputs a difference voltage between V31 and V32 and an error voltage due to the common-mode voltage applied in common. Therefore, the output voltage Vs3 of the output unit 19 is as follows.
Vs3 = 1/2 (Is3 * Rs41) -A {1/2 (Ib * R)} (6)

第２の負荷駆動状態の場合は、Ｖ３１およびＶ３２の電圧は次式のように表される。
Ｖ３１＝−１／２（Ｉｂ×Ｒ）
Ｖ３２＝−｛１／２（Ｉｓ３×Ｒｓ４２＋Ｉｂ×Ｒ）｝
ここで、Ｒｓ４２は第２電流検出抵抗４２の抵抗値である。上記より、出力部１９の出力電圧Ｖｓ３は、次式となる。
Ｖｓ３＝−｛１／２（Ｉｓ３×Ｒｓ４２）｝−Ａ｛１／２（Ｉｂ×Ｒ）｝（７）
式（７）のＲｓ４２をＲｓ４１に置換え、差電圧の項について符号を反転したものが式（６）に相当する。 In the case of the second load driving state, the voltages of V31 and V32 are expressed by the following equations.
V31 = −1 / 2 (Ib × R)
V32 = − {1/2 (Is3 × Rs42 + Ib × R)}
Here, Rs42 is the resistance value of the second current detection resistor 42. From the above, the output voltage Vs3 of the output unit 19 is expressed by the following equation.
Vs3 =-{1/2 (Is3 * Rs42)}-A {1/2 (Ib * R)} (7)
The expression (6) is obtained by replacing Rs42 in the expression (7) with Rs41 and inverting the sign of the difference voltage term.

第１実施形態と同様に、分圧抵抗４３〜４６の抵抗値Ｒを２０ｋΩ、出力部１９の入力バイアス電流を１０ｎＡ、同相電圧除去比Ａを−８０ｄＢとして、出力部１９から出力される誤差電圧を考える。この条件で式（６）に従って誤差電圧を計算すると、その値は１０ｎＶとなる。電流検出抵抗４１および４２の抵抗値を１０ｍΩ、負荷１０に流れる電流を１Ａとした場合、差電圧は５ｍＶとなる。この条件では、同相電圧による電流検出誤差が０．０００２％であり、通常、検出誤差として無視できる値となる。 Similarly to the first embodiment, the resistance value R of the voltage dividing resistors 43 to 46 is 20 kΩ, the input bias current of the output unit 19 is 10 nA, the common-mode voltage rejection ratio A is −80 dB, and the error voltage output from the output unit 19 think of. When the error voltage is calculated according to the equation (6) under this condition, the value is 10 nV. When the resistance value of the current detection resistors 41 and 42 is 10 mΩ and the current flowing through the load 10 is 1 A, the differential voltage is 5 mV. Under this condition, the current detection error due to the common-mode voltage is 0.0002%, which is normally a value that can be ignored as the detection error.

式（６）または式（７）から明らかなように、出力部１９の出力電圧Ｖｓ３には直流電源２および３の電圧値Ｖｐの項が含まれないため、電源電圧は出力の誤差電圧に無関係となる。したがって、以上のような電流検出装置によっても、第１実施形態および第２実施形態と同様の効果を奏する。 As is clear from the equation (6) or the equation (7), the output voltage Vs3 of the output unit 19 does not include the term of the voltage value Vp of the DC power supplies 2 and 3, and therefore the power supply voltage is independent of the output error voltage. It becomes. Therefore, the same effects as those of the first and second embodiments can be obtained by the current detection device as described above.

更に、本実施形態は第２実施形態と同様に分圧経路の接続点を第１スイッチング素子対８および第２スイッチング素子対９よりも直流電源２および３側とした構成となっており、高周波領域での電流検出精度の悪化を抑制する効果も奏する。 Further, in the present embodiment, as in the second embodiment, the connection point of the voltage dividing path is configured to be closer to the DC power supplies 2 and 3 than the first switching element pair 8 and the second switching element pair 9. There is also an effect of suppressing deterioration of current detection accuracy in the region.

（第４実施形態）
つぎに、図４に基づいて本発明の第４実施形態の電流検出装置について説明する。図４は本発明の第４実施形態の電流検出装置の構成を示す回路図である。図１の電流検出装置と同じ構成については説明を省略する。電流検出装置１と電流検出装置６０との相違点は、電流検出抵抗の接続位置と分圧抵抗の接続位置である。すなわち、第１電流検出抵抗６１および第２電流検出抵抗６２は、それぞれ、直流電源３と第１スイッチング素子対８との間、直流電源３と第２スイッチング素子対９との間に接続される。また、スイッチング素子４と５との接続点とスイッチング素子６と７との接続点との間には、負荷１０のみが接続される。 (Fourth embodiment)
Next, a current detection device according to a fourth embodiment of the present invention will be described with reference to FIG. FIG. 4 is a circuit diagram showing a configuration of a current detection device according to the fourth exemplary embodiment of the present invention. The description of the same configuration as that of the current detection device of FIG. 1 is omitted. The difference between the current detection device 1 and the current detection device 60 is the connection position of the current detection resistor and the connection position of the voltage dividing resistor. That is, the first current detection resistor 61 and the second current detection resistor 62 are respectively connected between the DC power supply 3 and the first switching element pair 8 and between the DC power supply 3 and the second switching element pair 9. . Further, only the load 10 is connected between the connection point between the switching elements 4 and 5 and the connection point between the switching elements 6 and 7.

分圧抵抗６３および６４は、抵抗値が概略等しく、直列に接続されて第１分圧経路として構成され、一端は第１スイッチング素子対８と第１電流検出抵抗６１の接続点に接続され、他端は直流電源２に接続される。同様に、分圧抵抗６５および６６は、抵抗値が概略等しく、直列に接続されて第２分圧経路として構成され、一端は第２スイッチング素子対９と第２電流検出抵抗６２の接続点に接続され、他端は直流電源２に接続される。分圧抵抗の接続点６７および６８における電圧Ｖ４１およびＶ４２は、出力部１９に入力され、負荷１０に流れる電流Ｉｓ４に対応した電圧が出力される。 The voltage dividing resistors 63 and 64 have substantially the same resistance value and are connected in series to form a first voltage dividing path. One end of the voltage dividing resistors 63 and 64 is connected to a connection point between the first switching element pair 8 and the first current detection resistor 61. The other end is connected to the DC power source 2. Similarly, the voltage dividing resistors 65 and 66 have substantially the same resistance value and are connected in series to be configured as a second voltage dividing path. One end of the voltage dividing resistors 65 and 66 is connected to the connection point between the second switching element pair 9 and the second current detection resistor 62. The other end is connected to the DC power source 2. The voltages V41 and V42 at the connection points 67 and 68 of the voltage dividing resistor are input to the output unit 19, and a voltage corresponding to the current Is4 flowing through the load 10 is output.

負荷１０は、第１実施形態と同様にして駆動される。電流検出装置６０における電流検出の原理について、第１の負荷駆動状態の場合で説明する。電圧Ｖ４１およびＶ４２は次式のように表される。
Ｖ４１＝−１／２（Ｉｂ×Ｒ）
Ｖ４２＝１／２（Ｉｓ４×Ｒｓ６２−Ｉｂ×Ｒ）
ここで、Ｒｓ６２は第２電流検出抵抗６２の抵抗値、Ｒは分圧抵抗６３〜６６の抵抗値である。出力部１９からはＶ４１とＶ４２の差電圧と、共通に印加される同相電圧による誤差電圧が出力される。よって、出力部１９の出力電圧Ｖｓ４は次式となる。
Ｖｓ４＝１／２（Ｉｓ４×Ｒｓ６２）−Ａ｛１／２（Ｉｂ×Ｒ）｝（８） The load 10 is driven in the same manner as in the first embodiment. The principle of current detection in the current detection device 60 will be described in the case of the first load driving state. The voltages V41 and V42 are expressed as follows:
V41 = −1 / 2 (Ib × R)
V42 = 1/2 (Is4 * Rs62-Ib * R)
Here, Rs62 is the resistance value of the second current detection resistor 62, and R is the resistance value of the voltage dividing resistors 63-66. The output unit 19 outputs a difference voltage between V41 and V42 and an error voltage due to the common-mode voltage applied in common. Therefore, the output voltage Vs4 of the output unit 19 is as follows.
Vs4 = 1/2 (Is4 * Rs62) -A {1/2 (Ib * R)} (8)

第２の負荷駆動状態の場合は、Ｖ４１およびＶ４２の電圧は次式のように表される。
Ｖ４１＝１／２（Ｉｓ４×Ｒｓ６１−Ｉｂ×Ｒ）
Ｖ４２＝−１／２（Ｉｂ×Ｒ）
ここで、Ｒｓ６１は第１電流検出抵抗６１の抵抗値である。上記より、出力部１９の出力電圧Ｖｓ４は、次式となる。
Ｖｓ４＝−｛１／２（Ｉｓ４×Ｒｓ６１）｝−Ａ｛１／２（Ｉｂ×Ｒ）｝（９）
式（９）のＲｓ６１をＲｓ６２に置換え、差電圧の項の符号を反転したものが式（８）に相当する。 In the case of the second load driving state, the voltages of V41 and V42 are expressed by the following equations.
V41 = 1/2 (Is4 × Rs61−Ib × R)
V42 = −1 / 2 (Ib × R)
Here, Rs61 is a resistance value of the first current detection resistor 61. From the above, the output voltage Vs4 of the output unit 19 is expressed by the following equation.
Vs4 =-{1/2 (Is4 * Rs61)}-A {1/2 (Ib * R)} (9)
The expression (8) is obtained by replacing Rs61 in the expression (9) with Rs62 and inverting the sign of the term of the difference voltage.

第１実施形態と同様に、分圧抵抗６３〜６６の抵抗値Ｒを２０ｋΩ、出力部１９の入力バイアス電流を１０ｎＡ、同相電圧除去比Ａを−８０ｄＢとして、出力部１９から出力される誤差電圧を考える。この条件で式（８）に従って誤差電圧を計算すると、その値は１０ｎＶとなる。電流検出抵抗６１および６２の抵抗値を１０ｍΩ、負荷１０に流れる電流を１Ａとした場合、差電圧は５ｍＶとなる。この条件では、同相電圧による電流検出誤差が０．０００２％であり、通常、検出誤差として無視できる値となる。 Similarly to the first embodiment, the error voltage output from the output unit 19 is set such that the resistance value R of the voltage dividing resistors 63 to 66 is 20 kΩ, the input bias current of the output unit 19 is 10 nA, and the common-mode voltage rejection ratio A is −80 dB. think of. If the error voltage is calculated according to the equation (8) under this condition, the value is 10 nV. When the resistance value of the current detection resistors 61 and 62 is 10 mΩ and the current flowing through the load 10 is 1 A, the differential voltage is 5 mV. Under this condition, the current detection error due to the common-mode voltage is 0.0002%, which is normally a value that can be ignored as the detection error.

また、式（８）または式（９）から明らかなように、出力部１９の出力電圧Ｖｓ４には直流電源２および３の電圧値Ｖｐの項が含まれないため、電源電圧は出力の誤差電圧に無関係となる。したがって、以上のような電流検出装置によっても、第１実施形態、第２実施形態および第３実施形態と同様の効果を奏する。 Further, as is clear from the equation (8) or the equation (9), the output voltage Vs4 of the output unit 19 does not include the term of the voltage value Vp of the DC power supplies 2 and 3, so that the power supply voltage is an output error voltage. It becomes irrelevant to. Therefore, the same effects as those of the first embodiment, the second embodiment, and the third embodiment can be obtained by the current detection device as described above.

更に、本実施形態は第２実施形態および第３実施形態と同様に分圧経路の接続点を第１スイッチング素子対８および第２スイッチング素子対９よりも直流電源２および３側とした構成となっており、高周波領域での電流検出精度の悪化を抑制する効果も奏する。 Further, in the present embodiment, as in the second embodiment and the third embodiment, the connection point of the voltage dividing path is set to the DC power sources 2 and 3 side from the first switching element pair 8 and the second switching element pair 9. Thus, the effect of suppressing the deterioration of the current detection accuracy in the high frequency region is also exhibited.

なお、上記の各実施形態において、スイッチング素子又はスイッチング素子対として、ＢＪＴ（バイポーラ・ジャンクション・トランジスタ）、ＩＧＢＴ（絶縁ゲートバイポーラトランジスタ）、パワーオペアンプなどを用いても良い。また、電流検出抵抗は偶数個であれば何個用いてもよい。この場合、分圧経路は、電流検出抵抗と同数用いる。また、スイッチング素子対はフルブリッジ回路を構成できれば、２つ以上の複数のスイッチング素子対で構成しても良い。さらに、負荷１０は直流モータとして構成したが、フルブリッジ回路で駆動できる負荷であれば直流モータ以外の負荷であっても良い。 In each of the above embodiments, BJT (bipolar junction transistor), IGBT (insulated gate bipolar transistor), power operational amplifier, or the like may be used as the switching element or the switching element pair. Any number of current detection resistors may be used as long as they are even numbers. In this case, the same number of voltage dividing paths as the current detection resistors are used. Further, the switching element pairs may be composed of two or more switching element pairs as long as a full bridge circuit can be formed. Furthermore, although the load 10 is configured as a DC motor, it may be a load other than the DC motor as long as it can be driven by a full bridge circuit.

本発明の実施形態に係る電流検出装置は、例えば、光走査装置（ガルバノ装置）の制御システム（駆動装置）に使用することができる。図５は、ガルバノ装置の制御システム７０を示す概略図である。制御システム７０は、レーザ穴あけ装置、レーザトリマ装置、レーザリペア装置などのレーザ加工装置に適用され、レーザ光を反射して被照射体（加工対象の物品）の目標位置に照射するためのシステムであって、ガルバノ装置７２と、制御装置７１とを有する。 The current detection device according to the embodiment of the present invention can be used, for example, in a control system (drive device) of an optical scanning device (galvano device). FIG. 5 is a schematic diagram showing a control system 70 of the galvano device. The control system 70 is a system that is applied to a laser processing apparatus such as a laser drilling apparatus, a laser trimmer apparatus, or a laser repair apparatus, and reflects a laser beam to irradiate a target position of an irradiated object (article to be processed). And a galvano device 72 and a control device 71.

ガルバノ装置７２は、ミラー７２１と、モータ７２２とを含む。ミラー７２１は、モータ７２２の回転軸に取り付けられ、レーザ光を被照射体や他のミラーに向けて反射する。モータ７２２は、対象物としてのミラーを回転させる、即ち、第１の位置（初期状態）から移動させて第２の位置（終端状態）に停止させるＤＣサーボモータである。ここで、モータ７２２の位置は、モータ７２２（の回転軸）の角度も含みうる。 The galvano device 72 includes a mirror 721 and a motor 722. The mirror 721 is attached to the rotating shaft of the motor 722 and reflects the laser light toward the irradiated object and other mirrors. The motor 722 is a DC servo motor that rotates a mirror as an object, that is, moves the mirror from a first position (initial state) and stops it at a second position (terminal state). Here, the position of the motor 722 may also include the angle of the motor 722 (rotational axis thereof).

制御装置７１は、ガルバノ装置７２（のモータ７２２）に対して終端状態制御（ＦＳＣ：Ｆｉｎａｌ−ＳｔａｔｅＣｏｎｔｒｏｌ）を行う機能を有し、検出部７１１と、処理部７１２と、Ｄ／Ａ変換部７１３と、供給部７１４とを含む。 The control device 71 has a function of performing terminal state control (FSC: Final-State Control) on the galvano device 72 (motor 722 thereof), and includes a detection unit 711, a processing unit 712, and a D / A conversion unit 713. And a supply unit 714.

検出部７１１は、例えば、モータ７２２の回転軸に取り付けられたロータリエンコーダで構成され、ミラー７２１の回転角度（即ち、モータ７２２の回転軸の回転角度）を検出する。 The detection unit 711 includes, for example, a rotary encoder attached to the rotation shaft of the motor 722, and detects the rotation angle of the mirror 721 (that is, the rotation angle of the rotation shaft of the motor 722).

処理部７１２は、ＣＰＵやメモリなどを含み、検出部７１１で検出されるミラー７２１の回転角度が目標角度となるように、モータ７２２に供給する電流を時系列的に表す電流プロファイルを生成する処理を行う。なお、電流プロファイルは、換言すれば、モータ７２２を含む制御系を第１状態から第２状態へ遷移させるためにモータ７２２に供給する電流の時系列データである。処理部７１２は、メモリに格納されたプログラムを実行して、後述する電流プロファイルを生成するための各処理を行う。但し、外部の情報処理装置（コンピュータなど）で電流プロファイルを生成するための各処理を行って生成された電流プロファイルを処理部７１２のメモリに格納してもよい。 The processing unit 712 includes a CPU, a memory, and the like, and generates a current profile that represents the current supplied to the motor 722 in time series so that the rotation angle of the mirror 721 detected by the detection unit 711 becomes a target angle. I do. In other words, the current profile is time-series data of current supplied to the motor 722 in order to cause the control system including the motor 722 to transition from the first state to the second state. The processing unit 712 executes a program stored in the memory and performs each process for generating a current profile, which will be described later. However, the current profile generated by performing each process for generating a current profile by an external information processing apparatus (such as a computer) may be stored in the memory of the processing unit 712.

Ｄ／Ａ変換部７１３は、処理部７１２から入力されるデジタル形式の電流プロファイル（デジタル信号）をアナログ形式の電流プロファイル（アナログ信号）に変換して供給部７１４に入力する。 The D / A conversion unit 713 converts the digital current profile (digital signal) input from the processing unit 712 into an analog current profile (analog signal) and inputs the analog current profile (analog signal) to the supply unit 714.

供給部７１４は、例えば、ブリッジ駆動のリニアアンプ（電流アンプ）を含み、処理部７１２で生成した電流プロファイル（電流指令値ｉｒｅｆ）に対応する電流ｉをモータ７２２に供給する。なお、供給部７１４は、電流指令値ｉｒｅｆとモータ７２２に供給する電流ｉとが同じになるように、電流フィードバック制御を行うことが可能である。この電流ｉの検出に、本発明の実施形態に係る電流検出装置が用いられる。 The supply unit 714 includes, for example, a bridge-driven linear amplifier (current amplifier), and supplies a current i corresponding to the current profile (current command value iref) generated by the processing unit 712 to the motor 722. The supply unit 714 can perform current feedback control so that the current command value iref and the current i supplied to the motor 722 are the same. The current detection device according to the embodiment of the present invention is used to detect the current i.

更に本発明の実施形態に係る電流検出装置は、上記以外の駆動装置にも使用することができる。当該電流検出装置を含む駆動装置は、種々の装置、例えば、ロボットや運輸、工作、加工、計測、製造に係る機械または装置（産業機械または装置）等において有用である。ここでは、一例として、産業機械としてのリソグラフィ装置（露光装置等）に備えられるステージ（ＸＹステージ）装置への適用例を説明する。なお、リソグラフィ装置は、パターンを基板に形成する装置であって、例えば、露光装置、描画装置、インプリント装置として具現化されうる。露光装置は、例えば、（極端）紫外光を用いて基板（上のレジスト）に（潜像）パターンを形成する。また、描画装置は、例えば、荷電粒子線（電子線等）を用いて基板（上のレジスト）に（潜像）パターンを形成する。また、インプリント装置は、基板上のインプリント材を成型して基板上にパターンを形成する。 Furthermore, the current detection device according to the embodiment of the present invention can be used for driving devices other than those described above. The drive device including the current detection device is useful in various devices such as robots, transportation, machining, processing, measurement, manufacturing machines or devices (industrial machines or devices), and the like. Here, as an example, an application example to a stage (XY stage) apparatus provided in a lithography apparatus (exposure apparatus or the like) as an industrial machine will be described. The lithography apparatus is an apparatus for forming a pattern on a substrate, and can be embodied as, for example, an exposure apparatus, a drawing apparatus, or an imprint apparatus. For example, the exposure apparatus forms a (latent image) pattern on a substrate (upper resist) using (extreme) ultraviolet light. The drawing apparatus forms a (latent image) pattern on the substrate (the upper resist) using, for example, a charged particle beam (electron beam or the like). The imprint apparatus forms a pattern on the substrate by molding an imprint material on the substrate.

図６は、本応用例におけるステージ装置８０の構成例を示す図である。ステージ装置８０は、Ｙ軸方向へのステージ８０１（可動部）の移動に用いられるＹ軸モータ８０２（駆動部）と、Ｘ軸方向へのステージ８０１（可動部）の移動に用いられるＸ軸モータ８０３（駆動部）とを有する。ここで、両駆動部は、前述の本発明の実施形態に係る電流検出装置を使用したガルバノ装置７２に係る駆動装置（制御システム７０）と同様の駆動装置（但し、駆動対象７２１は除く）を含んで構成されうる。 FIG. 6 is a diagram illustrating a configuration example of the stage apparatus 80 in the application example. The stage device 80 includes a Y-axis motor 802 (driving unit) used for moving the stage 801 (movable unit) in the Y-axis direction and an X-axis motor used for moving the stage 801 (movable unit) in the X-axis direction. 803 (driving unit). Here, both drive units are drive devices similar to the drive device (control system 70) related to the galvano device 72 using the current detection device according to the embodiment of the present invention described above (however, the drive target 721 is excluded). It may be configured to include.

以上、本発明の好ましい実施形態について説明したが、本発明はこれらの実施形態に限定されず、その要旨の範囲内で種々の変形および変更が可能である。 As mentioned above, although preferable embodiment of this invention was described, this invention is not limited to these embodiment, A various deformation | transformation and change are possible within the range of the summary.

１電流検出装置
２、３直流電源
８第１スイッチング素子対
９第２スイッチング素子対
１０負荷
１１第１電流検出抵抗
１２第２電流検出抵抗
１３、１４、１５、１６分圧抵抗
１９出力部 DESCRIPTION OF SYMBOLS 1 Current detection apparatus 2, 3 DC power supply 8 1st switching element pair 9 2nd switching element pair 10 Load 11 1st current detection resistance 12 2nd current detection resistance 13, 14, 15, 16 Voltage dividing resistance 19 Output part

Claims

A current detection device for detecting a current flowing in a load driven by a bipolar DC power supply and a first and second switching element pair,
First and second current sensing resistors;
A first voltage dividing path configured by connecting a plurality of voltage dividing resistors in series via a first connection point, the current path including the first current detection resistor and the load being connected in parallel;
A second voltage dividing path configured by connecting a plurality of voltage dividing resistors in series via a second connection point, the current path including the second current detection resistor and the load being connected in parallel; Have
An output unit that outputs the voltage corresponding to the current by using the voltage from the first connection point and the voltage from the second connection point as inputs; and
A current detection device comprising:

The first current detection resistor is connected between one end of the load and a third connection point to which two switching elements constituting the first switching element pair are connected,
The second current detection resistor is connected between the other end of the load and a fourth connection point to which two switching elements constituting the second switching element pair are connected,
One end of the first voltage dividing path is connected to the one end, and the other end of the first voltage dividing path is connected to the fourth connection point.
One end of the second voltage dividing path is connected to the other end, and the other end of the second voltage dividing path is connected to the third connection point.
The current detection device according to claim 1.

The first current detection resistor is connected between one of a positive electrode and a negative electrode of the DC power supply and the first switching element pair,
The second current detection resistor is connected between the one and the second switching element pair,
One end of the first voltage dividing path is connected to the other of the positive electrode and the negative electrode, and the other end of the first voltage dividing path is a connection point between the first current detection resistor and the first switching element pair. Connected to
One end of the second voltage dividing path is connected to the other, and the other end of the second voltage dividing path is connected to a connection point between the second current detection resistor and the second switching element pair.
The current detection device according to claim 1.

A drive device comprising the current detection device according to claim 1.

An industrial machine comprising the drive device according to claim 4.