[go: up one dir, main page]

JP2015095545A - 半導体モジュールとその製造方法 - Google Patents

半導体モジュールとその製造方法 Download PDF

Info

Publication number
JP2015095545A
JP2015095545A JP2013233902A JP2013233902A JP2015095545A JP 2015095545 A JP2015095545 A JP 2015095545A JP 2013233902 A JP2013233902 A JP 2013233902A JP 2013233902 A JP2013233902 A JP 2013233902A JP 2015095545 A JP2015095545 A JP 2015095545A
Authority
JP
Japan
Prior art keywords
semiconductor element
metal plate
conductor
semiconductor
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2013233902A
Other languages
English (en)
Other versions
JP2015095545A5 (ja
JP6072667B2 (ja
Inventor
泰成 日野
Yasunari Hino
泰成 日野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2013233902A priority Critical patent/JP6072667B2/ja
Priority to US14/445,411 priority patent/US9698078B2/en
Priority to DE102014221636.2A priority patent/DE102014221636B4/de
Priority to CN201410645842.2A priority patent/CN104637910B/zh
Publication of JP2015095545A publication Critical patent/JP2015095545A/ja
Publication of JP2015095545A5 publication Critical patent/JP2015095545A5/ja
Application granted granted Critical
Publication of JP6072667B2 publication Critical patent/JP6072667B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • H01L23/49524Additional leads the additional leads being a tape carrier or flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49575Assemblies of semiconductor devices on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92Specific sequence of method steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05155Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05166Titanium [Ti] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/29294Material of the matrix with a principal constituent of the material being a liquid not provided for in groups H01L2224/292 - H01L2224/29291
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29344Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29347Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29363Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29364Palladium [Pd] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29363Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29369Platinum [Pt] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29399Coating material
    • H01L2224/2949Coating material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331Disposition
    • H01L2224/3318Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181On opposite sides of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001Core members of the connector
    • H01L2224/3701Shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001Core members of the connector
    • H01L2224/3701Shape
    • H01L2224/37011Shape comprising apertures or cavities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001Core members of the connector
    • H01L2224/37099Material
    • H01L2224/371Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/404Connecting portions
    • H01L2224/40475Connecting portions connected to auxiliary connecting means on the bonding areas
    • H01L2224/40499Material of the auxiliary connecting means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73215Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73221Strap and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83201Compression bonding
    • H01L2224/83203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8384Sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8434Bonding interfaces of the connector
    • H01L2224/84345Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/8484Sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92142Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92147Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9221Parallel connecting processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92252Sequential connecting processes the first connecting process involving a strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for individual devices of subclass H10D
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Abstract

【課題】接合強度が高く高寿命な配線接続部を有する半導体モジュールおよびその製造方法の提供を目的とする。
【解決手段】本発明の半導体モジュールは、第1主面と第1主面に対向する第2主面を有し、第1主面に表面電極を、第2主面に裏面電極を、それぞれ有する半導体素子1と、半導体素子1の裏面電極に金属ナノ粒子を用いた焼結接合材2を介して電気的に接続された金属板4と、半導体素子1の表面電極に金属ナノ粒子を用いた焼結接合材2を介して電気的に接続された平板状の導体5と、を備え、金属板4および導体5には、半導体素子1との接合領域から当該接合領域の外へ連通する溝6が設けられている。
【選択図】図1

Description

この発明は、半導体モジュールに関し、特に、半導体モジュール内の配線接続における接合構造に関する。
近年、環境規制の高まりから、環境問題に配慮した高効率、省エネな半導体モジュールの需要が高まっている。半導体モジュールは、産業機器、モータを備えた家電の駆動制御機器、電気自動車、ハイブリッド自動車向けの車載制御機器、鉄道制御機器、太陽光発電の制御機器等に用いられており、高電力に対応することが求められている。特に車載制御機器や鉄道制御機器では、省エネルギーの観点や電気エネルギーの変換ロスを抑える観点から、半導体モジュールが高負荷環境下(高温度環境下)において用いられるようになっており(高Tj化)、高温度環境下でも高効率、低損失で動作することが求められている。具体的には、これまでの通常の動作温度は、Tj=125、150℃以下であったが、今後はTj=175℃、200℃以上の高温環境下での動作が想定される。
そこで、上記高温環境下で、スイッチングロスを抑制し低損失化、高温状態での高効率化を図るべく、半導体モジュールの材料、構造を見直す必要があった。特に、外部電極との配線接続部が最も劣化し易く、配線接続部の高品質、高信頼性、高寿命化の実現が大きな課題であった。
従来のはんだ材料の場合、半導体素子を金属板で挟んだサンドイッチ構造の半導体モジュールでは、半導体素子の裏面電極と表面電極の夫々に対して、加熱を伴うはんだ付けを実施していた。そのため、半導体素子の裏面電極をはんだ付けした後に表面電極をはんだ付けすると、表面電極のはんだ付けの際の加熱で半導体素子の裏面はんだが再溶融し、裏面メタライズのNi食われが進展し、結果として半導体素子が剥離してしまうという問題があった。
そこで、はんだ材料に代えて金属粒子を含む焼結接合材を用いて配線接続を行う半導体モジュールがあった(例えば特許文献1参照)。
特開2007−214340号公報
しかしながら、焼結接合材を用いる場合であっても、半導体素子の裏面電極と表面電極の夫々に対して接合工程を要する。焼結接合材は、はんだ材よりも高温度環境下で長時間の熱履歴から接合するため、半導体モジュールの各部材に熱応力が発生し、歪みや反りが生じるという問題があった。なお、焼結接合材は、周囲を表面安定剤に覆われた金属粒子が溶剤中に安定して分散した構造であり、加熱により表面安定剤(溶剤)が揮発する。従って、裏面電極の接合時に揮発した溶剤が半導体素子の表面電極に付着することにより、表面電極が汚染され、表面電極との接合部において接合品質を確保することができなかった。
そこで、本発明は上述の問題点に鑑み、接合強度が高く高寿命な配線接続部を有する半導体モジュールおよびその製造方法の提供を目的とする。
本発明の半導体モジュールは、第1主面と第1主面に対向する第2主面を有し、第1主面に表面電極を、第2主面に裏面電極を、それぞれ有する半導体素子と、半導体素子の裏面電極に金属ナノ粒子を用いた焼結接合材を介して電気的に接続された金属板と、半導体素子の表面電極に金属ナノ粒子を用いた焼結接合材を介して電気的に接続された平板状の導体と、を備え、金属板および導体には、半導体素子との接合領域から当該接合領域の外へ連通する導通経路が設けられている。
本発明の半導体モジュールは、第1主面と第1主面に対向する第2主面を有し、第1主面に表面電極を、第2主面に裏面電極を、それぞれ有する半導体素子と、半導体素子の裏面電極に金属ナノ粒子を用いた焼結接合材を介して電気的に接続された金属板と、半導体素子の表面電極に金属ナノ粒子を用いた焼結接合材を介して電気的に接続された平板状の導体と、を備え、金属板および導体には、半導体素子との接合領域から当該接合領域の外へ連通する導通経路が設けられている。したがって、接合強度が高く高寿命な配線接続部を有する半導体モジュールとなる。
実施の形態1に係る半導体モジュールの構成を示す断面図である。 実施の形態1に係る半導体モジュールの金属板の構成を示す平面図である。 実施の形態1に係る半導体モジュールの金属板の構成を示す平面図である。 実施の形態1に係る半導体モジュールの金属板の構成を示す平面図である。 実施の形態1に係る半導体モジュールの金属板の平面図である。 実施の形態1の変形例に係る半導体モジュールの構成を示す断面図である。 実施の形態2に係る半導体モジュールの構成を示す断面図である。 実施の形態2に係る半導体モジュールの導体の平面図である。 実施の形態2の変形例に係る半導体モジュールの導体の平面図である。
<A.実施の形態1>
<A−1.構成>
図1は、本発明の実施の形態1に係る半導体モジュール100の構成を示す断面図である。図1において、半導体モジュール100は、2つの半導体素子1、絶縁金属層3、金属板4、導体5、信号端子7、ワイヤ8、および封止樹脂9を備えている。
半導体素子1は、表面(第1主面)に表面電極を、裏面(第2主面)に裏面電極を備えている。IGBTを半導体素子1とすれば、表面電極はゲート電極およびエミッタ電極であり、裏面電極はコレクタ電極である。半導体モジュール100は半導体素子1として、IGBT等のスイッチング機能を有する半導体素子と、ダイオード機能を有する半導体素子と、の2種類の半導体素子を一対として用いる。なお、IGBTの他、MOSFETや他のトランジスタを用いても良いが、以降の説明で半導体素子1はIGBTとダイオードとする。
半導体素子1の裏面電極は、焼結接合材2により金属板4と接続される。焼結接合材2は、金属ナノ粒子と金属ナノ粒子の周囲を覆う表面安定剤(溶剤)を含む。金属ナノ粒子は、直径が数nm〜100nm前後のAg、Cu、Au、Pd、Pt等であるが、本明細書では、金属粒子にAgを用いるものとして説明する。
金属板4は、銅または銅合金等の金属からなる厚さが約3mm以上5mm未満の板である。金属板4は、その熱伝導率が約400W/(m・K)と大きく放熱板としての機能を有しており、その電気抵抗率は約2μΩ・cmと小さい。MOSFETやIGBT等の半導体素子1は、大電流をスイッチング制御するため発熱量が大きいため、熱伝導率の高い放熱板として機能する金属板4が必要となる。また、金属板4は外部端子につながっており、半導体素子1の裏面のコレクタ電極は、金属板4を介して外部端子に電気的に接続されている。
金属板4の、半導体素子1との接合面に対向する面には、絶縁金属層3が固着される。絶縁金属層3は絶縁層と保護金属層との積層構造である。絶縁層には、窒化ホウ素やアルミナ等のフィラーが混入されたエポキシ樹脂が用いられ、熱伝導性の高い銅またはアルミ等からなる保護金属層が絶縁層に固着されている。なお、絶縁金属層3の保護金属層が金属板4と接合している。
半導体素子1が発した熱は、金属板4と絶縁金属層3を伝わって放熱される。なお、絶縁金属層3には、放熱板もしくは複数フィンを備えたヒートシンクまたは水冷フィンが接続されており、高い放熱性能または冷却性能を有している。これにより、半導体素子1の温度上昇が抑制される。
半導体素子1の表面のゲート電極は、ワイヤ8により信号端子7と接続されている。信号端子7により、半導体素子1に外部からの入力(スイッチングON/OFF制御)及び外部制御がなされている。また、半導体素子1の表面のエミッタ電極は、外部出力につながる導体5に接続されている。導体5は、銅または銅合金からなり、厚さが約0.5mm以上2.0mm未満の平板である。
また、半導体モジュール100の上述の構成要素は、樹脂9により封止されている。なお、図では絶縁金属層3の裏面が樹脂9から露出している。しかし、半導体モジュール100は絶縁金属層3を備えていなくても良く、その場合は金属板4の裏面が樹脂9から露出する構成となる。
また、金属板4および絶縁金属層3に代えて、絶縁基板(例えば窒化アルミ等のセラミック基板)を用いても良い。
次に、半導体素子1の表面電極および裏面電極の接合部について説明する。従来、半導体素子の表面から外部電極への配線接続は、アルミ等の金属ワイヤを用いたワイヤボンディングにより固相接合されている。電力用半導体モジュールでは、大電流をスイッチング制御するため、金属ワイヤを複数並列に配設し、かつ、約500μmほどの線径の太い金属ワイヤを採用して、対処していたが、電気容量的にも接合部の寿命に関しても限界に達していた。電力半導体装置の小型化に伴い、半導体素子のサイズも小さくなるので、金属ワイヤの並列数の増加は見込めない。また、金属ワイヤの線径を大きくすると、金属ワイヤを半導体素子1の表面電極に接合する際の加圧力や振動印加力を高めなければならないが、これらの量が過大になれば半導体チップが破壊されてしまう。さらに、電力半導体装置は、配線に対するヒートサイクルやパワーサイクル等、過酷な環境下に耐えなければならない。また、電力半導体装置の仕様出力は、数百ボルト、数千ボルトと増大し続ける傾向にあるため、配線接続部においても高電流に対応し、電気抵抗を低減し、かつ上述の過酷な環境下でも、信頼性を高め高寿命化を図る必要があった。
そこで、半導体モジュール100では、導電率の高い銅または銅合金を含む導体5と半導体素子1の表面電極とを、焼結接合材2を介して加圧および加熱することにより接合し、配線接続を行うこととした。なお、焼結接合材2は直径が数nm〜100nm前後のAg、Cu、Au、Pd、Pt等による金属粒子とその周囲を覆っている表面安定剤を含む構成である。以下では、金属粒子にAgを用いるものとして説明する。
半導体素子1は、SiもしくはSiCから作られているMOSFET、IGBT、またはDiを用いており、1辺が7mm〜15mmである。また、半導体素子1の表面電極および裏面電極にはTi−Ni−Au等のメタライズが施されている。そのメタライズと金属板4および導体5が、焼結接合材2を介して接合されている。
この接合は、ナノサイズ化による融点降下を使用した低温焼結接合による。接合後の焼結接合材2はバルク材と同程度に高融点化し、高い耐熱性と信頼性が得られる。
焼結接合材2において、金属粒子Agは保護膜(表面安定剤)で覆われているため互いに接合することはなく安定しているが、加熱されると表面安定剤(例えば有機物)が揮発し、金属粒子Agが接合する。粒子サイズがナノレベルになると表面エネルギーによりバルク融点より低温で凝集し接合する、という焼結現象を利用するため、従来のように半導体モジュールを高温まで加熱する必要は無く、加熱による熱応力、歪み、または反りを回避することができる。
<A−2.導通経路>
図2は金属板4の平面図であり、金属板4の半導体素子との対向面を示している。図2に示す接合領域Aにおいて、金属板4は焼結接合材2を介して半導体素子1と接合される。また、金属板4の前記対向面には、接合領域Aを通る溝6が形成されている。なお、図示は省略するが、導体5の半導体素子との対向面にも、半導体素子との接合領域を通る溝6が形成されている。また、溝6の深さは、導体5の厚みを超えない範囲で0.5mm以上2.0mm未満とする。
金属板4および導体5において、半導体素子との対向面に溝6を形成する理由を以下に説明する。焼結接合材2は、常温状態で金属粒子Agが接合しないよう、金属粒子Agの周囲に保護膜が形成されている。接合箇所の加熱および加圧を行うと、おおよそ100〜150℃辺りで、その保護膜成分(特に有機溶剤)が分解し、揮発する。しかし、焼結接合材2の両面が金属板4および導体5によって挟まれている構造では、焼結接合材2の保護膜成分が揮発しても接合部の外に排出されにくいため、接合箇所に複数のポーラス(ボイド)が発生してしまう。その結果、接合強度が小さく、熱サイクル試験等の信頼性試験結果が悪く、十分な接合品質を確保することができない。
そこで、半導体モジュール100では、金属板4および導体5の接合面に、溝6を線状に設けることで、分解、揮発した保護膜成分が溝6を通って接合部の外に排出される経路を確保することとした。これにより、ポーラス(ボイド)の少ない高品質な接合が得られ、高耐熱性を有した高信頼性の半導体モジュール100となる。
なお、溝6は焼結接合材2の揮発成分の排出経路としての効果を奏する他、半導体素子1の接合部を樹脂9で封止する際に、アンカー効果によって金属板4および導体5の樹脂9に対する密着性を向上させる効果も奏する。また、溝6により樹脂9との接合面積が確保されることから、半導体モジュールのチップサイズの縮小が可能で、低コスト化にもつながる。
図2には、金属板4の半導体素子との対向面の全面に亘って、縦方向(図2の上下方向)と横方向(図2の左右方向)に形成された直線状の溝6を示している。しかし、溝6は、焼結接合材2の揮発成分を接合部の外に排出する経路として設けられるものであるため、接合領域Aから接合領域Aの外へ連通する導通経路であればよい。従って、溝6は接合領域Aを通って延在して形成されている限り、図3に示すように金属板4の縦方向にのみ形成されていても良いし、金属板4の横方向にのみ形成されていても良い(図示せず)。これにより、溝6の形成時間を抑制し、コストを抑制することができる。
また、溝6は金属板4の半導体素子との対向面の全面に亘って形成される必要はなく、図4に示すように、接合領域Aを通る溝6(以下、「第1溝」とも称する)のみを形成しても良い。言い換えれば、接合領域Aを通って延在する直線状の溝が通過しない領域(図4の領域B)には、溝6が形成されない。これにより、溝6の加工時間が短縮され、金属板4の製造コストが抑えられる。
金属板4の半導体素子との対向面に形成される溝6のうち、接合領域Aを通過しない溝(以下、「第2溝」とも称する)は、樹脂9とのアンカー効果を奏するが、焼結接合材2の揮発成分を排出する経路としては機能しない。そこで、図5に示すように、接合領域Aを通過する第1溝の幅は、接合領域Aを通過しない第2溝の幅(約0.2〜0.5mm)の1.5〜3倍にしても良い。そうすれば、溶剤が多く揮発成分量が多い焼結接合材2を用いて接合する場合でも、溶剤を揮発させることが出来るため、ポーラス(ボイド)発生を抑制し、結果として、高品質な接合、しいては高信頼性の半導体モジュールを得ることができる。なお、第1溝の幅を最大で第2溝の幅の3倍としているのは、これ以上溝幅を大きくするとアンカー効果がなくなり、樹脂9の密着性が低下するためである。
なお、上記では、金属板4の半導体素子1との対向面に形成される溝6について説明したが、導体5の半導体素子1との対向面にも、同様の溝6が形成され、同様の効果を奏する。
<A−3.製造工程>
半導体モジュール100の製造方法について説明する。まず、金属板4上の接合領域Aにペースト状の焼結接合材2を印刷または塗布する。その後、マウンター等の搭載機により半導体素子1を金属板4に搭載する。さらに、半導体素子1の表面(第1主面)上に焼結接合材2を塗布し、その上に導体5を搭載する。
次に、金属板4および導体5を一括して加熱および加圧し、半導体素子1に接合する。このときの温度は200℃〜350℃であり、加圧力は8MPa〜40Mpaである。加熱および加圧時間は、10〜120分である。接合後の接合部(焼結接合材2)の厚さは、20〜200μm程度である。
金属板4および導体5を半導体素子1に接合した後、Alから成るワイヤ8にて、半導体素子1の表面電極のうち、導体5と接続したものとは別の表面電極と信号端子7とをウェッジボンドで配線接続する。
次に、絶縁金属層3を金属板4の半導体素子1に対向する面と反対側の面に接合し、樹脂9にて全体をモールドする。このとき、絶縁金属層3の裏面と、金属板4および導体5の一部は、樹脂9から露出するようにする。
半導体素子1の表面電極を平板状の導体5と接合し、裏面電極を金属板4と接合することにより、上記のように表面電極と裏面電極の配線接続を一括して(1工程)にて行うことができる。焼結接合材2は、周囲を表面安定剤に覆われた金属粒子が溶剤中に安定して分散した構造であり、加熱により表面安定剤(溶剤)が揮発する。従って、裏面電極の接合を行った後に表面電極の接合を行うと、裏面電極の接合時に揮発した溶剤が半導体素子1の表面電極に付着することにより、表面電極が汚染され、表面電極との接合部において接合品質を確保することができなかった。しかし、表面電極と裏面電極とを一括接合することにより、高品質な接合を得ることができ、信頼性の高い半導体モジュール100が得られる。
なお、上記の説明でペースト状の焼結接合材2を用いるとしたが、ペレット(固形)状の焼結接合材2を用いても良い。
<A−4.変形例>
図1に示した半導体モジュール100では、導体5の半導体素子1との対向面と反対側の面(上面)が樹脂9から露出していない。しかし、図6に示す半導体モジュール101のように、導体5の上面が樹脂9から露出しても良い。金属板4と同様に大きな熱容量をもち放熱(冷却)機能を有する導体5を樹脂9から露出させ、放熱グリス材やろう材を介してフィン付きの冷却器もしくは水冷式の冷却器(図示せず)を導体5に取り付けることにより、半導体素子1の表面および裏面の両方から放熱、冷却できる。これにより、温度による半導体素子1のスイッチングロスを抑制することができ、省エネ、高効率化を図ることができる。
<A−5.効果>
実施の形態1の半導体モジュール100,101は、第1主面と第1主面に対向する第2主面を有し、第1主面に表面電極を、第2主面に裏面電極を、それぞれ有する半導体素子1と、半導体素子1の裏面電極に金属ナノ粒子を用いた焼結接合材2を介して電気的に接続された金属板4と、半導体素子1の表面電極に金属ナノ粒子を用いた焼結接合材2を介して電気的に接続された平板状の導体5と、を備えている。そして、金属板4および導体5には、半導体素子1との接合領域Aから接合領域Aの外へ連通する導通経路が設けられている。よって、半導体素子1と金属板4および導体5を接合する際に、焼結接合材2の揮発成分が導通経路によって接合領域Aの外に排出されるため、ポーラス(ボイド)の少ない高品質な接合が得られ、高耐熱性を有した高信頼性の半導体モジュールとなる。
また、金属板4および導体5の、半導体素子1との対向面に溝6が形成され、導通経路は、溝6のうち、半導体素子1との接合領域を通って延在する第1溝を含むものとすれば、半導体素子1と金属板4および導体5を接合する際に、焼結接合材2の揮発成分が溝6を通って接合領域Aの外に排出されるため、ポーラス(ボイド)の少ない高品質な接合が得られ、高耐熱性を有した高信頼性の半導体モジュールとなる。
また、溝6には半導体素子1との接合領域Aを通る第1溝と通らない第2溝があり、第1溝の幅は第2溝の幅よりも大きくする。これにより、溶剤が多く揮発成分量が多い焼結接合材2を用いる場合でも、ポーラス(ボイド)の少ない高品質な接合が得られ、高耐熱性を有した高信頼性の半導体モジュールとなる。
また、半導体素子1との接合領域Aを通る溝6(第1溝)は、金属板4および導体5の、半導体素子1との対向面の一端から他端にかけて形成された直線上の溝としても良く、ポーラス(ボイド)の少ない高品質な接合が得られ、高耐熱性を有した高信頼性の半導体モジュールとなる。
また、実施の形態1の半導体モジュール100の製造方法は、(a)金属板4の半導体素子1を接合すべき領域に、金属ナノ粒子を用いた第1焼結接合材2を配置する工程と、(b)第1焼結接合材2を介して金属板4と半導体素子1の裏面(第2主面)が接触するように、半導体素子1を配置する工程と、(c)半導体素子1の表面(第1主面)上に、金属ナノ粒子を用いた第2焼結接合材2を配置する工程と、(d)第2焼結接合材2を介して半導体素子1の表面(第1主面)上に導体5を配置する工程と、(e)金属板4および導体5を一括して加熱および加圧し、半導体素子1に接合する工程と、を備える。金属板4および導体5を半導体素子1に対して一括接合することにより、高品質な接合を得ることができ、信頼性の高い半導体モジュール100が得られる。
<B.実施の形態2>
<B−1.構成>
図7は、実施の形態2に係る半導体モジュール102の構成を示す断面図である。実施の形態1の半導体モジュール100,101では、焼結接合材2の揮発成分を接合部の外に排出する導通経路として、金属板4および導体5の半導体素子1に対向する面に溝6を設けている。これに対し、実施の形態2の半導体モジュール102では、上記導通経路として、導体5の表面から裏面に亘る貫通孔10を溝6に代えて形成する。
図8は、半導体モジュール102における導体5の平面図である。貫通孔10は、焼結接合材2の揮発成分を接合部の外に排出するため、導体5と半導体素子1との接合領域Aを通って形成される。また、貫通孔10の体積は接合領域に形成される溝6の体積よりも大きくすることができるので、実施の形態1に比べて焼結接合材2の揮発成分を大幅に排出しやすくなる。これにより、半導体素子1の表面電極と導体5との接合部内のポーラス(ボイド)を抑制し、高品質な接合を得ることができる。また、導体5に貫通孔10を設けることにより接合形状が凸形状となることから、接合強度が大きくなる。
図7,8では1つの接合領域Aに対して1つの貫通孔10を形成しているが、図9に示すように複数の貫通孔10を形成しても良い。こうすることにより、接合領域Aの全体から焼結接合材2の揮発成分を排出することができ、ポーラスを抑制した高品質な接合部を得ることができる。また、貫通孔10のサイズは同一接合領域A内において異なっていてもいい。例えば、焼結接合材2の揮発量が多い接合領域Aの中心では、接合領域Aの周囲に比べて貫通孔10の直径を大きくしても良い(図9)。
また、貫通孔10は円形状でなくても良い。
金属板4には、実施の形態1と同様に溝6が形成される。貫通孔10以外の構成は、実施の形態1の半導体モジュール101と同様であるため、説明を省略する。
<B−2.製造工程>
半導体モジュール102の製造方法は、実施の形態1と同一である。すなわち、半導体素子1の裏面電極に対する金属板4の接合と、半導体素子1の表面電極に対する導体5の接合とを、一括して行う。但し、加熱を開始してから焼結温度以下の80〜130℃までは加圧せず、この温度で一定時間(50分以内)維持しても良い。そして、その後、温度上昇させ加熱しながら加圧を実施し、接合を完了する。この場合は、焼結温度以下で時間をかけることにより、より十分に溶剤を揮発させることができる。
<B−3.効果>
実施の形態2に係る半導体モジュール102において、焼結接合材2の揮発成分を接合部の外に排出する導通経路は、金属板4および導体5の、半導体素子1との接合領域Aから、半導体素子1との対向面の反対側の面に亘る貫通孔10を含む。これにより、半導体素子1の表面電極と導体5との接合部内のポーラス(ボイド)を抑制し、高品質な接合を得ることができる。また、導体5に貫通孔10を設けることにより接合形状が凸形状となることから、接合強度が大きくなる。
また、貫通孔10を1つの接合領域Aに対して複数設けることにより、接合領域Aの全体から焼結接合材2の揮発成分を排出することができ、ポーラスを抑制した高品質な接合部を得ることができる。
なお、本発明は、その発明の範囲内において、各実施の形態を自由に組み合わせたり、各実施の形態を適宜、変形、省略したりすることが可能である。
1 半導体素子、2 焼結接合材、3 絶縁金属層、4 金属板、5 導体、6 溝、7 信号端子、8 ワイヤ、9 封止樹脂、10 貫通孔、100〜102 半導体モジュール。

Claims (7)

  1. 第1主面と前記第1主面に対向する第2主面を有し、前記第1主面に表面電極を、前記第2主面に裏面電極を、それぞれ有する半導体素子と、
    前記半導体素子の前記裏面電極に金属ナノ粒子を用いた焼結接合材を介して電気的に接続された金属板と、
    前記半導体素子の前記表面電極に金属ナノ粒子を用いた焼結接合材を介して電気的に接続された平板状の導体と、を備え、
    前記金属板および前記導体には、前記半導体素子との接合領域から当該接合領域の外へ連通する導通経路が設けられている、
    半導体モジュール。
  2. 前記金属板および前記導体の、前記半導体素子との対向面に溝が形成され、
    前記導通経路は、前記溝のうち、前記半導体素子との接合領域を通って延在する第1溝を含む、
    請求項1に記載の半導体モジュール。
  3. 前記溝は、前記半導体素子との接合領域を通らない第2溝を含み、
    前記第1溝の幅は前記第2溝の幅よりも大きい、
    請求項2に記載の半導体モジュール。
  4. 前記第1溝は、前記金属板および前記導体の、前記半導体素子との対向面の一端から他端にかけて、前記接合領域を通って形成された直線上の溝である、
    請求項2又は3に記載の半導体モジュール。
  5. 前記導通経路は、前記金属板および前記導体の、前記半導体素子との接合領域から、前記半導体素子との対向面の反対側の面に亘る貫通孔を含む、
    請求項1〜4のいずれかに記載の半導体モジュール。
  6. 前記貫通孔は複数存在する、
    請求項5に記載の半導体モジュール。
  7. 請求項1〜6のいずれかに記載の半導体モジュールの製造方法であって、
    (a)前記金属板の前記半導体素子を接合すべき領域に、金属ナノ粒子を用いた第1焼結接合材を配置する工程と、
    (b)前記第1焼結接合材を介して前記金属板と前記半導体素子の前記第2主面が接触するように、前記半導体素子を配置する工程と、
    (c)前記半導体素子の前記第1主面上に、金属ナノ粒子を用いた第2焼結接合材を配置する工程と、
    (d)前記第2焼結接合材を介して前記半導体素子の前記第1主面上に前記導体を配置する工程と、
    (e)前記金属板および前記導体を一括して加熱および加圧し、前記半導体素子に対して接合する工程と、
    を備える、
    半導体モジュールの製造方法。
JP2013233902A 2013-11-12 2013-11-12 半導体モジュールとその製造方法 Active JP6072667B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2013233902A JP6072667B2 (ja) 2013-11-12 2013-11-12 半導体モジュールとその製造方法
US14/445,411 US9698078B2 (en) 2013-11-12 2014-07-29 Semiconductor module and method for manufacturing the same
DE102014221636.2A DE102014221636B4 (de) 2013-11-12 2014-10-24 Halbleitermodul und Verfahren zum Herstellen desselben
CN201410645842.2A CN104637910B (zh) 2013-11-12 2014-11-12 半导体模块和其制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013233902A JP6072667B2 (ja) 2013-11-12 2013-11-12 半導体モジュールとその製造方法

Publications (3)

Publication Number Publication Date
JP2015095545A true JP2015095545A (ja) 2015-05-18
JP2015095545A5 JP2015095545A5 (ja) 2016-02-18
JP6072667B2 JP6072667B2 (ja) 2017-02-01

Family

ID=52991095

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013233902A Active JP6072667B2 (ja) 2013-11-12 2013-11-12 半導体モジュールとその製造方法

Country Status (4)

Country Link
US (1) US9698078B2 (ja)
JP (1) JP6072667B2 (ja)
CN (1) CN104637910B (ja)
DE (1) DE102014221636B4 (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017117846A (ja) * 2015-12-21 2017-06-29 三菱電機株式会社 パワー半導体装置およびその製造方法
JP2018088448A (ja) * 2016-11-28 2018-06-07 三菱電機株式会社 半導体装置およびその製造方法
WO2019171684A1 (ja) * 2018-03-07 2019-09-12 三菱電機株式会社 半導体装置及び電力変換装置
WO2025100365A1 (ja) * 2023-11-06 2025-05-15 ミネベアパワーデバイス株式会社 半導体装置

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102016118784A1 (de) 2016-10-04 2018-04-05 Infineon Technologies Ag Chipträger, konfiguriert zur delaminierungsfreien Kapselung und stabilen Sinterung
JP6730450B2 (ja) * 2016-12-06 2020-07-29 株式会社東芝 半導体装置
JP6776923B2 (ja) * 2017-02-06 2020-10-28 株式会社デンソー 半導体装置
JP6673246B2 (ja) * 2017-02-06 2020-03-25 株式会社デンソー 半導体装置
US10872846B2 (en) 2017-06-22 2020-12-22 Renesas Electronics America Inc. Solid top terminal for discrete power devices
JP6945418B2 (ja) * 2017-10-24 2021-10-06 三菱電機株式会社 半導体装置および半導体装置の製造方法
US11515223B2 (en) * 2018-08-29 2022-11-29 Rohm Co., Ltd. Package structure, semiconductor device, and formation method for package structure
DE102023202869A1 (de) * 2023-03-29 2024-10-02 Zf Friedrichshafen Ag Verfahren zur Herstellung einer elektrischen Anordnung

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006202586A (ja) * 2005-01-20 2006-08-03 Nissan Motor Co Ltd 接合方法及び接合構造
JP2006269682A (ja) * 2005-03-23 2006-10-05 Fuji Electric Holdings Co Ltd 半導体装置およびその製造方法
JP2012069640A (ja) * 2010-09-22 2012-04-05 Toshiba Corp 半導体装置及び電力用半導体装置

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2194477A (en) * 1986-08-28 1988-03-09 Stc Plc Solder joint
US5842275A (en) * 1995-09-05 1998-12-01 Ford Motor Company Reflow soldering to mounting pads with vent channels to avoid skewing
JP3420153B2 (ja) * 2000-01-24 2003-06-23 Necエレクトロニクス株式会社 半導体装置及びその製造方法
CN1184684C (zh) 2000-10-05 2005-01-12 三洋电机株式会社 半导体装置和半导体模块
JP2002280503A (ja) * 2001-03-16 2002-09-27 Unisia Jecs Corp 半導体装置
US6774482B2 (en) * 2002-12-27 2004-08-10 International Business Machines Corporation Chip cooling
US7748440B2 (en) * 2004-06-01 2010-07-06 International Business Machines Corporation Patterned structure for a thermal interface
JP4598687B2 (ja) 2006-02-09 2010-12-15 株式会社日立製作所 金属超微粒子使用接合材及びそれを用いた半導体装置
DE102007063308A1 (de) 2007-12-28 2009-07-02 Robert Bosch Gmbh Diode
US8124449B2 (en) * 2008-12-02 2012-02-28 Infineon Technologies Ag Device including a semiconductor chip and metal foils
JP5039070B2 (ja) * 2009-02-12 2012-10-03 株式会社東芝 半導体装置
JP5467799B2 (ja) * 2009-05-14 2014-04-09 ルネサスエレクトロニクス株式会社 半導体装置
WO2011142013A1 (ja) * 2010-05-12 2011-11-17 トヨタ自動車株式会社 半導体装置
US8718720B1 (en) * 2010-07-30 2014-05-06 Triquint Semiconductor, Inc. Die including a groove extending from a via to an edge of the die
US8766100B2 (en) * 2011-03-02 2014-07-01 Samsung Electronics Co., Ltd. Printed circuit board and semiconductor package using the same
DE102011078582A1 (de) 2011-07-04 2013-01-10 Robert Bosch Gmbh Verfahren zum Herstellen von strukturierten Sinterschichten und Halbleiterbauelement mit strukturierter Sinterschicht
ITMI20111776A1 (it) * 2011-09-30 2013-03-31 St Microelectronics Srl Sistema elettronico per saldatura a rifusione
US8587019B2 (en) * 2011-10-11 2013-11-19 Ledengin, Inc. Grooved plate for improved solder bonding
US9888568B2 (en) * 2012-02-08 2018-02-06 Crane Electronics, Inc. Multilayer electronics assembly and method for embedding electrical circuit components within a three dimensional module
US9087833B2 (en) * 2012-11-30 2015-07-21 Samsung Electronics Co., Ltd. Power semiconductor devices

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006202586A (ja) * 2005-01-20 2006-08-03 Nissan Motor Co Ltd 接合方法及び接合構造
JP2006269682A (ja) * 2005-03-23 2006-10-05 Fuji Electric Holdings Co Ltd 半導体装置およびその製造方法
JP2012069640A (ja) * 2010-09-22 2012-04-05 Toshiba Corp 半導体装置及び電力用半導体装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017117846A (ja) * 2015-12-21 2017-06-29 三菱電機株式会社 パワー半導体装置およびその製造方法
JP2018088448A (ja) * 2016-11-28 2018-06-07 三菱電機株式会社 半導体装置およびその製造方法
WO2019171684A1 (ja) * 2018-03-07 2019-09-12 三菱電機株式会社 半導体装置及び電力変換装置
JPWO2019171684A1 (ja) * 2018-03-07 2021-01-14 三菱電機株式会社 半導体装置及び電力変換装置
JP7019024B2 (ja) 2018-03-07 2022-02-14 三菱電機株式会社 半導体装置及び電力変換装置
WO2025100365A1 (ja) * 2023-11-06 2025-05-15 ミネベアパワーデバイス株式会社 半導体装置

Also Published As

Publication number Publication date
US9698078B2 (en) 2017-07-04
DE102014221636A1 (de) 2015-05-13
DE102014221636B4 (de) 2022-08-18
JP6072667B2 (ja) 2017-02-01
CN104637910A (zh) 2015-05-20
CN104637910B (zh) 2018-01-16
US20150130076A1 (en) 2015-05-14

Similar Documents

Publication Publication Date Title
JP6072667B2 (ja) 半導体モジュールとその製造方法
JP6945418B2 (ja) 半導体装置および半導体装置の製造方法
JP6265693B2 (ja) 半導体装置およびその製造方法
JP2007251076A (ja) パワー半導体モジュール
US8912644B2 (en) Semiconductor device and method for manufacturing same
CN105531817B (zh) 半导体模块单元以及半导体模块
CN109727960B (zh) 半导体模块、其制造方法以及电力变换装置
WO2007145303A1 (ja) 半導体モジュールおよびその製造方法
WO2011040313A1 (ja) 半導体モジュールおよびその製造方法
JP7196047B2 (ja) 電気回路体、電力変換装置、および電気回路体の製造方法
US10475721B2 (en) Power semiconductor device and method for manufacturing same
WO2018020640A1 (ja) 半導体装置
WO2017037837A1 (ja) 半導体装置およびパワーエレクトロニクス装置
JP2016100424A (ja) パワーモジュール
JP2007215302A (ja) インバータ装置
JP2007096252A (ja) 液冷式回路基板および液冷式電子装置
JP5242629B2 (ja) 電力用半導体素子
JP5682511B2 (ja) 半導体モジュール
JP4594831B2 (ja) 電力用半導体素子
JP5444486B2 (ja) インバータ装置
JP2020141056A (ja) 電力変換装置
US20230223317A1 (en) Resin-sealed semiconductor device
JP2022098581A (ja) パワーモジュールおよび電力変換装置
JP2015088571A (ja) 半導体モジュールの製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20151224

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20151224

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20160923

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20160927

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20161108

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20161206

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20161228

R150 Certificate of patent or registration of utility model

Ref document number: 6072667

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250