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JP2012226569A - Data protection device for storage device - Google Patents

Data protection device for storage device Download PDF

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JP2012226569A
JP2012226569A JP2011093786A JP2011093786A JP2012226569A JP 2012226569 A JP2012226569 A JP 2012226569A JP 2011093786 A JP2011093786 A JP 2011093786A JP 2011093786 A JP2011093786 A JP 2011093786A JP 2012226569 A JP2012226569 A JP 2012226569A
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power supply
data
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storage device
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Tatsuro Kumakura
達郎 熊倉
Toru Nishi
徹 西
Koichi Yoda
航一 依田
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Fanuc Corp
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Abstract

PROBLEM TO BE SOLVED: To provide a data protection device for a storage device that can prevent data having been transferred to a cache area from disappearing.SOLUTION: There is provided a data protection device for a storage device 13 characterized in: a nonvolatile data storage area 14 which is provided to a controller 10 and stores data; and a cache area 15 which temporarily stores data stored in the nonvolatile data storage area 14; the data protection device for the storage device including an internal power unit 11 which converts the voltage of electric power supplied from an input power supply into a predetermined voltage; a power supply monitoring circuit 12 which monitors the voltage of the electric power supplied from the input power supply and outputs a voltage drop signal when detecting the voltage dropping; a central arithmetic processing circuit 16 which outputs a write command for writing the data stored in the cache area 15 to the nonvolatile data area 14 when the voltage drop signal is received; and writing the data stored in the cache area 15 to the nonvolatile data storage area 14 when the write command is output.

Description

本発明は、記憶装置のデータ保護装置に関する。   The present invention relates to a data protection device for a storage device.

工作機械や産業用機械などを制御する制御装置１０は、不揮発性データ記憶領域１４およびキャッシュ領域１５を有する記憶装置１３、制御装置１０をプログラムに従って制御する中央演算処理装置１６、入力電源の一次側電圧を二次側電圧である各種電源電圧に変換して制御装置１０を構成する各部に供給する内部電源装置１１、内部電源装置１１に入力する入力電源の一次側電圧を監視する電源監視回路１２を備える。電源監視回路１２は制御装置１０の内部電源装置１１に入力する入力電源の入力電圧が安定した電圧かを監視し、電源の電圧異常や瞬停を検出する回路である。電源監視回路１２は入力電圧が安定した電圧になった場合、入力電源が良好であることを示す電源ＯＫ信号を中央演算処理装置１６に送る。   A control device 10 that controls a machine tool, an industrial machine, or the like includes a storage device 13 having a nonvolatile data storage area 14 and a cache area 15, a central processing unit 16 that controls the control device 10 according to a program, and a primary side of an input power source An internal power supply 11 that converts the voltage into various power supply voltages that are secondary voltages and supplies them to each component of the control device 10, and a power supply monitoring circuit 12 that monitors the primary voltage of the input power input to the internal power supply 11 Is provided. The power supply monitoring circuit 12 is a circuit that monitors whether the input voltage of the input power supply input to the internal power supply device 11 of the control device 10 is a stable voltage, and detects an abnormal power supply voltage or a momentary power failure. When the input voltage becomes stable, the power supply monitoring circuit 12 sends a power supply OK signal indicating that the input power supply is good to the central processing unit 16.

制御装置１０に備わった不揮発性データ記憶領域１４およびキャッシュ領域１５を有する記憶装置１３へのデータの書き込みは、まず基幹側（以下、「ホスト」という）から記憶装置１３内のキャッシュ領域１５へ書き込みが行われ、次に、キャッシュ領域１５に書き込まれたデータを記憶装置１３の不揮発性データ記憶領域１４に書き込む順序で行われる。こうすることで、ホストから記憶装置１０内部の不揮発性データ記憶領域１４への転送速度を高速化している。   Data is written to the storage device 13 having the nonvolatile data storage area 14 and the cache area 15 provided in the control device 10 first from the backbone side (hereinafter referred to as “host”) to the cache area 15 in the storage device 13. Next, the data written in the cache area 15 is performed in the order in which the data is written in the nonvolatile data storage area 14 of the storage device 13. By doing so, the transfer speed from the host to the nonvolatile data storage area 14 in the storage device 10 is increased.

ここで、このキャッシュ領域１５から記憶装置１０の不揮発性データ記憶領域１４への書き込みが行われる前に、何らかの原因で記憶装置１３の電源が切断されると、ホストが記憶装置１０に書き込んだと認識しているデータが実際には記憶装置１０の不揮発性データ記憶領域に保存されずに消失してしまうため、システムが異常状態になる。   Here, if the storage device 13 is powered off for some reason before writing from the cache area 15 to the nonvolatile data storage area 14 of the storage device 10, the host writes to the storage device 10. Since the recognized data is actually not saved in the non-volatile data storage area of the storage device 10 and disappears, the system enters an abnormal state.

キャッシュ領域１５に書き込みがなされたデータの保護は、無停電電源装置にシステム全体の電源保護装置、あるいは記憶装置専用のバックアップ電源装置の様に、専用の電源装置を用いて記憶装置の電源を保持することにより従来は行われていた。あるいは、不揮発性メモリをキャッシュとして用いる方法が特許文献１や特許文献２に開示されている。   Protection of data written to the cache area 15 is achieved by holding the power of the storage device using a dedicated power supply, such as an uninterruptible power supply, a power protection device for the entire system, or a backup power supply dedicated to the storage device. This has been done in the past. Alternatively, Patent Literature 1 and Patent Literature 2 disclose a method using a nonvolatile memory as a cache.

特開２００７−１７９５４６号公報JP 2007-179546 A 特開２００９−１８７０６２号公報JP 2009-187062 A

しかしながら、電源装置や不揮発性メモリを追加するために装置全体の体積が増えたり、費用が増えたりするという問題がある。また、安価な不揮発性メモリはメモリ自体の寿命が短く信頼性が低い問題がある。
そこで本発明の目的は、キャッシュ領域に転送済みのデータが消失することを防止することが可能な記憶装置のデータ保護装置を提供することである。 However, there is a problem that the volume of the entire device increases or the cost increases due to the addition of the power supply device and the nonvolatile memory. In addition, an inexpensive nonvolatile memory has a problem that the memory itself has a short lifetime and low reliability.
SUMMARY OF THE INVENTION An object of the present invention is to provide a data protection device for a storage device that can prevent data transferred to a cache area from being lost.

本願の請求項１に係る発明は、データが格納される不揮発性データ記憶領域と、該不揮発性データ記憶領域に格納されるデータを一時的に保存するキャッシュ領域とを有する記憶装置のデータ保護装置であって、外部電源装置から供給される電源の電圧を所定の電圧に変換する内部電源装置と、前記外部電源装置から供給される電源の電圧を監視し、該電圧の低下を検出した時に電圧低下信号を出力する電源監視回路と、前記電圧低下信号を受信したとき、前記キャッシュ領域に保存されたデータを前記不揮発性データ領域に書き込む書き込み指令を出力する中央演算処理回路と、前記書き込み指令が出力されたとき、前記キャッシュ領域に保存されたデータを前記不揮発性データ記憶領域に書き込むことを特徴とする記憶装置のデータ保護装置である。   The invention according to claim 1 of the present application provides a data protection device for a storage device having a nonvolatile data storage area for storing data and a cache area for temporarily storing data stored in the nonvolatile data storage area An internal power supply that converts the voltage of the power supplied from the external power supply to a predetermined voltage, and the voltage of the power supplied from the external power supply is monitored, and a voltage is detected when a decrease in the voltage is detected. A power monitoring circuit that outputs a drop signal; a central processing circuit that outputs a write command to write data stored in the cache area to the nonvolatile data area when the voltage drop signal is received; and the write command Data protection of the storage device, wherein when the data is output, the data stored in the cache area is written to the nonvolatile data storage area It is the location.

本発明により、キャッシュ領域に転送済みのデータが消失することを防止することが可能な記憶装置のデータ保護装置を提供できる。   According to the present invention, it is possible to provide a data protection device for a storage device that can prevent data transferred to a cache area from being lost.

本発明の記憶装置のデータ保護装置の実施形態を説明する図である。It is a figure explaining embodiment of the data protection apparatus of the memory | storage device of this invention. 中央演算処理装置の動作について説明するフローチャートである。It is a flowchart explaining operation | movement of a central processing unit. 従来のデータ記憶装置を説明する図である。It is a figure explaining the conventional data storage device.

以下、本発明の実施形態を図面と共に説明する。
図１は、本発明の記憶装置のデータ保護装置の実施形態を説明する図である。
制御装置１０は、不揮発性データ記憶領域１４およびキャッシュ領域１５を有する記憶装置１３、制御装置１０をプログラムに従って制御する中央演算処理装置１６、入力電源の一次側電圧を二次側電圧である各種電源電圧に変換して制御装置１０を構成する各部に供給する内部電源装置１１、内部電源装置１１に入力する入力電源の一次側電圧を監視する電源監視回路１２を備える。記憶装置１３は、ホスト（図示せず）から送られてきたデータ（プログラムを含む）をまず、一次的に、キャッシュ領域１５に格納し、次に、不揮発性データ記憶領域に格納する制御部（例えば、マイクロプロセッサ、あるいは、ロジック回路）を備える。キャッシュ領域１５は一時的なデータの格納領域である。記憶装置１３は例えばハードディスク、あるいは半導体ディスクである。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram illustrating an embodiment of a data protection device for a storage device according to the present invention.
The control device 10 includes a storage device 13 having a non-volatile data storage area 14 and a cache area 15, a central processing unit 16 that controls the control device 10 according to a program, and various power sources that use a primary side voltage of an input power source as a secondary side voltage. An internal power supply device 11 that converts the voltage into voltage and supplies it to each part of the control device 10, and a power supply monitoring circuit 12 that monitors the primary voltage of the input power input to the internal power supply device 11 are provided. The storage device 13 first stores data (including a program) sent from a host (not shown) temporarily in the cache area 15 and then stores it in the nonvolatile data storage area ( For example, a microprocessor or a logic circuit) is provided. The cache area 15 is a temporary data storage area. The storage device 13 is, for example, a hard disk or a semiconductor disk.

内部電源装置１１は、入力電源である一次側電圧を各種電源電圧である二次側電圧に変換する装置であり、例えば、入力電源が交流商用電源とすると二次側電圧は制御装置の各部が必要とする直流電圧に変換する。内部電源装置１１はコンデンサなどを構成部品に含んでいることから、入力電源の電圧が急激に低下したり、電源開閉スイッチ（図示せず）がオフとなった場合、入力電源の電圧が低下あるいは電源開閉スイッチがオフとなり電源の電圧が低下してから、所定の時間が経過した後に低下を開始する。所定の時間は内部電源装置によって異なるが、たかだが数ミリ秒〜数十ミリ秒である。   The internal power supply 11 is a device that converts a primary side voltage that is an input power source into a secondary side voltage that is various power source voltages. For example, when the input power source is an AC commercial power source, the secondary side voltage is Convert to the required DC voltage. Since the internal power supply device 11 includes a capacitor or the like as a component, when the voltage of the input power supply is abruptly reduced or when a power switch (not shown) is turned off, the voltage of the input power supply is reduced or The reduction starts after a predetermined time elapses after the power switch is turned off and the power supply voltage drops. Although the predetermined time varies depending on the internal power supply, it is at most several milliseconds to several tens of milliseconds.

電源監視回路１２は制御装置１０の内部電源装置１１に入力する入力電源の入力電圧が安定した電圧かを監視し、電源の電圧異常や瞬停を検出する回路である。電源監視回路１２は入力電圧が安定した電圧になった場合、電源電圧が良好であることを示す電源ＯＫ信号を中央演算処理装置１６に送る。   The power supply monitoring circuit 12 is a circuit that monitors whether the input voltage of the input power supply input to the internal power supply device 11 of the control device 10 is a stable voltage, and detects an abnormal power supply voltage or a momentary power failure. When the input voltage becomes a stable voltage, the power supply monitoring circuit 12 sends a power supply OK signal indicating that the power supply voltage is good to the central processing unit 16.

制御装置１０に備わった不揮発性データ記憶領域１４およびキャッシュ領域１５を有する記憶装置１３へのデータの書き込みは、まず基幹側（以下、「ホスト」という）から記憶装置１３内のキャッシュ領域１５へ書き込みが行われ、次に、キャッシュ領域１５に書き込まれたデータを記憶装置１３の不揮発性データ記憶領域１４に書き込む順序で行われる。こうすることで、ホストから記憶装置１０内部の不揮発性データ記憶領域１４への転送速度を高速化している。   Data is written to the storage device 13 having the nonvolatile data storage area 14 and the cache area 15 provided in the control device 10 first from the backbone side (hereinafter referred to as “host”) to the cache area 15 in the storage device 13. Next, the data written in the cache area 15 is performed in the order in which the data is written in the nonvolatile data storage area 14 of the storage device 13. By doing so, the transfer speed from the host to the nonvolatile data storage area 14 in the storage device 10 is increased.

本発明の実施形態では、電源監視回路１２は、入力電源の一次側電圧が所定電圧より低くなるなど電源異常を検知した場合に、中央演算処理装置１６へ電圧低下アラーム信号を
出力する電圧低下アラーム信号出力部を備えている。 In the embodiment of the present invention, the power supply monitoring circuit 12 outputs a voltage drop alarm signal to the central processing unit 16 when a power supply abnormality is detected such that the primary voltage of the input power supply becomes lower than a predetermined voltage. A signal output unit is provided.

上記本発明の実施形態の構成によって、電源監視回路１２は、電源の電圧異常や瞬時停止を、電源の一次側電圧（外部電源装置から供給される電源の電圧）を監視することにより二次側電圧（内部電源装置で変換した電圧）が異常になる前に検出し、二次側電圧が異常になる前に電源監視回路１２の電圧低下アラーム信号出力部から中央演算処理装置１６に電圧低下アラーム信号を出力する。電圧低下アラーム信号を受け取った中央演算処理装置１６は記憶装置１３に、キャッシュ領域１５に一次的に格納されたデータを速やかに不揮発性データ記憶領域１４に書き込むことを指令する書き込みコマンドを送る。記憶装置１４は、キャッシュ領域１５に一次的に格納されたデータを不揮発性データ領域１４へ書き込み、キャッシュ領域に転送済みのデータが消失することを防止することができる。   According to the configuration of the embodiment of the present invention, the power supply monitoring circuit 12 monitors the primary side voltage of the power supply (the power supply voltage supplied from the external power supply device) for the secondary side by monitoring the power supply voltage abnormality or instantaneous stop. A voltage drop alarm is detected from the voltage drop alarm signal output unit of the power supply monitoring circuit 12 to the central processing unit 16 before the voltage (voltage converted by the internal power supply device) becomes abnormal and before the secondary side voltage becomes abnormal. Output a signal. Upon receiving the voltage drop alarm signal, the central processing unit 16 sends a write command instructing the storage device 13 to immediately write the data temporarily stored in the cache area 15 to the nonvolatile data storage area 14. The storage device 14 can write data temporarily stored in the cache area 15 to the nonvolatile data area 14 and prevent data transferred to the cache area from being lost.

図２は中央演算処理装置の動作を説明するフローチャートである。電圧低下アラーム信号を受け取ると（ステップＳＡ０１）、中央演算処理装置１６は、記憶装置１３に対して、キャッシュ領域１５に一次的に格納されているデータを不揮発性データ領域に１４に書き込むことを指令する書き込みコマンドを送り（ステップＳＡ０２）、処理を終了する。   FIG. 2 is a flowchart for explaining the operation of the central processing unit. When the voltage drop alarm signal is received (step SA01), the central processing unit 16 instructs the storage device 13 to write the data temporarily stored in the cache area 15 to the nonvolatile data area. The write command to be sent is sent (step SA02), and the process is terminated.

電源監視回路１２において入力電源の電圧低下を検知して、電源監視回路１２から中央演算処理装置１６に対して電圧低下アラーム信号を送り、中央演算処理装置１６から記憶装置１３に対して書き込みコマンドを送り、記憶装置１３は書き込みコマンドを受け取り、キャッシュ領域１５に一次的に格納されたデータを不揮発性データ領域に格納するまでの処理を、内部電源装置１１から供給される二次側電圧が低下する前（電源監視回路１２、記憶装置１３、中央演算処理装置１６が正常に動作する電圧の間）に行う。   The power supply monitoring circuit 12 detects a voltage drop of the input power supply, sends a voltage drop alarm signal from the power supply monitoring circuit 12 to the central processing unit 16, and sends a write command from the central processing unit 16 to the storage device 13. The storage device 13 receives the write command, and the secondary voltage supplied from the internal power supply device 11 is reduced until the data temporarily stored in the cache area 15 is stored in the nonvolatile data area. Performed before (between the voltages at which the power supply monitoring circuit 12, the storage device 13, and the central processing unit 16 operate normally).

本発明の実施形態によれば、一次側電圧の低下（スイッチオフによる電源断も含む）によるデータの保存を不揮発性メモリ領域に確実に行うことができる記憶装置のデータ保護装置を提供できる。   According to the embodiment of the present invention, it is possible to provide a data protection device for a storage device capable of reliably storing data in a nonvolatile memory area due to a decrease in primary side voltage (including power interruption due to switch-off).

１０ 制御装置
１１ 内部電源装置
１２ 電源監視回路
１３ 記憶装置
１４ 不揮発性データ記憶領域
１５ キャッシュ領域
１６ 中央演算処理装置
１７ 電圧低下アラーム信号出力部 DESCRIPTION OF SYMBOLS 10 Control apparatus 11 Internal power supply device 12 Power supply monitoring circuit 13 Storage device 14 Nonvolatile data storage area 15 Cache area 16 Central processing unit 17 Voltage drop alarm signal output part

Claims (1)

データが格納される不揮発性データ記憶領域と、該不揮発性データ記憶領域に格納されるデータを一時的に保存するキャッシュ領域とを有する記憶装置のデータ保護装置であって、
外部電源装置から供給される電源の電圧を所定の電圧に変換する内部電源装置と、
前記外部電源装置から供給される電源の電圧を監視し、該電圧の低下を検出した時に電圧低下信号を出力する電源監視回路と、
前記電圧低下信号を受信したとき、前記キャッシュ領域に保存されたデータを前記不揮発性データ領域に書き込む書き込み指令を出力する中央演算処理回路と、
前記書き込み指令が出力されたとき、前記キャッシュ領域に保存されたデータを前記不揮発性データ記憶領域に書き込むことを特徴とする記憶装置のデータ保護装置。 A data protection device for a storage device having a nonvolatile data storage area for storing data and a cache area for temporarily storing data stored in the nonvolatile data storage area,
An internal power supply that converts the voltage of the power supplied from the external power supply into a predetermined voltage; and
A power supply monitoring circuit that monitors the voltage of the power supplied from the external power supply and outputs a voltage drop signal when detecting a drop in the voltage;
When receiving the voltage drop signal, a central processing circuit that outputs a write command to write data stored in the cache area to the nonvolatile data area; and
A data protection device for a storage device, wherein when the write command is output, data stored in the cache area is written to the nonvolatile data storage area.
JP2011093786A 2011-04-20 2011-04-20 Data protection device for storage device Pending JP2012226569A (en)

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JP2015060351A (en) * 2013-09-18 2015-03-30 コニカミノルタ株式会社 Information processor and method of controlling power-off of information processor
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WO2019003336A1 (en) * 2017-06-28 2019-01-03 株式会社Ｆｕｊｉ Component mounting machine head
JP2020102167A (en) * 2018-12-25 2020-07-02 キヤノン株式会社 Information processor and control method thereof
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CN104798000A (en) * 2012-11-20 2015-07-22 丰田铁工株式会社 Vehicular grip structure
JP2015060351A (en) * 2013-09-18 2015-03-30 コニカミノルタ株式会社 Information processor and method of controlling power-off of information processor
JP2017537369A (en) * 2014-09-24 2017-12-14 ゼットティーイー コーポレーションＺｔｅ Ｃｏｒｐｏｒａｔｉｏｎ Data storage method, apparatus and terminal
WO2016076850A1 (en) * 2014-11-12 2016-05-19 Hewlett Packard Enterprise Development Lp Data write back
WO2016076854A1 (en) * 2014-11-12 2016-05-19 Hewlett Packard Enterprise Development Lp Server node shutdown
US10838818B2 (en) 2015-09-18 2020-11-17 Hewlett Packard Enterprise Development Lp Memory persistence from a volatile memory to a non-volatile memory
WO2019003336A1 (en) * 2017-06-28 2019-01-03 株式会社Ｆｕｊｉ Component mounting machine head
JPWO2019003336A1 (en) * 2017-06-28 2020-02-27 株式会社Ｆｕｊｉ Head for component mounting machine
JP2020102167A (en) * 2018-12-25 2020-07-02 キヤノン株式会社 Information processor and control method thereof
JP7292872B2 (en) 2018-12-25 2023-06-19 キヤノン株式会社 Information processing device and information processing device control method

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